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Richard Henderson80bb2ff2011-08-25 11:38:59 -10001/*
2 * QEMU Alpha PCI support functions.
3 *
4 * Some of this isn't very Alpha specific at all.
5 *
6 * ??? Sparse memory access not implemented.
7 */
8
9#include "config.h"
Paolo Bonzini47b43a12013-03-18 17:36:02 +010010#include "alpha_sys.h"
Paolo Bonzini1de7afc2012-12-17 18:20:00 +010011#include "qemu/log.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010012#include "sysemu/sysemu.h"
Richard Henderson80bb2ff2011-08-25 11:38:59 -100013
14
Richard Henderson36610492013-07-08 15:46:37 -070015/* Fallback for unassigned PCI I/O operations. Avoids MCHK. */
16
17static uint64_t ignore_read(void *opaque, hwaddr addr, unsigned size)
18{
19 return 0;
20}
21
22static void ignore_write(void *opaque, hwaddr addr, uint64_t v, unsigned size)
23{
24}
25
26const MemoryRegionOps alpha_pci_ignore_ops = {
27 .read = ignore_read,
28 .write = ignore_write,
29 .endianness = DEVICE_LITTLE_ENDIAN,
30 .valid = {
31 .min_access_size = 1,
32 .max_access_size = 8,
33 },
34 .impl = {
35 .min_access_size = 1,
36 .max_access_size = 8,
37 },
38};
39
40
Richard Henderson80bb2ff2011-08-25 11:38:59 -100041/* PCI config space reads/writes, to byte-word addressable memory. */
Avi Kivitya8170e52012-10-23 12:30:10 +020042static uint64_t bw_conf1_read(void *opaque, hwaddr addr,
Richard Henderson80bb2ff2011-08-25 11:38:59 -100043 unsigned size)
44{
45 PCIBus *b = opaque;
46 return pci_data_read(b, addr, size);
47}
48
Avi Kivitya8170e52012-10-23 12:30:10 +020049static void bw_conf1_write(void *opaque, hwaddr addr,
Richard Henderson80bb2ff2011-08-25 11:38:59 -100050 uint64_t val, unsigned size)
51{
52 PCIBus *b = opaque;
53 pci_data_write(b, addr, val, size);
54}
55
56const MemoryRegionOps alpha_pci_conf1_ops = {
57 .read = bw_conf1_read,
58 .write = bw_conf1_write,
59 .endianness = DEVICE_LITTLE_ENDIAN,
60 .impl = {
61 .min_access_size = 1,
62 .max_access_size = 4,
63 },
64};
65
66/* PCI/EISA Interrupt Acknowledge Cycle. */
67
Avi Kivitya8170e52012-10-23 12:30:10 +020068static uint64_t iack_read(void *opaque, hwaddr addr, unsigned size)
Richard Henderson80bb2ff2011-08-25 11:38:59 -100069{
70 return pic_read_irq(isa_pic);
71}
72
Avi Kivitya8170e52012-10-23 12:30:10 +020073static void special_write(void *opaque, hwaddr addr,
Richard Henderson80bb2ff2011-08-25 11:38:59 -100074 uint64_t val, unsigned size)
75{
76 qemu_log("pci: special write cycle");
77}
78
79const MemoryRegionOps alpha_pci_iack_ops = {
80 .read = iack_read,
81 .write = special_write,
82 .endianness = DEVICE_LITTLE_ENDIAN,
83 .valid = {
84 .min_access_size = 4,
85 .max_access_size = 4,
86 },
87 .impl = {
88 .min_access_size = 4,
89 .max_access_size = 4,
90 },
91};