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Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -02001/*
2 * QEMU x86 ISA testdev
3 *
4 * Copyright (c) 2012 Avi Kivity, Gerd Hoffmann, Marcelo Tosatti
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25/*
26 * This device is used to test KVM features specific to the x86 port, such
27 * as emulation, power management, interrupt routing, among others. It's meant
28 * to be used like:
29 *
30 * qemu-system-x86_64 -device pc-testdev -serial stdio \
31 * -device isa-debug-exit,iobase=0xf4,iosize=0x4 \
32 * -kernel /home/lmr/Code/virt-test.git/kvm/unittests/msr.flat
33 *
34 * Where msr.flat is one of the KVM unittests, present on a separate repo,
35 * git://git.kernel.org/pub/scm/virt/kvm/kvm-unit-tests.git
36*/
37
Peter Maydellb6a0aa02016-01-26 18:17:03 +000038#include "qemu/osdep.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010039#include "hw/hw.h"
40#include "hw/qdev.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010041#include "hw/isa/isa.h"
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -020042
43#define IOMEM_LEN 0x10000
44
45typedef struct PCTestdev {
46 ISADevice parent_obj;
47
48 MemoryRegion ioport;
Paolo Bonzinid2f5ea92013-07-22 15:54:38 +020049 MemoryRegion ioport_byte;
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -020050 MemoryRegion flush;
51 MemoryRegion irq;
52 MemoryRegion iomem;
53 uint32_t ioport_data;
54 char iomem_buf[IOMEM_LEN];
55} PCTestdev;
56
57#define TYPE_TESTDEV "pc-testdev"
58#define TESTDEV(obj) \
Gerd Hoffmann00e4d0d2013-01-07 12:59:43 +010059 OBJECT_CHECK(PCTestdev, (obj), TYPE_TESTDEV)
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -020060
61static void test_irq_line(void *opaque, hwaddr addr, uint64_t data,
62 unsigned len)
63{
Gerd Hoffmann00e4d0d2013-01-07 12:59:43 +010064 PCTestdev *dev = opaque;
65 ISADevice *isa = ISA_DEVICE(dev);
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -020066
67 qemu_set_irq(isa_get_irq(isa, addr), !!data);
68}
69
70static const MemoryRegionOps test_irq_ops = {
71 .write = test_irq_line,
72 .valid.min_access_size = 1,
73 .valid.max_access_size = 1,
74 .endianness = DEVICE_LITTLE_ENDIAN,
75};
76
77static void test_ioport_write(void *opaque, hwaddr addr, uint64_t data,
78 unsigned len)
79{
Gerd Hoffmann00e4d0d2013-01-07 12:59:43 +010080 PCTestdev *dev = opaque;
Paolo Bonzinib7faba72013-07-22 15:54:26 +020081 int bits = len * 8;
82 int start_bit = (addr & 3) * 8;
83 uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit;
84 dev->ioport_data &= ~mask;
85 dev->ioport_data |= data << start_bit;
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -020086}
87
88static uint64_t test_ioport_read(void *opaque, hwaddr addr, unsigned len)
89{
Gerd Hoffmann00e4d0d2013-01-07 12:59:43 +010090 PCTestdev *dev = opaque;
Paolo Bonzinib7faba72013-07-22 15:54:26 +020091 int bits = len * 8;
92 int start_bit = (addr & 3) * 8;
93 uint32_t mask = ((uint32_t)-1 >> (32 - bits)) << start_bit;
94 return (dev->ioport_data & mask) >> start_bit;
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -020095}
96
97static const MemoryRegionOps test_ioport_ops = {
98 .read = test_ioport_read,
99 .write = test_ioport_write,
100 .endianness = DEVICE_LITTLE_ENDIAN,
101};
102
Paolo Bonzinid2f5ea92013-07-22 15:54:38 +0200103static const MemoryRegionOps test_ioport_byte_ops = {
104 .read = test_ioport_read,
105 .write = test_ioport_write,
106 .valid.min_access_size = 1,
107 .valid.max_access_size = 4,
108 .impl.min_access_size = 1,
109 .impl.max_access_size = 1,
110 .endianness = DEVICE_LITTLE_ENDIAN,
111};
112
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200113static void test_flush_page(void *opaque, hwaddr addr, uint64_t data,
114 unsigned len)
115{
116 hwaddr page = 4096;
117 void *a = cpu_physical_memory_map(data & ~0xffful, &page, 0);
118
119 /* We might not be able to get the full page, only mprotect what we actually
120 have mapped */
Stefan Weil549db5c2013-01-05 09:33:43 +0100121#if defined(CONFIG_POSIX)
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200122 mprotect(a, page, PROT_NONE);
123 mprotect(a, page, PROT_READ|PROT_WRITE);
Stefan Weil549db5c2013-01-05 09:33:43 +0100124#endif
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200125 cpu_physical_memory_unmap(a, page, 0, 0);
126}
127
128static const MemoryRegionOps test_flush_ops = {
129 .write = test_flush_page,
130 .valid.min_access_size = 4,
131 .valid.max_access_size = 4,
132 .endianness = DEVICE_LITTLE_ENDIAN,
133};
134
135static uint64_t test_iomem_read(void *opaque, hwaddr addr, unsigned len)
136{
Gerd Hoffmann00e4d0d2013-01-07 12:59:43 +0100137 PCTestdev *dev = opaque;
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200138 uint64_t ret = 0;
139 memcpy(&ret, &dev->iomem_buf[addr], len);
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200140
141 return ret;
142}
143
144static void test_iomem_write(void *opaque, hwaddr addr, uint64_t val,
145 unsigned len)
146{
Gerd Hoffmann00e4d0d2013-01-07 12:59:43 +0100147 PCTestdev *dev = opaque;
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200148 memcpy(&dev->iomem_buf[addr], &val, len);
149 dev->iomem_buf[addr] = val;
150}
151
152static const MemoryRegionOps test_iomem_ops = {
153 .read = test_iomem_read,
154 .write = test_iomem_write,
155 .endianness = DEVICE_LITTLE_ENDIAN,
156};
157
Andreas Färberdb895a12012-11-25 02:37:14 +0100158static void testdev_realizefn(DeviceState *d, Error **errp)
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200159{
Andreas Färberdb895a12012-11-25 02:37:14 +0100160 ISADevice *isa = ISA_DEVICE(d);
161 PCTestdev *dev = TESTDEV(d);
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200162 MemoryRegion *mem = isa_address_space(isa);
163 MemoryRegion *io = isa_address_space_io(isa);
164
Paolo Bonzini3c161542013-06-06 21:25:08 -0400165 memory_region_init_io(&dev->ioport, OBJECT(dev), &test_ioport_ops, dev,
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200166 "pc-testdev-ioport", 4);
Paolo Bonzinid2f5ea92013-07-22 15:54:38 +0200167 memory_region_init_io(&dev->ioport_byte, OBJECT(dev),
168 &test_ioport_byte_ops, dev,
169 "pc-testdev-ioport-byte", 4);
Paolo Bonzini3c161542013-06-06 21:25:08 -0400170 memory_region_init_io(&dev->flush, OBJECT(dev), &test_flush_ops, dev,
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200171 "pc-testdev-flush-page", 4);
Paolo Bonzini3c161542013-06-06 21:25:08 -0400172 memory_region_init_io(&dev->irq, OBJECT(dev), &test_irq_ops, dev,
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200173 "pc-testdev-irq-line", 24);
Paolo Bonzini3c161542013-06-06 21:25:08 -0400174 memory_region_init_io(&dev->iomem, OBJECT(dev), &test_iomem_ops, dev,
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200175 "pc-testdev-iomem", IOMEM_LEN);
176
177 memory_region_add_subregion(io, 0xe0, &dev->ioport);
178 memory_region_add_subregion(io, 0xe4, &dev->flush);
Paolo Bonzinid2f5ea92013-07-22 15:54:38 +0200179 memory_region_add_subregion(io, 0xe8, &dev->ioport_byte);
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200180 memory_region_add_subregion(io, 0x2000, &dev->irq);
181 memory_region_add_subregion(mem, 0xff000000, &dev->iomem);
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200182}
183
184static void testdev_class_init(ObjectClass *klass, void *data)
185{
Andreas Färberdb895a12012-11-25 02:37:14 +0100186 DeviceClass *dc = DEVICE_CLASS(klass);
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200187
Marcel Apfelbaum125ee0e2013-07-29 17:17:45 +0300188 set_bit(DEVICE_CATEGORY_MISC, dc->categories);
Andreas Färberdb895a12012-11-25 02:37:14 +0100189 dc->realize = testdev_realizefn;
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200190}
191
Andreas Färber8c43a6f2013-01-10 16:19:07 +0100192static const TypeInfo testdev_info = {
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200193 .name = TYPE_TESTDEV,
194 .parent = TYPE_ISA_DEVICE,
Gerd Hoffmann00e4d0d2013-01-07 12:59:43 +0100195 .instance_size = sizeof(PCTestdev),
Lucas Meneghel Rodriguesee0cc542012-12-13 12:48:53 -0200196 .class_init = testdev_class_init,
197};
198
199static void testdev_register_types(void)
200{
201 type_register_static(&testdev_info);
202}
203
204type_init(testdev_register_types)