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balrog997641a2008-12-15 02:05:00 +00001/* omap_sx1.c Support for the Siemens SX1 smartphone emulation.
2 *
3 * Copyright (C) 2008
4 * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 * Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com>
6 *
7 * based on PalmOne's (TM) PDAs support (palm.c)
8 */
9
10/*
11 * PalmOne's (TM) PDAs.
12 *
13 * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
aurel32fad6cb12009-01-04 22:05:52 +000025 * You should have received a copy of the GNU General Public License along
Blue Swirl8167ee82009-07-16 20:47:01 +000026 * with this program; if not, see <http://www.gnu.org/licenses/>.
balrog997641a2008-12-15 02:05:00 +000027 */
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010028#include "hw/hw.h"
Paolo Bonzini28ecbae2012-11-28 12:06:30 +010029#include "ui/console.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010030#include "hw/arm/omap.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010031#include "hw/boards.h"
Peter Maydellbd2be152013-04-09 15:26:55 +010032#include "hw/arm/arm.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010033#include "hw/block/flash.h"
Markus Armbrusterfa1d36d2014-10-07 13:59:13 +020034#include "sysemu/block-backend.h"
Andreas Färberdb3fd062013-07-29 18:27:58 +020035#include "sysemu/qtest.h"
Paolo Bonzini022c62c2012-12-17 18:19:49 +010036#include "exec/address-spaces.h"
balrog997641a2008-12-15 02:05:00 +000037
38/*****************************************************************************/
39/* Siemens SX1 Cellphone V1 */
40/* - ARM OMAP310 processor
41 * - SRAM 192 kB
42 * - SDRAM 32 MB at 0x10000000
43 * - Boot flash 16 MB at 0x00000000
44 * - Application flash 8 MB at 0x04000000
45 * - 3 serial ports
46 * - 1 SecureDigital
47 * - 1 LCD display
48 * - 1 RTC
49 */
50
51/*****************************************************************************/
52/* Siemens SX1 Cellphone V2 */
53/* - ARM OMAP310 processor
54 * - SRAM 192 kB
55 * - SDRAM 32 MB at 0x10000000
56 * - Boot flash 32 MB at 0x00000000
57 * - 3 serial ports
58 * - 1 SecureDigital
59 * - 1 LCD display
60 * - 1 RTC
61 */
62
Avi Kivitya8170e52012-10-23 12:30:10 +020063static uint64_t static_read(void *opaque, hwaddr offset,
Benoît Canetba158022011-11-28 13:53:34 +010064 unsigned size)
balrog997641a2008-12-15 02:05:00 +000065{
66 uint32_t *val = (uint32_t *) opaque;
Benoît Canetba158022011-11-28 13:53:34 +010067 uint32_t mask = (4 / size) - 1;
balrog997641a2008-12-15 02:05:00 +000068
Benoît Canetba158022011-11-28 13:53:34 +010069 return *val >> ((offset & mask) << 3);
balrog997641a2008-12-15 02:05:00 +000070}
71
Avi Kivitya8170e52012-10-23 12:30:10 +020072static void static_write(void *opaque, hwaddr offset,
Benoît Canetba158022011-11-28 13:53:34 +010073 uint64_t value, unsigned size)
balrog997641a2008-12-15 02:05:00 +000074{
75#ifdef SPY
Benoît Canetba158022011-11-28 13:53:34 +010076 printf("%s: value %" PRIx64 " %u bytes written at 0x%x\n",
77 __func__, value, size, (int)offset);
balrog997641a2008-12-15 02:05:00 +000078#endif
79}
80
Benoît Canetba158022011-11-28 13:53:34 +010081static const MemoryRegionOps static_ops = {
82 .read = static_read,
83 .write = static_write,
84 .endianness = DEVICE_NATIVE_ENDIAN,
balrog997641a2008-12-15 02:05:00 +000085};
86
87#define sdram_size 0x02000000
88#define sector_size (128 * 1024)
89#define flash0_size (16 * 1024 * 1024)
90#define flash1_size ( 8 * 1024 * 1024)
91#define flash2_size (32 * 1024 * 1024)
92#define total_ram_v1 (sdram_size + flash0_size + flash1_size + OMAP15XX_SRAM_SIZE)
93#define total_ram_v2 (sdram_size + flash2_size + OMAP15XX_SRAM_SIZE)
94
95static struct arm_boot_info sx1_binfo = {
96 .loader_start = OMAP_EMIFF_BASE,
97 .ram_size = sdram_size,
98 .board_id = 0x265,
99};
100
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300101static void sx1_init(MachineState *machine, const int version)
balrog997641a2008-12-15 02:05:00 +0000102{
Andreas Färber59b91992012-05-14 01:17:03 +0200103 struct omap_mpu_state_s *mpu;
Avi Kivity4b3fedf2011-08-09 19:35:00 +0300104 MemoryRegion *address_space = get_system_memory();
Benoît Canetba158022011-11-28 13:53:34 +0100105 MemoryRegion *flash = g_new(MemoryRegion, 1);
106 MemoryRegion *flash_1 = g_new(MemoryRegion, 1);
107 MemoryRegion *cs = g_new(MemoryRegion, 4);
balrog997641a2008-12-15 02:05:00 +0000108 static uint32_t cs0val = 0x00213090;
109 static uint32_t cs1val = 0x00215070;
110 static uint32_t cs2val = 0x00001139;
111 static uint32_t cs3val = 0x00001139;
Gerd Hoffmann751c6a12009-07-22 16:42:57 +0200112 DriveInfo *dinfo;
balrog997641a2008-12-15 02:05:00 +0000113 int fl_idx;
114 uint32_t flash_size = flash0_size;
Anthony Liguori01e04512011-08-25 14:39:18 -0500115 int be;
balrog997641a2008-12-15 02:05:00 +0000116
117 if (version == 2) {
118 flash_size = flash2_size;
119 }
120
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300121 mpu = omap310_mpu_init(address_space, sx1_binfo.ram_size,
122 machine->cpu_model);
balrog997641a2008-12-15 02:05:00 +0000123
124 /* External Flash (EMIFS) */
Hu Tao49946532014-09-09 13:27:55 +0800125 memory_region_init_ram(flash, NULL, "omap_sx1.flash0-0", flash_size,
126 &error_abort);
Avi Kivityc5705a72011-12-20 15:59:12 +0200127 vmstate_register_ram_global(flash);
Benoît Canetba158022011-11-28 13:53:34 +0100128 memory_region_set_readonly(flash, true);
129 memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash);
balrog997641a2008-12-15 02:05:00 +0000130
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -0400131 memory_region_init_io(&cs[0], NULL, &static_ops, &cs0val,
Benoît Canetba158022011-11-28 13:53:34 +0100132 "sx1.cs0", OMAP_CS0_SIZE - flash_size);
133 memory_region_add_subregion(address_space,
134 OMAP_CS0_BASE + flash_size, &cs[0]);
135
136
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -0400137 memory_region_init_io(&cs[2], NULL, &static_ops, &cs2val,
Benoît Canetba158022011-11-28 13:53:34 +0100138 "sx1.cs2", OMAP_CS2_SIZE);
139 memory_region_add_subregion(address_space,
140 OMAP_CS2_BASE, &cs[2]);
141
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -0400142 memory_region_init_io(&cs[3], NULL, &static_ops, &cs3val,
Benoît Canetba158022011-11-28 13:53:34 +0100143 "sx1.cs3", OMAP_CS3_SIZE);
144 memory_region_add_subregion(address_space,
145 OMAP_CS2_BASE, &cs[3]);
balrog997641a2008-12-15 02:05:00 +0000146
147 fl_idx = 0;
Blue Swirl3d08ff62010-03-29 19:23:56 +0000148#ifdef TARGET_WORDS_BIGENDIAN
Anthony Liguori01e04512011-08-25 14:39:18 -0500149 be = 1;
Blue Swirl3d08ff62010-03-29 19:23:56 +0000150#else
Anthony Liguori01e04512011-08-25 14:39:18 -0500151 be = 0;
Blue Swirl3d08ff62010-03-29 19:23:56 +0000152#endif
balrog997641a2008-12-15 02:05:00 +0000153
Gerd Hoffmann751c6a12009-07-22 16:42:57 +0200154 if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
Avi Kivitycfe5f012011-08-04 15:55:30 +0300155 if (!pflash_cfi01_register(OMAP_CS0_BASE, NULL,
156 "omap_sx1.flash0-1", flash_size,
Markus Armbruster4be74632014-10-07 13:59:18 +0200157 blk_by_legacy_dinfo(dinfo),
Markus Armbrusterfa1d36d2014-10-07 13:59:13 +0200158 sector_size, flash_size / sector_size,
Anthony Liguori01e04512011-08-25 14:39:18 -0500159 4, 0, 0, 0, 0, be)) {
balrog997641a2008-12-15 02:05:00 +0000160 fprintf(stderr, "qemu: Error registering flash memory %d.\n",
161 fl_idx);
162 }
163 fl_idx++;
164 }
165
166 if ((version == 1) &&
Gerd Hoffmann751c6a12009-07-22 16:42:57 +0200167 (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
Hu Tao49946532014-09-09 13:27:55 +0800168 memory_region_init_ram(flash_1, NULL, "omap_sx1.flash1-0", flash1_size,
169 &error_abort);
Avi Kivityc5705a72011-12-20 15:59:12 +0200170 vmstate_register_ram_global(flash_1);
Benoît Canetba158022011-11-28 13:53:34 +0100171 memory_region_set_readonly(flash_1, true);
172 memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1);
173
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -0400174 memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
Benoît Canetba158022011-11-28 13:53:34 +0100175 "sx1.cs1", OMAP_CS1_SIZE - flash1_size);
176 memory_region_add_subregion(address_space,
177 OMAP_CS1_BASE + flash1_size, &cs[1]);
balrog997641a2008-12-15 02:05:00 +0000178
Avi Kivitycfe5f012011-08-04 15:55:30 +0300179 if (!pflash_cfi01_register(OMAP_CS1_BASE, NULL,
180 "omap_sx1.flash1-1", flash1_size,
Markus Armbruster4be74632014-10-07 13:59:18 +0200181 blk_by_legacy_dinfo(dinfo),
Markus Armbrusterfa1d36d2014-10-07 13:59:13 +0200182 sector_size, flash1_size / sector_size,
Anthony Liguori01e04512011-08-25 14:39:18 -0500183 4, 0, 0, 0, 0, be)) {
balrog997641a2008-12-15 02:05:00 +0000184 fprintf(stderr, "qemu: Error registering flash memory %d.\n",
185 fl_idx);
186 }
187 fl_idx++;
188 } else {
Paolo Bonzini2c9b15c2013-06-06 05:41:28 -0400189 memory_region_init_io(&cs[1], NULL, &static_ops, &cs1val,
Benoît Canetba158022011-11-28 13:53:34 +0100190 "sx1.cs1", OMAP_CS1_SIZE);
191 memory_region_add_subregion(address_space,
192 OMAP_CS1_BASE, &cs[1]);
balrog997641a2008-12-15 02:05:00 +0000193 }
194
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300195 if (!machine->kernel_filename && !fl_idx && !qtest_enabled()) {
balrog997641a2008-12-15 02:05:00 +0000196 fprintf(stderr, "Kernel or Flash image must be specified\n");
197 exit(1);
198 }
199
200 /* Load the kernel. */
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300201 sx1_binfo.kernel_filename = machine->kernel_filename;
202 sx1_binfo.kernel_cmdline = machine->kernel_cmdline;
203 sx1_binfo.initrd_filename = machine->initrd_filename;
Peter Maydelldacecf52013-10-25 15:44:38 +0100204 arm_load_kernel(mpu->cpu, &sx1_binfo);
balrog997641a2008-12-15 02:05:00 +0000205
aurel325f70aab2009-02-07 15:20:14 +0000206 /* TODO: fix next line */
207 //~ qemu_console_resize(ds, 640, 480);
balrog997641a2008-12-15 02:05:00 +0000208}
209
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300210static void sx1_init_v1(MachineState *machine)
balrog997641a2008-12-15 02:05:00 +0000211{
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300212 sx1_init(machine, 1);
balrog997641a2008-12-15 02:05:00 +0000213}
214
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300215static void sx1_init_v2(MachineState *machine)
balrog997641a2008-12-15 02:05:00 +0000216{
Marcel Apfelbaum3ef96222014-05-07 17:42:57 +0300217 sx1_init(machine, 2);
balrog997641a2008-12-15 02:05:00 +0000218}
219
Anthony Liguorif80f9ec2009-05-20 18:38:09 -0500220static QEMUMachine sx1_machine_v2 = {
balrog997641a2008-12-15 02:05:00 +0000221 .name = "sx1",
222 .desc = "Siemens SX1 (OMAP310) V2",
223 .init = sx1_init_v2,
balrog997641a2008-12-15 02:05:00 +0000224};
225
Anthony Liguorif80f9ec2009-05-20 18:38:09 -0500226static QEMUMachine sx1_machine_v1 = {
balrog997641a2008-12-15 02:05:00 +0000227 .name = "sx1-v1",
228 .desc = "Siemens SX1 (OMAP310) V1",
229 .init = sx1_init_v1,
balrog997641a2008-12-15 02:05:00 +0000230};
Anthony Liguorif80f9ec2009-05-20 18:38:09 -0500231
232static void sx1_machine_init(void)
233{
234 qemu_register_machine(&sx1_machine_v2);
235 qemu_register_machine(&sx1_machine_v1);
236}
237
238machine_init(sx1_machine_init);