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aurel324ce7ff62008-04-07 19:47:14 +00001/*
2 * QEMU MIPS Jazz support
3 *
4 * Copyright (c) 2007-2008 Hervé Poussineau
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25#include "hw.h"
26#include "mips.h"
Blue Swirlb970ea82010-03-27 07:26:16 +000027#include "mips_cpudevs.h"
aurel324ce7ff62008-04-07 19:47:14 +000028#include "pc.h"
Gerd Hoffmann488cb992012-10-17 09:54:19 +020029#include "serial.h"
aurel324ce7ff62008-04-07 19:47:14 +000030#include "isa.h"
31#include "fdc.h"
32#include "sysemu.h"
Isaku Yamahata0dfa5ef2011-01-21 19:53:45 +090033#include "arch_init.h"
aurel324ce7ff62008-04-07 19:47:14 +000034#include "boards.h"
35#include "net.h"
Gerd Hoffmann1cd3af52009-10-30 09:53:59 +010036#include "esp.h"
Paul Brookbba831e2009-05-19 14:52:42 +010037#include "mips-bios.h"
Blue Swirlca20cf32009-09-20 14:58:02 +000038#include "loader.h"
Isaku Yamahata1d914fa2010-05-14 16:29:17 +090039#include "mc146818rtc.h"
Jan Kiszkab1277b02012-02-01 20:31:39 +010040#include "i8254.h"
Jan Kiszka302fe512012-02-17 11:24:34 +010041#include "pcspk.h"
Blue Swirl24463332010-08-24 15:22:24 +000042#include "blockdev.h"
Hervé Poussineaucd3e2402011-07-18 23:34:22 +020043#include "sysbus.h"
Avi Kivitybe20f9e2011-08-15 17:17:37 +030044#include "exec-memory.h"
aurel324ce7ff62008-04-07 19:47:14 +000045
aurel324ce7ff62008-04-07 19:47:14 +000046enum jazz_model_e
47{
48 JAZZ_MAGNUM,
aurel32c1711482008-04-08 19:51:06 +000049 JAZZ_PICA61,
aurel324ce7ff62008-04-07 19:47:14 +000050};
51
52static void main_cpu_reset(void *opaque)
53{
Andreas Färberf37f4352012-05-05 14:06:50 +020054 MIPSCPU *cpu = opaque;
55
56 cpu_reset(CPU(cpu));
aurel324ce7ff62008-04-07 19:47:14 +000057}
58
Avi Kivity60581b32011-08-08 21:59:19 +030059static uint64_t rtc_read(void *opaque, target_phys_addr_t addr, unsigned size)
aurel324ce7ff62008-04-07 19:47:14 +000060{
Blue Swirlafcea8c2009-09-20 16:05:47 +000061 return cpu_inw(0x71);
aurel324ce7ff62008-04-07 19:47:14 +000062}
63
Avi Kivity60581b32011-08-08 21:59:19 +030064static void rtc_write(void *opaque, target_phys_addr_t addr,
65 uint64_t val, unsigned size)
aurel324ce7ff62008-04-07 19:47:14 +000066{
Blue Swirlafcea8c2009-09-20 16:05:47 +000067 cpu_outw(0x71, val & 0xff);
aurel324ce7ff62008-04-07 19:47:14 +000068}
69
Avi Kivity60581b32011-08-08 21:59:19 +030070static const MemoryRegionOps rtc_ops = {
71 .read = rtc_read,
72 .write = rtc_write,
73 .endianness = DEVICE_NATIVE_ENDIAN,
aurel324ce7ff62008-04-07 19:47:14 +000074};
75
Avi Kivity60581b32011-08-08 21:59:19 +030076static uint64_t dma_dummy_read(void *opaque, target_phys_addr_t addr,
77 unsigned size)
78{
79 /* Nothing to do. That is only to ensure that
80 * the current DMA acknowledge cycle is completed. */
81 return 0xff;
82}
aurel324ce7ff62008-04-07 19:47:14 +000083
Avi Kivity60581b32011-08-08 21:59:19 +030084static void dma_dummy_write(void *opaque, target_phys_addr_t addr,
85 uint64_t val, unsigned size)
aurel32c6945b12009-01-01 13:03:36 +000086{
87 /* Nothing to do. That is only to ensure that
88 * the current DMA acknowledge cycle is completed. */
89}
90
Avi Kivity60581b32011-08-08 21:59:19 +030091static const MemoryRegionOps dma_dummy_ops = {
92 .read = dma_dummy_read,
93 .write = dma_dummy_write,
94 .endianness = DEVICE_NATIVE_ENDIAN,
aurel32c6945b12009-01-01 13:03:36 +000095};
96
aurel324ce7ff62008-04-07 19:47:14 +000097#define MAGNUM_BIOS_SIZE_MAX 0x7e000
98#define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
99
Blue Swirl4556bd82010-05-22 08:00:52 +0000100static void cpu_request_exit(void *opaque, int irq, int level)
101{
Andreas Färber61c56c82012-03-14 01:38:23 +0100102 CPUMIPSState *env = cpu_single_env;
Blue Swirl4556bd82010-05-22 08:00:52 +0000103
104 if (env && level) {
105 cpu_exit(env);
106 }
107}
108
Richard Hendersonc2d0d012011-08-10 15:28:11 -0700109static void mips_jazz_init(MemoryRegion *address_space,
110 MemoryRegion *address_space_io,
111 ram_addr_t ram_size,
112 const char *cpu_model,
113 enum jazz_model_e jazz_model)
aurel324ce7ff62008-04-07 19:47:14 +0000114{
Paul Brook5cea8592009-05-30 00:52:44 +0100115 char *filename;
aurel324ce7ff62008-04-07 19:47:14 +0000116 int bios_size, n;
Andreas Färber6bd8da62012-05-05 14:05:42 +0200117 MIPSCPU *cpu;
Andreas Färber61c56c82012-03-14 01:38:23 +0100118 CPUMIPSState *env;
aurel324ce7ff62008-04-07 19:47:14 +0000119 qemu_irq *rc4030, *i8259;
aurel32c6945b12009-01-01 13:03:36 +0000120 rc4030_dma *dmas;
aurel3268238a92009-04-10 21:26:55 +0000121 void* rc4030_opaque;
Avi Kivity60581b32011-08-08 21:59:19 +0300122 MemoryRegion *rtc = g_new(MemoryRegion, 1);
Richard Hendersondbff76a2011-08-10 15:28:17 -0700123 MemoryRegion *i8042 = g_new(MemoryRegion, 1);
Avi Kivity60581b32011-08-08 21:59:19 +0300124 MemoryRegion *dma_dummy = g_new(MemoryRegion, 1);
aurel32a65f56e2009-04-15 14:57:54 +0000125 NICInfo *nd;
Hervé Poussineaucd3e2402011-07-18 23:34:22 +0200126 DeviceState *dev;
127 SysBusDevice *sysbus;
Hervé Poussineau48a18b32011-12-15 22:09:51 +0100128 ISABus *isa_bus;
Blue Swirl64d7e9a2011-02-13 19:54:40 +0000129 ISADevice *pit;
Gerd Hoffmannfd8014e2009-09-22 13:53:18 +0200130 DriveInfo *fds[MAX_FD];
Blue Swirl73d74342010-09-11 16:38:33 +0000131 qemu_irq esp_reset, dma_enable;
Blue Swirl4556bd82010-05-22 08:00:52 +0000132 qemu_irq *cpu_exit_irq;
Avi Kivity60581b32011-08-08 21:59:19 +0300133 MemoryRegion *ram = g_new(MemoryRegion, 1);
134 MemoryRegion *bios = g_new(MemoryRegion, 1);
135 MemoryRegion *bios2 = g_new(MemoryRegion, 1);
aurel324ce7ff62008-04-07 19:47:14 +0000136
137 /* init CPUs */
138 if (cpu_model == NULL) {
139#ifdef TARGET_MIPS64
140 cpu_model = "R4000";
141#else
142 /* FIXME: All wrong, this maybe should be R3000 for the older JAZZs. */
143 cpu_model = "24Kf";
144#endif
145 }
Andreas Färber6bd8da62012-05-05 14:05:42 +0200146 cpu = cpu_mips_init(cpu_model);
147 if (cpu == NULL) {
aurel324ce7ff62008-04-07 19:47:14 +0000148 fprintf(stderr, "Unable to find CPU definition\n");
149 exit(1);
150 }
Andreas Färber6bd8da62012-05-05 14:05:42 +0200151 env = &cpu->env;
Andreas Färberf37f4352012-05-05 14:06:50 +0200152 qemu_register_reset(main_cpu_reset, cpu);
aurel324ce7ff62008-04-07 19:47:14 +0000153
154 /* allocate RAM */
Avi Kivityc5705a72011-12-20 15:59:12 +0200155 memory_region_init_ram(ram, "mips_jazz.ram", ram_size);
156 vmstate_register_ram_global(ram);
Avi Kivity60581b32011-08-08 21:59:19 +0300157 memory_region_add_subregion(address_space, 0, ram);
pbrookdcac9672009-04-09 20:05:49 +0000158
Avi Kivityc5705a72011-12-20 15:59:12 +0200159 memory_region_init_ram(bios, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
160 vmstate_register_ram_global(bios);
Avi Kivity60581b32011-08-08 21:59:19 +0300161 memory_region_set_readonly(bios, true);
162 memory_region_init_alias(bios2, "mips_jazz.bios", bios,
163 0, MAGNUM_BIOS_SIZE);
164 memory_region_add_subregion(address_space, 0x1fc00000LL, bios);
165 memory_region_add_subregion(address_space, 0xfff00000LL, bios2);
aurel324ce7ff62008-04-07 19:47:14 +0000166
167 /* load the BIOS image. */
aurel32c6945b12009-01-01 13:03:36 +0000168 if (bios_name == NULL)
169 bios_name = BIOS_FILENAME;
Paul Brook5cea8592009-05-30 00:52:44 +0100170 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
171 if (filename) {
172 bios_size = load_image_targphys(filename, 0xfff00000LL,
173 MAGNUM_BIOS_SIZE);
Anthony Liguori7267c092011-08-20 22:09:37 -0500174 g_free(filename);
Paul Brook5cea8592009-05-30 00:52:44 +0100175 } else {
176 bios_size = -1;
177 }
aurel324ce7ff62008-04-07 19:47:14 +0000178 if (bios_size < 0 || bios_size > MAGNUM_BIOS_SIZE) {
179 fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n",
Paul Brook5cea8592009-05-30 00:52:44 +0100180 bios_name);
aurel324ce7ff62008-04-07 19:47:14 +0000181 exit(1);
182 }
183
aurel324ce7ff62008-04-07 19:47:14 +0000184 /* Init CPU internal devices */
185 cpu_mips_irq_init_cpu(env);
186 cpu_mips_clock_init(env);
187
188 /* Chipset */
Avi Kivity30544342011-11-06 19:30:48 +0200189 rc4030_opaque = rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas,
190 address_space);
Avi Kivity60581b32011-08-08 21:59:19 +0300191 memory_region_init_io(dma_dummy, &dma_dummy_ops, NULL, "dummy_dma", 0x1000);
192 memory_region_add_subregion(address_space, 0x8000d000, dma_dummy);
aurel324ce7ff62008-04-07 19:47:14 +0000193
194 /* ISA devices */
Hervé Poussineau48a18b32011-12-15 22:09:51 +0100195 isa_bus = isa_bus_new(NULL, address_space_io);
196 i8259 = i8259_init(isa_bus, env->irq[4]);
197 isa_bus_irqs(isa_bus, i8259);
Blue Swirl4556bd82010-05-22 08:00:52 +0000198 cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
199 DMA_init(0, cpu_exit_irq);
Jan Kiszka319ba9f2012-02-01 20:31:40 +0100200 pit = pit_init(isa_bus, 0x40, 0, NULL);
Jan Kiszka302fe512012-02-17 11:24:34 +0100201 pcspk_init(isa_bus, pit);
aurel324ce7ff62008-04-07 19:47:14 +0000202
203 /* ISA IO space at 0x90000000 */
Alexander Graf968d6832010-12-08 12:05:49 +0100204 isa_mmio_init(0x90000000, 0x01000000);
aurel324ce7ff62008-04-07 19:47:14 +0000205 isa_mem_base = 0x11000000;
206
207 /* Video card */
208 switch (jazz_model) {
209 case JAZZ_MAGNUM:
Hervé Poussineau97a3f6f2011-08-26 21:20:12 +0200210 dev = qdev_create(NULL, "sysbus-g364");
211 qdev_init_nofail(dev);
212 sysbus = sysbus_from_qdev(dev);
213 sysbus_mmio_map(sysbus, 0, 0x60080000);
214 sysbus_mmio_map(sysbus, 1, 0x40000000);
215 sysbus_connect_irq(sysbus, 0, rc4030[3]);
216 {
217 /* Simple ROM, so user doesn't have to provide one */
Avi Kivity60581b32011-08-08 21:59:19 +0300218 MemoryRegion *rom_mr = g_new(MemoryRegion, 1);
Avi Kivityc5705a72011-12-20 15:59:12 +0200219 memory_region_init_ram(rom_mr, "g364fb.rom", 0x80000);
220 vmstate_register_ram_global(rom_mr);
Avi Kivity60581b32011-08-08 21:59:19 +0300221 memory_region_set_readonly(rom_mr, true);
222 uint8_t *rom = memory_region_get_ram_ptr(rom_mr);
223 memory_region_add_subregion(address_space, 0x60000000, rom_mr);
Hervé Poussineau97a3f6f2011-08-26 21:20:12 +0200224 rom[0] = 0x10; /* Mips G364 */
225 }
aurel324ce7ff62008-04-07 19:47:14 +0000226 break;
aurel32c1711482008-04-08 19:51:06 +0000227 case JAZZ_PICA61:
Avi Kivitybe20f9e2011-08-15 17:17:37 +0300228 isa_vga_mm_init(0x40000000, 0x60000000, 0, get_system_memory());
aurel32c1711482008-04-08 19:51:06 +0000229 break;
aurel324ce7ff62008-04-07 19:47:14 +0000230 default:
231 break;
232 }
233
234 /* Network controller */
aurel32a65f56e2009-04-15 14:57:54 +0000235 for (n = 0; n < nb_nics; n++) {
236 nd = &nd_table[n];
237 if (!nd->model)
Anthony Liguori7267c092011-08-20 22:09:37 -0500238 nd->model = g_strdup("dp83932");
aurel32a65f56e2009-04-15 14:57:54 +0000239 if (strcmp(nd->model, "dp83932") == 0) {
Avi Kivity024e5bb2011-11-09 18:22:37 +0200240 dp83932_init(nd, 0x80001000, 2, get_system_memory(), rc4030[4],
aurel32a65f56e2009-04-15 14:57:54 +0000241 rc4030_opaque, rc4030_dma_memory_rw);
242 break;
Peter Maydellc8057f92012-08-02 13:45:54 +0100243 } else if (is_help_option(nd->model)) {
aurel32a65f56e2009-04-15 14:57:54 +0000244 fprintf(stderr, "qemu: Supported NICs: dp83932\n");
245 exit(1);
246 } else {
247 fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
248 exit(1);
249 }
250 }
aurel324ce7ff62008-04-07 19:47:14 +0000251
252 /* SCSI adapter */
Paul Brookcfb9de92009-05-14 22:35:07 +0100253 esp_init(0x80002000, 0,
254 rc4030_dma_read, rc4030_dma_write, dmas[0],
Blue Swirl73d74342010-09-11 16:38:33 +0000255 rc4030[5], &esp_reset, &dma_enable);
aurel324ce7ff62008-04-07 19:47:14 +0000256
257 /* Floppy */
258 if (drive_get_max_bus(IF_FLOPPY) >= MAX_FD) {
259 fprintf(stderr, "qemu: too many floppy drives\n");
260 exit(1);
261 }
262 for (n = 0; n < MAX_FD; n++) {
Gerd Hoffmannfd8014e2009-09-22 13:53:18 +0200263 fds[n] = drive_get(IF_FLOPPY, 0, n);
aurel324ce7ff62008-04-07 19:47:14 +0000264 }
Gerd Hoffmann2091ba22009-08-14 11:36:14 +0200265 fdctrl_init_sysbus(rc4030[1], 0, 0x80003000, fds);
aurel324ce7ff62008-04-07 19:47:14 +0000266
267 /* Real time clock */
Hervé Poussineau48a18b32011-12-15 22:09:51 +0100268 rtc_init(isa_bus, 1980, NULL);
Avi Kivity60581b32011-08-08 21:59:19 +0300269 memory_region_init_io(rtc, &rtc_ops, NULL, "rtc", 0x1000);
270 memory_region_add_subregion(address_space, 0x80004000, rtc);
aurel324ce7ff62008-04-07 19:47:14 +0000271
272 /* Keyboard (i8042) */
Richard Hendersondbff76a2011-08-10 15:28:17 -0700273 i8042_mm_init(rc4030[6], rc4030[7], i8042, 0x1000, 0x1);
274 memory_region_add_subregion(address_space, 0x80005000, i8042);
aurel324ce7ff62008-04-07 19:47:14 +0000275
276 /* Serial ports */
Blue Swirl2d483772010-03-21 19:47:11 +0000277 if (serial_hds[0]) {
Richard Henderson39186d82011-08-11 16:07:16 -0700278 serial_mm_init(address_space, 0x80006000, 0, rc4030[8], 8000000/16,
279 serial_hds[0], DEVICE_NATIVE_ENDIAN);
Blue Swirl2d483772010-03-21 19:47:11 +0000280 }
281 if (serial_hds[1]) {
Richard Henderson39186d82011-08-11 16:07:16 -0700282 serial_mm_init(address_space, 0x80007000, 0, rc4030[9], 8000000/16,
283 serial_hds[1], DEVICE_NATIVE_ENDIAN);
Blue Swirl2d483772010-03-21 19:47:11 +0000284 }
aurel324ce7ff62008-04-07 19:47:14 +0000285
286 /* Parallel port */
287 if (parallel_hds[0])
Avi Kivity63858cd2011-10-06 16:44:26 +0200288 parallel_mm_init(address_space, 0x80008000, 0, rc4030[0],
289 parallel_hds[0]);
aurel324ce7ff62008-04-07 19:47:14 +0000290
291 /* Sound card */
292 /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
Hervé Poussineau4a0f0312011-12-15 22:10:01 +0100293 audio_init(isa_bus, NULL);
aurel324ce7ff62008-04-07 19:47:14 +0000294
Hervé Poussineaucd3e2402011-07-18 23:34:22 +0200295 /* NVRAM */
296 dev = qdev_create(NULL, "ds1225y");
297 qdev_init_nofail(dev);
298 sysbus = sysbus_from_qdev(dev);
299 sysbus_mmio_map(sysbus, 0, 0x80009000);
aurel324ce7ff62008-04-07 19:47:14 +0000300
301 /* LED indicator */
Hervé Poussineaub39506e2012-02-17 20:27:16 +0100302 sysbus_create_simple("jazz-led", 0x8000f000, NULL);
aurel324ce7ff62008-04-07 19:47:14 +0000303}
304
305static
Eduardo Habkost5f072e12012-10-15 17:22:02 -0300306void mips_magnum_init(QEMUMachineInitArgs *args)
aurel324ce7ff62008-04-07 19:47:14 +0000307{
Eduardo Habkost5f072e12012-10-15 17:22:02 -0300308 ram_addr_t ram_size = args->ram_size;
309 const char *cpu_model = args->cpu_model;
Richard Hendersonc2d0d012011-08-10 15:28:11 -0700310 mips_jazz_init(get_system_memory(), get_system_io(),
311 ram_size, cpu_model, JAZZ_MAGNUM);
aurel324ce7ff62008-04-07 19:47:14 +0000312}
313
aurel32c1711482008-04-08 19:51:06 +0000314static
Eduardo Habkost5f072e12012-10-15 17:22:02 -0300315void mips_pica61_init(QEMUMachineInitArgs *args)
aurel32c1711482008-04-08 19:51:06 +0000316{
Eduardo Habkost5f072e12012-10-15 17:22:02 -0300317 ram_addr_t ram_size = args->ram_size;
318 const char *cpu_model = args->cpu_model;
Richard Hendersonc2d0d012011-08-10 15:28:11 -0700319 mips_jazz_init(get_system_memory(), get_system_io(),
320 ram_size, cpu_model, JAZZ_PICA61);
aurel32c1711482008-04-08 19:51:06 +0000321}
322
Anthony Liguorif80f9ec2009-05-20 18:38:09 -0500323static QEMUMachine mips_magnum_machine = {
thseec27432008-08-13 13:01:28 +0000324 .name = "magnum",
325 .desc = "MIPS Magnum",
326 .init = mips_magnum_init,
aurel32c6945b12009-01-01 13:03:36 +0000327 .use_scsi = 1,
aurel324ce7ff62008-04-07 19:47:14 +0000328};
aurel32c1711482008-04-08 19:51:06 +0000329
Anthony Liguorif80f9ec2009-05-20 18:38:09 -0500330static QEMUMachine mips_pica61_machine = {
thseec27432008-08-13 13:01:28 +0000331 .name = "pica61",
332 .desc = "Acer Pica 61",
333 .init = mips_pica61_init,
aurel32c6945b12009-01-01 13:03:36 +0000334 .use_scsi = 1,
aurel32c1711482008-04-08 19:51:06 +0000335};
Anthony Liguorif80f9ec2009-05-20 18:38:09 -0500336
337static void mips_jazz_machine_init(void)
338{
339 qemu_register_machine(&mips_magnum_machine);
340 qemu_register_machine(&mips_pica61_machine);
341}
342
343machine_init(mips_jazz_machine_init);