aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 1 | /* |
| 2 | * QEMU MIPS Jazz support |
| 3 | * |
| 4 | * Copyright (c) 2007-2008 Hervé Poussineau |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
| 24 | |
| 25 | #include "hw.h" |
| 26 | #include "mips.h" |
Blue Swirl | b970ea8 | 2010-03-27 07:26:16 +0000 | [diff] [blame] | 27 | #include "mips_cpudevs.h" |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 28 | #include "pc.h" |
Gerd Hoffmann | 488cb99 | 2012-10-17 09:54:19 +0200 | [diff] [blame] | 29 | #include "serial.h" |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 30 | #include "isa.h" |
| 31 | #include "fdc.h" |
| 32 | #include "sysemu.h" |
Isaku Yamahata | 0dfa5ef | 2011-01-21 19:53:45 +0900 | [diff] [blame] | 33 | #include "arch_init.h" |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 34 | #include "boards.h" |
| 35 | #include "net.h" |
Gerd Hoffmann | 1cd3af5 | 2009-10-30 09:53:59 +0100 | [diff] [blame] | 36 | #include "esp.h" |
Paul Brook | bba831e | 2009-05-19 14:52:42 +0100 | [diff] [blame] | 37 | #include "mips-bios.h" |
Blue Swirl | ca20cf3 | 2009-09-20 14:58:02 +0000 | [diff] [blame] | 38 | #include "loader.h" |
Isaku Yamahata | 1d914fa | 2010-05-14 16:29:17 +0900 | [diff] [blame] | 39 | #include "mc146818rtc.h" |
Jan Kiszka | b1277b0 | 2012-02-01 20:31:39 +0100 | [diff] [blame] | 40 | #include "i8254.h" |
Jan Kiszka | 302fe51 | 2012-02-17 11:24:34 +0100 | [diff] [blame] | 41 | #include "pcspk.h" |
Blue Swirl | 2446333 | 2010-08-24 15:22:24 +0000 | [diff] [blame] | 42 | #include "blockdev.h" |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 43 | #include "sysbus.h" |
Avi Kivity | be20f9e | 2011-08-15 17:17:37 +0300 | [diff] [blame] | 44 | #include "exec-memory.h" |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 45 | |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 46 | enum jazz_model_e |
| 47 | { |
| 48 | JAZZ_MAGNUM, |
aurel32 | c171148 | 2008-04-08 19:51:06 +0000 | [diff] [blame] | 49 | JAZZ_PICA61, |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 50 | }; |
| 51 | |
| 52 | static void main_cpu_reset(void *opaque) |
| 53 | { |
Andreas Färber | f37f435 | 2012-05-05 14:06:50 +0200 | [diff] [blame] | 54 | MIPSCPU *cpu = opaque; |
| 55 | |
| 56 | cpu_reset(CPU(cpu)); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 57 | } |
| 58 | |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 59 | static uint64_t rtc_read(void *opaque, target_phys_addr_t addr, unsigned size) |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 60 | { |
Blue Swirl | afcea8c | 2009-09-20 16:05:47 +0000 | [diff] [blame] | 61 | return cpu_inw(0x71); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 62 | } |
| 63 | |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 64 | static void rtc_write(void *opaque, target_phys_addr_t addr, |
| 65 | uint64_t val, unsigned size) |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 66 | { |
Blue Swirl | afcea8c | 2009-09-20 16:05:47 +0000 | [diff] [blame] | 67 | cpu_outw(0x71, val & 0xff); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 68 | } |
| 69 | |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 70 | static const MemoryRegionOps rtc_ops = { |
| 71 | .read = rtc_read, |
| 72 | .write = rtc_write, |
| 73 | .endianness = DEVICE_NATIVE_ENDIAN, |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 74 | }; |
| 75 | |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 76 | static uint64_t dma_dummy_read(void *opaque, target_phys_addr_t addr, |
| 77 | unsigned size) |
| 78 | { |
| 79 | /* Nothing to do. That is only to ensure that |
| 80 | * the current DMA acknowledge cycle is completed. */ |
| 81 | return 0xff; |
| 82 | } |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 83 | |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 84 | static void dma_dummy_write(void *opaque, target_phys_addr_t addr, |
| 85 | uint64_t val, unsigned size) |
aurel32 | c6945b1 | 2009-01-01 13:03:36 +0000 | [diff] [blame] | 86 | { |
| 87 | /* Nothing to do. That is only to ensure that |
| 88 | * the current DMA acknowledge cycle is completed. */ |
| 89 | } |
| 90 | |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 91 | static const MemoryRegionOps dma_dummy_ops = { |
| 92 | .read = dma_dummy_read, |
| 93 | .write = dma_dummy_write, |
| 94 | .endianness = DEVICE_NATIVE_ENDIAN, |
aurel32 | c6945b1 | 2009-01-01 13:03:36 +0000 | [diff] [blame] | 95 | }; |
| 96 | |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 97 | #define MAGNUM_BIOS_SIZE_MAX 0x7e000 |
| 98 | #define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX) |
| 99 | |
Blue Swirl | 4556bd8 | 2010-05-22 08:00:52 +0000 | [diff] [blame] | 100 | static void cpu_request_exit(void *opaque, int irq, int level) |
| 101 | { |
Andreas Färber | 61c56c8 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 102 | CPUMIPSState *env = cpu_single_env; |
Blue Swirl | 4556bd8 | 2010-05-22 08:00:52 +0000 | [diff] [blame] | 103 | |
| 104 | if (env && level) { |
| 105 | cpu_exit(env); |
| 106 | } |
| 107 | } |
| 108 | |
Richard Henderson | c2d0d01 | 2011-08-10 15:28:11 -0700 | [diff] [blame] | 109 | static void mips_jazz_init(MemoryRegion *address_space, |
| 110 | MemoryRegion *address_space_io, |
| 111 | ram_addr_t ram_size, |
| 112 | const char *cpu_model, |
| 113 | enum jazz_model_e jazz_model) |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 114 | { |
Paul Brook | 5cea859 | 2009-05-30 00:52:44 +0100 | [diff] [blame] | 115 | char *filename; |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 116 | int bios_size, n; |
Andreas Färber | 6bd8da6 | 2012-05-05 14:05:42 +0200 | [diff] [blame] | 117 | MIPSCPU *cpu; |
Andreas Färber | 61c56c8 | 2012-03-14 01:38:23 +0100 | [diff] [blame] | 118 | CPUMIPSState *env; |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 119 | qemu_irq *rc4030, *i8259; |
aurel32 | c6945b1 | 2009-01-01 13:03:36 +0000 | [diff] [blame] | 120 | rc4030_dma *dmas; |
aurel32 | 68238a9 | 2009-04-10 21:26:55 +0000 | [diff] [blame] | 121 | void* rc4030_opaque; |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 122 | MemoryRegion *rtc = g_new(MemoryRegion, 1); |
Richard Henderson | dbff76a | 2011-08-10 15:28:17 -0700 | [diff] [blame] | 123 | MemoryRegion *i8042 = g_new(MemoryRegion, 1); |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 124 | MemoryRegion *dma_dummy = g_new(MemoryRegion, 1); |
aurel32 | a65f56e | 2009-04-15 14:57:54 +0000 | [diff] [blame] | 125 | NICInfo *nd; |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 126 | DeviceState *dev; |
| 127 | SysBusDevice *sysbus; |
Hervé Poussineau | 48a18b3 | 2011-12-15 22:09:51 +0100 | [diff] [blame] | 128 | ISABus *isa_bus; |
Blue Swirl | 64d7e9a | 2011-02-13 19:54:40 +0000 | [diff] [blame] | 129 | ISADevice *pit; |
Gerd Hoffmann | fd8014e | 2009-09-22 13:53:18 +0200 | [diff] [blame] | 130 | DriveInfo *fds[MAX_FD]; |
Blue Swirl | 73d7434 | 2010-09-11 16:38:33 +0000 | [diff] [blame] | 131 | qemu_irq esp_reset, dma_enable; |
Blue Swirl | 4556bd8 | 2010-05-22 08:00:52 +0000 | [diff] [blame] | 132 | qemu_irq *cpu_exit_irq; |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 133 | MemoryRegion *ram = g_new(MemoryRegion, 1); |
| 134 | MemoryRegion *bios = g_new(MemoryRegion, 1); |
| 135 | MemoryRegion *bios2 = g_new(MemoryRegion, 1); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 136 | |
| 137 | /* init CPUs */ |
| 138 | if (cpu_model == NULL) { |
| 139 | #ifdef TARGET_MIPS64 |
| 140 | cpu_model = "R4000"; |
| 141 | #else |
| 142 | /* FIXME: All wrong, this maybe should be R3000 for the older JAZZs. */ |
| 143 | cpu_model = "24Kf"; |
| 144 | #endif |
| 145 | } |
Andreas Färber | 6bd8da6 | 2012-05-05 14:05:42 +0200 | [diff] [blame] | 146 | cpu = cpu_mips_init(cpu_model); |
| 147 | if (cpu == NULL) { |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 148 | fprintf(stderr, "Unable to find CPU definition\n"); |
| 149 | exit(1); |
| 150 | } |
Andreas Färber | 6bd8da6 | 2012-05-05 14:05:42 +0200 | [diff] [blame] | 151 | env = &cpu->env; |
Andreas Färber | f37f435 | 2012-05-05 14:06:50 +0200 | [diff] [blame] | 152 | qemu_register_reset(main_cpu_reset, cpu); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 153 | |
| 154 | /* allocate RAM */ |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 155 | memory_region_init_ram(ram, "mips_jazz.ram", ram_size); |
| 156 | vmstate_register_ram_global(ram); |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 157 | memory_region_add_subregion(address_space, 0, ram); |
pbrook | dcac967 | 2009-04-09 20:05:49 +0000 | [diff] [blame] | 158 | |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 159 | memory_region_init_ram(bios, "mips_jazz.bios", MAGNUM_BIOS_SIZE); |
| 160 | vmstate_register_ram_global(bios); |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 161 | memory_region_set_readonly(bios, true); |
| 162 | memory_region_init_alias(bios2, "mips_jazz.bios", bios, |
| 163 | 0, MAGNUM_BIOS_SIZE); |
| 164 | memory_region_add_subregion(address_space, 0x1fc00000LL, bios); |
| 165 | memory_region_add_subregion(address_space, 0xfff00000LL, bios2); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 166 | |
| 167 | /* load the BIOS image. */ |
aurel32 | c6945b1 | 2009-01-01 13:03:36 +0000 | [diff] [blame] | 168 | if (bios_name == NULL) |
| 169 | bios_name = BIOS_FILENAME; |
Paul Brook | 5cea859 | 2009-05-30 00:52:44 +0100 | [diff] [blame] | 170 | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name); |
| 171 | if (filename) { |
| 172 | bios_size = load_image_targphys(filename, 0xfff00000LL, |
| 173 | MAGNUM_BIOS_SIZE); |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 174 | g_free(filename); |
Paul Brook | 5cea859 | 2009-05-30 00:52:44 +0100 | [diff] [blame] | 175 | } else { |
| 176 | bios_size = -1; |
| 177 | } |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 178 | if (bios_size < 0 || bios_size > MAGNUM_BIOS_SIZE) { |
| 179 | fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n", |
Paul Brook | 5cea859 | 2009-05-30 00:52:44 +0100 | [diff] [blame] | 180 | bios_name); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 181 | exit(1); |
| 182 | } |
| 183 | |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 184 | /* Init CPU internal devices */ |
| 185 | cpu_mips_irq_init_cpu(env); |
| 186 | cpu_mips_clock_init(env); |
| 187 | |
| 188 | /* Chipset */ |
Avi Kivity | 3054434 | 2011-11-06 19:30:48 +0200 | [diff] [blame] | 189 | rc4030_opaque = rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas, |
| 190 | address_space); |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 191 | memory_region_init_io(dma_dummy, &dma_dummy_ops, NULL, "dummy_dma", 0x1000); |
| 192 | memory_region_add_subregion(address_space, 0x8000d000, dma_dummy); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 193 | |
| 194 | /* ISA devices */ |
Hervé Poussineau | 48a18b3 | 2011-12-15 22:09:51 +0100 | [diff] [blame] | 195 | isa_bus = isa_bus_new(NULL, address_space_io); |
| 196 | i8259 = i8259_init(isa_bus, env->irq[4]); |
| 197 | isa_bus_irqs(isa_bus, i8259); |
Blue Swirl | 4556bd8 | 2010-05-22 08:00:52 +0000 | [diff] [blame] | 198 | cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1); |
| 199 | DMA_init(0, cpu_exit_irq); |
Jan Kiszka | 319ba9f | 2012-02-01 20:31:40 +0100 | [diff] [blame] | 200 | pit = pit_init(isa_bus, 0x40, 0, NULL); |
Jan Kiszka | 302fe51 | 2012-02-17 11:24:34 +0100 | [diff] [blame] | 201 | pcspk_init(isa_bus, pit); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 202 | |
| 203 | /* ISA IO space at 0x90000000 */ |
Alexander Graf | 968d683 | 2010-12-08 12:05:49 +0100 | [diff] [blame] | 204 | isa_mmio_init(0x90000000, 0x01000000); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 205 | isa_mem_base = 0x11000000; |
| 206 | |
| 207 | /* Video card */ |
| 208 | switch (jazz_model) { |
| 209 | case JAZZ_MAGNUM: |
Hervé Poussineau | 97a3f6f | 2011-08-26 21:20:12 +0200 | [diff] [blame] | 210 | dev = qdev_create(NULL, "sysbus-g364"); |
| 211 | qdev_init_nofail(dev); |
| 212 | sysbus = sysbus_from_qdev(dev); |
| 213 | sysbus_mmio_map(sysbus, 0, 0x60080000); |
| 214 | sysbus_mmio_map(sysbus, 1, 0x40000000); |
| 215 | sysbus_connect_irq(sysbus, 0, rc4030[3]); |
| 216 | { |
| 217 | /* Simple ROM, so user doesn't have to provide one */ |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 218 | MemoryRegion *rom_mr = g_new(MemoryRegion, 1); |
Avi Kivity | c5705a7 | 2011-12-20 15:59:12 +0200 | [diff] [blame] | 219 | memory_region_init_ram(rom_mr, "g364fb.rom", 0x80000); |
| 220 | vmstate_register_ram_global(rom_mr); |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 221 | memory_region_set_readonly(rom_mr, true); |
| 222 | uint8_t *rom = memory_region_get_ram_ptr(rom_mr); |
| 223 | memory_region_add_subregion(address_space, 0x60000000, rom_mr); |
Hervé Poussineau | 97a3f6f | 2011-08-26 21:20:12 +0200 | [diff] [blame] | 224 | rom[0] = 0x10; /* Mips G364 */ |
| 225 | } |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 226 | break; |
aurel32 | c171148 | 2008-04-08 19:51:06 +0000 | [diff] [blame] | 227 | case JAZZ_PICA61: |
Avi Kivity | be20f9e | 2011-08-15 17:17:37 +0300 | [diff] [blame] | 228 | isa_vga_mm_init(0x40000000, 0x60000000, 0, get_system_memory()); |
aurel32 | c171148 | 2008-04-08 19:51:06 +0000 | [diff] [blame] | 229 | break; |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 230 | default: |
| 231 | break; |
| 232 | } |
| 233 | |
| 234 | /* Network controller */ |
aurel32 | a65f56e | 2009-04-15 14:57:54 +0000 | [diff] [blame] | 235 | for (n = 0; n < nb_nics; n++) { |
| 236 | nd = &nd_table[n]; |
| 237 | if (!nd->model) |
Anthony Liguori | 7267c09 | 2011-08-20 22:09:37 -0500 | [diff] [blame] | 238 | nd->model = g_strdup("dp83932"); |
aurel32 | a65f56e | 2009-04-15 14:57:54 +0000 | [diff] [blame] | 239 | if (strcmp(nd->model, "dp83932") == 0) { |
Avi Kivity | 024e5bb | 2011-11-09 18:22:37 +0200 | [diff] [blame] | 240 | dp83932_init(nd, 0x80001000, 2, get_system_memory(), rc4030[4], |
aurel32 | a65f56e | 2009-04-15 14:57:54 +0000 | [diff] [blame] | 241 | rc4030_opaque, rc4030_dma_memory_rw); |
| 242 | break; |
Peter Maydell | c8057f9 | 2012-08-02 13:45:54 +0100 | [diff] [blame] | 243 | } else if (is_help_option(nd->model)) { |
aurel32 | a65f56e | 2009-04-15 14:57:54 +0000 | [diff] [blame] | 244 | fprintf(stderr, "qemu: Supported NICs: dp83932\n"); |
| 245 | exit(1); |
| 246 | } else { |
| 247 | fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model); |
| 248 | exit(1); |
| 249 | } |
| 250 | } |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 251 | |
| 252 | /* SCSI adapter */ |
Paul Brook | cfb9de9 | 2009-05-14 22:35:07 +0100 | [diff] [blame] | 253 | esp_init(0x80002000, 0, |
| 254 | rc4030_dma_read, rc4030_dma_write, dmas[0], |
Blue Swirl | 73d7434 | 2010-09-11 16:38:33 +0000 | [diff] [blame] | 255 | rc4030[5], &esp_reset, &dma_enable); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 256 | |
| 257 | /* Floppy */ |
| 258 | if (drive_get_max_bus(IF_FLOPPY) >= MAX_FD) { |
| 259 | fprintf(stderr, "qemu: too many floppy drives\n"); |
| 260 | exit(1); |
| 261 | } |
| 262 | for (n = 0; n < MAX_FD; n++) { |
Gerd Hoffmann | fd8014e | 2009-09-22 13:53:18 +0200 | [diff] [blame] | 263 | fds[n] = drive_get(IF_FLOPPY, 0, n); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 264 | } |
Gerd Hoffmann | 2091ba2 | 2009-08-14 11:36:14 +0200 | [diff] [blame] | 265 | fdctrl_init_sysbus(rc4030[1], 0, 0x80003000, fds); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 266 | |
| 267 | /* Real time clock */ |
Hervé Poussineau | 48a18b3 | 2011-12-15 22:09:51 +0100 | [diff] [blame] | 268 | rtc_init(isa_bus, 1980, NULL); |
Avi Kivity | 60581b3 | 2011-08-08 21:59:19 +0300 | [diff] [blame] | 269 | memory_region_init_io(rtc, &rtc_ops, NULL, "rtc", 0x1000); |
| 270 | memory_region_add_subregion(address_space, 0x80004000, rtc); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 271 | |
| 272 | /* Keyboard (i8042) */ |
Richard Henderson | dbff76a | 2011-08-10 15:28:17 -0700 | [diff] [blame] | 273 | i8042_mm_init(rc4030[6], rc4030[7], i8042, 0x1000, 0x1); |
| 274 | memory_region_add_subregion(address_space, 0x80005000, i8042); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 275 | |
| 276 | /* Serial ports */ |
Blue Swirl | 2d48377 | 2010-03-21 19:47:11 +0000 | [diff] [blame] | 277 | if (serial_hds[0]) { |
Richard Henderson | 39186d8 | 2011-08-11 16:07:16 -0700 | [diff] [blame] | 278 | serial_mm_init(address_space, 0x80006000, 0, rc4030[8], 8000000/16, |
| 279 | serial_hds[0], DEVICE_NATIVE_ENDIAN); |
Blue Swirl | 2d48377 | 2010-03-21 19:47:11 +0000 | [diff] [blame] | 280 | } |
| 281 | if (serial_hds[1]) { |
Richard Henderson | 39186d8 | 2011-08-11 16:07:16 -0700 | [diff] [blame] | 282 | serial_mm_init(address_space, 0x80007000, 0, rc4030[9], 8000000/16, |
| 283 | serial_hds[1], DEVICE_NATIVE_ENDIAN); |
Blue Swirl | 2d48377 | 2010-03-21 19:47:11 +0000 | [diff] [blame] | 284 | } |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 285 | |
| 286 | /* Parallel port */ |
| 287 | if (parallel_hds[0]) |
Avi Kivity | 63858cd | 2011-10-06 16:44:26 +0200 | [diff] [blame] | 288 | parallel_mm_init(address_space, 0x80008000, 0, rc4030[0], |
| 289 | parallel_hds[0]); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 290 | |
| 291 | /* Sound card */ |
| 292 | /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */ |
Hervé Poussineau | 4a0f031 | 2011-12-15 22:10:01 +0100 | [diff] [blame] | 293 | audio_init(isa_bus, NULL); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 294 | |
Hervé Poussineau | cd3e240 | 2011-07-18 23:34:22 +0200 | [diff] [blame] | 295 | /* NVRAM */ |
| 296 | dev = qdev_create(NULL, "ds1225y"); |
| 297 | qdev_init_nofail(dev); |
| 298 | sysbus = sysbus_from_qdev(dev); |
| 299 | sysbus_mmio_map(sysbus, 0, 0x80009000); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 300 | |
| 301 | /* LED indicator */ |
Hervé Poussineau | b39506e | 2012-02-17 20:27:16 +0100 | [diff] [blame] | 302 | sysbus_create_simple("jazz-led", 0x8000f000, NULL); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 303 | } |
| 304 | |
| 305 | static |
Eduardo Habkost | 5f072e1 | 2012-10-15 17:22:02 -0300 | [diff] [blame] | 306 | void mips_magnum_init(QEMUMachineInitArgs *args) |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 307 | { |
Eduardo Habkost | 5f072e1 | 2012-10-15 17:22:02 -0300 | [diff] [blame] | 308 | ram_addr_t ram_size = args->ram_size; |
| 309 | const char *cpu_model = args->cpu_model; |
Richard Henderson | c2d0d01 | 2011-08-10 15:28:11 -0700 | [diff] [blame] | 310 | mips_jazz_init(get_system_memory(), get_system_io(), |
| 311 | ram_size, cpu_model, JAZZ_MAGNUM); |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 312 | } |
| 313 | |
aurel32 | c171148 | 2008-04-08 19:51:06 +0000 | [diff] [blame] | 314 | static |
Eduardo Habkost | 5f072e1 | 2012-10-15 17:22:02 -0300 | [diff] [blame] | 315 | void mips_pica61_init(QEMUMachineInitArgs *args) |
aurel32 | c171148 | 2008-04-08 19:51:06 +0000 | [diff] [blame] | 316 | { |
Eduardo Habkost | 5f072e1 | 2012-10-15 17:22:02 -0300 | [diff] [blame] | 317 | ram_addr_t ram_size = args->ram_size; |
| 318 | const char *cpu_model = args->cpu_model; |
Richard Henderson | c2d0d01 | 2011-08-10 15:28:11 -0700 | [diff] [blame] | 319 | mips_jazz_init(get_system_memory(), get_system_io(), |
| 320 | ram_size, cpu_model, JAZZ_PICA61); |
aurel32 | c171148 | 2008-04-08 19:51:06 +0000 | [diff] [blame] | 321 | } |
| 322 | |
Anthony Liguori | f80f9ec | 2009-05-20 18:38:09 -0500 | [diff] [blame] | 323 | static QEMUMachine mips_magnum_machine = { |
ths | eec2743 | 2008-08-13 13:01:28 +0000 | [diff] [blame] | 324 | .name = "magnum", |
| 325 | .desc = "MIPS Magnum", |
| 326 | .init = mips_magnum_init, |
aurel32 | c6945b1 | 2009-01-01 13:03:36 +0000 | [diff] [blame] | 327 | .use_scsi = 1, |
aurel32 | 4ce7ff6 | 2008-04-07 19:47:14 +0000 | [diff] [blame] | 328 | }; |
aurel32 | c171148 | 2008-04-08 19:51:06 +0000 | [diff] [blame] | 329 | |
Anthony Liguori | f80f9ec | 2009-05-20 18:38:09 -0500 | [diff] [blame] | 330 | static QEMUMachine mips_pica61_machine = { |
ths | eec2743 | 2008-08-13 13:01:28 +0000 | [diff] [blame] | 331 | .name = "pica61", |
| 332 | .desc = "Acer Pica 61", |
| 333 | .init = mips_pica61_init, |
aurel32 | c6945b1 | 2009-01-01 13:03:36 +0000 | [diff] [blame] | 334 | .use_scsi = 1, |
aurel32 | c171148 | 2008-04-08 19:51:06 +0000 | [diff] [blame] | 335 | }; |
Anthony Liguori | f80f9ec | 2009-05-20 18:38:09 -0500 | [diff] [blame] | 336 | |
| 337 | static void mips_jazz_machine_init(void) |
| 338 | { |
| 339 | qemu_register_machine(&mips_magnum_machine); |
| 340 | qemu_register_machine(&mips_pica61_machine); |
| 341 | } |
| 342 | |
| 343 | machine_init(mips_jazz_machine_init); |