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bellardd19893d2003-06-15 19:58:51 +00001/*
2 * Host code generation
ths5fafdf22007-09-16 21:08:06 +00003 *
bellardd19893d2003-06-15 19:58:51 +00004 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
Blue Swirl8167ee82009-07-16 20:47:01 +000017 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
bellardd19893d2003-06-15 19:58:51 +000018 */
19#include <stdarg.h>
20#include <stdlib.h>
21#include <stdio.h>
22#include <string.h>
23#include <inttypes.h>
24
25#include "config.h"
bellard20543962003-06-15 23:28:43 +000026
bellardaf5ad102004-01-04 23:28:12 +000027#define NO_CPU_IO_DEFS
bellardd3eead22003-09-30 20:59:51 +000028#include "cpu.h"
bellardd19893d2003-06-15 19:58:51 +000029#include "disas.h"
bellard57fec1f2008-02-01 10:50:11 +000030#include "tcg.h"
Blue Swirl29e922b2010-03-29 19:24:00 +000031#include "qemu-timer.h"
bellardd19893d2003-06-15 19:58:51 +000032
bellard57fec1f2008-02-01 10:50:11 +000033/* code generation context */
34TCGContext tcg_ctx;
bellardd19893d2003-06-15 19:58:51 +000035
bellardc4687872005-01-03 23:44:44 +000036target_ulong gen_opc_pc[OPC_BUF_SIZE];
pbrook2e70f6e2008-06-29 01:03:05 +000037uint16_t gen_opc_icount[OPC_BUF_SIZE];
bellardd19893d2003-06-15 19:58:51 +000038uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
bellardd19893d2003-06-15 19:58:51 +000039
bellard57fec1f2008-02-01 10:50:11 +000040void cpu_gen_init(void)
41{
42 tcg_context_init(&tcg_ctx);
bellard57fec1f2008-02-01 10:50:11 +000043}
44
bellardd19893d2003-06-15 19:58:51 +000045/* return non zero if the very first instruction is invalid so that
ths5fafdf22007-09-16 21:08:06 +000046 the virtual CPU can trigger an exception.
bellardd19893d2003-06-15 19:58:51 +000047
48 '*gen_code_size_ptr' contains the size of the generated code (host
49 code).
50*/
Andreas Färber9349b4f2012-03-14 01:38:32 +010051int cpu_gen_code(CPUArchState *env, TranslationBlock *tb, int *gen_code_size_ptr)
bellardd19893d2003-06-15 19:58:51 +000052{
bellard57fec1f2008-02-01 10:50:11 +000053 TCGContext *s = &tcg_ctx;
bellardd19893d2003-06-15 19:58:51 +000054 uint8_t *gen_code_buf;
55 int gen_code_size;
bellard57fec1f2008-02-01 10:50:11 +000056#ifdef CONFIG_PROFILER
57 int64_t ti;
58#endif
59
60#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +000061 s->tb_count1++; /* includes aborted translations because of
62 exceptions */
bellard57fec1f2008-02-01 10:50:11 +000063 ti = profile_getclock();
64#endif
65 tcg_func_start(s);
bellardd19893d2003-06-15 19:58:51 +000066
ths2cfc5f12008-07-18 18:01:29 +000067 gen_intermediate_code(env, tb);
68
bellardec6338b2007-11-08 14:25:03 +000069 /* generate machine code */
bellard57fec1f2008-02-01 10:50:11 +000070 gen_code_buf = tb->tc_ptr;
bellardec6338b2007-11-08 14:25:03 +000071 tb->tb_next_offset[0] = 0xffff;
72 tb->tb_next_offset[1] = 0xffff;
bellard57fec1f2008-02-01 10:50:11 +000073 s->tb_next_offset = tb->tb_next_offset;
bellard4cbb86e2003-09-17 22:53:29 +000074#ifdef USE_DIRECT_JUMP
bellard57fec1f2008-02-01 10:50:11 +000075 s->tb_jmp_offset = tb->tb_jmp_offset;
76 s->tb_next = NULL;
bellardd19893d2003-06-15 19:58:51 +000077#else
bellard57fec1f2008-02-01 10:50:11 +000078 s->tb_jmp_offset = NULL;
79 s->tb_next = tb->tb_next;
bellardd19893d2003-06-15 19:58:51 +000080#endif
bellard57fec1f2008-02-01 10:50:11 +000081
82#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +000083 s->tb_count++;
84 s->interm_time += profile_getclock() - ti;
85 s->code_time -= profile_getclock();
bellard57fec1f2008-02-01 10:50:11 +000086#endif
aurel3254604f72008-12-07 20:35:00 +000087 gen_code_size = tcg_gen_code(s, gen_code_buf);
bellardd19893d2003-06-15 19:58:51 +000088 *gen_code_size_ptr = gen_code_size;
bellard57fec1f2008-02-01 10:50:11 +000089#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +000090 s->code_time += profile_getclock();
91 s->code_in_len += tb->size;
92 s->code_out_len += gen_code_size;
bellard57fec1f2008-02-01 10:50:11 +000093#endif
94
bellardd19893d2003-06-15 19:58:51 +000095#ifdef DEBUG_DISAS
aliguori8fec2b82009-01-15 22:36:53 +000096 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
aliguori93fcfe32009-01-15 22:34:14 +000097 qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr);
98 log_disas(tb->tc_ptr, *gen_code_size_ptr);
99 qemu_log("\n");
aliguori31b1a7b2009-01-15 22:35:09 +0000100 qemu_log_flush();
bellardd19893d2003-06-15 19:58:51 +0000101 }
102#endif
103 return 0;
104}
105
ths5fafdf22007-09-16 21:08:06 +0000106/* The cpu state corresponding to 'searched_pc' is restored.
bellardd19893d2003-06-15 19:58:51 +0000107 */
ths5fafdf22007-09-16 21:08:06 +0000108int cpu_restore_state(TranslationBlock *tb,
Stefan Weil6375e092012-04-06 22:26:15 +0200109 CPUArchState *env, uintptr_t searched_pc)
bellardd19893d2003-06-15 19:58:51 +0000110{
bellard57fec1f2008-02-01 10:50:11 +0000111 TCGContext *s = &tcg_ctx;
112 int j;
Stefan Weil6375e092012-04-06 22:26:15 +0200113 uintptr_t tc_ptr;
bellard57fec1f2008-02-01 10:50:11 +0000114#ifdef CONFIG_PROFILER
115 int64_t ti;
116#endif
117
118#ifdef CONFIG_PROFILER
119 ti = profile_getclock();
120#endif
121 tcg_func_start(s);
bellardd19893d2003-06-15 19:58:51 +0000122
ths2cfc5f12008-07-18 18:01:29 +0000123 gen_intermediate_code_pc(env, tb);
ths3b46e622007-09-17 08:09:54 +0000124
pbrook2e70f6e2008-06-29 01:03:05 +0000125 if (use_icount) {
126 /* Reset the cycle counter to the start of the block. */
127 env->icount_decr.u16.low += tb->icount;
128 /* Clear the IO flag. */
129 env->can_do_io = 0;
130 }
131
bellardd19893d2003-06-15 19:58:51 +0000132 /* find opc index corresponding to search_pc */
Stefan Weil6375e092012-04-06 22:26:15 +0200133 tc_ptr = (uintptr_t)tb->tc_ptr;
bellardd19893d2003-06-15 19:58:51 +0000134 if (searched_pc < tc_ptr)
135 return -1;
bellard57fec1f2008-02-01 10:50:11 +0000136
137 s->tb_next_offset = tb->tb_next_offset;
138#ifdef USE_DIRECT_JUMP
139 s->tb_jmp_offset = tb->tb_jmp_offset;
140 s->tb_next = NULL;
141#else
142 s->tb_jmp_offset = NULL;
143 s->tb_next = tb->tb_next;
144#endif
aurel3254604f72008-12-07 20:35:00 +0000145 j = tcg_gen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr);
bellard57fec1f2008-02-01 10:50:11 +0000146 if (j < 0)
147 return -1;
bellardd19893d2003-06-15 19:58:51 +0000148 /* now find start of instruction before */
149 while (gen_opc_instr_start[j] == 0)
150 j--;
pbrook2e70f6e2008-06-29 01:03:05 +0000151 env->icount_decr.u16.low -= gen_opc_icount[j];
ths3b46e622007-09-17 08:09:54 +0000152
Stefan Weile87b7cb2011-04-18 06:39:52 +0000153 restore_state_to_opc(env, tb, j);
bellard57fec1f2008-02-01 10:50:11 +0000154
155#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +0000156 s->restore_time += profile_getclock() - ti;
157 s->restore_count++;
bellard57fec1f2008-02-01 10:50:11 +0000158#endif
bellardd19893d2003-06-15 19:58:51 +0000159 return 0;
160}