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Alexander Grafb0fb8422011-06-02 13:53:40 +02001/*
2 * QEMU PowerPC MPC8544 global util pseudo-device
3 *
4 * Copyright (C) 2011 Freescale Semiconductor, Inc. All rights reserved.
5 *
6 * Author: Alexander Graf, <alex@csgraf.de>
7 *
8 * This is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * *****************************************************************
14 *
15 * The documentation for this device is noted in the MPC8544 documentation,
16 * file name "MPC8544ERM.pdf". You can easily find it on the web.
17 *
18 */
19
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010020#include "hw/hw.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010021#include "sysemu/sysemu.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010022#include "hw/sysbus.h"
Alexander Grafb0fb8422011-06-02 13:53:40 +020023
24#define MPC8544_GUTS_MMIO_SIZE 0x1000
25#define MPC8544_GUTS_RSTCR_RESET 0x02
26
27#define MPC8544_GUTS_ADDR_PORPLLSR 0x00
28#define MPC8544_GUTS_ADDR_PORBMSR 0x04
29#define MPC8544_GUTS_ADDR_PORIMPSCR 0x08
30#define MPC8544_GUTS_ADDR_PORDEVSR 0x0C
31#define MPC8544_GUTS_ADDR_PORDBGMSR 0x10
32#define MPC8544_GUTS_ADDR_PORDEVSR2 0x14
33#define MPC8544_GUTS_ADDR_GPPORCR 0x20
34#define MPC8544_GUTS_ADDR_GPIOCR 0x30
35#define MPC8544_GUTS_ADDR_GPOUTDR 0x40
36#define MPC8544_GUTS_ADDR_GPINDR 0x50
37#define MPC8544_GUTS_ADDR_PMUXCR 0x60
38#define MPC8544_GUTS_ADDR_DEVDISR 0x70
39#define MPC8544_GUTS_ADDR_POWMGTCSR 0x80
40#define MPC8544_GUTS_ADDR_MCPSUMR 0x90
41#define MPC8544_GUTS_ADDR_RSTRSCR 0x94
42#define MPC8544_GUTS_ADDR_PVR 0xA0
43#define MPC8544_GUTS_ADDR_SVR 0xA4
44#define MPC8544_GUTS_ADDR_RSTCR 0xB0
45#define MPC8544_GUTS_ADDR_IOVSELSR 0xC0
46#define MPC8544_GUTS_ADDR_DDRCSR 0xB20
47#define MPC8544_GUTS_ADDR_DDRCDR 0xB24
48#define MPC8544_GUTS_ADDR_DDRCLKDR 0xB28
49#define MPC8544_GUTS_ADDR_CLKOCR 0xE00
50#define MPC8544_GUTS_ADDR_SRDS1CR1 0xF04
51#define MPC8544_GUTS_ADDR_SRDS2CR1 0xF10
52#define MPC8544_GUTS_ADDR_SRDS2CR3 0xF18
53
Andreas Färber43f691e2013-06-09 22:47:34 +020054#define TYPE_MPC8544_GUTS "mpc8544-guts"
55#define MPC8544_GUTS(obj) OBJECT_CHECK(GutsState, (obj), TYPE_MPC8544_GUTS)
56
Alexander Grafb0fb8422011-06-02 13:53:40 +020057struct GutsState {
Andreas Färber43f691e2013-06-09 22:47:34 +020058 /*< private >*/
59 SysBusDevice parent_obj;
60 /*< public >*/
61
Avi Kivity1c7af352011-11-13 15:05:28 +020062 MemoryRegion iomem;
Alexander Grafb0fb8422011-06-02 13:53:40 +020063};
64
65typedef struct GutsState GutsState;
66
Avi Kivitya8170e52012-10-23 12:30:10 +020067static uint64_t mpc8544_guts_read(void *opaque, hwaddr addr,
Avi Kivity1c7af352011-11-13 15:05:28 +020068 unsigned size)
Alexander Grafb0fb8422011-06-02 13:53:40 +020069{
70 uint32_t value = 0;
Andreas Färber4917cf42013-05-27 05:17:50 +020071 PowerPCCPU *cpu = POWERPC_CPU(current_cpu);
72 CPUPPCState *env = &cpu->env;
Alexander Grafb0fb8422011-06-02 13:53:40 +020073
74 addr &= MPC8544_GUTS_MMIO_SIZE - 1;
75 switch (addr) {
76 case MPC8544_GUTS_ADDR_PVR:
77 value = env->spr[SPR_PVR];
78 break;
79 case MPC8544_GUTS_ADDR_SVR:
80 value = env->spr[SPR_E500_SVR];
81 break;
82 default:
83 fprintf(stderr, "guts: Unknown register read: %x\n", (int)addr);
84 break;
85 }
86
87 return value;
88}
89
Avi Kivitya8170e52012-10-23 12:30:10 +020090static void mpc8544_guts_write(void *opaque, hwaddr addr,
Avi Kivity1c7af352011-11-13 15:05:28 +020091 uint64_t value, unsigned size)
Alexander Grafb0fb8422011-06-02 13:53:40 +020092{
93 addr &= MPC8544_GUTS_MMIO_SIZE - 1;
94
95 switch (addr) {
96 case MPC8544_GUTS_ADDR_RSTCR:
97 if (value & MPC8544_GUTS_RSTCR_RESET) {
98 qemu_system_reset_request();
99 }
100 break;
101 default:
102 fprintf(stderr, "guts: Unknown register write: %x = %x\n",
Avi Kivity1c7af352011-11-13 15:05:28 +0200103 (int)addr, (unsigned)value);
Alexander Grafb0fb8422011-06-02 13:53:40 +0200104 break;
105 }
106}
107
Avi Kivity1c7af352011-11-13 15:05:28 +0200108static const MemoryRegionOps mpc8544_guts_ops = {
109 .read = mpc8544_guts_read,
110 .write = mpc8544_guts_write,
111 .endianness = DEVICE_BIG_ENDIAN,
112 .valid = {
113 .min_access_size = 4,
114 .max_access_size = 4,
115 },
Alexander Grafb0fb8422011-06-02 13:53:40 +0200116};
117
Andreas Färber7587ea52013-06-09 22:47:35 +0200118static void mpc8544_guts_initfn(Object *obj)
Alexander Grafb0fb8422011-06-02 13:53:40 +0200119{
Andreas Färber7587ea52013-06-09 22:47:35 +0200120 SysBusDevice *d = SYS_BUS_DEVICE(obj);
121 GutsState *s = MPC8544_GUTS(obj);
Alexander Grafb0fb8422011-06-02 13:53:40 +0200122
Paolo Bonzini40c5dce2013-06-06 21:25:08 -0400123 memory_region_init_io(&s->iomem, OBJECT(s), &mpc8544_guts_ops, s,
Andreas Färber1f1a83f2013-06-09 22:47:33 +0200124 "mpc8544.guts", MPC8544_GUTS_MMIO_SIZE);
Andreas Färber7587ea52013-06-09 22:47:35 +0200125 sysbus_init_mmio(d, &s->iomem);
Anthony Liguori999e12b2012-01-24 13:12:29 -0600126}
127
Andreas Färber8c43a6f2013-01-10 16:19:07 +0100128static const TypeInfo mpc8544_guts_info = {
Andreas Färber43f691e2013-06-09 22:47:34 +0200129 .name = TYPE_MPC8544_GUTS,
Anthony Liguori39bffca2011-12-07 21:34:16 -0600130 .parent = TYPE_SYS_BUS_DEVICE,
131 .instance_size = sizeof(GutsState),
Andreas Färber7587ea52013-06-09 22:47:35 +0200132 .instance_init = mpc8544_guts_initfn,
Alexander Grafb0fb8422011-06-02 13:53:40 +0200133};
134
Andreas Färber83f7d432012-02-09 15:20:55 +0100135static void mpc8544_guts_register_types(void)
Alexander Grafb0fb8422011-06-02 13:53:40 +0200136{
Anthony Liguori39bffca2011-12-07 21:34:16 -0600137 type_register_static(&mpc8544_guts_info);
Alexander Grafb0fb8422011-06-02 13:53:40 +0200138}
Andreas Färber83f7d432012-02-09 15:20:55 +0100139
140type_init(mpc8544_guts_register_types)