pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 1 | /* NOR flash devices */ |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 2 | typedef struct pflash_t pflash_t; |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 3 | |
balrog | 88eeee0 | 2007-12-10 00:28:27 +0000 | [diff] [blame] | 4 | /* pflash_cfi01.c */ |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 5 | pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off, |
balrog | 88eeee0 | 2007-12-10 00:28:27 +0000 | [diff] [blame] | 6 | BlockDriverState *bs, |
| 7 | uint32_t sector_len, int nb_blocs, int width, |
| 8 | uint16_t id0, uint16_t id1, |
Blue Swirl | 3d08ff6 | 2010-03-29 19:23:56 +0000 | [diff] [blame] | 9 | uint16_t id2, uint16_t id3, int be); |
balrog | 88eeee0 | 2007-12-10 00:28:27 +0000 | [diff] [blame] | 10 | |
| 11 | /* pflash_cfi02.c */ |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 12 | pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off, |
balrog | cf6d911 | 2007-12-10 01:07:47 +0000 | [diff] [blame] | 13 | BlockDriverState *bs, uint32_t sector_len, |
balrog | 4fbd24b | 2008-04-16 23:45:36 +0000 | [diff] [blame] | 14 | int nb_blocs, int nb_mappings, int width, |
balrog | 88eeee0 | 2007-12-10 00:28:27 +0000 | [diff] [blame] | 15 | uint16_t id0, uint16_t id1, |
balrog | 6725070 | 2008-04-16 23:37:15 +0000 | [diff] [blame] | 16 | uint16_t id2, uint16_t id3, |
Blue Swirl | 5f9fc5a | 2010-03-29 19:23:55 +0000 | [diff] [blame] | 17 | uint16_t unlock_addr0, uint16_t unlock_addr1, |
| 18 | int be); |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 19 | |
| 20 | /* nand.c */ |
Paul Brook | bc24a22 | 2009-05-10 01:44:56 +0100 | [diff] [blame] | 21 | typedef struct NANDFlashState NANDFlashState; |
| 22 | NANDFlashState *nand_init(int manf_id, int chip_id); |
| 23 | void nand_done(NANDFlashState *s); |
| 24 | void nand_setpins(NANDFlashState *s, |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 25 | int cle, int ale, int ce, int wp, int gnd); |
Paul Brook | bc24a22 | 2009-05-10 01:44:56 +0100 | [diff] [blame] | 26 | void nand_getpins(NANDFlashState *s, int *rb); |
| 27 | void nand_setio(NANDFlashState *s, uint8_t value); |
| 28 | uint8_t nand_getio(NANDFlashState *s); |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 29 | |
| 30 | #define NAND_MFR_TOSHIBA 0x98 |
| 31 | #define NAND_MFR_SAMSUNG 0xec |
| 32 | #define NAND_MFR_FUJITSU 0x04 |
| 33 | #define NAND_MFR_NATIONAL 0x8f |
| 34 | #define NAND_MFR_RENESAS 0x07 |
| 35 | #define NAND_MFR_STMICRO 0x20 |
| 36 | #define NAND_MFR_HYNIX 0xad |
| 37 | #define NAND_MFR_MICRON 0x2c |
| 38 | |
balrog | 7e7c5e4 | 2008-04-14 21:57:44 +0000 | [diff] [blame] | 39 | /* onenand.c */ |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 40 | void onenand_base_update(void *opaque, target_phys_addr_t new); |
balrog | 7e7c5e4 | 2008-04-14 21:57:44 +0000 | [diff] [blame] | 41 | void onenand_base_unmap(void *opaque); |
| 42 | void *onenand_init(uint32_t id, int regshift, qemu_irq irq); |
balrog | c580d92 | 2008-07-29 14:19:16 +0000 | [diff] [blame] | 43 | void *onenand_raw_otp(void *opaque); |
balrog | 7e7c5e4 | 2008-04-14 21:57:44 +0000 | [diff] [blame] | 44 | |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 45 | /* ecc.c */ |
Paul Brook | bc24a22 | 2009-05-10 01:44:56 +0100 | [diff] [blame] | 46 | typedef struct { |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 47 | uint8_t cp; /* Column parity */ |
| 48 | uint16_t lp[2]; /* Line parity */ |
| 49 | uint16_t count; |
Paul Brook | bc24a22 | 2009-05-10 01:44:56 +0100 | [diff] [blame] | 50 | } ECCState; |
pbrook | 87ecb68 | 2007-11-17 17:14:51 +0000 | [diff] [blame] | 51 | |
Paul Brook | bc24a22 | 2009-05-10 01:44:56 +0100 | [diff] [blame] | 52 | uint8_t ecc_digest(ECCState *s, uint8_t sample); |
| 53 | void ecc_reset(ECCState *s); |
| 54 | void ecc_put(QEMUFile *f, ECCState *s); |
| 55 | void ecc_get(QEMUFile *f, ECCState *s); |