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pbrook87ecb682007-11-17 17:14:51 +00001/* NOR flash devices */
Anthony Liguoric227f092009-10-01 16:12:16 -05002typedef struct pflash_t pflash_t;
pbrook87ecb682007-11-17 17:14:51 +00003
balrog88eeee02007-12-10 00:28:27 +00004/* pflash_cfi01.c */
Anthony Liguoric227f092009-10-01 16:12:16 -05005pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
balrog88eeee02007-12-10 00:28:27 +00006 BlockDriverState *bs,
7 uint32_t sector_len, int nb_blocs, int width,
8 uint16_t id0, uint16_t id1,
Blue Swirl3d08ff62010-03-29 19:23:56 +00009 uint16_t id2, uint16_t id3, int be);
balrog88eeee02007-12-10 00:28:27 +000010
11/* pflash_cfi02.c */
Anthony Liguoric227f092009-10-01 16:12:16 -050012pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
balrogcf6d9112007-12-10 01:07:47 +000013 BlockDriverState *bs, uint32_t sector_len,
balrog4fbd24b2008-04-16 23:45:36 +000014 int nb_blocs, int nb_mappings, int width,
balrog88eeee02007-12-10 00:28:27 +000015 uint16_t id0, uint16_t id1,
balrog67250702008-04-16 23:37:15 +000016 uint16_t id2, uint16_t id3,
Blue Swirl5f9fc5a2010-03-29 19:23:55 +000017 uint16_t unlock_addr0, uint16_t unlock_addr1,
18 int be);
pbrook87ecb682007-11-17 17:14:51 +000019
20/* nand.c */
Paul Brookbc24a222009-05-10 01:44:56 +010021typedef struct NANDFlashState NANDFlashState;
22NANDFlashState *nand_init(int manf_id, int chip_id);
23void nand_done(NANDFlashState *s);
24void nand_setpins(NANDFlashState *s,
pbrook87ecb682007-11-17 17:14:51 +000025 int cle, int ale, int ce, int wp, int gnd);
Paul Brookbc24a222009-05-10 01:44:56 +010026void nand_getpins(NANDFlashState *s, int *rb);
27void nand_setio(NANDFlashState *s, uint8_t value);
28uint8_t nand_getio(NANDFlashState *s);
pbrook87ecb682007-11-17 17:14:51 +000029
30#define NAND_MFR_TOSHIBA 0x98
31#define NAND_MFR_SAMSUNG 0xec
32#define NAND_MFR_FUJITSU 0x04
33#define NAND_MFR_NATIONAL 0x8f
34#define NAND_MFR_RENESAS 0x07
35#define NAND_MFR_STMICRO 0x20
36#define NAND_MFR_HYNIX 0xad
37#define NAND_MFR_MICRON 0x2c
38
balrog7e7c5e42008-04-14 21:57:44 +000039/* onenand.c */
Anthony Liguoric227f092009-10-01 16:12:16 -050040void onenand_base_update(void *opaque, target_phys_addr_t new);
balrog7e7c5e42008-04-14 21:57:44 +000041void onenand_base_unmap(void *opaque);
42void *onenand_init(uint32_t id, int regshift, qemu_irq irq);
balrogc580d922008-07-29 14:19:16 +000043void *onenand_raw_otp(void *opaque);
balrog7e7c5e42008-04-14 21:57:44 +000044
pbrook87ecb682007-11-17 17:14:51 +000045/* ecc.c */
Paul Brookbc24a222009-05-10 01:44:56 +010046typedef struct {
pbrook87ecb682007-11-17 17:14:51 +000047 uint8_t cp; /* Column parity */
48 uint16_t lp[2]; /* Line parity */
49 uint16_t count;
Paul Brookbc24a222009-05-10 01:44:56 +010050} ECCState;
pbrook87ecb682007-11-17 17:14:51 +000051
Paul Brookbc24a222009-05-10 01:44:56 +010052uint8_t ecc_digest(ECCState *s, uint8_t sample);
53void ecc_reset(ECCState *s);
54void ecc_put(QEMUFile *f, ECCState *s);
55void ecc_get(QEMUFile *f, ECCState *s);