blob: 75f71e5d78edc128d9698dad8a2fe91a2c0b9604 [file] [log] [blame]
bellard1d14ffa2005-10-30 18:58:22 +00001/*
2 * QEMU ES1370 emulation
3 *
4 * Copyright (c) 2005 Vassili Karpov (malc)
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
Volker Rümelin480e4c72023-09-17 08:58:09 +020025#define DEBUG_ES1370 0
Volker Rümelina4b342a2023-09-17 08:58:10 +020026#define VERBOSE_ES1370 0
bellard1d14ffa2005-10-30 18:58:22 +000027
Peter Maydell6086a562016-01-18 17:33:52 +000028#include "qemu/osdep.h"
Eduardo Habkost8a824e42017-05-08 17:57:35 -030029#include "hw/audio/soundhw.h"
pbrook87ecb682007-11-17 17:14:51 +000030#include "audio/audio.h"
Markus Armbrusteredf5ca52022-12-22 11:03:28 +010031#include "hw/pci/pci_device.h"
Markus Armbrusterd6454272019-08-12 07:23:45 +020032#include "migration/vmstate.h"
Volker Rümelin480e4c72023-09-17 08:58:09 +020033#include "qemu/cutils.h"
Markus Armbruster0b8fa322019-05-23 16:35:07 +020034#include "qemu/module.h"
Philippe Mathieu-Daudé32cad1f2024-12-03 15:20:13 +010035#include "system/dma.h"
Eduardo Habkostdb1015e2020-09-03 16:43:22 -040036#include "qom/object.h"
Volker Rümelin0116f742023-09-17 08:58:07 +020037#include "trace.h"
bellard1d14ffa2005-10-30 18:58:22 +000038
39/* Missing stuff:
40 SCTRL_P[12](END|ST)INC
41 SCTRL_P1SCTRLD
42 SCTRL_P2DACSEN
43 CTRL_DAC_SYNC
44 MIDI
45 non looped mode
46 surely more
47*/
48
49/*
50 Following macros and samplerate array were copied verbatim from
51 Linux kernel 2.4.30: drivers/sound/es1370.c
52
53 Copyright (C) 1998-2001, 2003 Thomas Sailer (t.sailer@alumni.ethz.ch)
54*/
55
56/* Start blatant GPL violation */
57
58#define ES1370_REG_CONTROL 0x00
59#define ES1370_REG_STATUS 0x04
60#define ES1370_REG_UART_DATA 0x08
61#define ES1370_REG_UART_STATUS 0x09
62#define ES1370_REG_UART_CONTROL 0x09
63#define ES1370_REG_UART_TEST 0x0a
64#define ES1370_REG_MEMPAGE 0x0c
65#define ES1370_REG_CODEC 0x10
66#define ES1370_REG_SERIAL_CONTROL 0x20
67#define ES1370_REG_DAC1_SCOUNT 0x24
68#define ES1370_REG_DAC2_SCOUNT 0x28
69#define ES1370_REG_ADC_SCOUNT 0x2c
70
71#define ES1370_REG_DAC1_FRAMEADR 0xc30
72#define ES1370_REG_DAC1_FRAMECNT 0xc34
73#define ES1370_REG_DAC2_FRAMEADR 0xc38
74#define ES1370_REG_DAC2_FRAMECNT 0xc3c
75#define ES1370_REG_ADC_FRAMEADR 0xd30
76#define ES1370_REG_ADC_FRAMECNT 0xd34
77#define ES1370_REG_PHANTOM_FRAMEADR 0xd38
78#define ES1370_REG_PHANTOM_FRAMECNT 0xd3c
79
80static const unsigned dac1_samplerate[] = { 5512, 11025, 22050, 44100 };
81
82#define DAC2_SRTODIV(x) (((1411200+(x)/2)/(x))-2)
83#define DAC2_DIVTOSR(x) (1411200/((x)+2))
84
85#define CTRL_ADC_STOP 0x80000000 /* 1 = ADC stopped */
86#define CTRL_XCTL1 0x40000000 /* electret mic bias */
87#define CTRL_OPEN 0x20000000 /* no function, can be read and written */
88#define CTRL_PCLKDIV 0x1fff0000 /* ADC/DAC2 clock divider */
89#define CTRL_SH_PCLKDIV 16
90#define CTRL_MSFMTSEL 0x00008000 /* MPEG serial data fmt: 0 = Sony, 1 = I2S */
91#define CTRL_M_SBB 0x00004000 /* DAC2 clock: 0 = PCLKDIV, 1 = MPEG */
92#define CTRL_WTSRSEL 0x00003000 /* DAC1 clock freq: 0=5512, 1=11025, 2=22050, 3=44100 */
93#define CTRL_SH_WTSRSEL 12
94#define CTRL_DAC_SYNC 0x00000800 /* 1 = DAC2 runs off DAC1 clock */
95#define CTRL_CCB_INTRM 0x00000400 /* 1 = CCB "voice" ints enabled */
96#define CTRL_M_CB 0x00000200 /* recording source: 0 = ADC, 1 = MPEG */
97#define CTRL_XCTL0 0x00000100 /* 0 = Line in, 1 = Line out */
98#define CTRL_BREQ 0x00000080 /* 1 = test mode (internal mem test) */
99#define CTRL_DAC1_EN 0x00000040 /* enable DAC1 */
100#define CTRL_DAC2_EN 0x00000020 /* enable DAC2 */
101#define CTRL_ADC_EN 0x00000010 /* enable ADC */
102#define CTRL_UART_EN 0x00000008 /* enable MIDI uart */
103#define CTRL_JYSTK_EN 0x00000004 /* enable Joystick port (presumably at address 0x200) */
104#define CTRL_CDC_EN 0x00000002 /* enable serial (CODEC) interface */
105#define CTRL_SERR_DIS 0x00000001 /* 1 = disable PCI SERR signal */
106
107#define STAT_INTR 0x80000000 /* wired or of all interrupt bits */
108#define STAT_CSTAT 0x00000400 /* 1 = codec busy or codec write in progress */
109#define STAT_CBUSY 0x00000200 /* 1 = codec busy */
110#define STAT_CWRIP 0x00000100 /* 1 = codec write in progress */
111#define STAT_VC 0x00000060 /* CCB int source, 0=DAC1, 1=DAC2, 2=ADC, 3=undef */
112#define STAT_SH_VC 5
113#define STAT_MCCB 0x00000010 /* CCB int pending */
114#define STAT_UART 0x00000008 /* UART int pending */
115#define STAT_DAC1 0x00000004 /* DAC1 int pending */
116#define STAT_DAC2 0x00000002 /* DAC2 int pending */
117#define STAT_ADC 0x00000001 /* ADC int pending */
118
119#define USTAT_RXINT 0x80 /* UART rx int pending */
120#define USTAT_TXINT 0x04 /* UART tx int pending */
121#define USTAT_TXRDY 0x02 /* UART tx ready */
122#define USTAT_RXRDY 0x01 /* UART rx ready */
123
124#define UCTRL_RXINTEN 0x80 /* 1 = enable RX ints */
125#define UCTRL_TXINTEN 0x60 /* TX int enable field mask */
126#define UCTRL_ENA_TXINT 0x20 /* enable TX int */
127#define UCTRL_CNTRL 0x03 /* control field */
128#define UCTRL_CNTRL_SWR 0x03 /* software reset command */
129
130#define SCTRL_P2ENDINC 0x00380000 /* */
131#define SCTRL_SH_P2ENDINC 19
132#define SCTRL_P2STINC 0x00070000 /* */
133#define SCTRL_SH_P2STINC 16
134#define SCTRL_R1LOOPSEL 0x00008000 /* 0 = loop mode */
135#define SCTRL_P2LOOPSEL 0x00004000 /* 0 = loop mode */
136#define SCTRL_P1LOOPSEL 0x00002000 /* 0 = loop mode */
137#define SCTRL_P2PAUSE 0x00001000 /* 1 = pause mode */
138#define SCTRL_P1PAUSE 0x00000800 /* 1 = pause mode */
139#define SCTRL_R1INTEN 0x00000400 /* enable interrupt */
140#define SCTRL_P2INTEN 0x00000200 /* enable interrupt */
141#define SCTRL_P1INTEN 0x00000100 /* enable interrupt */
142#define SCTRL_P1SCTRLD 0x00000080 /* reload sample count register for DAC1 */
143#define SCTRL_P2DACSEN 0x00000040 /* 1 = DAC2 play back last sample when disabled */
144#define SCTRL_R1SEB 0x00000020 /* 1 = 16bit */
145#define SCTRL_R1SMB 0x00000010 /* 1 = stereo */
146#define SCTRL_R1FMT 0x00000030 /* format mask */
147#define SCTRL_SH_R1FMT 4
148#define SCTRL_P2SEB 0x00000008 /* 1 = 16bit */
149#define SCTRL_P2SMB 0x00000004 /* 1 = stereo */
150#define SCTRL_P2FMT 0x0000000c /* format mask */
151#define SCTRL_SH_P2FMT 2
152#define SCTRL_P1SEB 0x00000002 /* 1 = 16bit */
153#define SCTRL_P1SMB 0x00000001 /* 1 = stereo */
154#define SCTRL_P1FMT 0x00000003 /* format mask */
155#define SCTRL_SH_P1FMT 0
156
157/* End blatant GPL violation */
158
159#define NB_CHANNELS 3
160#define DAC1_CHANNEL 0
161#define DAC2_CHANNEL 1
162#define ADC_CHANNEL 2
163
bellard1d14ffa2005-10-30 18:58:22 +0000164static void es1370_dac1_callback (void *opaque, int free);
165static void es1370_dac2_callback (void *opaque, int free);
166static void es1370_adc_callback (void *opaque, int avail);
167
Volker Rümelin480e4c72023-09-17 08:58:09 +0200168static void print_ctl(uint32_t val)
bellard1d14ffa2005-10-30 18:58:22 +0000169{
Volker Rümelin480e4c72023-09-17 08:58:09 +0200170 if (DEBUG_ES1370) {
171 char buf[1024];
bellard1d14ffa2005-10-30 18:58:22 +0000172
Volker Rümelin480e4c72023-09-17 08:58:09 +0200173 buf[0] = '\0';
174#define a(n) if (val & CTRL_##n) pstrcat(buf, sizeof(buf), " "#n)
175 a(ADC_STOP);
176 a(XCTL1);
177 a(OPEN);
178 a(MSFMTSEL);
179 a(M_SBB);
180 a(DAC_SYNC);
181 a(CCB_INTRM);
182 a(M_CB);
183 a(XCTL0);
184 a(BREQ);
185 a(DAC1_EN);
186 a(DAC2_EN);
187 a(ADC_EN);
188 a(UART_EN);
189 a(JYSTK_EN);
190 a(CDC_EN);
191 a(SERR_DIS);
bellard1d14ffa2005-10-30 18:58:22 +0000192#undef a
Volker Rümelin480e4c72023-09-17 08:58:09 +0200193 AUD_log("es1370", "ctl - PCLKDIV %d(DAC2 freq %d), freq %d,%s\n",
194 (val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV,
195 DAC2_DIVTOSR((val & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV),
196 dac1_samplerate[(val & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL],
197 buf);
198 }
bellard1d14ffa2005-10-30 18:58:22 +0000199}
200
Volker Rümelin480e4c72023-09-17 08:58:09 +0200201static void print_sctl(uint32_t val)
bellard1d14ffa2005-10-30 18:58:22 +0000202{
Volker Rümelin480e4c72023-09-17 08:58:09 +0200203 if (DEBUG_ES1370) {
204 static const char *fmt_names[] = {"8M", "8S", "16M", "16S"};
205 char buf[1024];
bellard1d14ffa2005-10-30 18:58:22 +0000206
Volker Rümelin480e4c72023-09-17 08:58:09 +0200207 buf[0] = '\0';
bellard1d14ffa2005-10-30 18:58:22 +0000208
Volker Rümelin480e4c72023-09-17 08:58:09 +0200209#define a(n) if (val & SCTRL_##n) pstrcat(buf, sizeof(buf), " "#n)
210#define b(n) if (!(val & SCTRL_##n)) pstrcat(buf, sizeof(buf), " "#n)
211 b(R1LOOPSEL);
212 b(P2LOOPSEL);
213 b(P1LOOPSEL);
214 a(P2PAUSE);
215 a(P1PAUSE);
216 a(R1INTEN);
217 a(P2INTEN);
218 a(P1INTEN);
219 a(P1SCTRLD);
220 a(P2DACSEN);
221 if (buf[0]) {
222 pstrcat(buf, sizeof(buf), "\n ");
223 } else {
224 buf[0] = ' ';
225 buf[1] = '\0';
226 }
bellard1d14ffa2005-10-30 18:58:22 +0000227#undef b
228#undef a
Volker Rümelin480e4c72023-09-17 08:58:09 +0200229 AUD_log("es1370",
230 "%s p2_end_inc %d, p2_st_inc %d,"
231 " r1_fmt %s, p2_fmt %s, p1_fmt %s\n",
232 buf,
233 (val & SCTRL_P2ENDINC) >> SCTRL_SH_P2ENDINC,
234 (val & SCTRL_P2STINC) >> SCTRL_SH_P2STINC,
235 fmt_names[(val >> SCTRL_SH_R1FMT) & 3],
236 fmt_names[(val >> SCTRL_SH_P2FMT) & 3],
237 fmt_names[(val >> SCTRL_SH_P1FMT) & 3]);
238 }
bellard1d14ffa2005-10-30 18:58:22 +0000239}
bellard1d14ffa2005-10-30 18:58:22 +0000240
Volker Rümelina4b342a2023-09-17 08:58:10 +0200241#define lwarn(...) \
242do { \
243 if (VERBOSE_ES1370) { \
244 AUD_log("es1370: warning", __VA_ARGS__); \
245 } \
246} while (0)
bellard1d14ffa2005-10-30 18:58:22 +0000247
Philippe Mathieu-Daudéd9c214d2023-01-09 15:19:33 +0100248#define TYPE_ES1370 "ES1370"
249OBJECT_DECLARE_SIMPLE_TYPE(ES1370State, ES1370)
250
bellard1d14ffa2005-10-30 18:58:22 +0000251struct chan {
252 uint32_t shift;
253 uint32_t leftover;
254 uint32_t scount;
255 uint32_t frame_addr;
256 uint32_t frame_cnt;
257};
258
Eduardo Habkostdb1015e2020-09-03 16:43:22 -0400259struct ES1370State {
Juan Quintelae5944642009-08-24 13:03:25 +0200260 PCIDevice dev;
bellardc0fe3822005-11-05 18:55:28 +0000261 QEMUSoundCard card;
Avi Kivitye1a99db2011-08-08 16:09:10 +0300262 MemoryRegion io;
bellard1d14ffa2005-10-30 18:58:22 +0000263 struct chan chan[NB_CHANNELS];
264 SWVoiceOut *dac_voice[2];
265 SWVoiceIn *adc_voice;
266
267 uint32_t ctl;
268 uint32_t status;
269 uint32_t mempage;
270 uint32_t codec;
271 uint32_t sctl;
Eduardo Habkostdb1015e2020-09-03 16:43:22 -0400272};
bellard1d14ffa2005-10-30 18:58:22 +0000273
bellard1d14ffa2005-10-30 18:58:22 +0000274struct chan_bits {
275 uint32_t ctl_en;
276 uint32_t stat_int;
277 uint32_t sctl_pause;
278 uint32_t sctl_inten;
279 uint32_t sctl_fmt;
280 uint32_t sctl_sh_fmt;
281 uint32_t sctl_loopsel;
282 void (*calc_freq) (ES1370State *s, uint32_t ctl,
283 uint32_t *old_freq, uint32_t *new_freq);
284};
285
286static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl,
287 uint32_t *old_freq, uint32_t *new_freq);
288static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl,
289 uint32_t *old_freq,
290 uint32_t *new_freq);
291
292static const struct chan_bits es1370_chan_bits[] = {
293 {CTRL_DAC1_EN, STAT_DAC1, SCTRL_P1PAUSE, SCTRL_P1INTEN,
294 SCTRL_P1FMT, SCTRL_SH_P1FMT, SCTRL_P1LOOPSEL,
295 es1370_dac1_calc_freq},
296
297 {CTRL_DAC2_EN, STAT_DAC2, SCTRL_P2PAUSE, SCTRL_P2INTEN,
298 SCTRL_P2FMT, SCTRL_SH_P2FMT, SCTRL_P2LOOPSEL,
299 es1370_dac2_and_adc_calc_freq},
300
301 {CTRL_ADC_EN, STAT_ADC, 0, SCTRL_R1INTEN,
302 SCTRL_R1FMT, SCTRL_SH_R1FMT, SCTRL_R1LOOPSEL,
303 es1370_dac2_and_adc_calc_freq}
304};
305
306static void es1370_update_status (ES1370State *s, uint32_t new_status)
307{
308 uint32_t level = new_status & (STAT_DAC1 | STAT_DAC2 | STAT_ADC);
309
310 if (level) {
311 s->status = new_status | STAT_INTR;
Volker Rümelin02e7de62023-09-17 08:58:11 +0200312 } else {
bellard1d14ffa2005-10-30 18:58:22 +0000313 s->status = new_status & ~STAT_INTR;
314 }
Marcel Apfelbaum9e64f8a2013-10-07 10:36:39 +0300315 pci_set_irq(&s->dev, !!level);
bellard1d14ffa2005-10-30 18:58:22 +0000316}
317
318static void es1370_reset (ES1370State *s)
319{
320 size_t i;
321
322 s->ctl = 1;
323 s->status = 0x60;
324 s->mempage = 0;
325 s->codec = 0;
326 s->sctl = 0;
327
328 for (i = 0; i < NB_CHANNELS; ++i) {
329 struct chan *d = &s->chan[i];
330 d->scount = 0;
331 d->leftover = 0;
332 if (i == ADC_CHANNEL) {
bellardc0fe3822005-11-05 18:55:28 +0000333 AUD_close_in (&s->card, s->adc_voice);
bellard1d14ffa2005-10-30 18:58:22 +0000334 s->adc_voice = NULL;
Volker Rümelin02e7de62023-09-17 08:58:11 +0200335 } else {
bellardc0fe3822005-11-05 18:55:28 +0000336 AUD_close_out (&s->card, s->dac_voice[i]);
bellard1d14ffa2005-10-30 18:58:22 +0000337 s->dac_voice[i] = NULL;
338 }
339 }
Marcel Apfelbaum9e64f8a2013-10-07 10:36:39 +0300340 pci_irq_deassert(&s->dev);
bellard1d14ffa2005-10-30 18:58:22 +0000341}
342
343static void es1370_maybe_lower_irq (ES1370State *s, uint32_t sctl)
344{
345 uint32_t new_status = s->status;
346
347 if (!(sctl & SCTRL_P1INTEN) && (s->sctl & SCTRL_P1INTEN)) {
348 new_status &= ~STAT_DAC1;
349 }
350
351 if (!(sctl & SCTRL_P2INTEN) && (s->sctl & SCTRL_P2INTEN)) {
352 new_status &= ~STAT_DAC2;
353 }
354
355 if (!(sctl & SCTRL_R1INTEN) && (s->sctl & SCTRL_R1INTEN)) {
356 new_status &= ~STAT_ADC;
357 }
358
359 if (new_status != s->status) {
360 es1370_update_status (s, new_status);
361 }
362}
363
364static void es1370_dac1_calc_freq (ES1370State *s, uint32_t ctl,
365 uint32_t *old_freq, uint32_t *new_freq)
366
367{
368 *old_freq = dac1_samplerate[(s->ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL];
369 *new_freq = dac1_samplerate[(ctl & CTRL_WTSRSEL) >> CTRL_SH_WTSRSEL];
370}
371
372static void es1370_dac2_and_adc_calc_freq (ES1370State *s, uint32_t ctl,
373 uint32_t *old_freq,
374 uint32_t *new_freq)
375
376{
377 uint32_t old_pclkdiv, new_pclkdiv;
378
379 new_pclkdiv = (ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV;
380 old_pclkdiv = (s->ctl & CTRL_PCLKDIV) >> CTRL_SH_PCLKDIV;
381 *new_freq = DAC2_DIVTOSR (new_pclkdiv);
382 *old_freq = DAC2_DIVTOSR (old_pclkdiv);
383}
384
385static void es1370_update_voices (ES1370State *s, uint32_t ctl, uint32_t sctl)
386{
387 size_t i;
388 uint32_t old_freq, new_freq, old_fmt, new_fmt;
389
390 for (i = 0; i < NB_CHANNELS; ++i) {
391 struct chan *d = &s->chan[i];
392 const struct chan_bits *b = &es1370_chan_bits[i];
393
394 new_fmt = (sctl & b->sctl_fmt) >> b->sctl_sh_fmt;
395 old_fmt = (s->sctl & b->sctl_fmt) >> b->sctl_sh_fmt;
396
397 b->calc_freq (s, ctl, &old_freq, &new_freq);
398
399 if ((old_fmt != new_fmt) || (old_freq != new_freq)) {
400 d->shift = (new_fmt & 1) + (new_fmt >> 1);
Volker Rümelin0116f742023-09-17 08:58:07 +0200401 trace_es1370_stream_format(i, new_freq,
402 new_fmt & 2 ? "s16" : "u8", new_fmt & 1 ? "stereo" : "mono",
403 d->shift);
bellard1d14ffa2005-10-30 18:58:22 +0000404 if (new_freq) {
malc1ea879e2008-12-03 22:48:44 +0000405 struct audsettings as;
bellardc0fe3822005-11-05 18:55:28 +0000406
407 as.freq = new_freq;
408 as.nchannels = 1 << (new_fmt & 1);
Kővágó, Zoltán85bc5852019-03-08 23:34:13 +0100409 as.fmt = (new_fmt & 2) ? AUDIO_FORMAT_S16 : AUDIO_FORMAT_U8;
bellardd929eba2006-07-04 21:47:22 +0000410 as.endianness = 0;
bellardc0fe3822005-11-05 18:55:28 +0000411
bellard1d14ffa2005-10-30 18:58:22 +0000412 if (i == ADC_CHANNEL) {
413 s->adc_voice =
414 AUD_open_in (
bellardc0fe3822005-11-05 18:55:28 +0000415 &s->card,
bellard1d14ffa2005-10-30 18:58:22 +0000416 s->adc_voice,
417 "es1370.adc",
418 s,
419 es1370_adc_callback,
bellardd929eba2006-07-04 21:47:22 +0000420 &as
bellard1d14ffa2005-10-30 18:58:22 +0000421 );
Volker Rümelin02e7de62023-09-17 08:58:11 +0200422 } else {
bellard1d14ffa2005-10-30 18:58:22 +0000423 s->dac_voice[i] =
424 AUD_open_out (
bellardc0fe3822005-11-05 18:55:28 +0000425 &s->card,
bellard1d14ffa2005-10-30 18:58:22 +0000426 s->dac_voice[i],
427 i ? "es1370.dac2" : "es1370.dac1",
428 s,
429 i ? es1370_dac2_callback : es1370_dac1_callback,
bellardd929eba2006-07-04 21:47:22 +0000430 &as
bellard1d14ffa2005-10-30 18:58:22 +0000431 );
432 }
433 }
434 }
435
436 if (((ctl ^ s->ctl) & b->ctl_en)
437 || ((sctl ^ s->sctl) & b->sctl_pause)) {
438 int on = (ctl & b->ctl_en) && !(sctl & b->sctl_pause);
439
440 if (i == ADC_CHANNEL) {
441 AUD_set_active_in (s->adc_voice, on);
Volker Rümelin02e7de62023-09-17 08:58:11 +0200442 } else {
bellard1d14ffa2005-10-30 18:58:22 +0000443 AUD_set_active_out (s->dac_voice[i], on);
444 }
445 }
446 }
447
448 s->ctl = ctl;
449 s->sctl = sctl;
450}
451
452static inline uint32_t es1370_fixup (ES1370State *s, uint32_t addr)
453{
454 addr &= 0xff;
Volker Rümelin02e7de62023-09-17 08:58:11 +0200455 if (addr >= 0x30 && addr <= 0x3f) {
bellard1d14ffa2005-10-30 18:58:22 +0000456 addr |= s->mempage << 8;
Volker Rümelin02e7de62023-09-17 08:58:11 +0200457 }
bellard1d14ffa2005-10-30 18:58:22 +0000458 return addr;
459}
460
Paolo Bonzini154c1d12018-08-01 17:15:41 +0200461static void es1370_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
bellard1d14ffa2005-10-30 18:58:22 +0000462{
463 ES1370State *s = opaque;
464 struct chan *d = &s->chan[0];
465
466 addr = es1370_fixup (s, addr);
467
468 switch (addr) {
469 case ES1370_REG_CONTROL:
470 es1370_update_voices (s, val, s->sctl);
471 print_ctl (val);
472 break;
473
474 case ES1370_REG_MEMPAGE:
475 s->mempage = val & 0xf;
476 break;
477
478 case ES1370_REG_SERIAL_CONTROL:
479 es1370_maybe_lower_irq (s, val);
480 es1370_update_voices (s, s->ctl, val);
481 print_sctl (val);
482 break;
483
bellard1d14ffa2005-10-30 18:58:22 +0000484 case ES1370_REG_DAC1_SCOUNT:
Paolo Bonzini154c1d12018-08-01 17:15:41 +0200485 case ES1370_REG_DAC2_SCOUNT:
486 case ES1370_REG_ADC_SCOUNT:
487 d += (addr - ES1370_REG_DAC1_SCOUNT) >> 2;
Volker Rümelin00e3b292023-09-17 08:58:06 +0200488 d->scount = (val & 0xffff) << 16 | (val & 0xffff);
Volker Rümelin0116f742023-09-17 08:58:07 +0200489 trace_es1370_sample_count_wr(d - &s->chan[0],
490 d->scount >> 16, d->scount & 0xffff);
bellard1d14ffa2005-10-30 18:58:22 +0000491 break;
492
Paolo Bonzinicf9270e2018-08-24 17:03:41 +0200493 case ES1370_REG_ADC_FRAMEADR:
494 d += 2;
495 goto frameadr;
bellard1d14ffa2005-10-30 18:58:22 +0000496 case ES1370_REG_DAC1_FRAMEADR:
Paolo Bonzini154c1d12018-08-01 17:15:41 +0200497 case ES1370_REG_DAC2_FRAMEADR:
Paolo Bonzini154c1d12018-08-01 17:15:41 +0200498 d += (addr - ES1370_REG_DAC1_FRAMEADR) >> 3;
Paolo Bonzinicf9270e2018-08-24 17:03:41 +0200499 frameadr:
bellard1d14ffa2005-10-30 18:58:22 +0000500 d->frame_addr = val;
Volker Rümelin0116f742023-09-17 08:58:07 +0200501 trace_es1370_frame_address_wr(d - &s->chan[0], d->frame_addr);
bellard1d14ffa2005-10-30 18:58:22 +0000502 break;
503
bellard946fc942005-11-11 00:00:09 +0000504 case ES1370_REG_PHANTOM_FRAMECNT:
Volker Rümelina4b342a2023-09-17 08:58:10 +0200505 lwarn("writing to phantom frame count 0x%" PRIx64 "\n", val);
bellard946fc942005-11-11 00:00:09 +0000506 break;
507 case ES1370_REG_PHANTOM_FRAMEADR:
Volker Rümelina4b342a2023-09-17 08:58:10 +0200508 lwarn("writing to phantom frame address 0x%" PRIx64 "\n", val);
bellard946fc942005-11-11 00:00:09 +0000509 break;
510
Paolo Bonzinicf9270e2018-08-24 17:03:41 +0200511 case ES1370_REG_ADC_FRAMECNT:
512 d += 2;
513 goto framecnt;
bellard1d14ffa2005-10-30 18:58:22 +0000514 case ES1370_REG_DAC1_FRAMECNT:
Paolo Bonzini154c1d12018-08-01 17:15:41 +0200515 case ES1370_REG_DAC2_FRAMECNT:
Paolo Bonzini154c1d12018-08-01 17:15:41 +0200516 d += (addr - ES1370_REG_DAC1_FRAMECNT) >> 3;
Paolo Bonzinicf9270e2018-08-24 17:03:41 +0200517 framecnt:
bellard1d14ffa2005-10-30 18:58:22 +0000518 d->frame_cnt = val;
519 d->leftover = 0;
Volker Rümelin0116f742023-09-17 08:58:07 +0200520 trace_es1370_frame_count_wr(d - &s->chan[0],
521 d->frame_cnt >> 16, d->frame_cnt & 0xffff);
bellard1d14ffa2005-10-30 18:58:22 +0000522 break;
523
524 default:
Volker Rümelina4b342a2023-09-17 08:58:10 +0200525 lwarn("writel 0x%" PRIx64 " <- 0x%" PRIx64 "\n", addr, val);
bellard1d14ffa2005-10-30 18:58:22 +0000526 break;
527 }
528}
529
Paolo Bonzini154c1d12018-08-01 17:15:41 +0200530static uint64_t es1370_read(void *opaque, hwaddr addr, unsigned size)
bellard1d14ffa2005-10-30 18:58:22 +0000531{
532 ES1370State *s = opaque;
533 uint32_t val;
534 struct chan *d = &s->chan[0];
535
536 addr = es1370_fixup (s, addr);
537
538 switch (addr) {
539 case ES1370_REG_CONTROL:
540 val = s->ctl;
541 break;
542 case ES1370_REG_STATUS:
543 val = s->status;
544 break;
545 case ES1370_REG_MEMPAGE:
546 val = s->mempage;
547 break;
548 case ES1370_REG_CODEC:
549 val = s->codec;
550 break;
551 case ES1370_REG_SERIAL_CONTROL:
552 val = s->sctl;
553 break;
554
bellard1d14ffa2005-10-30 18:58:22 +0000555 case ES1370_REG_DAC1_SCOUNT:
Paolo Bonzini154c1d12018-08-01 17:15:41 +0200556 case ES1370_REG_DAC2_SCOUNT:
557 case ES1370_REG_ADC_SCOUNT:
558 d += (addr - ES1370_REG_DAC1_SCOUNT) >> 2;
Volker Rümelin0116f742023-09-17 08:58:07 +0200559 trace_es1370_sample_count_rd(d - &s->chan[0],
560 d->scount >> 16, d->scount & 0xffff);
bellard1d14ffa2005-10-30 18:58:22 +0000561 val = d->scount;
bellard1d14ffa2005-10-30 18:58:22 +0000562 break;
563
Paolo Bonzini24f79732018-08-24 17:03:41 +0200564 case ES1370_REG_ADC_FRAMECNT:
565 d += 2;
566 goto framecnt;
bellard1d14ffa2005-10-30 18:58:22 +0000567 case ES1370_REG_DAC1_FRAMECNT:
Paolo Bonzini154c1d12018-08-01 17:15:41 +0200568 case ES1370_REG_DAC2_FRAMECNT:
Paolo Bonzini154c1d12018-08-01 17:15:41 +0200569 d += (addr - ES1370_REG_DAC1_FRAMECNT) >> 3;
Paolo Bonzini24f79732018-08-24 17:03:41 +0200570 framecnt:
Volker Rümelin0116f742023-09-17 08:58:07 +0200571 trace_es1370_frame_count_rd(d - &s->chan[0],
572 d->frame_cnt >> 16, d->frame_cnt & 0xffff);
bellard1d14ffa2005-10-30 18:58:22 +0000573 val = d->frame_cnt;
bellard1d14ffa2005-10-30 18:58:22 +0000574 break;
575
Paolo Bonzini24f79732018-08-24 17:03:41 +0200576 case ES1370_REG_ADC_FRAMEADR:
577 d += 2;
578 goto frameadr;
bellard1d14ffa2005-10-30 18:58:22 +0000579 case ES1370_REG_DAC1_FRAMEADR:
Paolo Bonzini154c1d12018-08-01 17:15:41 +0200580 case ES1370_REG_DAC2_FRAMEADR:
Paolo Bonzini154c1d12018-08-01 17:15:41 +0200581 d += (addr - ES1370_REG_DAC1_FRAMEADR) >> 3;
Paolo Bonzini24f79732018-08-24 17:03:41 +0200582 frameadr:
Volker Rümelin0116f742023-09-17 08:58:07 +0200583 trace_es1370_frame_address_rd(d - &s->chan[0], d->frame_addr);
bellard1d14ffa2005-10-30 18:58:22 +0000584 val = d->frame_addr;
585 break;
586
bellard946fc942005-11-11 00:00:09 +0000587 case ES1370_REG_PHANTOM_FRAMECNT:
588 val = ~0U;
Volker Rümelina4b342a2023-09-17 08:58:10 +0200589 lwarn("reading from phantom frame count\n");
bellard946fc942005-11-11 00:00:09 +0000590 break;
591 case ES1370_REG_PHANTOM_FRAMEADR:
592 val = ~0U;
Volker Rümelina4b342a2023-09-17 08:58:10 +0200593 lwarn("reading from phantom frame address\n");
bellard946fc942005-11-11 00:00:09 +0000594 break;
595
bellard1d14ffa2005-10-30 18:58:22 +0000596 default:
597 val = ~0U;
Volker Rümelina4b342a2023-09-17 08:58:10 +0200598 lwarn("readl 0x%" PRIx64 " -> 0x%x\n", addr, val);
bellard1d14ffa2005-10-30 18:58:22 +0000599 break;
600 }
601 return val;
602}
603
bellard1d14ffa2005-10-30 18:58:22 +0000604static void es1370_transfer_audio (ES1370State *s, struct chan *d, int loop_sel,
Volker Rümelin5bf1a712023-09-17 08:58:13 +0200605 int max, bool *irq)
bellard1d14ffa2005-10-30 18:58:22 +0000606{
607 uint8_t tmpbuf[4096];
Volker Rümelinca988512023-09-17 08:58:12 +0200608 size_t to_transfer;
bellard1d14ffa2005-10-30 18:58:22 +0000609 uint32_t addr = d->frame_addr;
610 int sc = d->scount & 0xffff;
611 int csc = d->scount >> 16;
612 int csc_bytes = (csc + 1) << d->shift;
613 int cnt = d->frame_cnt >> 16;
614 int size = d->frame_cnt & 0xffff;
Prasad J Pandit369ff952020-05-15 01:36:08 +0530615 if (size < cnt) {
616 return;
617 }
bellard1d14ffa2005-10-30 18:58:22 +0000618 int left = ((size - cnt + 1) << 2) + d->leftover;
Stefan Weila1b6abe2011-12-10 00:19:45 +0100619 int transferred = 0;
bellard1d14ffa2005-10-30 18:58:22 +0000620 int index = d - &s->chan[0];
621
Volker Rümelinca988512023-09-17 08:58:12 +0200622 to_transfer = MIN(max, MIN(left, csc_bytes));
bellard1d14ffa2005-10-30 18:58:22 +0000623 addr += (cnt << 2) + d->leftover;
624
625 if (index == ADC_CHANNEL) {
Volker Rümelinca988512023-09-17 08:58:12 +0200626 while (to_transfer > 0) {
bellard1d14ffa2005-10-30 18:58:22 +0000627 int acquired, to_copy;
628
Volker Rümelinca988512023-09-17 08:58:12 +0200629 to_copy = MIN(to_transfer, sizeof(tmpbuf));
bellard1d14ffa2005-10-30 18:58:22 +0000630 acquired = AUD_read (s->adc_voice, tmpbuf, to_copy);
Volker Rümelin02e7de62023-09-17 08:58:11 +0200631 if (!acquired) {
bellard1d14ffa2005-10-30 18:58:22 +0000632 break;
Volker Rümelin02e7de62023-09-17 08:58:11 +0200633 }
bellard1d14ffa2005-10-30 18:58:22 +0000634
Eduard - Gabriel Munteanu3204db92011-10-31 17:06:51 +1100635 pci_dma_write (&s->dev, addr, tmpbuf, acquired);
bellard1d14ffa2005-10-30 18:58:22 +0000636
Volker Rümelinca988512023-09-17 08:58:12 +0200637 to_transfer -= acquired;
bellard1d14ffa2005-10-30 18:58:22 +0000638 addr += acquired;
Stefan Weila1b6abe2011-12-10 00:19:45 +0100639 transferred += acquired;
bellard1d14ffa2005-10-30 18:58:22 +0000640 }
Volker Rümelin02e7de62023-09-17 08:58:11 +0200641 } else {
bellard1d14ffa2005-10-30 18:58:22 +0000642 SWVoiceOut *voice = s->dac_voice[index];
643
Volker Rümelinca988512023-09-17 08:58:12 +0200644 while (to_transfer > 0) {
bellard1d14ffa2005-10-30 18:58:22 +0000645 int copied, to_copy;
646
Volker Rümelinca988512023-09-17 08:58:12 +0200647 to_copy = MIN(to_transfer, sizeof(tmpbuf));
Eduard - Gabriel Munteanu3204db92011-10-31 17:06:51 +1100648 pci_dma_read (&s->dev, addr, tmpbuf, to_copy);
bellard1d14ffa2005-10-30 18:58:22 +0000649 copied = AUD_write (voice, tmpbuf, to_copy);
Volker Rümelin02e7de62023-09-17 08:58:11 +0200650 if (!copied) {
bellard1d14ffa2005-10-30 18:58:22 +0000651 break;
Volker Rümelin02e7de62023-09-17 08:58:11 +0200652 }
Volker Rümelinca988512023-09-17 08:58:12 +0200653 to_transfer -= copied;
bellard1d14ffa2005-10-30 18:58:22 +0000654 addr += copied;
Stefan Weila1b6abe2011-12-10 00:19:45 +0100655 transferred += copied;
bellard1d14ffa2005-10-30 18:58:22 +0000656 }
657 }
658
Stefan Weila1b6abe2011-12-10 00:19:45 +0100659 if (csc_bytes == transferred) {
Volker Rümelin5bf1a712023-09-17 08:58:13 +0200660 if (*irq) {
661 trace_es1370_lost_interrupt(index);
662 }
663 *irq = true;
bellard1d14ffa2005-10-30 18:58:22 +0000664 d->scount = sc | (sc << 16);
Volker Rümelin02e7de62023-09-17 08:58:11 +0200665 } else {
Volker Rümelin5bf1a712023-09-17 08:58:13 +0200666 *irq = false;
Stefan Weila1b6abe2011-12-10 00:19:45 +0100667 d->scount = sc | (((csc_bytes - transferred - 1) >> d->shift) << 16);
bellard1d14ffa2005-10-30 18:58:22 +0000668 }
669
Stefan Weila1b6abe2011-12-10 00:19:45 +0100670 cnt += (transferred + d->leftover) >> 2;
bellard1d14ffa2005-10-30 18:58:22 +0000671
672 if (s->sctl & loop_sel) {
Peter Maydell4409a6d2023-11-10 16:43:18 +0000673 /*
674 * loop_sel tells us which bit in the SCTL register to look at
675 * (either P1_LOOP_SEL, P2_LOOP_SEL or R1_LOOP_SEL). The sense
676 * of these bits is 0 for loop mode (set interrupt and keep recording
677 * when the sample count reaches zero) or 1 for stop mode (set
678 * interrupt and stop recording).
679 */
bellard946fc942005-11-11 00:00:09 +0000680 AUD_log ("es1370: warning", "non looping mode\n");
Volker Rümelin02e7de62023-09-17 08:58:11 +0200681 } else {
bellard1d14ffa2005-10-30 18:58:22 +0000682 d->frame_cnt = size;
683
Volker Rümelin02e7de62023-09-17 08:58:11 +0200684 if ((uint32_t) cnt <= d->frame_cnt) {
bellard1d14ffa2005-10-30 18:58:22 +0000685 d->frame_cnt |= cnt << 16;
Volker Rümelin02e7de62023-09-17 08:58:11 +0200686 }
bellard1d14ffa2005-10-30 18:58:22 +0000687 }
688
Stefan Weila1b6abe2011-12-10 00:19:45 +0100689 d->leftover = (transferred + d->leftover) & 3;
Volker Rümelin0116f742023-09-17 08:58:07 +0200690 trace_es1370_transfer_audio(index,
691 d->frame_cnt >> 16, d->frame_cnt & 0xffff,
692 d->scount >> 16, d->scount & 0xffff,
693 d->leftover, *irq);
bellard1d14ffa2005-10-30 18:58:22 +0000694}
695
696static void es1370_run_channel (ES1370State *s, size_t chan, int free_or_avail)
697{
698 uint32_t new_status = s->status;
Volker Rümelin5bf1a712023-09-17 08:58:13 +0200699 int max_bytes;
700 bool irq;
bellard1d14ffa2005-10-30 18:58:22 +0000701 struct chan *d = &s->chan[chan];
702 const struct chan_bits *b = &es1370_chan_bits[chan];
703
704 if (!(s->ctl & b->ctl_en) || (s->sctl & b->sctl_pause)) {
705 return;
706 }
707
708 max_bytes = free_or_avail;
709 max_bytes &= ~((1 << d->shift) - 1);
710 if (!max_bytes) {
711 return;
712 }
713
Volker Rümelin5bf1a712023-09-17 08:58:13 +0200714 irq = s->sctl & b->sctl_inten && s->status & b->stat_int;
715
bellard1d14ffa2005-10-30 18:58:22 +0000716 es1370_transfer_audio (s, d, b->sctl_loopsel, max_bytes, &irq);
717
718 if (irq) {
719 if (s->sctl & b->sctl_inten) {
720 new_status |= b->stat_int;
721 }
722 }
723
724 if (new_status != s->status) {
725 es1370_update_status (s, new_status);
726 }
727}
728
729static void es1370_dac1_callback (void *opaque, int free)
730{
731 ES1370State *s = opaque;
732
733 es1370_run_channel (s, DAC1_CHANNEL, free);
734}
735
736static void es1370_dac2_callback (void *opaque, int free)
737{
738 ES1370State *s = opaque;
739
740 es1370_run_channel (s, DAC2_CHANNEL, free);
741}
742
743static void es1370_adc_callback (void *opaque, int avail)
744{
745 ES1370State *s = opaque;
746
747 es1370_run_channel (s, ADC_CHANNEL, avail);
748}
749
Avi Kivitye1a99db2011-08-08 16:09:10 +0300750static const MemoryRegionOps es1370_io_ops = {
Alexander Graff3726fd2012-10-08 13:09:44 +0200751 .read = es1370_read,
752 .write = es1370_write,
Paolo Bonzini154c1d12018-08-01 17:15:41 +0200753 .valid = {
Alexander Graff3726fd2012-10-08 13:09:44 +0200754 .min_access_size = 1,
755 .max_access_size = 4,
756 },
Paolo Bonzini154c1d12018-08-01 17:15:41 +0200757 .impl = {
758 .min_access_size = 4,
759 .max_access_size = 4,
760 },
Avi Kivitye1a99db2011-08-08 16:09:10 +0300761 .endianness = DEVICE_LITTLE_ENDIAN,
762};
bellard1d14ffa2005-10-30 18:58:22 +0000763
Juan Quintela3a14c2d2009-12-02 11:49:36 +0100764static const VMStateDescription vmstate_es1370_channel = {
765 .name = "es1370_channel",
766 .version_id = 2,
767 .minimum_version_id = 2,
Richard Henderson856a6fe2023-12-21 14:16:04 +1100768 .fields = (const VMStateField[]) {
malccf4dc462012-02-07 22:11:04 +0400769 VMSTATE_UINT32 (shift, struct chan),
770 VMSTATE_UINT32 (leftover, struct chan),
771 VMSTATE_UINT32 (scount, struct chan),
772 VMSTATE_UINT32 (frame_addr, struct chan),
773 VMSTATE_UINT32 (frame_cnt, struct chan),
774 VMSTATE_END_OF_LIST ()
bellard1d14ffa2005-10-30 18:58:22 +0000775 }
Juan Quintela3a14c2d2009-12-02 11:49:36 +0100776};
bellard1d14ffa2005-10-30 18:58:22 +0000777
Juan Quintela3a14c2d2009-12-02 11:49:36 +0100778static int es1370_post_load (void *opaque, int version_id)
bellard1d14ffa2005-10-30 18:58:22 +0000779{
780 uint32_t ctl, sctl;
781 ES1370State *s = opaque;
782 size_t i;
783
bellard1d14ffa2005-10-30 18:58:22 +0000784 for (i = 0; i < NB_CHANNELS; ++i) {
bellard1d14ffa2005-10-30 18:58:22 +0000785 if (i == ADC_CHANNEL) {
786 if (s->adc_voice) {
bellardc0fe3822005-11-05 18:55:28 +0000787 AUD_close_in (&s->card, s->adc_voice);
bellard1d14ffa2005-10-30 18:58:22 +0000788 s->adc_voice = NULL;
789 }
Volker Rümelin02e7de62023-09-17 08:58:11 +0200790 } else {
bellard1d14ffa2005-10-30 18:58:22 +0000791 if (s->dac_voice[i]) {
bellardc0fe3822005-11-05 18:55:28 +0000792 AUD_close_out (&s->card, s->dac_voice[i]);
bellard1d14ffa2005-10-30 18:58:22 +0000793 s->dac_voice[i] = NULL;
794 }
795 }
796 }
797
Juan Quintela3a14c2d2009-12-02 11:49:36 +0100798 ctl = s->ctl;
799 sctl = s->sctl;
bellard1d14ffa2005-10-30 18:58:22 +0000800 s->ctl = 0;
801 s->sctl = 0;
802 es1370_update_voices (s, ctl, sctl);
803 return 0;
804}
805
Juan Quintela3a14c2d2009-12-02 11:49:36 +0100806static const VMStateDescription vmstate_es1370 = {
807 .name = "es1370",
808 .version_id = 2,
809 .minimum_version_id = 2,
Juan Quintela3a14c2d2009-12-02 11:49:36 +0100810 .post_load = es1370_post_load,
Richard Henderson856a6fe2023-12-21 14:16:04 +1100811 .fields = (const VMStateField[]) {
malccf4dc462012-02-07 22:11:04 +0400812 VMSTATE_PCI_DEVICE (dev, ES1370State),
813 VMSTATE_STRUCT_ARRAY (chan, ES1370State, NB_CHANNELS, 2,
814 vmstate_es1370_channel, struct chan),
815 VMSTATE_UINT32 (ctl, ES1370State),
816 VMSTATE_UINT32 (status, ES1370State),
817 VMSTATE_UINT32 (mempage, ES1370State),
818 VMSTATE_UINT32 (codec, ES1370State),
819 VMSTATE_UINT32 (sctl, ES1370State),
820 VMSTATE_END_OF_LIST ()
Juan Quintela3a14c2d2009-12-02 11:49:36 +0100821 }
822};
823
Gerd Hoffmann11f547e2017-01-10 14:18:01 +0100824static void es1370_on_reset(DeviceState *dev)
bellard1d14ffa2005-10-30 18:58:22 +0000825{
Philippe Mathieu-Daudé721d8f22023-02-20 14:15:15 +0100826 ES1370State *s = ES1370(dev);
827
bellard1d14ffa2005-10-30 18:58:22 +0000828 es1370_reset (s);
829}
830
Markus Armbruster9af21db2015-01-19 15:52:30 +0100831static void es1370_realize(PCIDevice *dev, Error **errp)
bellard1d14ffa2005-10-30 18:58:22 +0000832{
Cao jin0d769042016-02-01 15:57:35 +0800833 ES1370State *s = ES1370(dev);
Juan Quintelae5944642009-08-24 13:03:25 +0200834 uint8_t *c = s->dev.config;
bellard1d14ffa2005-10-30 18:58:22 +0000835
Martin Kletzandercb94ff52023-10-02 16:27:57 +0200836 if (!AUD_register_card ("es1370", &s->card, errp)) {
837 return;
838 }
839
Michael S. Tsirkind3e2f132009-12-10 19:04:25 +0200840 c[PCI_STATUS + 1] = PCI_STATUS_DEVSEL_SLOW >> 8;
bellard1d14ffa2005-10-30 18:58:22 +0000841
Isaku Yamahata0b8c5372011-05-25 10:58:10 +0900842#if 0
Michael S. Tsirkind3e2f132009-12-10 19:04:25 +0200843 c[PCI_CAPABILITY_LIST] = 0xdc;
844 c[PCI_INTERRUPT_LINE] = 10;
bellard1d14ffa2005-10-30 18:58:22 +0000845 c[0xdc] = 0x00;
846#endif
847
Michael S. Tsirkind3e2f132009-12-10 19:04:25 +0200848 c[PCI_INTERRUPT_PIN] = 1;
849 c[PCI_MIN_GNT] = 0x0c;
850 c[PCI_MAX_LAT] = 0x80;
bellard1d14ffa2005-10-30 18:58:22 +0000851
Paolo Bonzini64bde0f2013-06-06 21:25:08 -0400852 memory_region_init_io (&s->io, OBJECT(s), &es1370_io_ops, s, "es1370", 256);
Avi Kivitye824b2c2011-08-08 16:09:31 +0300853 pci_register_bar (&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io);
bellardc0fe3822005-11-05 18:55:28 +0000854
bellard1d14ffa2005-10-30 18:58:22 +0000855 es1370_reset (s);
Gerd Hoffmann6806e592009-06-30 14:12:12 +0200856}
857
Li Qiang069eb7b2016-12-14 18:32:22 -0800858static void es1370_exit(PCIDevice *dev)
859{
860 ES1370State *s = ES1370(dev);
861 int i;
862
863 for (i = 0; i < 2; ++i) {
864 AUD_close_out(&s->card, s->dac_voice[i]);
865 }
866
867 AUD_close_in(&s->card, s->adc_voice);
868 AUD_remove_card(&s->card);
869}
870
Richard Hendersoned1e71d2024-12-13 15:05:59 +0000871static const Property es1370_properties[] = {
Kővágó, Zoltán88e47b92019-08-19 01:06:49 +0200872 DEFINE_AUDIO_PROPERTIES(ES1370State, card),
Kővágó, Zoltán88e47b92019-08-19 01:06:49 +0200873};
874
malccf4dc462012-02-07 22:11:04 +0400875static void es1370_class_init (ObjectClass *klass, void *data)
Anthony Liguori40021f02011-12-04 12:22:06 -0600876{
malccf4dc462012-02-07 22:11:04 +0400877 DeviceClass *dc = DEVICE_CLASS (klass);
878 PCIDeviceClass *k = PCI_DEVICE_CLASS (klass);
Anthony Liguori40021f02011-12-04 12:22:06 -0600879
Markus Armbruster9af21db2015-01-19 15:52:30 +0100880 k->realize = es1370_realize;
Li Qiang069eb7b2016-12-14 18:32:22 -0800881 k->exit = es1370_exit;
Anthony Liguori40021f02011-12-04 12:22:06 -0600882 k->vendor_id = PCI_VENDOR_ID_ENSONIQ;
883 k->device_id = PCI_DEVICE_ID_ENSONIQ_ES1370;
884 k->class_id = PCI_CLASS_MULTIMEDIA_AUDIO;
885 k->subsystem_vendor_id = 0x4942;
886 k->subsystem_id = 0x4c4c;
Marcel Apfelbaum125ee0e2013-07-29 17:17:45 +0300887 set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
Anthony Liguori39bffca2011-12-07 21:34:16 -0600888 dc->desc = "ENSONIQ AudioPCI ES1370";
889 dc->vmsd = &vmstate_es1370;
Peter Maydelle3d08142024-09-13 15:31:44 +0100890 device_class_set_legacy_reset(dc, es1370_on_reset);
Marc-André Lureau4f67d302020-01-10 19:30:32 +0400891 device_class_set_props(dc, es1370_properties);
Anthony Liguori40021f02011-12-04 12:22:06 -0600892}
893
Andreas Färber8c43a6f2013-01-10 16:19:07 +0100894static const TypeInfo es1370_info = {
Cao jin0d769042016-02-01 15:57:35 +0800895 .name = TYPE_ES1370,
Anthony Liguori39bffca2011-12-07 21:34:16 -0600896 .parent = TYPE_PCI_DEVICE,
897 .instance_size = sizeof (ES1370State),
898 .class_init = es1370_class_init,
Eduardo Habkostfd3b02c2017-09-27 16:56:34 -0300899 .interfaces = (InterfaceInfo[]) {
900 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
901 { },
902 },
Gerd Hoffmann6806e592009-06-30 14:12:12 +0200903};
904
Andreas Färber83f7d432012-02-09 15:20:55 +0100905static void es1370_register_types (void)
Gerd Hoffmann6806e592009-06-30 14:12:12 +0200906{
malccf4dc462012-02-07 22:11:04 +0400907 type_register_static (&es1370_info);
Gerd Hoffmann0e933fe2020-07-02 15:25:10 +0200908 deprecated_register_soundhw("es1370", "ENSONIQ AudioPCI ES1370",
909 0, TYPE_ES1370);
Gerd Hoffmann6806e592009-06-30 14:12:12 +0200910}
Andreas Färber83f7d432012-02-09 15:20:55 +0100911
912type_init (es1370_register_types)