blob: 1f1efd0733074dcb4e256e3eab2feb285fab8d44 [file] [log] [blame]
bellard420557e2004-09-30 22:13:50 +00001/*
blueswir1ee76f822007-12-28 20:59:23 +00002 * QEMU Sun4m & Sun4d & Sun4c System Emulator
ths5fafdf22007-09-16 21:08:06 +00003 *
bellardb81b3b12005-04-06 20:43:37 +00004 * Copyright (c) 2003-2005 Fabrice Bellard
ths5fafdf22007-09-16 21:08:06 +00005 *
bellard420557e2004-09-30 22:13:50 +00006 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
pbrook87ecb682007-11-17 17:14:51 +000024#include "hw.h"
25#include "qemu-timer.h"
26#include "sun4m.h"
27#include "nvram.h"
28#include "sparc32_dma.h"
29#include "fdc.h"
30#include "sysemu.h"
31#include "net.h"
32#include "boards.h"
blueswir1d2c63fc2007-11-14 19:35:16 +000033#include "firmware_abi.h"
blueswir18b17de82008-03-02 08:48:47 +000034#include "scsi.h"
blueswir122548762008-05-10 10:12:00 +000035#include "pc.h"
36#include "isa.h"
blueswir13cce6242008-09-18 18:27:29 +000037#include "fw_cfg.h"
blueswir1b4ed08e2009-01-12 17:38:28 +000038#include "escc.h"
blueswir1d2c63fc2007-11-14 19:35:16 +000039
blueswir1b3a23192007-05-27 16:42:29 +000040//#define DEBUG_IRQ
bellard420557e2004-09-30 22:13:50 +000041
blueswir136cd9212007-04-01 15:44:43 +000042/*
43 * Sun4m architecture was used in the following machines:
44 *
45 * SPARCserver 6xxMP/xx
blueswir177f193d2008-05-12 16:13:33 +000046 * SPARCclassic (SPARCclassic Server)(SPARCstation LC) (4/15),
47 * SPARCclassic X (4/10)
blueswir136cd9212007-04-01 15:44:43 +000048 * SPARCstation LX/ZX (4/30)
49 * SPARCstation Voyager
50 * SPARCstation 10/xx, SPARCserver 10/xx
51 * SPARCstation 5, SPARCserver 5
52 * SPARCstation 20/xx, SPARCserver 20
53 * SPARCstation 4
54 *
blueswir17d858922007-12-28 20:57:43 +000055 * Sun4d architecture was used in the following machines:
56 *
57 * SPARCcenter 2000
58 * SPARCserver 1000
59 *
blueswir1ee76f822007-12-28 20:59:23 +000060 * Sun4c architecture was used in the following machines:
61 * SPARCstation 1/1+, SPARCserver 1/1+
62 * SPARCstation SLC
63 * SPARCstation IPC
64 * SPARCstation ELC
65 * SPARCstation IPX
66 *
blueswir136cd9212007-04-01 15:44:43 +000067 * See for example: http://www.sunhelp.org/faq/sunref1.html
68 */
69
blueswir1b3a23192007-05-27 16:42:29 +000070#ifdef DEBUG_IRQ
71#define DPRINTF(fmt, args...) \
72 do { printf("CPUIRQ: " fmt , ##args); } while (0)
73#else
74#define DPRINTF(fmt, args...)
75#endif
76
bellard420557e2004-09-30 22:13:50 +000077#define KERNEL_LOAD_ADDR 0x00004000
bellardb6f479d2005-03-01 21:51:04 +000078#define CMDLINE_ADDR 0x007ff000
bellard713c45f2005-02-22 19:08:41 +000079#define INITRD_LOAD_ADDR 0x00800000
blueswir1a7227722008-11-02 14:44:35 +000080#define PROM_SIZE_MAX (1024 * 1024)
blueswir140ce0a92007-09-24 19:44:09 +000081#define PROM_VADDR 0xffd00000
blueswir1f930d072007-10-06 11:28:21 +000082#define PROM_FILENAME "openbios-sparc32"
blueswir13cce6242008-09-18 18:27:29 +000083#define CFG_ADDR 0xd00000510ULL
blueswir1fbfcf952008-09-18 18:34:28 +000084#define FW_CFG_SUN4M_DEPTH (FW_CFG_ARCH_LOCAL + 0x00)
bellardb8174932006-09-10 19:25:12 +000085
bellardba3c64f2005-12-05 20:31:52 +000086#define MAX_CPUS 16
blueswir1b3a23192007-05-27 16:42:29 +000087#define MAX_PILS 16
bellard420557e2004-09-30 22:13:50 +000088
blueswir1b4ed08e2009-01-12 17:38:28 +000089#define ESCC_CLOCK 4915200
90
blueswir18137cde2008-10-27 15:56:56 +000091struct sun4m_hwdef {
blueswir15dcb6b92007-05-19 12:58:30 +000092 target_phys_addr_t iommu_base, slavio_base;
93 target_phys_addr_t intctl_base, counter_base, nvram_base, ms_kb_base;
94 target_phys_addr_t serial_base, fd_base;
blueswir14c2485d2007-12-27 20:26:23 +000095 target_phys_addr_t idreg_base, dma_base, esp_base, le_base;
blueswir10019ad52008-01-27 09:49:28 +000096 target_phys_addr_t tcx_base, cs_base, apc_base, aux1_base, aux2_base;
blueswir17eb0c8e2007-12-09 17:03:50 +000097 target_phys_addr_t ecc_base;
98 uint32_t ecc_version;
blueswir136cd9212007-04-01 15:44:43 +000099 long vram_size, nvram_size;
blueswir16341fdc2007-12-29 20:09:57 +0000100 // IRQ numbers are not PIL ones, but master interrupt controller
blueswir1e3a79bc2008-01-01 20:57:25 +0000101 // register bit numbers
blueswir11572a182008-10-28 17:55:32 +0000102 int esp_irq, le_irq, clock_irq, clock1_irq;
blueswir1e42c20b2008-01-17 21:04:16 +0000103 int ser_irq, ms_kb_irq, fd_irq, me_irq, cs_irq, ecc_irq;
blueswir1905fdcb2008-09-18 18:33:18 +0000104 uint8_t nvram_machine_id;
105 uint16_t machine_id;
blueswir17fbfb132007-11-17 09:04:09 +0000106 uint32_t iommu_version;
blueswir1e0353fe2007-04-01 15:55:28 +0000107 uint32_t intbit_to_level[32];
blueswir13ebf5aa2007-11-28 20:54:33 +0000108 uint64_t max_mem;
109 const char * const default_cpu_model;
blueswir136cd9212007-04-01 15:44:43 +0000110};
111
blueswir17d858922007-12-28 20:57:43 +0000112#define MAX_IOUNITS 5
113
114struct sun4d_hwdef {
115 target_phys_addr_t iounit_bases[MAX_IOUNITS], slavio_base;
116 target_phys_addr_t counter_base, nvram_base, ms_kb_base;
117 target_phys_addr_t serial_base;
118 target_phys_addr_t espdma_base, esp_base;
119 target_phys_addr_t ledma_base, le_base;
120 target_phys_addr_t tcx_base;
121 target_phys_addr_t sbi_base;
122 unsigned long vram_size, nvram_size;
123 // IRQ numbers are not PIL ones, but SBI register bit numbers
124 int esp_irq, le_irq, clock_irq, clock1_irq;
125 int ser_irq, ms_kb_irq, me_irq;
blueswir1905fdcb2008-09-18 18:33:18 +0000126 uint8_t nvram_machine_id;
127 uint16_t machine_id;
blueswir17d858922007-12-28 20:57:43 +0000128 uint32_t iounit_version;
129 uint64_t max_mem;
130 const char * const default_cpu_model;
131};
132
blueswir18137cde2008-10-27 15:56:56 +0000133struct sun4c_hwdef {
134 target_phys_addr_t iommu_base, slavio_base;
135 target_phys_addr_t intctl_base, counter_base, nvram_base, ms_kb_base;
136 target_phys_addr_t serial_base, fd_base;
137 target_phys_addr_t idreg_base, dma_base, esp_base, le_base;
blueswir11572a182008-10-28 17:55:32 +0000138 target_phys_addr_t tcx_base, aux1_base;
blueswir18137cde2008-10-27 15:56:56 +0000139 long vram_size, nvram_size;
140 // IRQ numbers are not PIL ones, but master interrupt controller
141 // register bit numbers
blueswir11572a182008-10-28 17:55:32 +0000142 int esp_irq, le_irq, clock_irq, clock1_irq;
143 int ser_irq, ms_kb_irq, fd_irq, me_irq;
blueswir18137cde2008-10-27 15:56:56 +0000144 uint8_t nvram_machine_id;
145 uint16_t machine_id;
146 uint32_t iommu_version;
147 uint32_t intbit_to_level[32];
148 uint64_t max_mem;
149 const char * const default_cpu_model;
150};
151
bellard6f7e9ae2005-03-13 09:43:36 +0000152int DMA_get_channel_mode (int nchan)
153{
154 return 0;
155}
156int DMA_read_memory (int nchan, void *buf, int pos, int size)
157{
158 return 0;
159}
160int DMA_write_memory (int nchan, void *buf, int pos, int size)
161{
162 return 0;
163}
164void DMA_hold_DREQ (int nchan) {}
165void DMA_release_DREQ (int nchan) {}
166void DMA_schedule(int nchan) {}
bellard6f7e9ae2005-03-13 09:43:36 +0000167void DMA_init (int high_page_enable) {}
168void DMA_register_channel (int nchan,
169 DMA_transfer_handler transfer_handler,
170 void *opaque)
171{
172}
173
blueswir1513f7892009-03-08 09:51:29 +0000174static int fw_cfg_boot_set(void *opaque, const char *boot_device)
blueswir181864572008-06-20 16:25:56 +0000175{
blueswir1513f7892009-03-08 09:51:29 +0000176 fw_cfg_add_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
blueswir181864572008-06-20 16:25:56 +0000177 return 0;
178}
179
bellard819385c2005-10-30 16:58:32 +0000180static void nvram_init(m48t59_t *nvram, uint8_t *macaddr, const char *cmdline,
blueswir16ef05b92008-05-01 18:21:46 +0000181 const char *boot_devices, ram_addr_t RAM_size,
blueswir1f930d072007-10-06 11:28:21 +0000182 uint32_t kernel_size,
183 int width, int height, int depth,
blueswir1905fdcb2008-09-18 18:33:18 +0000184 int nvram_machine_id, const char *arch)
bellarde80cfcf2004-12-19 23:18:01 +0000185{
blueswir1d2c63fc2007-11-14 19:35:16 +0000186 unsigned int i;
blueswir166508602007-05-01 14:16:52 +0000187 uint32_t start, end;
blueswir1d2c63fc2007-11-14 19:35:16 +0000188 uint8_t image[0x1ff0];
blueswir1d2c63fc2007-11-14 19:35:16 +0000189 struct OpenBIOS_nvpart_v1 *part_header;
190
191 memset(image, '\0', sizeof(image));
bellarde80cfcf2004-12-19 23:18:01 +0000192
blueswir1513f7892009-03-08 09:51:29 +0000193 start = 0;
bellardb6f479d2005-03-01 21:51:04 +0000194
blueswir166508602007-05-01 14:16:52 +0000195 // OpenBIOS nvram variables
196 // Variable partition
blueswir1d2c63fc2007-11-14 19:35:16 +0000197 part_header = (struct OpenBIOS_nvpart_v1 *)&image[start];
198 part_header->signature = OPENBIOS_PART_SYSTEM;
blueswir1363a37d2008-08-21 17:58:08 +0000199 pstrcpy(part_header->name, sizeof(part_header->name), "system");
blueswir166508602007-05-01 14:16:52 +0000200
blueswir1d2c63fc2007-11-14 19:35:16 +0000201 end = start + sizeof(struct OpenBIOS_nvpart_v1);
blueswir166508602007-05-01 14:16:52 +0000202 for (i = 0; i < nb_prom_envs; i++)
blueswir1d2c63fc2007-11-14 19:35:16 +0000203 end = OpenBIOS_set_var(image, end, prom_envs[i]);
blueswir166508602007-05-01 14:16:52 +0000204
blueswir1d2c63fc2007-11-14 19:35:16 +0000205 // End marker
206 image[end++] = '\0';
207
blueswir166508602007-05-01 14:16:52 +0000208 end = start + ((end - start + 15) & ~15);
blueswir1d2c63fc2007-11-14 19:35:16 +0000209 OpenBIOS_finish_partition(part_header, end - start);
blueswir166508602007-05-01 14:16:52 +0000210
211 // free partition
212 start = end;
blueswir1d2c63fc2007-11-14 19:35:16 +0000213 part_header = (struct OpenBIOS_nvpart_v1 *)&image[start];
214 part_header->signature = OPENBIOS_PART_FREE;
blueswir1363a37d2008-08-21 17:58:08 +0000215 pstrcpy(part_header->name, sizeof(part_header->name), "free");
blueswir166508602007-05-01 14:16:52 +0000216
217 end = 0x1fd0;
blueswir1d2c63fc2007-11-14 19:35:16 +0000218 OpenBIOS_finish_partition(part_header, end - start);
blueswir166508602007-05-01 14:16:52 +0000219
blueswir1905fdcb2008-09-18 18:33:18 +0000220 Sun_init_header((struct Sun_nvram *)&image[0x1fd8], macaddr,
221 nvram_machine_id);
bellarde80cfcf2004-12-19 23:18:01 +0000222
blueswir1d2c63fc2007-11-14 19:35:16 +0000223 for (i = 0; i < sizeof(image); i++)
224 m48t59_write(nvram, i, image[i]);
bellarde80cfcf2004-12-19 23:18:01 +0000225}
226
227static void *slavio_intctl;
228
aliguori376253e2009-03-05 23:01:23 +0000229void pic_info(Monitor *mon)
bellarde80cfcf2004-12-19 23:18:01 +0000230{
blueswir17d858922007-12-28 20:57:43 +0000231 if (slavio_intctl)
aliguori376253e2009-03-05 23:01:23 +0000232 slavio_pic_info(mon, slavio_intctl);
bellarde80cfcf2004-12-19 23:18:01 +0000233}
234
aliguori376253e2009-03-05 23:01:23 +0000235void irq_info(Monitor *mon)
bellarde80cfcf2004-12-19 23:18:01 +0000236{
blueswir17d858922007-12-28 20:57:43 +0000237 if (slavio_intctl)
aliguori376253e2009-03-05 23:01:23 +0000238 slavio_irq_info(mon, slavio_intctl);
bellarde80cfcf2004-12-19 23:18:01 +0000239}
240
blueswir1327ac2e2007-08-04 10:50:30 +0000241void cpu_check_irqs(CPUState *env)
242{
243 if (env->pil_in && (env->interrupt_index == 0 ||
244 (env->interrupt_index & ~15) == TT_EXTINT)) {
245 unsigned int i;
246
247 for (i = 15; i > 0; i--) {
248 if (env->pil_in & (1 << i)) {
249 int old_interrupt = env->interrupt_index;
250
251 env->interrupt_index = TT_EXTINT | i;
blueswir1f32d7ec2008-03-04 20:29:59 +0000252 if (old_interrupt != env->interrupt_index) {
253 DPRINTF("Set CPU IRQ %d\n", i);
blueswir1327ac2e2007-08-04 10:50:30 +0000254 cpu_interrupt(env, CPU_INTERRUPT_HARD);
blueswir1f32d7ec2008-03-04 20:29:59 +0000255 }
blueswir1327ac2e2007-08-04 10:50:30 +0000256 break;
257 }
258 }
259 } else if (!env->pil_in && (env->interrupt_index & ~15) == TT_EXTINT) {
blueswir1f32d7ec2008-03-04 20:29:59 +0000260 DPRINTF("Reset CPU IRQ %d\n", env->interrupt_index & 15);
blueswir1327ac2e2007-08-04 10:50:30 +0000261 env->interrupt_index = 0;
262 cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
263 }
264}
265
blueswir1b3a23192007-05-27 16:42:29 +0000266static void cpu_set_irq(void *opaque, int irq, int level)
267{
268 CPUState *env = opaque;
269
270 if (level) {
271 DPRINTF("Raise CPU IRQ %d\n", irq);
blueswir1b3a23192007-05-27 16:42:29 +0000272 env->halted = 0;
blueswir1327ac2e2007-08-04 10:50:30 +0000273 env->pil_in |= 1 << irq;
274 cpu_check_irqs(env);
blueswir1b3a23192007-05-27 16:42:29 +0000275 } else {
276 DPRINTF("Lower CPU IRQ %d\n", irq);
blueswir1327ac2e2007-08-04 10:50:30 +0000277 env->pil_in &= ~(1 << irq);
278 cpu_check_irqs(env);
blueswir1b3a23192007-05-27 16:42:29 +0000279 }
280}
281
282static void dummy_cpu_set_irq(void *opaque, int irq, int level)
283{
284}
285
bellard34751872005-07-02 14:31:34 +0000286static void *slavio_misc;
287
288void qemu_system_powerdown(void)
289{
290 slavio_set_power_fail(slavio_misc, 1);
291}
292
bellardc68ea702005-11-21 23:33:12 +0000293static void main_cpu_reset(void *opaque)
294{
295 CPUState *env = opaque;
blueswir13d29fbe2007-05-17 19:21:46 +0000296
bellardc68ea702005-11-21 23:33:12 +0000297 cpu_reset(env);
blueswir13d29fbe2007-05-17 19:21:46 +0000298 env->halted = 0;
299}
300
301static void secondary_cpu_reset(void *opaque)
302{
303 CPUState *env = opaque;
304
305 cpu_reset(env);
306 env->halted = 1;
bellardc68ea702005-11-21 23:33:12 +0000307}
308
blueswir16d0c2932008-11-02 10:51:05 +0000309static void cpu_halt_signal(void *opaque, int irq, int level)
310{
311 if (level && cpu_single_env)
312 cpu_interrupt(cpu_single_env, CPU_INTERRUPT_HALT);
313}
314
blueswir13ebf5aa2007-11-28 20:54:33 +0000315static unsigned long sun4m_load_kernel(const char *kernel_filename,
blueswir1293f78b2008-05-12 17:22:13 +0000316 const char *initrd_filename,
317 ram_addr_t RAM_size)
blueswir13ebf5aa2007-11-28 20:54:33 +0000318{
319 int linux_boot;
320 unsigned int i;
321 long initrd_size, kernel_size;
322
323 linux_boot = (kernel_filename != NULL);
324
325 kernel_size = 0;
326 if (linux_boot) {
327 kernel_size = load_elf(kernel_filename, -0xf0000000ULL, NULL, NULL,
328 NULL);
329 if (kernel_size < 0)
blueswir1293f78b2008-05-12 17:22:13 +0000330 kernel_size = load_aout(kernel_filename, KERNEL_LOAD_ADDR,
331 RAM_size - KERNEL_LOAD_ADDR);
blueswir13ebf5aa2007-11-28 20:54:33 +0000332 if (kernel_size < 0)
blueswir1293f78b2008-05-12 17:22:13 +0000333 kernel_size = load_image_targphys(kernel_filename,
334 KERNEL_LOAD_ADDR,
335 RAM_size - KERNEL_LOAD_ADDR);
blueswir13ebf5aa2007-11-28 20:54:33 +0000336 if (kernel_size < 0) {
337 fprintf(stderr, "qemu: could not load kernel '%s'\n",
338 kernel_filename);
339 exit(1);
340 }
341
342 /* load initrd */
343 initrd_size = 0;
344 if (initrd_filename) {
blueswir1293f78b2008-05-12 17:22:13 +0000345 initrd_size = load_image_targphys(initrd_filename,
346 INITRD_LOAD_ADDR,
347 RAM_size - INITRD_LOAD_ADDR);
blueswir13ebf5aa2007-11-28 20:54:33 +0000348 if (initrd_size < 0) {
349 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
350 initrd_filename);
351 exit(1);
352 }
353 }
354 if (initrd_size > 0) {
355 for (i = 0; i < 64 * TARGET_PAGE_SIZE; i += TARGET_PAGE_SIZE) {
blueswir1293f78b2008-05-12 17:22:13 +0000356 if (ldl_phys(KERNEL_LOAD_ADDR + i) == 0x48647253) { // HdrS
357 stl_phys(KERNEL_LOAD_ADDR + i + 16, INITRD_LOAD_ADDR);
358 stl_phys(KERNEL_LOAD_ADDR + i + 20, initrd_size);
blueswir13ebf5aa2007-11-28 20:54:33 +0000359 break;
360 }
361 }
362 }
363 }
364 return kernel_size;
365}
366
blueswir18137cde2008-10-27 15:56:56 +0000367static void sun4m_hw_init(const struct sun4m_hwdef *hwdef, ram_addr_t RAM_size,
blueswir13ebf5aa2007-11-28 20:54:33 +0000368 const char *boot_device,
aliguori3023f332009-01-16 19:04:14 +0000369 const char *kernel_filename,
blueswir13ebf5aa2007-11-28 20:54:33 +0000370 const char *kernel_cmdline,
371 const char *initrd_filename, const char *cpu_model)
blueswir136cd9212007-04-01 15:44:43 +0000372
bellard420557e2004-09-30 22:13:50 +0000373{
bellardba3c64f2005-12-05 20:31:52 +0000374 CPUState *env, *envs[MAX_CPUS];
bellard713c45f2005-02-22 19:08:41 +0000375 unsigned int i;
blueswir1b3ceef22007-06-25 19:56:13 +0000376 void *iommu, *espdma, *ledma, *main_esp, *nvram;
blueswir1b3a23192007-05-27 16:42:29 +0000377 qemu_irq *cpu_irqs[MAX_CPUS], *slavio_irq, *slavio_cpu_irq,
blueswir1d7edfd22007-05-27 16:37:49 +0000378 *espdma_irq, *ledma_irq;
blueswir12d069ba2007-08-16 19:56:27 +0000379 qemu_irq *esp_reset, *le_reset;
blueswir12be17eb2008-03-21 18:05:23 +0000380 qemu_irq *fdc_tc;
blueswir16d0c2932008-11-02 10:51:05 +0000381 qemu_irq *cpu_halt;
pbrookdc828ca2009-04-09 22:21:07 +0000382 ram_addr_t ram_offset, prom_offset, idreg_offset;
blueswir15c6602c2008-11-05 19:25:39 +0000383 unsigned long kernel_size;
blueswir13ebf5aa2007-11-28 20:54:33 +0000384 int ret;
385 char buf[1024];
thse4bcb142007-12-02 04:51:10 +0000386 BlockDriverState *fd[MAX_FD];
blueswir122548762008-05-10 10:12:00 +0000387 int drive_index;
blueswir13cce6242008-09-18 18:27:29 +0000388 void *fw_cfg;
bellard420557e2004-09-30 22:13:50 +0000389
bellardba3c64f2005-12-05 20:31:52 +0000390 /* init CPUs */
blueswir13ebf5aa2007-11-28 20:54:33 +0000391 if (!cpu_model)
392 cpu_model = hwdef->default_cpu_model;
blueswir1b3a23192007-05-27 16:42:29 +0000393
bellardba3c64f2005-12-05 20:31:52 +0000394 for(i = 0; i < smp_cpus; i++) {
bellardaaed9092007-11-10 15:15:54 +0000395 env = cpu_init(cpu_model);
396 if (!env) {
blueswir18e82c6a2008-01-06 07:50:38 +0000397 fprintf(stderr, "qemu: Unable to find Sparc CPU definition\n");
bellardaaed9092007-11-10 15:15:54 +0000398 exit(1);
399 }
400 cpu_sparc_set_id(env, i);
bellardba3c64f2005-12-05 20:31:52 +0000401 envs[i] = env;
blueswir13d29fbe2007-05-17 19:21:46 +0000402 if (i == 0) {
403 qemu_register_reset(main_cpu_reset, env);
404 } else {
405 qemu_register_reset(secondary_cpu_reset, env);
bellardba3c64f2005-12-05 20:31:52 +0000406 env->halted = 1;
blueswir13d29fbe2007-05-17 19:21:46 +0000407 }
blueswir1b3a23192007-05-27 16:42:29 +0000408 cpu_irqs[i] = qemu_allocate_irqs(cpu_set_irq, envs[i], MAX_PILS);
blueswir13ebf5aa2007-11-28 20:54:33 +0000409 env->prom_addr = hwdef->slavio_base;
bellardba3c64f2005-12-05 20:31:52 +0000410 }
blueswir1b3a23192007-05-27 16:42:29 +0000411
412 for (i = smp_cpus; i < MAX_CPUS; i++)
413 cpu_irqs[i] = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, MAX_PILS);
414
blueswir13ebf5aa2007-11-28 20:54:33 +0000415
bellard420557e2004-09-30 22:13:50 +0000416 /* allocate RAM */
blueswir13ebf5aa2007-11-28 20:54:33 +0000417 if ((uint64_t)RAM_size > hwdef->max_mem) {
blueswir177f193d2008-05-12 16:13:33 +0000418 fprintf(stderr,
419 "qemu: Too much memory for this machine: %d, maximum %d\n",
blueswir16ef05b92008-05-01 18:21:46 +0000420 (unsigned int)(RAM_size / (1024 * 1024)),
blueswir13ebf5aa2007-11-28 20:54:33 +0000421 (unsigned int)(hwdef->max_mem / (1024 * 1024)));
422 exit(1);
423 }
blueswir15c6602c2008-11-05 19:25:39 +0000424 ram_offset = qemu_ram_alloc(RAM_size);
425 cpu_register_physical_memory(0, RAM_size, ram_offset);
bellard420557e2004-09-30 22:13:50 +0000426
blueswir13ebf5aa2007-11-28 20:54:33 +0000427 /* load boot prom */
blueswir15c6602c2008-11-05 19:25:39 +0000428 prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
blueswir13ebf5aa2007-11-28 20:54:33 +0000429 cpu_register_physical_memory(hwdef->slavio_base,
430 (PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) &
431 TARGET_PAGE_MASK,
432 prom_offset | IO_MEM_ROM);
433
434 if (bios_name == NULL)
435 bios_name = PROM_FILENAME;
436 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
437 ret = load_elf(buf, hwdef->slavio_base - PROM_VADDR, NULL, NULL, NULL);
438 if (ret < 0 || ret > PROM_SIZE_MAX)
blueswir1e01f4a12008-05-13 15:44:10 +0000439 ret = load_image_targphys(buf, hwdef->slavio_base, PROM_SIZE_MAX);
blueswir13ebf5aa2007-11-28 20:54:33 +0000440 if (ret < 0 || ret > PROM_SIZE_MAX) {
441 fprintf(stderr, "qemu: could not load prom '%s'\n",
442 buf);
443 exit(1);
444 }
445
446 /* set up devices */
blueswir136cd9212007-04-01 15:44:43 +0000447 slavio_intctl = slavio_intctl_init(hwdef->intctl_base,
blueswir15dcb6b92007-05-19 12:58:30 +0000448 hwdef->intctl_base + 0x10000ULL,
pbrookd537cf62007-04-07 18:14:41 +0000449 &hwdef->intbit_to_level[0],
blueswir1d7edfd22007-05-27 16:37:49 +0000450 &slavio_irq, &slavio_cpu_irq,
blueswir1b3a23192007-05-27 16:42:29 +0000451 cpu_irqs,
blueswir1d7edfd22007-05-27 16:37:49 +0000452 hwdef->clock_irq);
blueswir1b3a23192007-05-27 16:42:29 +0000453
blueswir1fe096122008-12-24 20:21:18 +0000454 if (hwdef->idreg_base) {
blueswir1293f78b2008-05-12 17:22:13 +0000455 static const uint8_t idreg_data[] = { 0xfe, 0x81, 0x01, 0x03 };
blueswir14c2485d2007-12-27 20:26:23 +0000456
blueswir15c6602c2008-11-05 19:25:39 +0000457 idreg_offset = qemu_ram_alloc(sizeof(idreg_data));
blueswir1293f78b2008-05-12 17:22:13 +0000458 cpu_register_physical_memory(hwdef->idreg_base, sizeof(idreg_data),
blueswir15c6602c2008-11-05 19:25:39 +0000459 idreg_offset | IO_MEM_ROM);
blueswir1293f78b2008-05-12 17:22:13 +0000460 cpu_physical_memory_write_rom(hwdef->idreg_base, idreg_data,
461 sizeof(idreg_data));
blueswir14c2485d2007-12-27 20:26:23 +0000462 }
463
blueswir1ff403da2008-01-01 17:04:45 +0000464 iommu = iommu_init(hwdef->iommu_base, hwdef->iommu_version,
465 slavio_irq[hwdef->me_irq]);
466
blueswir15aca8c32007-05-26 17:39:43 +0000467 espdma = sparc32_dma_init(hwdef->dma_base, slavio_irq[hwdef->esp_irq],
blueswir12d069ba2007-08-16 19:56:27 +0000468 iommu, &espdma_irq, &esp_reset);
469
blueswir15aca8c32007-05-26 17:39:43 +0000470 ledma = sparc32_dma_init(hwdef->dma_base + 16ULL,
blueswir12d069ba2007-08-16 19:56:27 +0000471 slavio_irq[hwdef->le_irq], iommu, &ledma_irq,
472 &le_reset);
bellardba3c64f2005-12-05 20:31:52 +0000473
blueswir1eee0b832007-04-21 19:45:49 +0000474 if (graphic_depth != 8 && graphic_depth != 24) {
475 fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
476 exit (1);
477 }
pbrookdc828ca2009-04-09 22:21:07 +0000478 tcx_init(hwdef->tcx_base, hwdef->vram_size, graphic_width, graphic_height,
479 graphic_depth);
blueswir1dbe06e12007-05-27 19:38:20 +0000480
aliguori0ae18ce2009-01-13 19:39:36 +0000481 lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
blueswir1dbe06e12007-05-27 19:38:20 +0000482
pbrookd537cf62007-04-07 18:14:41 +0000483 nvram = m48t59_init(slavio_irq[0], hwdef->nvram_base, 0,
484 hwdef->nvram_size, 8);
blueswir181732d12007-10-06 11:25:43 +0000485
486 slavio_timer_init_all(hwdef->counter_base, slavio_irq[hwdef->clock1_irq],
blueswir119f8e5d2007-12-17 18:17:17 +0000487 slavio_cpu_irq, smp_cpus);
blueswir181732d12007-10-06 11:25:43 +0000488
blueswir1577390f2007-12-04 20:58:31 +0000489 slavio_serial_ms_kbd_init(hwdef->ms_kb_base, slavio_irq[hwdef->ms_kb_irq],
blueswir1b4ed08e2009-01-12 17:38:28 +0000490 nographic, ESCC_CLOCK, 1);
bellardb81b3b12005-04-06 20:43:37 +0000491 // Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device
492 // Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device
aurel32aeeb69c2009-01-14 14:47:56 +0000493 escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq], slavio_irq[hwdef->ser_irq],
494 serial_hds[0], serial_hds[1], ESCC_CLOCK, 1);
blueswir1741402f2007-11-04 11:59:15 +0000495
blueswir16d0c2932008-11-02 10:51:05 +0000496 cpu_halt = qemu_allocate_irqs(cpu_halt_signal, NULL, 1);
blueswir12be17eb2008-03-21 18:05:23 +0000497 slavio_misc = slavio_misc_init(hwdef->slavio_base, hwdef->apc_base,
498 hwdef->aux1_base, hwdef->aux2_base,
blueswir16d0c2932008-11-02 10:51:05 +0000499 slavio_irq[hwdef->me_irq], cpu_halt[0],
blueswir12be17eb2008-03-21 18:05:23 +0000500 &fdc_tc);
501
blueswir1fe096122008-12-24 20:21:18 +0000502 if (hwdef->fd_base) {
thse4bcb142007-12-02 04:51:10 +0000503 /* there is zero or one floppy drive */
blueswir1309e60b2008-02-29 19:26:20 +0000504 memset(fd, 0, sizeof(fd));
blueswir122548762008-05-10 10:12:00 +0000505 drive_index = drive_get_index(IF_FLOPPY, 0, 0);
506 if (drive_index != -1)
507 fd[0] = drives_table[drive_index].bdrv;
blueswir12d069ba2007-08-16 19:56:27 +0000508
blueswir12be17eb2008-03-21 18:05:23 +0000509 sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd,
510 fdc_tc);
thse4bcb142007-12-02 04:51:10 +0000511 }
512
513 if (drive_get_max_bus(IF_SCSI) > 0) {
514 fprintf(stderr, "qemu: too many SCSI bus\n");
515 exit(1);
516 }
517
blueswir15d20fa62008-04-09 16:32:48 +0000518 main_esp = esp_init(hwdef->esp_base, 2,
blueswir18b17de82008-03-02 08:48:47 +0000519 espdma_memory_read, espdma_memory_write,
520 espdma, *espdma_irq, esp_reset);
thsf1587552007-01-10 11:46:13 +0000521
thse4bcb142007-12-02 04:51:10 +0000522 for (i = 0; i < ESP_MAX_DEVS; i++) {
blueswir122548762008-05-10 10:12:00 +0000523 drive_index = drive_get_index(IF_SCSI, 0, i);
524 if (drive_index == -1)
thse4bcb142007-12-02 04:51:10 +0000525 continue;
blueswir122548762008-05-10 10:12:00 +0000526 esp_scsi_attach(main_esp, drives_table[drive_index].bdrv, i);
thsf1587552007-01-10 11:46:13 +0000527 }
528
blueswir1fe096122008-12-24 20:21:18 +0000529 if (hwdef->cs_base)
blueswir1803b3c72007-04-05 17:00:23 +0000530 cs_init(hwdef->cs_base, hwdef->cs_irq, slavio_intctl);
blueswir1b3ceef22007-06-25 19:56:13 +0000531
blueswir1293f78b2008-05-12 17:22:13 +0000532 kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename,
533 RAM_size);
blueswir136cd9212007-04-01 15:44:43 +0000534
blueswir136cd9212007-04-01 15:44:43 +0000535 nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
blueswir1b3ceef22007-06-25 19:56:13 +0000536 boot_device, RAM_size, kernel_size, graphic_width,
blueswir1905fdcb2008-09-18 18:33:18 +0000537 graphic_height, graphic_depth, hwdef->nvram_machine_id,
538 "Sun4m");
blueswir17eb0c8e2007-12-09 17:03:50 +0000539
blueswir1fe096122008-12-24 20:21:18 +0000540 if (hwdef->ecc_base)
blueswir1e42c20b2008-01-17 21:04:16 +0000541 ecc_init(hwdef->ecc_base, slavio_irq[hwdef->ecc_irq],
542 hwdef->ecc_version);
blueswir13cce6242008-09-18 18:27:29 +0000543
544 fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
545 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
blueswir1905fdcb2008-09-18 18:33:18 +0000546 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
547 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
blueswir1fbfcf952008-09-18 18:34:28 +0000548 fw_cfg_add_i16(fw_cfg, FW_CFG_SUN4M_DEPTH, graphic_depth);
blueswir1513f7892009-03-08 09:51:29 +0000549 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, KERNEL_LOAD_ADDR);
550 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
551 if (kernel_cmdline) {
552 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
553 pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
554 } else {
555 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
556 }
557 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, INITRD_LOAD_ADDR);
558 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, 0); // not used
559 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, boot_device[0]);
560 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
bellard420557e2004-09-30 22:13:50 +0000561}
bellardc0e564d2005-06-05 15:17:28 +0000562
blueswir1905fdcb2008-09-18 18:33:18 +0000563enum {
564 ss2_id = 0,
565 ss5_id = 32,
566 vger_id,
567 lx_id,
568 ss4_id,
569 scls_id,
570 sbook_id,
571 ss10_id = 64,
572 ss20_id,
573 ss600mp_id,
574 ss1000_id = 96,
575 ss2000_id,
576};
577
blueswir18137cde2008-10-27 15:56:56 +0000578static const struct sun4m_hwdef sun4m_hwdefs[] = {
blueswir136cd9212007-04-01 15:44:43 +0000579 /* SS-5 */
580 {
581 .iommu_base = 0x10000000,
582 .tcx_base = 0x50000000,
583 .cs_base = 0x6c000000,
blueswir1384ccb52007-05-06 17:33:14 +0000584 .slavio_base = 0x70000000,
blueswir136cd9212007-04-01 15:44:43 +0000585 .ms_kb_base = 0x71000000,
586 .serial_base = 0x71100000,
587 .nvram_base = 0x71200000,
588 .fd_base = 0x71400000,
589 .counter_base = 0x71d00000,
590 .intctl_base = 0x71e00000,
blueswir14c2485d2007-12-27 20:26:23 +0000591 .idreg_base = 0x78000000,
blueswir136cd9212007-04-01 15:44:43 +0000592 .dma_base = 0x78400000,
593 .esp_base = 0x78800000,
594 .le_base = 0x78c00000,
blueswir1127fc402008-02-01 20:12:40 +0000595 .apc_base = 0x6a000000,
blueswir10019ad52008-01-27 09:49:28 +0000596 .aux1_base = 0x71900000,
597 .aux2_base = 0x71910000,
blueswir136cd9212007-04-01 15:44:43 +0000598 .vram_size = 0x00100000,
599 .nvram_size = 0x2000,
600 .esp_irq = 18,
601 .le_irq = 16,
blueswir1e3a79bc2008-01-01 20:57:25 +0000602 .clock_irq = 7,
blueswir136cd9212007-04-01 15:44:43 +0000603 .clock1_irq = 19,
604 .ms_kb_irq = 14,
605 .ser_irq = 15,
606 .fd_irq = 22,
607 .me_irq = 30,
608 .cs_irq = 5,
blueswir1905fdcb2008-09-18 18:33:18 +0000609 .nvram_machine_id = 0x80,
610 .machine_id = ss5_id,
blueswir1cf3102a2007-12-29 09:07:00 +0000611 .iommu_version = 0x05000000,
blueswir1e0353fe2007-04-01 15:55:28 +0000612 .intbit_to_level = {
blueswir1f930d072007-10-06 11:28:21 +0000613 2, 3, 5, 7, 9, 11, 0, 14, 3, 5, 7, 9, 11, 13, 12, 12,
614 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0,
blueswir1e0353fe2007-04-01 15:55:28 +0000615 },
blueswir13ebf5aa2007-11-28 20:54:33 +0000616 .max_mem = 0x10000000,
617 .default_cpu_model = "Fujitsu MB86904",
blueswir1e0353fe2007-04-01 15:55:28 +0000618 },
619 /* SS-10 */
blueswir1e0353fe2007-04-01 15:55:28 +0000620 {
blueswir15dcb6b92007-05-19 12:58:30 +0000621 .iommu_base = 0xfe0000000ULL,
622 .tcx_base = 0xe20000000ULL,
blueswir15dcb6b92007-05-19 12:58:30 +0000623 .slavio_base = 0xff0000000ULL,
624 .ms_kb_base = 0xff1000000ULL,
625 .serial_base = 0xff1100000ULL,
626 .nvram_base = 0xff1200000ULL,
627 .fd_base = 0xff1700000ULL,
628 .counter_base = 0xff1300000ULL,
629 .intctl_base = 0xff1400000ULL,
blueswir14c2485d2007-12-27 20:26:23 +0000630 .idreg_base = 0xef0000000ULL,
blueswir15dcb6b92007-05-19 12:58:30 +0000631 .dma_base = 0xef0400000ULL,
632 .esp_base = 0xef0800000ULL,
633 .le_base = 0xef0c00000ULL,
blueswir10019ad52008-01-27 09:49:28 +0000634 .apc_base = 0xefa000000ULL, // XXX should not exist
blueswir1127fc402008-02-01 20:12:40 +0000635 .aux1_base = 0xff1800000ULL,
636 .aux2_base = 0xff1a01000ULL,
blueswir17eb0c8e2007-12-09 17:03:50 +0000637 .ecc_base = 0xf00000000ULL,
638 .ecc_version = 0x10000000, // version 0, implementation 1
blueswir1e0353fe2007-04-01 15:55:28 +0000639 .vram_size = 0x00100000,
640 .nvram_size = 0x2000,
641 .esp_irq = 18,
642 .le_irq = 16,
blueswir1e3a79bc2008-01-01 20:57:25 +0000643 .clock_irq = 7,
blueswir1e0353fe2007-04-01 15:55:28 +0000644 .clock1_irq = 19,
645 .ms_kb_irq = 14,
646 .ser_irq = 15,
647 .fd_irq = 22,
648 .me_irq = 30,
blueswir1e42c20b2008-01-17 21:04:16 +0000649 .ecc_irq = 28,
blueswir1905fdcb2008-09-18 18:33:18 +0000650 .nvram_machine_id = 0x72,
651 .machine_id = ss10_id,
blueswir17fbfb132007-11-17 09:04:09 +0000652 .iommu_version = 0x03000000,
blueswir1e0353fe2007-04-01 15:55:28 +0000653 .intbit_to_level = {
blueswir1f930d072007-10-06 11:28:21 +0000654 2, 3, 5, 7, 9, 11, 0, 14, 3, 5, 7, 9, 11, 13, 12, 12,
655 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0,
blueswir1e0353fe2007-04-01 15:55:28 +0000656 },
blueswir16ef05b92008-05-01 18:21:46 +0000657 .max_mem = 0xf00000000ULL,
blueswir13ebf5aa2007-11-28 20:54:33 +0000658 .default_cpu_model = "TI SuperSparc II",
blueswir136cd9212007-04-01 15:44:43 +0000659 },
blueswir16a3b9cc2007-11-11 17:56:38 +0000660 /* SS-600MP */
661 {
662 .iommu_base = 0xfe0000000ULL,
663 .tcx_base = 0xe20000000ULL,
blueswir16a3b9cc2007-11-11 17:56:38 +0000664 .slavio_base = 0xff0000000ULL,
665 .ms_kb_base = 0xff1000000ULL,
666 .serial_base = 0xff1100000ULL,
667 .nvram_base = 0xff1200000ULL,
blueswir16a3b9cc2007-11-11 17:56:38 +0000668 .counter_base = 0xff1300000ULL,
669 .intctl_base = 0xff1400000ULL,
670 .dma_base = 0xef0081000ULL,
671 .esp_base = 0xef0080000ULL,
672 .le_base = 0xef0060000ULL,
blueswir10019ad52008-01-27 09:49:28 +0000673 .apc_base = 0xefa000000ULL, // XXX should not exist
blueswir1127fc402008-02-01 20:12:40 +0000674 .aux1_base = 0xff1800000ULL,
675 .aux2_base = 0xff1a01000ULL, // XXX should not exist
blueswir17eb0c8e2007-12-09 17:03:50 +0000676 .ecc_base = 0xf00000000ULL,
677 .ecc_version = 0x00000000, // version 0, implementation 0
blueswir16a3b9cc2007-11-11 17:56:38 +0000678 .vram_size = 0x00100000,
679 .nvram_size = 0x2000,
680 .esp_irq = 18,
681 .le_irq = 16,
blueswir1e3a79bc2008-01-01 20:57:25 +0000682 .clock_irq = 7,
blueswir16a3b9cc2007-11-11 17:56:38 +0000683 .clock1_irq = 19,
684 .ms_kb_irq = 14,
685 .ser_irq = 15,
686 .fd_irq = 22,
687 .me_irq = 30,
blueswir1e42c20b2008-01-17 21:04:16 +0000688 .ecc_irq = 28,
blueswir1905fdcb2008-09-18 18:33:18 +0000689 .nvram_machine_id = 0x71,
690 .machine_id = ss600mp_id,
blueswir17fbfb132007-11-17 09:04:09 +0000691 .iommu_version = 0x01000000,
blueswir16a3b9cc2007-11-11 17:56:38 +0000692 .intbit_to_level = {
693 2, 3, 5, 7, 9, 11, 0, 14, 3, 5, 7, 9, 11, 13, 12, 12,
694 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0,
695 },
blueswir16ef05b92008-05-01 18:21:46 +0000696 .max_mem = 0xf00000000ULL,
blueswir13ebf5aa2007-11-28 20:54:33 +0000697 .default_cpu_model = "TI SuperSparc II",
blueswir16a3b9cc2007-11-11 17:56:38 +0000698 },
blueswir1ae409722007-12-10 20:00:11 +0000699 /* SS-20 */
700 {
701 .iommu_base = 0xfe0000000ULL,
702 .tcx_base = 0xe20000000ULL,
blueswir1ae409722007-12-10 20:00:11 +0000703 .slavio_base = 0xff0000000ULL,
704 .ms_kb_base = 0xff1000000ULL,
705 .serial_base = 0xff1100000ULL,
706 .nvram_base = 0xff1200000ULL,
707 .fd_base = 0xff1700000ULL,
708 .counter_base = 0xff1300000ULL,
709 .intctl_base = 0xff1400000ULL,
blueswir14c2485d2007-12-27 20:26:23 +0000710 .idreg_base = 0xef0000000ULL,
blueswir1ae409722007-12-10 20:00:11 +0000711 .dma_base = 0xef0400000ULL,
712 .esp_base = 0xef0800000ULL,
713 .le_base = 0xef0c00000ULL,
blueswir10019ad52008-01-27 09:49:28 +0000714 .apc_base = 0xefa000000ULL, // XXX should not exist
blueswir1577d8dd2008-02-11 20:01:36 +0000715 .aux1_base = 0xff1800000ULL,
716 .aux2_base = 0xff1a01000ULL,
blueswir1ae409722007-12-10 20:00:11 +0000717 .ecc_base = 0xf00000000ULL,
718 .ecc_version = 0x20000000, // version 0, implementation 2
719 .vram_size = 0x00100000,
720 .nvram_size = 0x2000,
721 .esp_irq = 18,
722 .le_irq = 16,
blueswir1e3a79bc2008-01-01 20:57:25 +0000723 .clock_irq = 7,
blueswir1ae409722007-12-10 20:00:11 +0000724 .clock1_irq = 19,
725 .ms_kb_irq = 14,
726 .ser_irq = 15,
727 .fd_irq = 22,
728 .me_irq = 30,
blueswir1e42c20b2008-01-17 21:04:16 +0000729 .ecc_irq = 28,
blueswir1905fdcb2008-09-18 18:33:18 +0000730 .nvram_machine_id = 0x72,
731 .machine_id = ss20_id,
blueswir1ae409722007-12-10 20:00:11 +0000732 .iommu_version = 0x13000000,
733 .intbit_to_level = {
734 2, 3, 5, 7, 9, 11, 0, 14, 3, 5, 7, 9, 11, 13, 12, 12,
735 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0,
736 },
blueswir16ef05b92008-05-01 18:21:46 +0000737 .max_mem = 0xf00000000ULL,
blueswir1ae409722007-12-10 20:00:11 +0000738 .default_cpu_model = "TI SuperSparc II",
739 },
blueswir1a526a312008-03-05 18:27:45 +0000740 /* Voyager */
741 {
742 .iommu_base = 0x10000000,
743 .tcx_base = 0x50000000,
blueswir1a526a312008-03-05 18:27:45 +0000744 .slavio_base = 0x70000000,
745 .ms_kb_base = 0x71000000,
746 .serial_base = 0x71100000,
747 .nvram_base = 0x71200000,
748 .fd_base = 0x71400000,
749 .counter_base = 0x71d00000,
750 .intctl_base = 0x71e00000,
751 .idreg_base = 0x78000000,
752 .dma_base = 0x78400000,
753 .esp_base = 0x78800000,
754 .le_base = 0x78c00000,
755 .apc_base = 0x71300000, // pmc
756 .aux1_base = 0x71900000,
757 .aux2_base = 0x71910000,
blueswir1a526a312008-03-05 18:27:45 +0000758 .vram_size = 0x00100000,
759 .nvram_size = 0x2000,
760 .esp_irq = 18,
761 .le_irq = 16,
762 .clock_irq = 7,
763 .clock1_irq = 19,
764 .ms_kb_irq = 14,
765 .ser_irq = 15,
766 .fd_irq = 22,
767 .me_irq = 30,
blueswir1905fdcb2008-09-18 18:33:18 +0000768 .nvram_machine_id = 0x80,
769 .machine_id = vger_id,
blueswir1a526a312008-03-05 18:27:45 +0000770 .iommu_version = 0x05000000,
771 .intbit_to_level = {
772 2, 3, 5, 7, 9, 11, 0, 14, 3, 5, 7, 9, 11, 13, 12, 12,
773 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0,
774 },
775 .max_mem = 0x10000000,
776 .default_cpu_model = "Fujitsu MB86904",
777 },
778 /* LX */
779 {
780 .iommu_base = 0x10000000,
781 .tcx_base = 0x50000000,
blueswir1a526a312008-03-05 18:27:45 +0000782 .slavio_base = 0x70000000,
783 .ms_kb_base = 0x71000000,
784 .serial_base = 0x71100000,
785 .nvram_base = 0x71200000,
786 .fd_base = 0x71400000,
787 .counter_base = 0x71d00000,
788 .intctl_base = 0x71e00000,
789 .idreg_base = 0x78000000,
790 .dma_base = 0x78400000,
791 .esp_base = 0x78800000,
792 .le_base = 0x78c00000,
blueswir1a526a312008-03-05 18:27:45 +0000793 .aux1_base = 0x71900000,
794 .aux2_base = 0x71910000,
blueswir1a526a312008-03-05 18:27:45 +0000795 .vram_size = 0x00100000,
796 .nvram_size = 0x2000,
797 .esp_irq = 18,
798 .le_irq = 16,
799 .clock_irq = 7,
800 .clock1_irq = 19,
801 .ms_kb_irq = 14,
802 .ser_irq = 15,
803 .fd_irq = 22,
804 .me_irq = 30,
blueswir1905fdcb2008-09-18 18:33:18 +0000805 .nvram_machine_id = 0x80,
806 .machine_id = lx_id,
blueswir1a526a312008-03-05 18:27:45 +0000807 .iommu_version = 0x04000000,
808 .intbit_to_level = {
809 2, 3, 5, 7, 9, 11, 0, 14, 3, 5, 7, 9, 11, 13, 12, 12,
810 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0,
811 },
812 .max_mem = 0x10000000,
813 .default_cpu_model = "TI MicroSparc I",
814 },
815 /* SS-4 */
816 {
817 .iommu_base = 0x10000000,
818 .tcx_base = 0x50000000,
819 .cs_base = 0x6c000000,
820 .slavio_base = 0x70000000,
821 .ms_kb_base = 0x71000000,
822 .serial_base = 0x71100000,
823 .nvram_base = 0x71200000,
824 .fd_base = 0x71400000,
825 .counter_base = 0x71d00000,
826 .intctl_base = 0x71e00000,
827 .idreg_base = 0x78000000,
828 .dma_base = 0x78400000,
829 .esp_base = 0x78800000,
830 .le_base = 0x78c00000,
831 .apc_base = 0x6a000000,
832 .aux1_base = 0x71900000,
833 .aux2_base = 0x71910000,
blueswir1a526a312008-03-05 18:27:45 +0000834 .vram_size = 0x00100000,
835 .nvram_size = 0x2000,
836 .esp_irq = 18,
837 .le_irq = 16,
838 .clock_irq = 7,
839 .clock1_irq = 19,
840 .ms_kb_irq = 14,
841 .ser_irq = 15,
842 .fd_irq = 22,
843 .me_irq = 30,
844 .cs_irq = 5,
blueswir1905fdcb2008-09-18 18:33:18 +0000845 .nvram_machine_id = 0x80,
846 .machine_id = ss4_id,
blueswir1a526a312008-03-05 18:27:45 +0000847 .iommu_version = 0x05000000,
848 .intbit_to_level = {
849 2, 3, 5, 7, 9, 11, 0, 14, 3, 5, 7, 9, 11, 13, 12, 12,
850 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0,
851 },
852 .max_mem = 0x10000000,
853 .default_cpu_model = "Fujitsu MB86904",
854 },
855 /* SPARCClassic */
856 {
857 .iommu_base = 0x10000000,
858 .tcx_base = 0x50000000,
blueswir1a526a312008-03-05 18:27:45 +0000859 .slavio_base = 0x70000000,
860 .ms_kb_base = 0x71000000,
861 .serial_base = 0x71100000,
862 .nvram_base = 0x71200000,
863 .fd_base = 0x71400000,
864 .counter_base = 0x71d00000,
865 .intctl_base = 0x71e00000,
866 .idreg_base = 0x78000000,
867 .dma_base = 0x78400000,
868 .esp_base = 0x78800000,
869 .le_base = 0x78c00000,
870 .apc_base = 0x6a000000,
871 .aux1_base = 0x71900000,
872 .aux2_base = 0x71910000,
blueswir1a526a312008-03-05 18:27:45 +0000873 .vram_size = 0x00100000,
874 .nvram_size = 0x2000,
875 .esp_irq = 18,
876 .le_irq = 16,
877 .clock_irq = 7,
878 .clock1_irq = 19,
879 .ms_kb_irq = 14,
880 .ser_irq = 15,
881 .fd_irq = 22,
882 .me_irq = 30,
blueswir1905fdcb2008-09-18 18:33:18 +0000883 .nvram_machine_id = 0x80,
884 .machine_id = scls_id,
blueswir1a526a312008-03-05 18:27:45 +0000885 .iommu_version = 0x05000000,
886 .intbit_to_level = {
887 2, 3, 5, 7, 9, 11, 0, 14, 3, 5, 7, 9, 11, 13, 12, 12,
888 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0,
889 },
890 .max_mem = 0x10000000,
891 .default_cpu_model = "TI MicroSparc I",
892 },
893 /* SPARCbook */
894 {
895 .iommu_base = 0x10000000,
896 .tcx_base = 0x50000000, // XXX
blueswir1a526a312008-03-05 18:27:45 +0000897 .slavio_base = 0x70000000,
898 .ms_kb_base = 0x71000000,
899 .serial_base = 0x71100000,
900 .nvram_base = 0x71200000,
901 .fd_base = 0x71400000,
902 .counter_base = 0x71d00000,
903 .intctl_base = 0x71e00000,
904 .idreg_base = 0x78000000,
905 .dma_base = 0x78400000,
906 .esp_base = 0x78800000,
907 .le_base = 0x78c00000,
908 .apc_base = 0x6a000000,
909 .aux1_base = 0x71900000,
910 .aux2_base = 0x71910000,
blueswir1a526a312008-03-05 18:27:45 +0000911 .vram_size = 0x00100000,
912 .nvram_size = 0x2000,
913 .esp_irq = 18,
914 .le_irq = 16,
915 .clock_irq = 7,
916 .clock1_irq = 19,
917 .ms_kb_irq = 14,
918 .ser_irq = 15,
919 .fd_irq = 22,
920 .me_irq = 30,
blueswir1905fdcb2008-09-18 18:33:18 +0000921 .nvram_machine_id = 0x80,
922 .machine_id = sbook_id,
blueswir1a526a312008-03-05 18:27:45 +0000923 .iommu_version = 0x05000000,
924 .intbit_to_level = {
925 2, 3, 5, 7, 9, 11, 0, 14, 3, 5, 7, 9, 11, 13, 12, 12,
926 6, 0, 4, 10, 8, 0, 11, 0, 0, 0, 0, 0, 15, 0, 15, 0,
927 },
928 .max_mem = 0x10000000,
929 .default_cpu_model = "TI MicroSparc I",
930 },
blueswir136cd9212007-04-01 15:44:43 +0000931};
932
blueswir136cd9212007-04-01 15:44:43 +0000933/* SPARCstation 5 hardware initialisation */
aurel3200f82b82008-04-27 21:12:55 +0000934static void ss5_init(ram_addr_t RAM_size, int vga_ram_size,
aliguori3023f332009-01-16 19:04:14 +0000935 const char *boot_device,
blueswir1b881c2c2007-11-18 08:46:58 +0000936 const char *kernel_filename, const char *kernel_cmdline,
937 const char *initrd_filename, const char *cpu_model)
blueswir136cd9212007-04-01 15:44:43 +0000938{
aliguori3023f332009-01-16 19:04:14 +0000939 sun4m_hw_init(&sun4m_hwdefs[0], RAM_size, boot_device, kernel_filename,
blueswir13ebf5aa2007-11-28 20:54:33 +0000940 kernel_cmdline, initrd_filename, cpu_model);
blueswir136cd9212007-04-01 15:44:43 +0000941}
942
blueswir1e0353fe2007-04-01 15:55:28 +0000943/* SPARCstation 10 hardware initialisation */
aurel3200f82b82008-04-27 21:12:55 +0000944static void ss10_init(ram_addr_t RAM_size, int vga_ram_size,
aliguori3023f332009-01-16 19:04:14 +0000945 const char *boot_device,
blueswir1b881c2c2007-11-18 08:46:58 +0000946 const char *kernel_filename, const char *kernel_cmdline,
947 const char *initrd_filename, const char *cpu_model)
blueswir1e0353fe2007-04-01 15:55:28 +0000948{
aliguori3023f332009-01-16 19:04:14 +0000949 sun4m_hw_init(&sun4m_hwdefs[1], RAM_size, boot_device, kernel_filename,
blueswir13ebf5aa2007-11-28 20:54:33 +0000950 kernel_cmdline, initrd_filename, cpu_model);
blueswir1e0353fe2007-04-01 15:55:28 +0000951}
952
blueswir16a3b9cc2007-11-11 17:56:38 +0000953/* SPARCserver 600MP hardware initialisation */
aurel3200f82b82008-04-27 21:12:55 +0000954static void ss600mp_init(ram_addr_t RAM_size, int vga_ram_size,
aliguori3023f332009-01-16 19:04:14 +0000955 const char *boot_device,
blueswir177f193d2008-05-12 16:13:33 +0000956 const char *kernel_filename,
957 const char *kernel_cmdline,
blueswir16a3b9cc2007-11-11 17:56:38 +0000958 const char *initrd_filename, const char *cpu_model)
959{
aliguori3023f332009-01-16 19:04:14 +0000960 sun4m_hw_init(&sun4m_hwdefs[2], RAM_size, boot_device, kernel_filename,
blueswir13ebf5aa2007-11-28 20:54:33 +0000961 kernel_cmdline, initrd_filename, cpu_model);
blueswir16a3b9cc2007-11-11 17:56:38 +0000962}
963
blueswir1ae409722007-12-10 20:00:11 +0000964/* SPARCstation 20 hardware initialisation */
aurel3200f82b82008-04-27 21:12:55 +0000965static void ss20_init(ram_addr_t RAM_size, int vga_ram_size,
aliguori3023f332009-01-16 19:04:14 +0000966 const char *boot_device,
blueswir1ae409722007-12-10 20:00:11 +0000967 const char *kernel_filename, const char *kernel_cmdline,
968 const char *initrd_filename, const char *cpu_model)
969{
aliguori3023f332009-01-16 19:04:14 +0000970 sun4m_hw_init(&sun4m_hwdefs[3], RAM_size, boot_device, kernel_filename,
blueswir1ee76f822007-12-28 20:59:23 +0000971 kernel_cmdline, initrd_filename, cpu_model);
972}
973
blueswir1a526a312008-03-05 18:27:45 +0000974/* SPARCstation Voyager hardware initialisation */
blueswir16ef05b92008-05-01 18:21:46 +0000975static void vger_init(ram_addr_t RAM_size, int vga_ram_size,
aliguori3023f332009-01-16 19:04:14 +0000976 const char *boot_device,
blueswir1a526a312008-03-05 18:27:45 +0000977 const char *kernel_filename, const char *kernel_cmdline,
978 const char *initrd_filename, const char *cpu_model)
979{
aliguori3023f332009-01-16 19:04:14 +0000980 sun4m_hw_init(&sun4m_hwdefs[4], RAM_size, boot_device, kernel_filename,
blueswir1a526a312008-03-05 18:27:45 +0000981 kernel_cmdline, initrd_filename, cpu_model);
982}
983
984/* SPARCstation LX hardware initialisation */
blueswir16ef05b92008-05-01 18:21:46 +0000985static void ss_lx_init(ram_addr_t RAM_size, int vga_ram_size,
aliguori3023f332009-01-16 19:04:14 +0000986 const char *boot_device,
blueswir1a526a312008-03-05 18:27:45 +0000987 const char *kernel_filename, const char *kernel_cmdline,
988 const char *initrd_filename, const char *cpu_model)
989{
aliguori3023f332009-01-16 19:04:14 +0000990 sun4m_hw_init(&sun4m_hwdefs[5], RAM_size, boot_device, kernel_filename,
blueswir1a526a312008-03-05 18:27:45 +0000991 kernel_cmdline, initrd_filename, cpu_model);
992}
993
994/* SPARCstation 4 hardware initialisation */
blueswir16ef05b92008-05-01 18:21:46 +0000995static void ss4_init(ram_addr_t RAM_size, int vga_ram_size,
aliguori3023f332009-01-16 19:04:14 +0000996 const char *boot_device,
blueswir1a526a312008-03-05 18:27:45 +0000997 const char *kernel_filename, const char *kernel_cmdline,
998 const char *initrd_filename, const char *cpu_model)
999{
aliguori3023f332009-01-16 19:04:14 +00001000 sun4m_hw_init(&sun4m_hwdefs[6], RAM_size, boot_device, kernel_filename,
blueswir1a526a312008-03-05 18:27:45 +00001001 kernel_cmdline, initrd_filename, cpu_model);
1002}
1003
1004/* SPARCClassic hardware initialisation */
blueswir16ef05b92008-05-01 18:21:46 +00001005static void scls_init(ram_addr_t RAM_size, int vga_ram_size,
aliguori3023f332009-01-16 19:04:14 +00001006 const char *boot_device,
blueswir1a526a312008-03-05 18:27:45 +00001007 const char *kernel_filename, const char *kernel_cmdline,
1008 const char *initrd_filename, const char *cpu_model)
1009{
aliguori3023f332009-01-16 19:04:14 +00001010 sun4m_hw_init(&sun4m_hwdefs[7], RAM_size, boot_device, kernel_filename,
blueswir1a526a312008-03-05 18:27:45 +00001011 kernel_cmdline, initrd_filename, cpu_model);
1012}
1013
1014/* SPARCbook hardware initialisation */
blueswir16ef05b92008-05-01 18:21:46 +00001015static void sbook_init(ram_addr_t RAM_size, int vga_ram_size,
aliguori3023f332009-01-16 19:04:14 +00001016 const char *boot_device,
blueswir1a526a312008-03-05 18:27:45 +00001017 const char *kernel_filename, const char *kernel_cmdline,
1018 const char *initrd_filename, const char *cpu_model)
1019{
aliguori3023f332009-01-16 19:04:14 +00001020 sun4m_hw_init(&sun4m_hwdefs[8], RAM_size, boot_device, kernel_filename,
blueswir1a526a312008-03-05 18:27:45 +00001021 kernel_cmdline, initrd_filename, cpu_model);
1022}
1023
blueswir136cd9212007-04-01 15:44:43 +00001024QEMUMachine ss5_machine = {
blueswir166de7332008-08-12 15:51:09 +00001025 .name = "SS-5",
1026 .desc = "Sun4m platform, SPARCstation 5",
1027 .init = ss5_init,
blueswir1c9b1ae22008-09-28 18:55:17 +00001028 .use_scsi = 1,
bellardc0e564d2005-06-05 15:17:28 +00001029};
blueswir1e0353fe2007-04-01 15:55:28 +00001030
1031QEMUMachine ss10_machine = {
blueswir166de7332008-08-12 15:51:09 +00001032 .name = "SS-10",
1033 .desc = "Sun4m platform, SPARCstation 10",
1034 .init = ss10_init,
blueswir1c9b1ae22008-09-28 18:55:17 +00001035 .use_scsi = 1,
blueswir11bcee012008-11-02 16:51:02 +00001036 .max_cpus = 4,
blueswir1e0353fe2007-04-01 15:55:28 +00001037};
blueswir16a3b9cc2007-11-11 17:56:38 +00001038
1039QEMUMachine ss600mp_machine = {
blueswir166de7332008-08-12 15:51:09 +00001040 .name = "SS-600MP",
1041 .desc = "Sun4m platform, SPARCserver 600MP",
1042 .init = ss600mp_init,
blueswir1c9b1ae22008-09-28 18:55:17 +00001043 .use_scsi = 1,
blueswir11bcee012008-11-02 16:51:02 +00001044 .max_cpus = 4,
blueswir16a3b9cc2007-11-11 17:56:38 +00001045};
blueswir1ae409722007-12-10 20:00:11 +00001046
1047QEMUMachine ss20_machine = {
blueswir166de7332008-08-12 15:51:09 +00001048 .name = "SS-20",
1049 .desc = "Sun4m platform, SPARCstation 20",
1050 .init = ss20_init,
blueswir1c9b1ae22008-09-28 18:55:17 +00001051 .use_scsi = 1,
blueswir11bcee012008-11-02 16:51:02 +00001052 .max_cpus = 4,
blueswir1ae409722007-12-10 20:00:11 +00001053};
1054
blueswir1a526a312008-03-05 18:27:45 +00001055QEMUMachine voyager_machine = {
blueswir166de7332008-08-12 15:51:09 +00001056 .name = "Voyager",
1057 .desc = "Sun4m platform, SPARCstation Voyager",
1058 .init = vger_init,
blueswir1c9b1ae22008-09-28 18:55:17 +00001059 .use_scsi = 1,
blueswir1a526a312008-03-05 18:27:45 +00001060};
1061
1062QEMUMachine ss_lx_machine = {
blueswir166de7332008-08-12 15:51:09 +00001063 .name = "LX",
1064 .desc = "Sun4m platform, SPARCstation LX",
1065 .init = ss_lx_init,
blueswir1c9b1ae22008-09-28 18:55:17 +00001066 .use_scsi = 1,
blueswir1a526a312008-03-05 18:27:45 +00001067};
1068
1069QEMUMachine ss4_machine = {
blueswir166de7332008-08-12 15:51:09 +00001070 .name = "SS-4",
1071 .desc = "Sun4m platform, SPARCstation 4",
1072 .init = ss4_init,
blueswir1c9b1ae22008-09-28 18:55:17 +00001073 .use_scsi = 1,
blueswir1a526a312008-03-05 18:27:45 +00001074};
1075
1076QEMUMachine scls_machine = {
blueswir166de7332008-08-12 15:51:09 +00001077 .name = "SPARCClassic",
1078 .desc = "Sun4m platform, SPARCClassic",
1079 .init = scls_init,
blueswir1c9b1ae22008-09-28 18:55:17 +00001080 .use_scsi = 1,
blueswir1a526a312008-03-05 18:27:45 +00001081};
1082
1083QEMUMachine sbook_machine = {
blueswir166de7332008-08-12 15:51:09 +00001084 .name = "SPARCbook",
1085 .desc = "Sun4m platform, SPARCbook",
1086 .init = sbook_init,
blueswir1c9b1ae22008-09-28 18:55:17 +00001087 .use_scsi = 1,
blueswir1a526a312008-03-05 18:27:45 +00001088};
1089
blueswir17d858922007-12-28 20:57:43 +00001090static const struct sun4d_hwdef sun4d_hwdefs[] = {
1091 /* SS-1000 */
1092 {
1093 .iounit_bases = {
1094 0xfe0200000ULL,
1095 0xfe1200000ULL,
1096 0xfe2200000ULL,
1097 0xfe3200000ULL,
1098 -1,
1099 },
1100 .tcx_base = 0x820000000ULL,
1101 .slavio_base = 0xf00000000ULL,
1102 .ms_kb_base = 0xf00240000ULL,
1103 .serial_base = 0xf00200000ULL,
1104 .nvram_base = 0xf00280000ULL,
1105 .counter_base = 0xf00300000ULL,
1106 .espdma_base = 0x800081000ULL,
1107 .esp_base = 0x800080000ULL,
1108 .ledma_base = 0x800040000ULL,
1109 .le_base = 0x800060000ULL,
1110 .sbi_base = 0xf02800000ULL,
blueswir1c1d00dc2008-04-27 16:43:11 +00001111 .vram_size = 0x00100000,
blueswir17d858922007-12-28 20:57:43 +00001112 .nvram_size = 0x2000,
1113 .esp_irq = 3,
1114 .le_irq = 4,
1115 .clock_irq = 14,
1116 .clock1_irq = 10,
1117 .ms_kb_irq = 12,
1118 .ser_irq = 12,
blueswir1905fdcb2008-09-18 18:33:18 +00001119 .nvram_machine_id = 0x80,
1120 .machine_id = ss1000_id,
blueswir17d858922007-12-28 20:57:43 +00001121 .iounit_version = 0x03000000,
blueswir16ef05b92008-05-01 18:21:46 +00001122 .max_mem = 0xf00000000ULL,
blueswir17d858922007-12-28 20:57:43 +00001123 .default_cpu_model = "TI SuperSparc II",
1124 },
1125 /* SS-2000 */
1126 {
1127 .iounit_bases = {
1128 0xfe0200000ULL,
1129 0xfe1200000ULL,
1130 0xfe2200000ULL,
1131 0xfe3200000ULL,
1132 0xfe4200000ULL,
1133 },
1134 .tcx_base = 0x820000000ULL,
1135 .slavio_base = 0xf00000000ULL,
1136 .ms_kb_base = 0xf00240000ULL,
1137 .serial_base = 0xf00200000ULL,
1138 .nvram_base = 0xf00280000ULL,
1139 .counter_base = 0xf00300000ULL,
1140 .espdma_base = 0x800081000ULL,
1141 .esp_base = 0x800080000ULL,
1142 .ledma_base = 0x800040000ULL,
1143 .le_base = 0x800060000ULL,
1144 .sbi_base = 0xf02800000ULL,
blueswir1c1d00dc2008-04-27 16:43:11 +00001145 .vram_size = 0x00100000,
blueswir17d858922007-12-28 20:57:43 +00001146 .nvram_size = 0x2000,
1147 .esp_irq = 3,
1148 .le_irq = 4,
1149 .clock_irq = 14,
1150 .clock1_irq = 10,
1151 .ms_kb_irq = 12,
1152 .ser_irq = 12,
blueswir1905fdcb2008-09-18 18:33:18 +00001153 .nvram_machine_id = 0x80,
1154 .machine_id = ss2000_id,
blueswir17d858922007-12-28 20:57:43 +00001155 .iounit_version = 0x03000000,
blueswir16ef05b92008-05-01 18:21:46 +00001156 .max_mem = 0xf00000000ULL,
blueswir17d858922007-12-28 20:57:43 +00001157 .default_cpu_model = "TI SuperSparc II",
1158 },
1159};
1160
blueswir16ef05b92008-05-01 18:21:46 +00001161static void sun4d_hw_init(const struct sun4d_hwdef *hwdef, ram_addr_t RAM_size,
blueswir17d858922007-12-28 20:57:43 +00001162 const char *boot_device,
aliguori3023f332009-01-16 19:04:14 +00001163 const char *kernel_filename,
blueswir17d858922007-12-28 20:57:43 +00001164 const char *kernel_cmdline,
1165 const char *initrd_filename, const char *cpu_model)
1166{
1167 CPUState *env, *envs[MAX_CPUS];
1168 unsigned int i;
1169 void *iounits[MAX_IOUNITS], *espdma, *ledma, *main_esp, *nvram, *sbi;
1170 qemu_irq *cpu_irqs[MAX_CPUS], *sbi_irq, *sbi_cpu_irq,
1171 *espdma_irq, *ledma_irq;
1172 qemu_irq *esp_reset, *le_reset;
pbrookdc828ca2009-04-09 22:21:07 +00001173 ram_addr_t ram_offset, prom_offset;
blueswir15c6602c2008-11-05 19:25:39 +00001174 unsigned long kernel_size;
blueswir17d858922007-12-28 20:57:43 +00001175 int ret;
1176 char buf[1024];
blueswir122548762008-05-10 10:12:00 +00001177 int drive_index;
blueswir13cce6242008-09-18 18:27:29 +00001178 void *fw_cfg;
blueswir17d858922007-12-28 20:57:43 +00001179
1180 /* init CPUs */
1181 if (!cpu_model)
1182 cpu_model = hwdef->default_cpu_model;
1183
1184 for (i = 0; i < smp_cpus; i++) {
1185 env = cpu_init(cpu_model);
1186 if (!env) {
blueswir18e82c6a2008-01-06 07:50:38 +00001187 fprintf(stderr, "qemu: Unable to find Sparc CPU definition\n");
blueswir17d858922007-12-28 20:57:43 +00001188 exit(1);
1189 }
1190 cpu_sparc_set_id(env, i);
1191 envs[i] = env;
1192 if (i == 0) {
1193 qemu_register_reset(main_cpu_reset, env);
1194 } else {
1195 qemu_register_reset(secondary_cpu_reset, env);
1196 env->halted = 1;
1197 }
blueswir17d858922007-12-28 20:57:43 +00001198 cpu_irqs[i] = qemu_allocate_irqs(cpu_set_irq, envs[i], MAX_PILS);
1199 env->prom_addr = hwdef->slavio_base;
1200 }
1201
1202 for (i = smp_cpus; i < MAX_CPUS; i++)
1203 cpu_irqs[i] = qemu_allocate_irqs(dummy_cpu_set_irq, NULL, MAX_PILS);
1204
1205 /* allocate RAM */
1206 if ((uint64_t)RAM_size > hwdef->max_mem) {
blueswir177f193d2008-05-12 16:13:33 +00001207 fprintf(stderr,
1208 "qemu: Too much memory for this machine: %d, maximum %d\n",
blueswir16ef05b92008-05-01 18:21:46 +00001209 (unsigned int)(RAM_size / (1024 * 1024)),
blueswir17d858922007-12-28 20:57:43 +00001210 (unsigned int)(hwdef->max_mem / (1024 * 1024)));
1211 exit(1);
1212 }
blueswir15c6602c2008-11-05 19:25:39 +00001213 ram_offset = qemu_ram_alloc(RAM_size);
1214 cpu_register_physical_memory(0, RAM_size, ram_offset);
blueswir17d858922007-12-28 20:57:43 +00001215
1216 /* load boot prom */
blueswir15c6602c2008-11-05 19:25:39 +00001217 prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
blueswir17d858922007-12-28 20:57:43 +00001218 cpu_register_physical_memory(hwdef->slavio_base,
1219 (PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) &
1220 TARGET_PAGE_MASK,
1221 prom_offset | IO_MEM_ROM);
1222
1223 if (bios_name == NULL)
1224 bios_name = PROM_FILENAME;
1225 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
1226 ret = load_elf(buf, hwdef->slavio_base - PROM_VADDR, NULL, NULL, NULL);
1227 if (ret < 0 || ret > PROM_SIZE_MAX)
blueswir1e01f4a12008-05-13 15:44:10 +00001228 ret = load_image_targphys(buf, hwdef->slavio_base, PROM_SIZE_MAX);
blueswir17d858922007-12-28 20:57:43 +00001229 if (ret < 0 || ret > PROM_SIZE_MAX) {
1230 fprintf(stderr, "qemu: could not load prom '%s'\n",
1231 buf);
1232 exit(1);
1233 }
1234
1235 /* set up devices */
1236 sbi = sbi_init(hwdef->sbi_base, &sbi_irq, &sbi_cpu_irq, cpu_irqs);
1237
1238 for (i = 0; i < MAX_IOUNITS; i++)
1239 if (hwdef->iounit_bases[i] != (target_phys_addr_t)-1)
blueswir1ff403da2008-01-01 17:04:45 +00001240 iounits[i] = iommu_init(hwdef->iounit_bases[i],
1241 hwdef->iounit_version,
1242 sbi_irq[hwdef->me_irq]);
blueswir17d858922007-12-28 20:57:43 +00001243
1244 espdma = sparc32_dma_init(hwdef->espdma_base, sbi_irq[hwdef->esp_irq],
1245 iounits[0], &espdma_irq, &esp_reset);
1246
1247 ledma = sparc32_dma_init(hwdef->ledma_base, sbi_irq[hwdef->le_irq],
1248 iounits[0], &ledma_irq, &le_reset);
1249
1250 if (graphic_depth != 8 && graphic_depth != 24) {
1251 fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
1252 exit (1);
1253 }
pbrookdc828ca2009-04-09 22:21:07 +00001254 tcx_init(hwdef->tcx_base, hwdef->vram_size, graphic_width, graphic_height,
1255 graphic_depth);
blueswir17d858922007-12-28 20:57:43 +00001256
aliguori0ae18ce2009-01-13 19:39:36 +00001257 lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
blueswir17d858922007-12-28 20:57:43 +00001258
1259 nvram = m48t59_init(sbi_irq[0], hwdef->nvram_base, 0,
1260 hwdef->nvram_size, 8);
1261
1262 slavio_timer_init_all(hwdef->counter_base, sbi_irq[hwdef->clock1_irq],
1263 sbi_cpu_irq, smp_cpus);
1264
1265 slavio_serial_ms_kbd_init(hwdef->ms_kb_base, sbi_irq[hwdef->ms_kb_irq],
blueswir1b4ed08e2009-01-12 17:38:28 +00001266 nographic, ESCC_CLOCK, 1);
blueswir17d858922007-12-28 20:57:43 +00001267 // Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device
1268 // Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device
aurel32aeeb69c2009-01-14 14:47:56 +00001269 escc_init(hwdef->serial_base, sbi_irq[hwdef->ser_irq], sbi_irq[hwdef->ser_irq],
1270 serial_hds[0], serial_hds[1], ESCC_CLOCK, 1);
blueswir17d858922007-12-28 20:57:43 +00001271
1272 if (drive_get_max_bus(IF_SCSI) > 0) {
1273 fprintf(stderr, "qemu: too many SCSI bus\n");
1274 exit(1);
1275 }
1276
blueswir15d20fa62008-04-09 16:32:48 +00001277 main_esp = esp_init(hwdef->esp_base, 2,
blueswir18b17de82008-03-02 08:48:47 +00001278 espdma_memory_read, espdma_memory_write,
1279 espdma, *espdma_irq, esp_reset);
blueswir17d858922007-12-28 20:57:43 +00001280
1281 for (i = 0; i < ESP_MAX_DEVS; i++) {
blueswir122548762008-05-10 10:12:00 +00001282 drive_index = drive_get_index(IF_SCSI, 0, i);
1283 if (drive_index == -1)
blueswir17d858922007-12-28 20:57:43 +00001284 continue;
blueswir122548762008-05-10 10:12:00 +00001285 esp_scsi_attach(main_esp, drives_table[drive_index].bdrv, i);
blueswir17d858922007-12-28 20:57:43 +00001286 }
1287
blueswir1293f78b2008-05-12 17:22:13 +00001288 kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename,
1289 RAM_size);
blueswir17d858922007-12-28 20:57:43 +00001290
1291 nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
1292 boot_device, RAM_size, kernel_size, graphic_width,
blueswir1905fdcb2008-09-18 18:33:18 +00001293 graphic_height, graphic_depth, hwdef->nvram_machine_id,
1294 "Sun4d");
blueswir13cce6242008-09-18 18:27:29 +00001295
1296 fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
1297 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
blueswir1905fdcb2008-09-18 18:33:18 +00001298 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
1299 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
blueswir1513f7892009-03-08 09:51:29 +00001300 fw_cfg_add_i16(fw_cfg, FW_CFG_SUN4M_DEPTH, graphic_depth);
1301 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, KERNEL_LOAD_ADDR);
1302 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
1303 if (kernel_cmdline) {
1304 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
1305 pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
1306 } else {
1307 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
1308 }
1309 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, INITRD_LOAD_ADDR);
1310 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, 0); // not used
1311 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, boot_device[0]);
1312 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
blueswir17d858922007-12-28 20:57:43 +00001313}
1314
1315/* SPARCserver 1000 hardware initialisation */
aurel3200f82b82008-04-27 21:12:55 +00001316static void ss1000_init(ram_addr_t RAM_size, int vga_ram_size,
aliguori3023f332009-01-16 19:04:14 +00001317 const char *boot_device,
blueswir17d858922007-12-28 20:57:43 +00001318 const char *kernel_filename, const char *kernel_cmdline,
1319 const char *initrd_filename, const char *cpu_model)
1320{
aliguori3023f332009-01-16 19:04:14 +00001321 sun4d_hw_init(&sun4d_hwdefs[0], RAM_size, boot_device, kernel_filename,
blueswir17d858922007-12-28 20:57:43 +00001322 kernel_cmdline, initrd_filename, cpu_model);
1323}
1324
1325/* SPARCcenter 2000 hardware initialisation */
aurel3200f82b82008-04-27 21:12:55 +00001326static void ss2000_init(ram_addr_t RAM_size, int vga_ram_size,
aliguori3023f332009-01-16 19:04:14 +00001327 const char *boot_device,
blueswir17d858922007-12-28 20:57:43 +00001328 const char *kernel_filename, const char *kernel_cmdline,
1329 const char *initrd_filename, const char *cpu_model)
1330{
aliguori3023f332009-01-16 19:04:14 +00001331 sun4d_hw_init(&sun4d_hwdefs[1], RAM_size, boot_device, kernel_filename,
blueswir17d858922007-12-28 20:57:43 +00001332 kernel_cmdline, initrd_filename, cpu_model);
1333}
1334
1335QEMUMachine ss1000_machine = {
blueswir166de7332008-08-12 15:51:09 +00001336 .name = "SS-1000",
1337 .desc = "Sun4d platform, SPARCserver 1000",
1338 .init = ss1000_init,
blueswir1c9b1ae22008-09-28 18:55:17 +00001339 .use_scsi = 1,
blueswir11bcee012008-11-02 16:51:02 +00001340 .max_cpus = 8,
blueswir17d858922007-12-28 20:57:43 +00001341};
1342
1343QEMUMachine ss2000_machine = {
blueswir166de7332008-08-12 15:51:09 +00001344 .name = "SS-2000",
1345 .desc = "Sun4d platform, SPARCcenter 2000",
1346 .init = ss2000_init,
blueswir1c9b1ae22008-09-28 18:55:17 +00001347 .use_scsi = 1,
blueswir11bcee012008-11-02 16:51:02 +00001348 .max_cpus = 20,
blueswir17d858922007-12-28 20:57:43 +00001349};
blueswir18137cde2008-10-27 15:56:56 +00001350
1351static const struct sun4c_hwdef sun4c_hwdefs[] = {
1352 /* SS-2 */
1353 {
1354 .iommu_base = 0xf8000000,
1355 .tcx_base = 0xfe000000,
blueswir18137cde2008-10-27 15:56:56 +00001356 .slavio_base = 0xf6000000,
1357 .intctl_base = 0xf5000000,
1358 .counter_base = 0xf3000000,
1359 .ms_kb_base = 0xf0000000,
1360 .serial_base = 0xf1000000,
1361 .nvram_base = 0xf2000000,
1362 .fd_base = 0xf7200000,
1363 .dma_base = 0xf8400000,
1364 .esp_base = 0xf8800000,
1365 .le_base = 0xf8c00000,
blueswir18137cde2008-10-27 15:56:56 +00001366 .aux1_base = 0xf7400003,
blueswir18137cde2008-10-27 15:56:56 +00001367 .vram_size = 0x00100000,
1368 .nvram_size = 0x800,
1369 .esp_irq = 2,
1370 .le_irq = 3,
1371 .clock_irq = 5,
1372 .clock1_irq = 7,
1373 .ms_kb_irq = 1,
1374 .ser_irq = 1,
1375 .fd_irq = 1,
1376 .me_irq = 1,
blueswir18137cde2008-10-27 15:56:56 +00001377 .nvram_machine_id = 0x55,
1378 .machine_id = ss2_id,
1379 .max_mem = 0x10000000,
1380 .default_cpu_model = "Cypress CY7C601",
1381 },
1382};
1383
1384static void sun4c_hw_init(const struct sun4c_hwdef *hwdef, ram_addr_t RAM_size,
1385 const char *boot_device,
aliguori3023f332009-01-16 19:04:14 +00001386 const char *kernel_filename,
blueswir18137cde2008-10-27 15:56:56 +00001387 const char *kernel_cmdline,
1388 const char *initrd_filename, const char *cpu_model)
1389{
1390 CPUState *env;
1391 unsigned int i;
1392 void *iommu, *espdma, *ledma, *main_esp, *nvram;
1393 qemu_irq *cpu_irqs, *slavio_irq, *espdma_irq, *ledma_irq;
1394 qemu_irq *esp_reset, *le_reset;
1395 qemu_irq *fdc_tc;
pbrookdc828ca2009-04-09 22:21:07 +00001396 ram_addr_t ram_offset, prom_offset;
blueswir15c6602c2008-11-05 19:25:39 +00001397 unsigned long kernel_size;
blueswir18137cde2008-10-27 15:56:56 +00001398 int ret;
1399 char buf[1024];
1400 BlockDriverState *fd[MAX_FD];
1401 int drive_index;
1402 void *fw_cfg;
1403
1404 /* init CPU */
1405 if (!cpu_model)
1406 cpu_model = hwdef->default_cpu_model;
1407
1408 env = cpu_init(cpu_model);
1409 if (!env) {
1410 fprintf(stderr, "qemu: Unable to find Sparc CPU definition\n");
1411 exit(1);
1412 }
1413
1414 cpu_sparc_set_id(env, 0);
1415
1416 qemu_register_reset(main_cpu_reset, env);
1417 cpu_irqs = qemu_allocate_irqs(cpu_set_irq, env, MAX_PILS);
1418 env->prom_addr = hwdef->slavio_base;
1419
1420 /* allocate RAM */
1421 if ((uint64_t)RAM_size > hwdef->max_mem) {
1422 fprintf(stderr,
1423 "qemu: Too much memory for this machine: %d, maximum %d\n",
1424 (unsigned int)(RAM_size / (1024 * 1024)),
1425 (unsigned int)(hwdef->max_mem / (1024 * 1024)));
1426 exit(1);
1427 }
blueswir15c6602c2008-11-05 19:25:39 +00001428 ram_offset = qemu_ram_alloc(RAM_size);
1429 cpu_register_physical_memory(0, RAM_size, ram_offset);
blueswir18137cde2008-10-27 15:56:56 +00001430
1431 /* load boot prom */
blueswir15c6602c2008-11-05 19:25:39 +00001432 prom_offset = qemu_ram_alloc(PROM_SIZE_MAX);
blueswir18137cde2008-10-27 15:56:56 +00001433 cpu_register_physical_memory(hwdef->slavio_base,
1434 (PROM_SIZE_MAX + TARGET_PAGE_SIZE - 1) &
1435 TARGET_PAGE_MASK,
1436 prom_offset | IO_MEM_ROM);
1437
1438 if (bios_name == NULL)
1439 bios_name = PROM_FILENAME;
1440 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
1441 ret = load_elf(buf, hwdef->slavio_base - PROM_VADDR, NULL, NULL, NULL);
1442 if (ret < 0 || ret > PROM_SIZE_MAX)
1443 ret = load_image_targphys(buf, hwdef->slavio_base, PROM_SIZE_MAX);
1444 if (ret < 0 || ret > PROM_SIZE_MAX) {
1445 fprintf(stderr, "qemu: could not load prom '%s'\n",
1446 buf);
1447 exit(1);
1448 }
blueswir18137cde2008-10-27 15:56:56 +00001449
1450 /* set up devices */
1451 slavio_intctl = sun4c_intctl_init(hwdef->intctl_base,
1452 &slavio_irq, cpu_irqs);
1453
1454 iommu = iommu_init(hwdef->iommu_base, hwdef->iommu_version,
1455 slavio_irq[hwdef->me_irq]);
1456
1457 espdma = sparc32_dma_init(hwdef->dma_base, slavio_irq[hwdef->esp_irq],
1458 iommu, &espdma_irq, &esp_reset);
1459
1460 ledma = sparc32_dma_init(hwdef->dma_base + 16ULL,
1461 slavio_irq[hwdef->le_irq], iommu, &ledma_irq,
1462 &le_reset);
1463
1464 if (graphic_depth != 8 && graphic_depth != 24) {
1465 fprintf(stderr, "qemu: Unsupported depth: %d\n", graphic_depth);
1466 exit (1);
1467 }
pbrookdc828ca2009-04-09 22:21:07 +00001468 tcx_init(hwdef->tcx_base, hwdef->vram_size, graphic_width, graphic_height,
1469 graphic_depth);
blueswir18137cde2008-10-27 15:56:56 +00001470
aliguori0ae18ce2009-01-13 19:39:36 +00001471 lance_init(&nd_table[0], hwdef->le_base, ledma, *ledma_irq, le_reset);
blueswir18137cde2008-10-27 15:56:56 +00001472
1473 nvram = m48t59_init(slavio_irq[0], hwdef->nvram_base, 0,
1474 hwdef->nvram_size, 2);
1475
1476 slavio_serial_ms_kbd_init(hwdef->ms_kb_base, slavio_irq[hwdef->ms_kb_irq],
blueswir1b4ed08e2009-01-12 17:38:28 +00001477 nographic, ESCC_CLOCK, 1);
blueswir18137cde2008-10-27 15:56:56 +00001478 // Slavio TTYA (base+4, Linux ttyS0) is the first Qemu serial device
1479 // Slavio TTYB (base+0, Linux ttyS1) is the second Qemu serial device
aurel32aeeb69c2009-01-14 14:47:56 +00001480 escc_init(hwdef->serial_base, slavio_irq[hwdef->ser_irq],
1481 slavio_irq[hwdef->ser_irq], serial_hds[0], serial_hds[1],
1482 ESCC_CLOCK, 1);
blueswir18137cde2008-10-27 15:56:56 +00001483
blueswir1fe096122008-12-24 20:21:18 +00001484 slavio_misc = slavio_misc_init(0, 0, hwdef->aux1_base, 0,
blueswir16d0c2932008-11-02 10:51:05 +00001485 slavio_irq[hwdef->me_irq], NULL, &fdc_tc);
blueswir18137cde2008-10-27 15:56:56 +00001486
1487 if (hwdef->fd_base != (target_phys_addr_t)-1) {
1488 /* there is zero or one floppy drive */
blueswir1ce802582008-11-29 16:42:40 +00001489 memset(fd, 0, sizeof(fd));
blueswir18137cde2008-10-27 15:56:56 +00001490 drive_index = drive_get_index(IF_FLOPPY, 0, 0);
1491 if (drive_index != -1)
1492 fd[0] = drives_table[drive_index].bdrv;
1493
1494 sun4m_fdctrl_init(slavio_irq[hwdef->fd_irq], hwdef->fd_base, fd,
1495 fdc_tc);
1496 }
1497
1498 if (drive_get_max_bus(IF_SCSI) > 0) {
1499 fprintf(stderr, "qemu: too many SCSI bus\n");
1500 exit(1);
1501 }
1502
1503 main_esp = esp_init(hwdef->esp_base, 2,
1504 espdma_memory_read, espdma_memory_write,
1505 espdma, *espdma_irq, esp_reset);
1506
1507 for (i = 0; i < ESP_MAX_DEVS; i++) {
1508 drive_index = drive_get_index(IF_SCSI, 0, i);
1509 if (drive_index == -1)
1510 continue;
1511 esp_scsi_attach(main_esp, drives_table[drive_index].bdrv, i);
1512 }
1513
1514 kernel_size = sun4m_load_kernel(kernel_filename, initrd_filename,
1515 RAM_size);
1516
1517 nvram_init(nvram, (uint8_t *)&nd_table[0].macaddr, kernel_cmdline,
1518 boot_device, RAM_size, kernel_size, graphic_width,
1519 graphic_height, graphic_depth, hwdef->nvram_machine_id,
1520 "Sun4c");
1521
1522 fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2);
1523 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
1524 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
1525 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, hwdef->machine_id);
blueswir1513f7892009-03-08 09:51:29 +00001526 fw_cfg_add_i16(fw_cfg, FW_CFG_SUN4M_DEPTH, graphic_depth);
1527 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, KERNEL_LOAD_ADDR);
1528 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
1529 if (kernel_cmdline) {
1530 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR);
1531 pstrcpy_targphys(CMDLINE_ADDR, TARGET_PAGE_SIZE, kernel_cmdline);
1532 } else {
1533 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
1534 }
1535 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, INITRD_LOAD_ADDR);
1536 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, 0); // not used
1537 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, boot_device[0]);
1538 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
blueswir18137cde2008-10-27 15:56:56 +00001539}
1540
1541/* SPARCstation 2 hardware initialisation */
1542static void ss2_init(ram_addr_t RAM_size, int vga_ram_size,
aliguori3023f332009-01-16 19:04:14 +00001543 const char *boot_device,
blueswir18137cde2008-10-27 15:56:56 +00001544 const char *kernel_filename, const char *kernel_cmdline,
1545 const char *initrd_filename, const char *cpu_model)
1546{
aliguori3023f332009-01-16 19:04:14 +00001547 sun4c_hw_init(&sun4c_hwdefs[0], RAM_size, boot_device, kernel_filename,
blueswir18137cde2008-10-27 15:56:56 +00001548 kernel_cmdline, initrd_filename, cpu_model);
1549}
1550
1551QEMUMachine ss2_machine = {
1552 .name = "SS-2",
1553 .desc = "Sun4c platform, SPARCstation 2",
1554 .init = ss2_init,
blueswir18137cde2008-10-27 15:56:56 +00001555 .use_scsi = 1,
blueswir18137cde2008-10-27 15:56:56 +00001556};