bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Tiny Code Generator for QEMU |
| 3 | * |
| 4 | * Copyright (c) 2008 Fabrice Bellard |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to deal |
| 8 | * in the Software without restriction, including without limitation the rights |
| 9 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 10 | * copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in |
| 14 | * all copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 22 | * THE SOFTWARE. |
| 23 | */ |
| 24 | #include "tcg.h" |
| 25 | |
blueswir1 | bf6247f | 2008-05-10 12:27:33 +0000 | [diff] [blame] | 26 | #ifdef CONFIG_DYNGEN_OP |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 27 | /* legacy dyngen operations */ |
| 28 | #include "gen-op.h" |
blueswir1 | cf2be98 | 2008-03-21 18:03:09 +0000 | [diff] [blame] | 29 | #endif |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 30 | |
| 31 | int gen_new_label(void); |
| 32 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 33 | static inline void tcg_gen_op1(int opc, TCGv arg1) |
| 34 | { |
| 35 | *gen_opc_ptr++ = opc; |
| 36 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 37 | } |
| 38 | |
| 39 | static inline void tcg_gen_op1i(int opc, TCGArg arg1) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 40 | { |
| 41 | *gen_opc_ptr++ = opc; |
| 42 | *gen_opparam_ptr++ = arg1; |
| 43 | } |
| 44 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 45 | static inline void tcg_gen_op2(int opc, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 46 | { |
| 47 | *gen_opc_ptr++ = opc; |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 48 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 49 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 50 | } |
| 51 | |
| 52 | static inline void tcg_gen_op2i(int opc, TCGv arg1, TCGArg arg2) |
| 53 | { |
| 54 | *gen_opc_ptr++ = opc; |
| 55 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 56 | *gen_opparam_ptr++ = arg2; |
| 57 | } |
| 58 | |
pbrook | bcb0126 | 2008-05-24 02:24:25 +0000 | [diff] [blame] | 59 | static inline void tcg_gen_op2ii(int opc, TCGArg arg1, TCGArg arg2) |
| 60 | { |
| 61 | *gen_opc_ptr++ = opc; |
| 62 | *gen_opparam_ptr++ = arg1; |
| 63 | *gen_opparam_ptr++ = arg2; |
| 64 | } |
| 65 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 66 | static inline void tcg_gen_op3(int opc, TCGv arg1, TCGv arg2, TCGv arg3) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 67 | { |
| 68 | *gen_opc_ptr++ = opc; |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 69 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 70 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 71 | *gen_opparam_ptr++ = GET_TCGV(arg3); |
| 72 | } |
| 73 | |
| 74 | static inline void tcg_gen_op3i(int opc, TCGv arg1, TCGv arg2, TCGArg arg3) |
| 75 | { |
| 76 | *gen_opc_ptr++ = opc; |
| 77 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 78 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 79 | *gen_opparam_ptr++ = arg3; |
| 80 | } |
| 81 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 82 | static inline void tcg_gen_op4(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
| 83 | TCGv arg4) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 84 | { |
| 85 | *gen_opc_ptr++ = opc; |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 86 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 87 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 88 | *gen_opparam_ptr++ = GET_TCGV(arg3); |
| 89 | *gen_opparam_ptr++ = GET_TCGV(arg4); |
| 90 | } |
| 91 | |
| 92 | static inline void tcg_gen_op4i(int opc, TCGv arg1, TCGv arg2, TCGv arg3, |
| 93 | TCGArg arg4) |
| 94 | { |
| 95 | *gen_opc_ptr++ = opc; |
| 96 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 97 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 98 | *gen_opparam_ptr++ = GET_TCGV(arg3); |
| 99 | *gen_opparam_ptr++ = arg4; |
| 100 | } |
| 101 | |
| 102 | static inline void tcg_gen_op4ii(int opc, TCGv arg1, TCGv arg2, TCGArg arg3, |
| 103 | TCGArg arg4) |
| 104 | { |
| 105 | *gen_opc_ptr++ = opc; |
| 106 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 107 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 108 | *gen_opparam_ptr++ = arg3; |
| 109 | *gen_opparam_ptr++ = arg4; |
| 110 | } |
| 111 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 112 | static inline void tcg_gen_op5(int opc, TCGv arg1, TCGv arg2, |
| 113 | TCGv arg3, TCGv arg4, |
| 114 | TCGv arg5) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 115 | { |
| 116 | *gen_opc_ptr++ = opc; |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 117 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 118 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 119 | *gen_opparam_ptr++ = GET_TCGV(arg3); |
| 120 | *gen_opparam_ptr++ = GET_TCGV(arg4); |
| 121 | *gen_opparam_ptr++ = GET_TCGV(arg5); |
| 122 | } |
| 123 | |
| 124 | static inline void tcg_gen_op5i(int opc, TCGv arg1, TCGv arg2, |
| 125 | TCGv arg3, TCGv arg4, |
| 126 | TCGArg arg5) |
| 127 | { |
| 128 | *gen_opc_ptr++ = opc; |
| 129 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 130 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 131 | *gen_opparam_ptr++ = GET_TCGV(arg3); |
| 132 | *gen_opparam_ptr++ = GET_TCGV(arg4); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 133 | *gen_opparam_ptr++ = arg5; |
| 134 | } |
| 135 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 136 | static inline void tcg_gen_op6(int opc, TCGv arg1, TCGv arg2, |
| 137 | TCGv arg3, TCGv arg4, |
| 138 | TCGv arg5, TCGv arg6) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 139 | { |
| 140 | *gen_opc_ptr++ = opc; |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 141 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 142 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 143 | *gen_opparam_ptr++ = GET_TCGV(arg3); |
| 144 | *gen_opparam_ptr++ = GET_TCGV(arg4); |
| 145 | *gen_opparam_ptr++ = GET_TCGV(arg5); |
| 146 | *gen_opparam_ptr++ = GET_TCGV(arg6); |
| 147 | } |
| 148 | |
| 149 | static inline void tcg_gen_op6ii(int opc, TCGv arg1, TCGv arg2, |
| 150 | TCGv arg3, TCGv arg4, |
| 151 | TCGArg arg5, TCGArg arg6) |
| 152 | { |
| 153 | *gen_opc_ptr++ = opc; |
| 154 | *gen_opparam_ptr++ = GET_TCGV(arg1); |
| 155 | *gen_opparam_ptr++ = GET_TCGV(arg2); |
| 156 | *gen_opparam_ptr++ = GET_TCGV(arg3); |
| 157 | *gen_opparam_ptr++ = GET_TCGV(arg4); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 158 | *gen_opparam_ptr++ = arg5; |
| 159 | *gen_opparam_ptr++ = arg6; |
| 160 | } |
| 161 | |
| 162 | static inline void gen_set_label(int n) |
| 163 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 164 | tcg_gen_op1i(INDEX_op_set_label, n); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 165 | } |
| 166 | |
blueswir1 | fb50d41 | 2008-03-21 17:58:45 +0000 | [diff] [blame] | 167 | static inline void tcg_gen_br(int label) |
| 168 | { |
| 169 | tcg_gen_op1i(INDEX_op_br, label); |
| 170 | } |
| 171 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 172 | static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 173 | { |
pbrook | 9815642 | 2008-05-10 18:43:02 +0000 | [diff] [blame] | 174 | if (GET_TCGV(ret) != GET_TCGV(arg)) |
blueswir1 | 4d07272 | 2008-05-03 20:52:26 +0000 | [diff] [blame] | 175 | tcg_gen_op2(INDEX_op_mov_i32, ret, arg); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 176 | } |
| 177 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 178 | static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 179 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 180 | tcg_gen_op2i(INDEX_op_movi_i32, ret, arg); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 181 | } |
| 182 | |
| 183 | /* helper calls */ |
| 184 | #define TCG_HELPER_CALL_FLAGS 0 |
| 185 | |
| 186 | static inline void tcg_gen_helper_0_0(void *func) |
| 187 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 188 | TCGv t0; |
| 189 | t0 = tcg_const_ptr((tcg_target_long)func); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 190 | tcg_gen_call(&tcg_ctx, |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 191 | t0, TCG_HELPER_CALL_FLAGS, |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 192 | 0, NULL, 0, NULL); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 193 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 194 | } |
| 195 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 196 | static inline void tcg_gen_helper_0_1(void *func, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 197 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 198 | TCGv t0; |
| 199 | t0 = tcg_const_ptr((tcg_target_long)func); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 200 | tcg_gen_call(&tcg_ctx, |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 201 | t0, TCG_HELPER_CALL_FLAGS, |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 202 | 0, NULL, 1, &arg); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 203 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 204 | } |
| 205 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 206 | static inline void tcg_gen_helper_0_2(void *func, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 207 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 208 | TCGv args[2]; |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 209 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 210 | args[0] = arg1; |
| 211 | args[1] = arg2; |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 212 | t0 = tcg_const_ptr((tcg_target_long)func); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 213 | tcg_gen_call(&tcg_ctx, |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 214 | t0, TCG_HELPER_CALL_FLAGS, |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 215 | 0, NULL, 2, args); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 216 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 217 | } |
| 218 | |
pbrook | b010980 | 2008-03-31 03:47:03 +0000 | [diff] [blame] | 219 | static inline void tcg_gen_helper_0_3(void *func, |
| 220 | TCGv arg1, TCGv arg2, TCGv arg3) |
| 221 | { |
| 222 | TCGv args[3]; |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 223 | TCGv t0; |
pbrook | b010980 | 2008-03-31 03:47:03 +0000 | [diff] [blame] | 224 | args[0] = arg1; |
| 225 | args[1] = arg2; |
| 226 | args[2] = arg3; |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 227 | t0 = tcg_const_ptr((tcg_target_long)func); |
pbrook | b010980 | 2008-03-31 03:47:03 +0000 | [diff] [blame] | 228 | tcg_gen_call(&tcg_ctx, |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 229 | t0, TCG_HELPER_CALL_FLAGS, |
pbrook | b010980 | 2008-03-31 03:47:03 +0000 | [diff] [blame] | 230 | 0, NULL, 3, args); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 231 | tcg_temp_free(t0); |
pbrook | b010980 | 2008-03-31 03:47:03 +0000 | [diff] [blame] | 232 | } |
| 233 | |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 234 | static inline void tcg_gen_helper_0_4(void *func, TCGv arg1, TCGv arg2, |
| 235 | TCGv arg3, TCGv arg4) |
| 236 | { |
| 237 | TCGv args[4]; |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 238 | TCGv t0; |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 239 | args[0] = arg1; |
| 240 | args[1] = arg2; |
| 241 | args[2] = arg3; |
| 242 | args[3] = arg4; |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 243 | t0 = tcg_const_ptr((tcg_target_long)func); |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 244 | tcg_gen_call(&tcg_ctx, |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 245 | t0, TCG_HELPER_CALL_FLAGS, |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 246 | 0, NULL, 4, args); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 247 | tcg_temp_free(t0); |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 248 | } |
| 249 | |
| 250 | static inline void tcg_gen_helper_1_0(void *func, TCGv ret) |
| 251 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 252 | TCGv t0; |
| 253 | t0 = tcg_const_ptr((tcg_target_long)func); |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 254 | tcg_gen_call(&tcg_ctx, |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 255 | t0, TCG_HELPER_CALL_FLAGS, |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 256 | 1, &ret, 0, NULL); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 257 | tcg_temp_free(t0); |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 258 | } |
| 259 | |
| 260 | static inline void tcg_gen_helper_1_1(void *func, TCGv ret, TCGv arg1) |
| 261 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 262 | TCGv t0; |
| 263 | t0 = tcg_const_ptr((tcg_target_long)func); |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 264 | tcg_gen_call(&tcg_ctx, |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 265 | t0, TCG_HELPER_CALL_FLAGS, |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 266 | 1, &ret, 1, &arg1); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 267 | tcg_temp_free(t0); |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 268 | } |
| 269 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 270 | static inline void tcg_gen_helper_1_2(void *func, TCGv ret, |
| 271 | TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 272 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 273 | TCGv args[2]; |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 274 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 275 | args[0] = arg1; |
| 276 | args[1] = arg2; |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 277 | t0 = tcg_const_ptr((tcg_target_long)func); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 278 | tcg_gen_call(&tcg_ctx, |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 279 | t0, TCG_HELPER_CALL_FLAGS, |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 280 | 1, &ret, 2, args); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 281 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 282 | } |
| 283 | |
pbrook | 6ddbc6e | 2008-03-31 03:46:33 +0000 | [diff] [blame] | 284 | static inline void tcg_gen_helper_1_3(void *func, TCGv ret, |
| 285 | TCGv arg1, TCGv arg2, TCGv arg3) |
| 286 | { |
| 287 | TCGv args[3]; |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 288 | TCGv t0; |
pbrook | 6ddbc6e | 2008-03-31 03:46:33 +0000 | [diff] [blame] | 289 | args[0] = arg1; |
| 290 | args[1] = arg2; |
| 291 | args[2] = arg3; |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 292 | t0 = tcg_const_ptr((tcg_target_long)func); |
pbrook | 6ddbc6e | 2008-03-31 03:46:33 +0000 | [diff] [blame] | 293 | tcg_gen_call(&tcg_ctx, |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 294 | t0, TCG_HELPER_CALL_FLAGS, |
pbrook | 6ddbc6e | 2008-03-31 03:46:33 +0000 | [diff] [blame] | 295 | 1, &ret, 3, args); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 296 | tcg_temp_free(t0); |
pbrook | 6ddbc6e | 2008-03-31 03:46:33 +0000 | [diff] [blame] | 297 | } |
| 298 | |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 299 | static inline void tcg_gen_helper_1_4(void *func, TCGv ret, |
| 300 | TCGv arg1, TCGv arg2, TCGv arg3, |
| 301 | TCGv arg4) |
| 302 | { |
| 303 | TCGv args[4]; |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 304 | TCGv t0; |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 305 | args[0] = arg1; |
| 306 | args[1] = arg2; |
| 307 | args[2] = arg3; |
| 308 | args[3] = arg4; |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 309 | t0 = tcg_const_ptr((tcg_target_long)func); |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 310 | tcg_gen_call(&tcg_ctx, |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 311 | t0, TCG_HELPER_CALL_FLAGS, |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 312 | 1, &ret, 4, args); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 313 | tcg_temp_free(t0); |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 314 | } |
| 315 | |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 316 | /* 32 bit ops */ |
| 317 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 318 | static inline void tcg_gen_ld8u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 319 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 320 | tcg_gen_op3i(INDEX_op_ld8u_i32, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 321 | } |
| 322 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 323 | static inline void tcg_gen_ld8s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 324 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 325 | tcg_gen_op3i(INDEX_op_ld8s_i32, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 326 | } |
| 327 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 328 | static inline void tcg_gen_ld16u_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 329 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 330 | tcg_gen_op3i(INDEX_op_ld16u_i32, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 331 | } |
| 332 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 333 | static inline void tcg_gen_ld16s_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 334 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 335 | tcg_gen_op3i(INDEX_op_ld16s_i32, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 336 | } |
| 337 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 338 | static inline void tcg_gen_ld_i32(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 339 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 340 | tcg_gen_op3i(INDEX_op_ld_i32, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 341 | } |
| 342 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 343 | static inline void tcg_gen_st8_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 344 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 345 | tcg_gen_op3i(INDEX_op_st8_i32, arg1, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 346 | } |
| 347 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 348 | static inline void tcg_gen_st16_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 349 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 350 | tcg_gen_op3i(INDEX_op_st16_i32, arg1, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 351 | } |
| 352 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 353 | static inline void tcg_gen_st_i32(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 354 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 355 | tcg_gen_op3i(INDEX_op_st_i32, arg1, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 356 | } |
| 357 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 358 | static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 359 | { |
| 360 | tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2); |
| 361 | } |
| 362 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 363 | static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 364 | { |
blueswir1 | 7089442 | 2008-02-20 18:01:23 +0000 | [diff] [blame] | 365 | /* some cases can be optimized here */ |
| 366 | if (arg2 == 0) { |
| 367 | tcg_gen_mov_i32(ret, arg1); |
| 368 | } else { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 369 | TCGv t0 = tcg_const_i32(arg2); |
| 370 | tcg_gen_add_i32(ret, arg1, t0); |
| 371 | tcg_temp_free(t0); |
blueswir1 | 7089442 | 2008-02-20 18:01:23 +0000 | [diff] [blame] | 372 | } |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 373 | } |
| 374 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 375 | static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 376 | { |
| 377 | tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2); |
| 378 | } |
| 379 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 380 | static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 381 | { |
blueswir1 | 7089442 | 2008-02-20 18:01:23 +0000 | [diff] [blame] | 382 | /* some cases can be optimized here */ |
| 383 | if (arg2 == 0) { |
| 384 | tcg_gen_mov_i32(ret, arg1); |
| 385 | } else { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 386 | TCGv t0 = tcg_const_i32(arg2); |
| 387 | tcg_gen_sub_i32(ret, arg1, t0); |
| 388 | tcg_temp_free(t0); |
blueswir1 | 7089442 | 2008-02-20 18:01:23 +0000 | [diff] [blame] | 389 | } |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 390 | } |
| 391 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 392 | static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 393 | { |
| 394 | tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2); |
| 395 | } |
| 396 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 397 | static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 398 | { |
| 399 | /* some cases can be optimized here */ |
| 400 | if (arg2 == 0) { |
| 401 | tcg_gen_movi_i32(ret, 0); |
| 402 | } else if (arg2 == 0xffffffff) { |
| 403 | tcg_gen_mov_i32(ret, arg1); |
| 404 | } else { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 405 | TCGv t0 = tcg_const_i32(arg2); |
| 406 | tcg_gen_and_i32(ret, arg1, t0); |
| 407 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 408 | } |
| 409 | } |
| 410 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 411 | static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 412 | { |
| 413 | tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2); |
| 414 | } |
| 415 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 416 | static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 417 | { |
| 418 | /* some cases can be optimized here */ |
| 419 | if (arg2 == 0xffffffff) { |
blueswir1 | 7089442 | 2008-02-20 18:01:23 +0000 | [diff] [blame] | 420 | tcg_gen_movi_i32(ret, 0xffffffff); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 421 | } else if (arg2 == 0) { |
| 422 | tcg_gen_mov_i32(ret, arg1); |
| 423 | } else { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 424 | TCGv t0 = tcg_const_i32(arg2); |
| 425 | tcg_gen_or_i32(ret, arg1, t0); |
| 426 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 427 | } |
| 428 | } |
| 429 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 430 | static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 431 | { |
| 432 | tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2); |
| 433 | } |
| 434 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 435 | static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 436 | { |
| 437 | /* some cases can be optimized here */ |
| 438 | if (arg2 == 0) { |
| 439 | tcg_gen_mov_i32(ret, arg1); |
| 440 | } else { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 441 | TCGv t0 = tcg_const_i32(arg2); |
| 442 | tcg_gen_xor_i32(ret, arg1, t0); |
| 443 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 444 | } |
| 445 | } |
| 446 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 447 | static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 448 | { |
| 449 | tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2); |
| 450 | } |
| 451 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 452 | static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 453 | { |
bellard | 34151a2 | 2008-05-22 13:25:14 +0000 | [diff] [blame] | 454 | if (arg2 == 0) { |
| 455 | tcg_gen_mov_i32(ret, arg1); |
| 456 | } else { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 457 | TCGv t0 = tcg_const_i32(arg2); |
| 458 | tcg_gen_shl_i32(ret, arg1, t0); |
| 459 | tcg_temp_free(t0); |
bellard | 34151a2 | 2008-05-22 13:25:14 +0000 | [diff] [blame] | 460 | } |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 461 | } |
| 462 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 463 | static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 464 | { |
| 465 | tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2); |
| 466 | } |
| 467 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 468 | static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 469 | { |
bellard | 34151a2 | 2008-05-22 13:25:14 +0000 | [diff] [blame] | 470 | if (arg2 == 0) { |
| 471 | tcg_gen_mov_i32(ret, arg1); |
| 472 | } else { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 473 | TCGv t0 = tcg_const_i32(arg2); |
| 474 | tcg_gen_shr_i32(ret, arg1, t0); |
| 475 | tcg_temp_free(t0); |
bellard | 34151a2 | 2008-05-22 13:25:14 +0000 | [diff] [blame] | 476 | } |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 477 | } |
| 478 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 479 | static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 480 | { |
| 481 | tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2); |
| 482 | } |
| 483 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 484 | static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 485 | { |
bellard | 34151a2 | 2008-05-22 13:25:14 +0000 | [diff] [blame] | 486 | if (arg2 == 0) { |
| 487 | tcg_gen_mov_i32(ret, arg1); |
| 488 | } else { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 489 | TCGv t0 = tcg_const_i32(arg2); |
| 490 | tcg_gen_sar_i32(ret, arg1, t0); |
| 491 | tcg_temp_free(t0); |
bellard | 34151a2 | 2008-05-22 13:25:14 +0000 | [diff] [blame] | 492 | } |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 493 | } |
| 494 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 495 | static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 496 | int label_index) |
| 497 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 498 | tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 499 | } |
| 500 | |
pbrook | cb63669 | 2008-05-24 02:22:00 +0000 | [diff] [blame] | 501 | static inline void tcg_gen_brcondi_i32(int cond, TCGv arg1, int32_t arg2, |
| 502 | int label_index) |
| 503 | { |
| 504 | TCGv t0 = tcg_const_i32(arg2); |
| 505 | tcg_gen_brcond_i32(cond, arg1, t0, label_index); |
| 506 | tcg_temp_free(t0); |
| 507 | } |
| 508 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 509 | static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 510 | { |
| 511 | tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2); |
| 512 | } |
| 513 | |
ths | f730fd2 | 2008-05-04 08:14:08 +0000 | [diff] [blame] | 514 | static inline void tcg_gen_muli_i32(TCGv ret, TCGv arg1, int32_t arg2) |
| 515 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 516 | TCGv t0 = tcg_const_i32(arg2); |
| 517 | tcg_gen_mul_i32(ret, arg1, t0); |
| 518 | tcg_temp_free(t0); |
ths | f730fd2 | 2008-05-04 08:14:08 +0000 | [diff] [blame] | 519 | } |
| 520 | |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 521 | #ifdef TCG_TARGET_HAS_div_i32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 522 | static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 523 | { |
| 524 | tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2); |
| 525 | } |
| 526 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 527 | static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 528 | { |
| 529 | tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2); |
| 530 | } |
| 531 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 532 | static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 533 | { |
| 534 | tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2); |
| 535 | } |
| 536 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 537 | static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 538 | { |
| 539 | tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2); |
| 540 | } |
| 541 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 542 | static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 543 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 544 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 545 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 546 | tcg_gen_sari_i32(t0, arg1, 31); |
| 547 | tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 548 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 549 | } |
| 550 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 551 | static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 552 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 553 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 554 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 555 | tcg_gen_sari_i32(t0, arg1, 31); |
| 556 | tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 557 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 558 | } |
| 559 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 560 | static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 561 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 562 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 563 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 564 | tcg_gen_movi_i32(t0, 0); |
| 565 | tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 566 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 567 | } |
| 568 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 569 | static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 570 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 571 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 572 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 573 | tcg_gen_movi_i32(t0, 0); |
| 574 | tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 575 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 576 | } |
| 577 | #endif |
| 578 | |
| 579 | #if TCG_TARGET_REG_BITS == 32 |
| 580 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 581 | static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 582 | { |
pbrook | 9815642 | 2008-05-10 18:43:02 +0000 | [diff] [blame] | 583 | if (GET_TCGV(ret) != GET_TCGV(arg)) { |
blueswir1 | 4d07272 | 2008-05-03 20:52:26 +0000 | [diff] [blame] | 584 | tcg_gen_mov_i32(ret, arg); |
| 585 | tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg)); |
| 586 | } |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 587 | } |
| 588 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 589 | static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 590 | { |
| 591 | tcg_gen_movi_i32(ret, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 592 | tcg_gen_movi_i32(TCGV_HIGH(ret), arg >> 32); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 593 | } |
| 594 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 595 | static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 596 | { |
| 597 | tcg_gen_ld8u_i32(ret, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 598 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 599 | } |
| 600 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 601 | static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 602 | { |
| 603 | tcg_gen_ld8s_i32(ret, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 604 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 605 | } |
| 606 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 607 | static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 608 | { |
| 609 | tcg_gen_ld16u_i32(ret, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 610 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 611 | } |
| 612 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 613 | static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 614 | { |
| 615 | tcg_gen_ld16s_i32(ret, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 616 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 617 | } |
| 618 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 619 | static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 620 | { |
| 621 | tcg_gen_ld_i32(ret, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 622 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 623 | } |
| 624 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 625 | static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 626 | { |
| 627 | tcg_gen_ld_i32(ret, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 628 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 629 | } |
| 630 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 631 | static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 632 | { |
| 633 | /* since arg2 and ret have different types, they cannot be the |
| 634 | same temporary */ |
| 635 | #ifdef TCG_TARGET_WORDS_BIGENDIAN |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 636 | tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 637 | tcg_gen_ld_i32(ret, arg2, offset + 4); |
| 638 | #else |
| 639 | tcg_gen_ld_i32(ret, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 640 | tcg_gen_ld_i32(TCGV_HIGH(ret), arg2, offset + 4); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 641 | #endif |
| 642 | } |
| 643 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 644 | static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 645 | { |
| 646 | tcg_gen_st8_i32(arg1, arg2, offset); |
| 647 | } |
| 648 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 649 | static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 650 | { |
| 651 | tcg_gen_st16_i32(arg1, arg2, offset); |
| 652 | } |
| 653 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 654 | static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 655 | { |
| 656 | tcg_gen_st_i32(arg1, arg2, offset); |
| 657 | } |
| 658 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 659 | static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 660 | { |
| 661 | #ifdef TCG_TARGET_WORDS_BIGENDIAN |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 662 | tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 663 | tcg_gen_st_i32(arg1, arg2, offset + 4); |
| 664 | #else |
| 665 | tcg_gen_st_i32(arg1, arg2, offset); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 666 | tcg_gen_st_i32(TCGV_HIGH(arg1), arg2, offset + 4); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 667 | #endif |
| 668 | } |
| 669 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 670 | static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 671 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 672 | tcg_gen_op6(INDEX_op_add2_i32, ret, TCGV_HIGH(ret), |
| 673 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 674 | } |
| 675 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 676 | static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 677 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 678 | TCGv t0 = tcg_const_i64(arg2); |
| 679 | tcg_gen_add_i64(ret, arg1, t0); |
| 680 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 681 | } |
| 682 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 683 | static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 684 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 685 | tcg_gen_op6(INDEX_op_sub2_i32, ret, TCGV_HIGH(ret), |
| 686 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2)); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 687 | } |
| 688 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 689 | static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 690 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 691 | TCGv t0 = tcg_const_i64(arg2); |
| 692 | tcg_gen_sub_i64(ret, arg1, t0); |
| 693 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 694 | } |
| 695 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 696 | static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 697 | { |
| 698 | tcg_gen_and_i32(ret, arg1, arg2); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 699 | tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 700 | } |
| 701 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 702 | static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 703 | { |
| 704 | tcg_gen_andi_i32(ret, arg1, arg2); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 705 | tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 706 | } |
| 707 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 708 | static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 709 | { |
| 710 | tcg_gen_or_i32(ret, arg1, arg2); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 711 | tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 712 | } |
| 713 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 714 | static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 715 | { |
| 716 | tcg_gen_ori_i32(ret, arg1, arg2); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 717 | tcg_gen_ori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 718 | } |
| 719 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 720 | static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 721 | { |
| 722 | tcg_gen_xor_i32(ret, arg1, arg2); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 723 | tcg_gen_xor_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2)); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 724 | } |
| 725 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 726 | static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 727 | { |
| 728 | tcg_gen_xori_i32(ret, arg1, arg2); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 729 | tcg_gen_xori_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 730 | } |
| 731 | |
| 732 | /* XXX: use generic code when basic block handling is OK or CPU |
| 733 | specific code (x86) */ |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 734 | static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 735 | { |
| 736 | tcg_gen_helper_1_2(tcg_helper_shl_i64, ret, arg1, arg2); |
| 737 | } |
| 738 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 739 | static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 740 | { |
| 741 | tcg_gen_shifti_i64(ret, arg1, arg2, 0, 0); |
| 742 | } |
| 743 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 744 | static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 745 | { |
| 746 | tcg_gen_helper_1_2(tcg_helper_shr_i64, ret, arg1, arg2); |
| 747 | } |
| 748 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 749 | static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 750 | { |
| 751 | tcg_gen_shifti_i64(ret, arg1, arg2, 1, 0); |
| 752 | } |
| 753 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 754 | static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 755 | { |
| 756 | tcg_gen_helper_1_2(tcg_helper_sar_i64, ret, arg1, arg2); |
| 757 | } |
| 758 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 759 | static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 760 | { |
| 761 | tcg_gen_shifti_i64(ret, arg1, arg2, 1, 1); |
| 762 | } |
| 763 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 764 | static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 765 | int label_index) |
| 766 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 767 | tcg_gen_op6ii(INDEX_op_brcond2_i32, |
| 768 | arg1, TCGV_HIGH(arg1), arg2, TCGV_HIGH(arg2), |
| 769 | cond, label_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 770 | } |
| 771 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 772 | static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 773 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 774 | TCGv t0, t1; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 775 | |
| 776 | t0 = tcg_temp_new(TCG_TYPE_I64); |
| 777 | t1 = tcg_temp_new(TCG_TYPE_I32); |
| 778 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 779 | tcg_gen_op4(INDEX_op_mulu2_i32, t0, TCGV_HIGH(t0), arg1, arg2); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 780 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 781 | tcg_gen_mul_i32(t1, arg1, TCGV_HIGH(arg2)); |
| 782 | tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
| 783 | tcg_gen_mul_i32(t1, TCGV_HIGH(arg1), arg2); |
| 784 | tcg_gen_add_i32(TCGV_HIGH(t0), TCGV_HIGH(t0), t1); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 785 | |
| 786 | tcg_gen_mov_i64(ret, t0); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 787 | tcg_temp_free(t0); |
| 788 | tcg_temp_free(t1); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 789 | } |
| 790 | |
ths | f730fd2 | 2008-05-04 08:14:08 +0000 | [diff] [blame] | 791 | static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 792 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 793 | TCGv t0 = tcg_const_i64(arg2); |
| 794 | tcg_gen_mul_i64(ret, arg1, t0); |
| 795 | tcg_temp_free(t0); |
ths | f730fd2 | 2008-05-04 08:14:08 +0000 | [diff] [blame] | 796 | } |
| 797 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 798 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 799 | { |
| 800 | tcg_gen_helper_1_2(tcg_helper_div_i64, ret, arg1, arg2); |
| 801 | } |
| 802 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 803 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 804 | { |
| 805 | tcg_gen_helper_1_2(tcg_helper_rem_i64, ret, arg1, arg2); |
| 806 | } |
| 807 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 808 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 809 | { |
| 810 | tcg_gen_helper_1_2(tcg_helper_divu_i64, ret, arg1, arg2); |
| 811 | } |
| 812 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 813 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 814 | { |
| 815 | tcg_gen_helper_1_2(tcg_helper_remu_i64, ret, arg1, arg2); |
| 816 | } |
| 817 | |
| 818 | #else |
| 819 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 820 | static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 821 | { |
pbrook | 9815642 | 2008-05-10 18:43:02 +0000 | [diff] [blame] | 822 | if (GET_TCGV(ret) != GET_TCGV(arg)) |
blueswir1 | 4d07272 | 2008-05-03 20:52:26 +0000 | [diff] [blame] | 823 | tcg_gen_op2(INDEX_op_mov_i64, ret, arg); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 824 | } |
| 825 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 826 | static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 827 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 828 | tcg_gen_op2i(INDEX_op_movi_i64, ret, arg); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 829 | } |
| 830 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 831 | static inline void tcg_gen_ld8u_i64(TCGv ret, TCGv arg2, |
| 832 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 833 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 834 | tcg_gen_op3i(INDEX_op_ld8u_i64, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 835 | } |
| 836 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 837 | static inline void tcg_gen_ld8s_i64(TCGv ret, TCGv arg2, |
| 838 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 839 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 840 | tcg_gen_op3i(INDEX_op_ld8s_i64, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 841 | } |
| 842 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 843 | static inline void tcg_gen_ld16u_i64(TCGv ret, TCGv arg2, |
| 844 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 845 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 846 | tcg_gen_op3i(INDEX_op_ld16u_i64, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 847 | } |
| 848 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 849 | static inline void tcg_gen_ld16s_i64(TCGv ret, TCGv arg2, |
| 850 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 851 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 852 | tcg_gen_op3i(INDEX_op_ld16s_i64, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 853 | } |
| 854 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 855 | static inline void tcg_gen_ld32u_i64(TCGv ret, TCGv arg2, |
| 856 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 857 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 858 | tcg_gen_op3i(INDEX_op_ld32u_i64, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 859 | } |
| 860 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 861 | static inline void tcg_gen_ld32s_i64(TCGv ret, TCGv arg2, |
| 862 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 863 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 864 | tcg_gen_op3i(INDEX_op_ld32s_i64, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 865 | } |
| 866 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 867 | static inline void tcg_gen_ld_i64(TCGv ret, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 868 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 869 | tcg_gen_op3i(INDEX_op_ld_i64, ret, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 870 | } |
| 871 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 872 | static inline void tcg_gen_st8_i64(TCGv arg1, TCGv arg2, |
| 873 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 874 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 875 | tcg_gen_op3i(INDEX_op_st8_i64, arg1, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 876 | } |
| 877 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 878 | static inline void tcg_gen_st16_i64(TCGv arg1, TCGv arg2, |
| 879 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 880 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 881 | tcg_gen_op3i(INDEX_op_st16_i64, arg1, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 882 | } |
| 883 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 884 | static inline void tcg_gen_st32_i64(TCGv arg1, TCGv arg2, |
| 885 | tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 886 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 887 | tcg_gen_op3i(INDEX_op_st32_i64, arg1, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 888 | } |
| 889 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 890 | static inline void tcg_gen_st_i64(TCGv arg1, TCGv arg2, tcg_target_long offset) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 891 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 892 | tcg_gen_op3i(INDEX_op_st_i64, arg1, arg2, offset); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 893 | } |
| 894 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 895 | static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 896 | { |
| 897 | tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2); |
| 898 | } |
| 899 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 900 | static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 901 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 902 | TCGv t0 = tcg_const_i64(arg2); |
| 903 | tcg_gen_add_i64(ret, arg1, t0); |
| 904 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 905 | } |
| 906 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 907 | static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 908 | { |
| 909 | tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2); |
| 910 | } |
| 911 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 912 | static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 913 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 914 | TCGv t0 = tcg_const_i64(arg2); |
| 915 | tcg_gen_sub_i64(ret, arg1, t0); |
| 916 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 917 | } |
| 918 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 919 | static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 920 | { |
| 921 | tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2); |
| 922 | } |
| 923 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 924 | static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 925 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 926 | TCGv t0 = tcg_const_i64(arg2); |
| 927 | tcg_gen_and_i64(ret, arg1, t0); |
| 928 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 929 | } |
| 930 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 931 | static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 932 | { |
| 933 | tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2); |
| 934 | } |
| 935 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 936 | static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 937 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 938 | TCGv t0 = tcg_const_i64(arg2); |
| 939 | tcg_gen_or_i64(ret, arg1, t0); |
| 940 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 941 | } |
| 942 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 943 | static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 944 | { |
| 945 | tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2); |
| 946 | } |
| 947 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 948 | static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 949 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 950 | TCGv t0 = tcg_const_i64(arg2); |
| 951 | tcg_gen_xor_i64(ret, arg1, t0); |
| 952 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 953 | } |
| 954 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 955 | static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 956 | { |
| 957 | tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2); |
| 958 | } |
| 959 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 960 | static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 961 | { |
bellard | 34151a2 | 2008-05-22 13:25:14 +0000 | [diff] [blame] | 962 | if (arg2 == 0) { |
| 963 | tcg_gen_mov_i64(ret, arg1); |
| 964 | } else { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 965 | TCGv t0 = tcg_const_i64(arg2); |
| 966 | tcg_gen_shl_i64(ret, arg1, t0); |
| 967 | tcg_temp_free(t0); |
bellard | 34151a2 | 2008-05-22 13:25:14 +0000 | [diff] [blame] | 968 | } |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 969 | } |
| 970 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 971 | static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 972 | { |
| 973 | tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2); |
| 974 | } |
| 975 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 976 | static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 977 | { |
bellard | 34151a2 | 2008-05-22 13:25:14 +0000 | [diff] [blame] | 978 | if (arg2 == 0) { |
| 979 | tcg_gen_mov_i64(ret, arg1); |
| 980 | } else { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 981 | TCGv t0 = tcg_const_i64(arg2); |
| 982 | tcg_gen_shr_i64(ret, arg1, t0); |
| 983 | tcg_temp_free(t0); |
bellard | 34151a2 | 2008-05-22 13:25:14 +0000 | [diff] [blame] | 984 | } |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 985 | } |
| 986 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 987 | static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 988 | { |
| 989 | tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2); |
| 990 | } |
| 991 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 992 | static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 993 | { |
bellard | 34151a2 | 2008-05-22 13:25:14 +0000 | [diff] [blame] | 994 | if (arg2 == 0) { |
| 995 | tcg_gen_mov_i64(ret, arg1); |
| 996 | } else { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 997 | TCGv t0 = tcg_const_i64(arg2); |
| 998 | tcg_gen_sar_i64(ret, arg1, t0); |
| 999 | tcg_temp_free(t0); |
bellard | 34151a2 | 2008-05-22 13:25:14 +0000 | [diff] [blame] | 1000 | } |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1001 | } |
| 1002 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1003 | static inline void tcg_gen_brcond_i64(int cond, TCGv arg1, TCGv arg2, |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1004 | int label_index) |
| 1005 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1006 | tcg_gen_op4ii(INDEX_op_brcond_i64, arg1, arg2, cond, label_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1007 | } |
| 1008 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1009 | static inline void tcg_gen_mul_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1010 | { |
| 1011 | tcg_gen_op3(INDEX_op_mul_i64, ret, arg1, arg2); |
| 1012 | } |
| 1013 | |
ths | f730fd2 | 2008-05-04 08:14:08 +0000 | [diff] [blame] | 1014 | static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2) |
| 1015 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 1016 | TCGv t0 = tcg_const_i64(arg2); |
| 1017 | tcg_gen_mul_i64(ret, arg1, t0); |
| 1018 | tcg_temp_free(t0); |
ths | f730fd2 | 2008-05-04 08:14:08 +0000 | [diff] [blame] | 1019 | } |
| 1020 | |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1021 | #ifdef TCG_TARGET_HAS_div_i64 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1022 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1023 | { |
| 1024 | tcg_gen_op3(INDEX_op_div_i64, ret, arg1, arg2); |
| 1025 | } |
| 1026 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1027 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1028 | { |
| 1029 | tcg_gen_op3(INDEX_op_rem_i64, ret, arg1, arg2); |
| 1030 | } |
| 1031 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1032 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1033 | { |
| 1034 | tcg_gen_op3(INDEX_op_divu_i64, ret, arg1, arg2); |
| 1035 | } |
| 1036 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1037 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1038 | { |
| 1039 | tcg_gen_op3(INDEX_op_remu_i64, ret, arg1, arg2); |
| 1040 | } |
| 1041 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1042 | static inline void tcg_gen_div_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1043 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1044 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1045 | t0 = tcg_temp_new(TCG_TYPE_I64); |
| 1046 | tcg_gen_sari_i64(t0, arg1, 63); |
| 1047 | tcg_gen_op5(INDEX_op_div2_i64, ret, t0, arg1, t0, arg2); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 1048 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1049 | } |
| 1050 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1051 | static inline void tcg_gen_rem_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1052 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1053 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1054 | t0 = tcg_temp_new(TCG_TYPE_I64); |
| 1055 | tcg_gen_sari_i64(t0, arg1, 63); |
| 1056 | tcg_gen_op5(INDEX_op_div2_i64, t0, ret, arg1, t0, arg2); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 1057 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1058 | } |
| 1059 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1060 | static inline void tcg_gen_divu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1061 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1062 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1063 | t0 = tcg_temp_new(TCG_TYPE_I64); |
| 1064 | tcg_gen_movi_i64(t0, 0); |
| 1065 | tcg_gen_op5(INDEX_op_divu2_i64, ret, t0, arg1, t0, arg2); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 1066 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1067 | } |
| 1068 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1069 | static inline void tcg_gen_remu_i64(TCGv ret, TCGv arg1, TCGv arg2) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1070 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1071 | TCGv t0; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1072 | t0 = tcg_temp_new(TCG_TYPE_I64); |
| 1073 | tcg_gen_movi_i64(t0, 0); |
| 1074 | tcg_gen_op5(INDEX_op_divu2_i64, t0, ret, arg1, t0, arg2); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 1075 | tcg_temp_free(t0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1076 | } |
| 1077 | #endif |
| 1078 | |
| 1079 | #endif |
| 1080 | |
pbrook | cb63669 | 2008-05-24 02:22:00 +0000 | [diff] [blame] | 1081 | static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2, |
| 1082 | int label_index) |
| 1083 | { |
| 1084 | TCGv t0 = tcg_const_i64(arg2); |
| 1085 | tcg_gen_brcond_i64(cond, arg1, t0, label_index); |
| 1086 | tcg_temp_free(t0); |
| 1087 | } |
| 1088 | |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1089 | /***************************************/ |
| 1090 | /* optional operations */ |
| 1091 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1092 | static inline void tcg_gen_ext8s_i32(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1093 | { |
| 1094 | #ifdef TCG_TARGET_HAS_ext8s_i32 |
| 1095 | tcg_gen_op2(INDEX_op_ext8s_i32, ret, arg); |
| 1096 | #else |
| 1097 | tcg_gen_shli_i32(ret, arg, 24); |
bellard | 5ff9d6a | 2008-02-04 00:37:54 +0000 | [diff] [blame] | 1098 | tcg_gen_sari_i32(ret, ret, 24); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1099 | #endif |
| 1100 | } |
| 1101 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1102 | static inline void tcg_gen_ext16s_i32(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1103 | { |
| 1104 | #ifdef TCG_TARGET_HAS_ext16s_i32 |
| 1105 | tcg_gen_op2(INDEX_op_ext16s_i32, ret, arg); |
| 1106 | #else |
| 1107 | tcg_gen_shli_i32(ret, arg, 16); |
bellard | 5ff9d6a | 2008-02-04 00:37:54 +0000 | [diff] [blame] | 1108 | tcg_gen_sari_i32(ret, ret, 16); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1109 | #endif |
| 1110 | } |
| 1111 | |
pbrook | 8683143 | 2008-05-11 12:22:01 +0000 | [diff] [blame] | 1112 | /* These are currently just for convenience. |
| 1113 | We assume a target will recognise these automatically . */ |
| 1114 | static inline void tcg_gen_ext8u_i32(TCGv ret, TCGv arg) |
| 1115 | { |
| 1116 | tcg_gen_andi_i32(ret, arg, 0xffu); |
| 1117 | } |
| 1118 | |
| 1119 | static inline void tcg_gen_ext16u_i32(TCGv ret, TCGv arg) |
| 1120 | { |
| 1121 | tcg_gen_andi_i32(ret, arg, 0xffffu); |
| 1122 | } |
| 1123 | |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1124 | /* Note: we assume the two high bytes are set to zero */ |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1125 | static inline void tcg_gen_bswap16_i32(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1126 | { |
| 1127 | #ifdef TCG_TARGET_HAS_bswap16_i32 |
| 1128 | tcg_gen_op2(INDEX_op_bswap16_i32, ret, arg); |
| 1129 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1130 | TCGv t0, t1; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1131 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 1132 | t1 = tcg_temp_new(TCG_TYPE_I32); |
| 1133 | |
| 1134 | tcg_gen_shri_i32(t0, arg, 8); |
| 1135 | tcg_gen_andi_i32(t1, arg, 0x000000ff); |
| 1136 | tcg_gen_shli_i32(t1, t1, 8); |
| 1137 | tcg_gen_or_i32(ret, t0, t1); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 1138 | tcg_temp_free(t0); |
| 1139 | tcg_temp_free(t1); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1140 | #endif |
| 1141 | } |
| 1142 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1143 | static inline void tcg_gen_bswap_i32(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1144 | { |
| 1145 | #ifdef TCG_TARGET_HAS_bswap_i32 |
| 1146 | tcg_gen_op2(INDEX_op_bswap_i32, ret, arg); |
| 1147 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1148 | TCGv t0, t1; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1149 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 1150 | t1 = tcg_temp_new(TCG_TYPE_I32); |
| 1151 | |
| 1152 | tcg_gen_shli_i32(t0, arg, 24); |
| 1153 | |
| 1154 | tcg_gen_andi_i32(t1, arg, 0x0000ff00); |
| 1155 | tcg_gen_shli_i32(t1, t1, 8); |
| 1156 | tcg_gen_or_i32(t0, t0, t1); |
| 1157 | |
| 1158 | tcg_gen_shri_i32(t1, arg, 8); |
| 1159 | tcg_gen_andi_i32(t1, t1, 0x0000ff00); |
| 1160 | tcg_gen_or_i32(t0, t0, t1); |
| 1161 | |
| 1162 | tcg_gen_shri_i32(t1, arg, 24); |
| 1163 | tcg_gen_or_i32(ret, t0, t1); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 1164 | tcg_temp_free(t0); |
| 1165 | tcg_temp_free(t1); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1166 | #endif |
| 1167 | } |
| 1168 | |
| 1169 | #if TCG_TARGET_REG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1170 | static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1171 | { |
| 1172 | tcg_gen_ext8s_i32(ret, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1173 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1174 | } |
| 1175 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1176 | static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1177 | { |
| 1178 | tcg_gen_ext16s_i32(ret, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1179 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1180 | } |
| 1181 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1182 | static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1183 | { |
| 1184 | tcg_gen_mov_i32(ret, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1185 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1186 | } |
| 1187 | |
pbrook | 8683143 | 2008-05-11 12:22:01 +0000 | [diff] [blame] | 1188 | static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
| 1189 | { |
| 1190 | tcg_gen_ext8u_i32(ret, arg); |
| 1191 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
| 1192 | } |
| 1193 | |
| 1194 | static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) |
| 1195 | { |
| 1196 | tcg_gen_ext16u_i32(ret, arg); |
| 1197 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
| 1198 | } |
| 1199 | |
| 1200 | static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) |
| 1201 | { |
| 1202 | tcg_gen_mov_i32(ret, arg); |
| 1203 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
| 1204 | } |
| 1205 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1206 | static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1207 | { |
| 1208 | tcg_gen_mov_i32(ret, arg); |
| 1209 | } |
| 1210 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1211 | static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1212 | { |
| 1213 | tcg_gen_mov_i32(ret, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1214 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1215 | } |
| 1216 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1217 | static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1218 | { |
| 1219 | tcg_gen_mov_i32(ret, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1220 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1221 | } |
| 1222 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1223 | static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1224 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1225 | TCGv t0, t1; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1226 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 1227 | t1 = tcg_temp_new(TCG_TYPE_I32); |
| 1228 | |
| 1229 | tcg_gen_bswap_i32(t0, arg); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1230 | tcg_gen_bswap_i32(t1, TCGV_HIGH(arg)); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1231 | tcg_gen_mov_i32(ret, t1); |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1232 | tcg_gen_mov_i32(TCGV_HIGH(ret), t0); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 1233 | tcg_temp_free(t0); |
| 1234 | tcg_temp_free(t1); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1235 | } |
| 1236 | #else |
| 1237 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1238 | static inline void tcg_gen_ext8s_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1239 | { |
| 1240 | #ifdef TCG_TARGET_HAS_ext8s_i64 |
| 1241 | tcg_gen_op2(INDEX_op_ext8s_i64, ret, arg); |
| 1242 | #else |
| 1243 | tcg_gen_shli_i64(ret, arg, 56); |
bellard | 5ff9d6a | 2008-02-04 00:37:54 +0000 | [diff] [blame] | 1244 | tcg_gen_sari_i64(ret, ret, 56); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1245 | #endif |
| 1246 | } |
| 1247 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1248 | static inline void tcg_gen_ext16s_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1249 | { |
| 1250 | #ifdef TCG_TARGET_HAS_ext16s_i64 |
| 1251 | tcg_gen_op2(INDEX_op_ext16s_i64, ret, arg); |
| 1252 | #else |
| 1253 | tcg_gen_shli_i64(ret, arg, 48); |
bellard | 5ff9d6a | 2008-02-04 00:37:54 +0000 | [diff] [blame] | 1254 | tcg_gen_sari_i64(ret, ret, 48); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1255 | #endif |
| 1256 | } |
| 1257 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1258 | static inline void tcg_gen_ext32s_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1259 | { |
| 1260 | #ifdef TCG_TARGET_HAS_ext32s_i64 |
| 1261 | tcg_gen_op2(INDEX_op_ext32s_i64, ret, arg); |
| 1262 | #else |
| 1263 | tcg_gen_shli_i64(ret, arg, 32); |
bellard | 5ff9d6a | 2008-02-04 00:37:54 +0000 | [diff] [blame] | 1264 | tcg_gen_sari_i64(ret, ret, 32); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1265 | #endif |
| 1266 | } |
| 1267 | |
pbrook | 8683143 | 2008-05-11 12:22:01 +0000 | [diff] [blame] | 1268 | static inline void tcg_gen_ext8u_i64(TCGv ret, TCGv arg) |
| 1269 | { |
| 1270 | tcg_gen_andi_i64(ret, arg, 0xffu); |
| 1271 | } |
| 1272 | |
| 1273 | static inline void tcg_gen_ext16u_i64(TCGv ret, TCGv arg) |
| 1274 | { |
| 1275 | tcg_gen_andi_i64(ret, arg, 0xffffu); |
| 1276 | } |
| 1277 | |
| 1278 | static inline void tcg_gen_ext32u_i64(TCGv ret, TCGv arg) |
| 1279 | { |
| 1280 | tcg_gen_andi_i64(ret, arg, 0xffffffffu); |
| 1281 | } |
| 1282 | |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1283 | /* Note: we assume the target supports move between 32 and 64 bit |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1284 | registers. This will probably break MIPS64 targets. */ |
| 1285 | static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1286 | { |
| 1287 | tcg_gen_mov_i32(ret, arg); |
| 1288 | } |
| 1289 | |
| 1290 | /* Note: we assume the target supports move between 32 and 64 bit |
| 1291 | registers */ |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1292 | static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1293 | { |
pbrook | 8683143 | 2008-05-11 12:22:01 +0000 | [diff] [blame] | 1294 | tcg_gen_andi_i64(ret, arg, 0xffffffffu); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1295 | } |
| 1296 | |
| 1297 | /* Note: we assume the target supports move between 32 and 64 bit |
| 1298 | registers */ |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1299 | static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1300 | { |
| 1301 | tcg_gen_ext32s_i64(ret, arg); |
| 1302 | } |
| 1303 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1304 | static inline void tcg_gen_bswap_i64(TCGv ret, TCGv arg) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1305 | { |
| 1306 | #ifdef TCG_TARGET_HAS_bswap_i64 |
| 1307 | tcg_gen_op2(INDEX_op_bswap_i64, ret, arg); |
| 1308 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1309 | TCGv t0, t1; |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1310 | t0 = tcg_temp_new(TCG_TYPE_I32); |
| 1311 | t1 = tcg_temp_new(TCG_TYPE_I32); |
| 1312 | |
| 1313 | tcg_gen_shli_i64(t0, arg, 56); |
| 1314 | |
| 1315 | tcg_gen_andi_i64(t1, arg, 0x0000ff00); |
| 1316 | tcg_gen_shli_i64(t1, t1, 40); |
| 1317 | tcg_gen_or_i64(t0, t0, t1); |
| 1318 | |
| 1319 | tcg_gen_andi_i64(t1, arg, 0x00ff0000); |
| 1320 | tcg_gen_shli_i64(t1, t1, 24); |
| 1321 | tcg_gen_or_i64(t0, t0, t1); |
| 1322 | |
| 1323 | tcg_gen_andi_i64(t1, arg, 0xff000000); |
| 1324 | tcg_gen_shli_i64(t1, t1, 8); |
| 1325 | tcg_gen_or_i64(t0, t0, t1); |
| 1326 | |
| 1327 | tcg_gen_shri_i64(t1, arg, 8); |
| 1328 | tcg_gen_andi_i64(t1, t1, 0xff000000); |
| 1329 | tcg_gen_or_i64(t0, t0, t1); |
| 1330 | |
| 1331 | tcg_gen_shri_i64(t1, arg, 24); |
| 1332 | tcg_gen_andi_i64(t1, t1, 0x00ff0000); |
| 1333 | tcg_gen_or_i64(t0, t0, t1); |
| 1334 | |
| 1335 | tcg_gen_shri_i64(t1, arg, 40); |
| 1336 | tcg_gen_andi_i64(t1, t1, 0x0000ff00); |
| 1337 | tcg_gen_or_i64(t0, t0, t1); |
| 1338 | |
| 1339 | tcg_gen_shri_i64(t1, arg, 56); |
| 1340 | tcg_gen_or_i64(ret, t0, t1); |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 1341 | tcg_temp_free(t0); |
| 1342 | tcg_temp_free(t1); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1343 | #endif |
| 1344 | } |
| 1345 | |
| 1346 | #endif |
| 1347 | |
pbrook | 390efc5 | 2008-05-11 14:35:37 +0000 | [diff] [blame] | 1348 | static inline void tcg_gen_neg_i32(TCGv ret, TCGv arg) |
| 1349 | { |
| 1350 | #ifdef TCG_TARGET_HAS_neg_i32 |
| 1351 | tcg_gen_op2(INDEX_op_neg_i32, ret, arg); |
| 1352 | #else |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 1353 | TCGv t0 = tcg_const_i32(0); |
| 1354 | tcg_gen_sub_i32(ret, t0, arg); |
| 1355 | tcg_temp_free(t0); |
pbrook | 390efc5 | 2008-05-11 14:35:37 +0000 | [diff] [blame] | 1356 | #endif |
| 1357 | } |
| 1358 | |
| 1359 | static inline void tcg_gen_neg_i64(TCGv ret, TCGv arg) |
| 1360 | { |
| 1361 | #ifdef TCG_TARGET_HAS_neg_i64 |
| 1362 | tcg_gen_op2(INDEX_op_neg_i64, ret, arg); |
| 1363 | #else |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 1364 | TCGv t0 = tcg_const_i64(0); |
| 1365 | tcg_gen_sub_i64(ret, t0, arg); |
| 1366 | tcg_temp_free(t0); |
pbrook | 390efc5 | 2008-05-11 14:35:37 +0000 | [diff] [blame] | 1367 | #endif |
| 1368 | } |
| 1369 | |
bellard | 0b6ce4c | 2008-05-17 12:40:44 +0000 | [diff] [blame] | 1370 | static inline void tcg_gen_not_i32(TCGv ret, TCGv arg) |
| 1371 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 1372 | tcg_gen_xori_i32(ret, arg, -1); |
bellard | 0b6ce4c | 2008-05-17 12:40:44 +0000 | [diff] [blame] | 1373 | } |
| 1374 | |
| 1375 | static inline void tcg_gen_not_i64(TCGv ret, TCGv arg) |
| 1376 | { |
bellard | e8996ee | 2008-05-23 17:33:39 +0000 | [diff] [blame] | 1377 | tcg_gen_xori_i64(ret, arg, -1); |
bellard | 0b6ce4c | 2008-05-17 12:40:44 +0000 | [diff] [blame] | 1378 | } |
bellard | 5ff9d6a | 2008-02-04 00:37:54 +0000 | [diff] [blame] | 1379 | |
| 1380 | static inline void tcg_gen_discard_i32(TCGv arg) |
| 1381 | { |
| 1382 | tcg_gen_op1(INDEX_op_discard, arg); |
| 1383 | } |
| 1384 | |
| 1385 | #if TCG_TARGET_REG_BITS == 32 |
| 1386 | static inline void tcg_gen_discard_i64(TCGv arg) |
| 1387 | { |
| 1388 | tcg_gen_discard_i32(arg); |
| 1389 | tcg_gen_discard_i32(TCGV_HIGH(arg)); |
| 1390 | } |
| 1391 | #else |
| 1392 | static inline void tcg_gen_discard_i64(TCGv arg) |
| 1393 | { |
| 1394 | tcg_gen_op1(INDEX_op_discard, arg); |
| 1395 | } |
| 1396 | #endif |
| 1397 | |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1398 | /***************************************/ |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1399 | /* QEMU specific operations. Their type depend on the QEMU CPU |
| 1400 | type. */ |
| 1401 | #ifndef TARGET_LONG_BITS |
| 1402 | #error must include QEMU headers |
| 1403 | #endif |
| 1404 | |
bellard | 7e4597d | 2008-05-22 16:56:05 +0000 | [diff] [blame] | 1405 | /* debug info: write the PC of the corresponding QEMU CPU instruction */ |
| 1406 | static inline void tcg_gen_debug_insn_start(uint64_t pc) |
| 1407 | { |
| 1408 | /* XXX: must really use a 32 bit size for TCGArg in all cases */ |
| 1409 | #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS |
pbrook | bcb0126 | 2008-05-24 02:24:25 +0000 | [diff] [blame] | 1410 | tcg_gen_op2ii(INDEX_op_debug_insn_start, |
| 1411 | (uint32_t)(pc), (uint32_t)(pc >> 32)); |
bellard | 7e4597d | 2008-05-22 16:56:05 +0000 | [diff] [blame] | 1412 | #else |
| 1413 | tcg_gen_op1i(INDEX_op_debug_insn_start, pc); |
| 1414 | #endif |
| 1415 | } |
| 1416 | |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1417 | static inline void tcg_gen_exit_tb(tcg_target_long val) |
| 1418 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1419 | tcg_gen_op1i(INDEX_op_exit_tb, val); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1420 | } |
| 1421 | |
| 1422 | static inline void tcg_gen_goto_tb(int idx) |
| 1423 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1424 | tcg_gen_op1i(INDEX_op_goto_tb, idx); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1425 | } |
| 1426 | |
| 1427 | #if TCG_TARGET_REG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1428 | static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1429 | { |
| 1430 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1431 | tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1432 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1433 | tcg_gen_op4i(INDEX_op_qemu_ld8u, ret, addr, TCGV_HIGH(addr), mem_index); |
| 1434 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1435 | #endif |
| 1436 | } |
| 1437 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1438 | static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1439 | { |
| 1440 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1441 | tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1442 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1443 | tcg_gen_op4i(INDEX_op_qemu_ld8s, ret, addr, TCGV_HIGH(addr), mem_index); |
pbrook | 21fc3cf | 2008-03-04 23:52:47 +0000 | [diff] [blame] | 1444 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1445 | #endif |
| 1446 | } |
| 1447 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1448 | static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1449 | { |
| 1450 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1451 | tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1452 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1453 | tcg_gen_op4i(INDEX_op_qemu_ld16u, ret, addr, TCGV_HIGH(addr), mem_index); |
| 1454 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1455 | #endif |
| 1456 | } |
| 1457 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1458 | static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1459 | { |
| 1460 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1461 | tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1462 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1463 | tcg_gen_op4i(INDEX_op_qemu_ld16s, ret, addr, TCGV_HIGH(addr), mem_index); |
pbrook | 21fc3cf | 2008-03-04 23:52:47 +0000 | [diff] [blame] | 1464 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1465 | #endif |
| 1466 | } |
| 1467 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1468 | static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1469 | { |
| 1470 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1471 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1472 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1473 | tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
| 1474 | tcg_gen_movi_i32(TCGV_HIGH(ret), 0); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1475 | #endif |
| 1476 | } |
| 1477 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1478 | static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1479 | { |
| 1480 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1481 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1482 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1483 | tcg_gen_op4i(INDEX_op_qemu_ld32u, ret, addr, TCGV_HIGH(addr), mem_index); |
| 1484 | tcg_gen_sari_i32(TCGV_HIGH(ret), ret, 31); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1485 | #endif |
| 1486 | } |
| 1487 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1488 | static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1489 | { |
| 1490 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1491 | tcg_gen_op4i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1492 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1493 | tcg_gen_op5i(INDEX_op_qemu_ld64, ret, TCGV_HIGH(ret), |
| 1494 | addr, TCGV_HIGH(addr), mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1495 | #endif |
| 1496 | } |
| 1497 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1498 | static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1499 | { |
| 1500 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1501 | tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1502 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1503 | tcg_gen_op4i(INDEX_op_qemu_st8, arg, addr, TCGV_HIGH(addr), mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1504 | #endif |
| 1505 | } |
| 1506 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1507 | static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1508 | { |
| 1509 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1510 | tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1511 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1512 | tcg_gen_op4i(INDEX_op_qemu_st16, arg, addr, TCGV_HIGH(addr), mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1513 | #endif |
| 1514 | } |
| 1515 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1516 | static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1517 | { |
| 1518 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1519 | tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1520 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1521 | tcg_gen_op4i(INDEX_op_qemu_st32, arg, addr, TCGV_HIGH(addr), mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1522 | #endif |
| 1523 | } |
| 1524 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1525 | static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1526 | { |
| 1527 | #if TARGET_LONG_BITS == 32 |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1528 | tcg_gen_op4i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1529 | #else |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1530 | tcg_gen_op5i(INDEX_op_qemu_st64, arg, TCGV_HIGH(arg), |
| 1531 | addr, TCGV_HIGH(addr), mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1532 | #endif |
| 1533 | } |
| 1534 | |
blueswir1 | 56b8f56 | 2008-02-25 18:29:19 +0000 | [diff] [blame] | 1535 | #define tcg_gen_ld_ptr tcg_gen_ld_i32 |
blueswir1 | a768e4b | 2008-03-16 19:16:37 +0000 | [diff] [blame] | 1536 | #define tcg_gen_discard_ptr tcg_gen_discard_i32 |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 1537 | |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1538 | #else /* TCG_TARGET_REG_BITS == 32 */ |
| 1539 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1540 | static inline void tcg_gen_qemu_ld8u(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1541 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1542 | tcg_gen_op3i(INDEX_op_qemu_ld8u, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1543 | } |
| 1544 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1545 | static inline void tcg_gen_qemu_ld8s(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1546 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1547 | tcg_gen_op3i(INDEX_op_qemu_ld8s, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1548 | } |
| 1549 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1550 | static inline void tcg_gen_qemu_ld16u(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1551 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1552 | tcg_gen_op3i(INDEX_op_qemu_ld16u, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1553 | } |
| 1554 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1555 | static inline void tcg_gen_qemu_ld16s(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1556 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1557 | tcg_gen_op3i(INDEX_op_qemu_ld16s, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1558 | } |
| 1559 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1560 | static inline void tcg_gen_qemu_ld32u(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1561 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1562 | tcg_gen_op3i(INDEX_op_qemu_ld32u, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1563 | } |
| 1564 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1565 | static inline void tcg_gen_qemu_ld32s(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1566 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1567 | tcg_gen_op3i(INDEX_op_qemu_ld32s, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1568 | } |
| 1569 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1570 | static inline void tcg_gen_qemu_ld64(TCGv ret, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1571 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1572 | tcg_gen_op3i(INDEX_op_qemu_ld64, ret, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1573 | } |
| 1574 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1575 | static inline void tcg_gen_qemu_st8(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1576 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1577 | tcg_gen_op3i(INDEX_op_qemu_st8, arg, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1578 | } |
| 1579 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1580 | static inline void tcg_gen_qemu_st16(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1581 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1582 | tcg_gen_op3i(INDEX_op_qemu_st16, arg, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1583 | } |
| 1584 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1585 | static inline void tcg_gen_qemu_st32(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1586 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1587 | tcg_gen_op3i(INDEX_op_qemu_st32, arg, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1588 | } |
| 1589 | |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1590 | static inline void tcg_gen_qemu_st64(TCGv arg, TCGv addr, int mem_index) |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1591 | { |
pbrook | ac56dd4 | 2008-02-03 19:56:33 +0000 | [diff] [blame] | 1592 | tcg_gen_op3i(INDEX_op_qemu_st64, arg, addr, mem_index); |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1593 | } |
| 1594 | |
blueswir1 | 56b8f56 | 2008-02-25 18:29:19 +0000 | [diff] [blame] | 1595 | #define tcg_gen_ld_ptr tcg_gen_ld_i64 |
blueswir1 | a768e4b | 2008-03-16 19:16:37 +0000 | [diff] [blame] | 1596 | #define tcg_gen_discard_ptr tcg_gen_discard_i64 |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 1597 | |
bellard | c896fe2 | 2008-02-01 10:05:41 +0000 | [diff] [blame] | 1598 | #endif /* TCG_TARGET_REG_BITS != 32 */ |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 1599 | |
| 1600 | #if TARGET_LONG_BITS == 64 |
| 1601 | #define TCG_TYPE_TL TCG_TYPE_I64 |
| 1602 | #define tcg_gen_movi_tl tcg_gen_movi_i64 |
| 1603 | #define tcg_gen_mov_tl tcg_gen_mov_i64 |
| 1604 | #define tcg_gen_ld8u_tl tcg_gen_ld8u_i64 |
| 1605 | #define tcg_gen_ld8s_tl tcg_gen_ld8s_i64 |
| 1606 | #define tcg_gen_ld16u_tl tcg_gen_ld16u_i64 |
| 1607 | #define tcg_gen_ld16s_tl tcg_gen_ld16s_i64 |
| 1608 | #define tcg_gen_ld32u_tl tcg_gen_ld32u_i64 |
| 1609 | #define tcg_gen_ld32s_tl tcg_gen_ld32s_i64 |
| 1610 | #define tcg_gen_ld_tl tcg_gen_ld_i64 |
| 1611 | #define tcg_gen_st8_tl tcg_gen_st8_i64 |
| 1612 | #define tcg_gen_st16_tl tcg_gen_st16_i64 |
| 1613 | #define tcg_gen_st32_tl tcg_gen_st32_i64 |
| 1614 | #define tcg_gen_st_tl tcg_gen_st_i64 |
| 1615 | #define tcg_gen_add_tl tcg_gen_add_i64 |
| 1616 | #define tcg_gen_addi_tl tcg_gen_addi_i64 |
| 1617 | #define tcg_gen_sub_tl tcg_gen_sub_i64 |
pbrook | 390efc5 | 2008-05-11 14:35:37 +0000 | [diff] [blame] | 1618 | #define tcg_gen_neg_tl tcg_gen_neg_i64 |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 1619 | #define tcg_gen_subi_tl tcg_gen_subi_i64 |
| 1620 | #define tcg_gen_and_tl tcg_gen_and_i64 |
| 1621 | #define tcg_gen_andi_tl tcg_gen_andi_i64 |
| 1622 | #define tcg_gen_or_tl tcg_gen_or_i64 |
| 1623 | #define tcg_gen_ori_tl tcg_gen_ori_i64 |
| 1624 | #define tcg_gen_xor_tl tcg_gen_xor_i64 |
| 1625 | #define tcg_gen_xori_tl tcg_gen_xori_i64 |
bellard | 0b6ce4c | 2008-05-17 12:40:44 +0000 | [diff] [blame] | 1626 | #define tcg_gen_not_tl tcg_gen_not_i64 |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 1627 | #define tcg_gen_shl_tl tcg_gen_shl_i64 |
| 1628 | #define tcg_gen_shli_tl tcg_gen_shli_i64 |
| 1629 | #define tcg_gen_shr_tl tcg_gen_shr_i64 |
| 1630 | #define tcg_gen_shri_tl tcg_gen_shri_i64 |
| 1631 | #define tcg_gen_sar_tl tcg_gen_sar_i64 |
| 1632 | #define tcg_gen_sari_tl tcg_gen_sari_i64 |
blueswir1 | 0cf767d | 2008-03-02 18:20:59 +0000 | [diff] [blame] | 1633 | #define tcg_gen_brcond_tl tcg_gen_brcond_i64 |
pbrook | cb63669 | 2008-05-24 02:22:00 +0000 | [diff] [blame] | 1634 | #define tcg_gen_brcondi_tl tcg_gen_brcondi_i64 |
ths | f730fd2 | 2008-05-04 08:14:08 +0000 | [diff] [blame] | 1635 | #define tcg_gen_mul_tl tcg_gen_mul_i64 |
| 1636 | #define tcg_gen_muli_tl tcg_gen_muli_i64 |
blueswir1 | a768e4b | 2008-03-16 19:16:37 +0000 | [diff] [blame] | 1637 | #define tcg_gen_discard_tl tcg_gen_discard_i64 |
blueswir1 | e429073 | 2008-03-22 08:39:04 +0000 | [diff] [blame] | 1638 | #define tcg_gen_trunc_tl_i32 tcg_gen_trunc_i64_i32 |
| 1639 | #define tcg_gen_trunc_i64_tl tcg_gen_mov_i64 |
| 1640 | #define tcg_gen_extu_i32_tl tcg_gen_extu_i32_i64 |
| 1641 | #define tcg_gen_ext_i32_tl tcg_gen_ext_i32_i64 |
| 1642 | #define tcg_gen_extu_tl_i64 tcg_gen_mov_i64 |
| 1643 | #define tcg_gen_ext_tl_i64 tcg_gen_mov_i64 |
bellard | 0b6ce4c | 2008-05-17 12:40:44 +0000 | [diff] [blame] | 1644 | #define tcg_gen_ext8u_tl tcg_gen_ext8u_i64 |
| 1645 | #define tcg_gen_ext8s_tl tcg_gen_ext8s_i64 |
| 1646 | #define tcg_gen_ext16u_tl tcg_gen_ext16u_i64 |
| 1647 | #define tcg_gen_ext16s_tl tcg_gen_ext16s_i64 |
| 1648 | #define tcg_gen_ext32u_tl tcg_gen_ext32u_i64 |
| 1649 | #define tcg_gen_ext32s_tl tcg_gen_ext32s_i64 |
blueswir1 | a98824a | 2008-03-13 20:46:42 +0000 | [diff] [blame] | 1650 | #define tcg_const_tl tcg_const_i64 |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 1651 | #else |
| 1652 | #define TCG_TYPE_TL TCG_TYPE_I32 |
| 1653 | #define tcg_gen_movi_tl tcg_gen_movi_i32 |
| 1654 | #define tcg_gen_mov_tl tcg_gen_mov_i32 |
| 1655 | #define tcg_gen_ld8u_tl tcg_gen_ld8u_i32 |
| 1656 | #define tcg_gen_ld8s_tl tcg_gen_ld8s_i32 |
| 1657 | #define tcg_gen_ld16u_tl tcg_gen_ld16u_i32 |
| 1658 | #define tcg_gen_ld16s_tl tcg_gen_ld16s_i32 |
| 1659 | #define tcg_gen_ld32u_tl tcg_gen_ld_i32 |
| 1660 | #define tcg_gen_ld32s_tl tcg_gen_ld_i32 |
| 1661 | #define tcg_gen_ld_tl tcg_gen_ld_i32 |
| 1662 | #define tcg_gen_st8_tl tcg_gen_st8_i32 |
| 1663 | #define tcg_gen_st16_tl tcg_gen_st16_i32 |
| 1664 | #define tcg_gen_st32_tl tcg_gen_st_i32 |
| 1665 | #define tcg_gen_st_tl tcg_gen_st_i32 |
| 1666 | #define tcg_gen_add_tl tcg_gen_add_i32 |
| 1667 | #define tcg_gen_addi_tl tcg_gen_addi_i32 |
| 1668 | #define tcg_gen_sub_tl tcg_gen_sub_i32 |
pbrook | 390efc5 | 2008-05-11 14:35:37 +0000 | [diff] [blame] | 1669 | #define tcg_gen_neg_tl tcg_gen_neg_i32 |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 1670 | #define tcg_gen_subi_tl tcg_gen_subi_i32 |
| 1671 | #define tcg_gen_and_tl tcg_gen_and_i32 |
| 1672 | #define tcg_gen_andi_tl tcg_gen_andi_i32 |
| 1673 | #define tcg_gen_or_tl tcg_gen_or_i32 |
| 1674 | #define tcg_gen_ori_tl tcg_gen_ori_i32 |
| 1675 | #define tcg_gen_xor_tl tcg_gen_xor_i32 |
| 1676 | #define tcg_gen_xori_tl tcg_gen_xori_i32 |
bellard | 0b6ce4c | 2008-05-17 12:40:44 +0000 | [diff] [blame] | 1677 | #define tcg_gen_not_tl tcg_gen_not_i32 |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 1678 | #define tcg_gen_shl_tl tcg_gen_shl_i32 |
| 1679 | #define tcg_gen_shli_tl tcg_gen_shli_i32 |
| 1680 | #define tcg_gen_shr_tl tcg_gen_shr_i32 |
| 1681 | #define tcg_gen_shri_tl tcg_gen_shri_i32 |
| 1682 | #define tcg_gen_sar_tl tcg_gen_sar_i32 |
| 1683 | #define tcg_gen_sari_tl tcg_gen_sari_i32 |
blueswir1 | 0cf767d | 2008-03-02 18:20:59 +0000 | [diff] [blame] | 1684 | #define tcg_gen_brcond_tl tcg_gen_brcond_i32 |
pbrook | cb63669 | 2008-05-24 02:22:00 +0000 | [diff] [blame] | 1685 | #define tcg_gen_brcondi_tl tcg_gen_brcondi_i32 |
ths | f730fd2 | 2008-05-04 08:14:08 +0000 | [diff] [blame] | 1686 | #define tcg_gen_mul_tl tcg_gen_mul_i32 |
| 1687 | #define tcg_gen_muli_tl tcg_gen_muli_i32 |
blueswir1 | a768e4b | 2008-03-16 19:16:37 +0000 | [diff] [blame] | 1688 | #define tcg_gen_discard_tl tcg_gen_discard_i32 |
blueswir1 | e429073 | 2008-03-22 08:39:04 +0000 | [diff] [blame] | 1689 | #define tcg_gen_trunc_tl_i32 tcg_gen_mov_i32 |
| 1690 | #define tcg_gen_trunc_i64_tl tcg_gen_trunc_i64_i32 |
| 1691 | #define tcg_gen_extu_i32_tl tcg_gen_mov_i32 |
| 1692 | #define tcg_gen_ext_i32_tl tcg_gen_mov_i32 |
| 1693 | #define tcg_gen_extu_tl_i64 tcg_gen_extu_i32_i64 |
| 1694 | #define tcg_gen_ext_tl_i64 tcg_gen_ext_i32_i64 |
bellard | 0b6ce4c | 2008-05-17 12:40:44 +0000 | [diff] [blame] | 1695 | #define tcg_gen_ext8u_tl tcg_gen_ext8u_i32 |
| 1696 | #define tcg_gen_ext8s_tl tcg_gen_ext8s_i32 |
| 1697 | #define tcg_gen_ext16u_tl tcg_gen_ext16u_i32 |
| 1698 | #define tcg_gen_ext16s_tl tcg_gen_ext16s_i32 |
| 1699 | #define tcg_gen_ext32u_tl tcg_gen_mov_i32 |
| 1700 | #define tcg_gen_ext32s_tl tcg_gen_mov_i32 |
blueswir1 | a98824a | 2008-03-13 20:46:42 +0000 | [diff] [blame] | 1701 | #define tcg_const_tl tcg_const_i32 |
blueswir1 | f8422f5 | 2008-02-24 07:45:43 +0000 | [diff] [blame] | 1702 | #endif |
pbrook | 6ddbc6e | 2008-03-31 03:46:33 +0000 | [diff] [blame] | 1703 | |
| 1704 | #if TCG_TARGET_REG_BITS == 32 |
ths | 48d38ca | 2008-05-18 22:50:49 +0000 | [diff] [blame] | 1705 | #define tcg_gen_add_ptr tcg_gen_add_i32 |
pbrook | 6ddbc6e | 2008-03-31 03:46:33 +0000 | [diff] [blame] | 1706 | #define tcg_gen_addi_ptr tcg_gen_addi_i32 |
ths | 48d38ca | 2008-05-18 22:50:49 +0000 | [diff] [blame] | 1707 | #define tcg_gen_ext_i32_ptr tcg_gen_mov_i32 |
pbrook | 6ddbc6e | 2008-03-31 03:46:33 +0000 | [diff] [blame] | 1708 | #else /* TCG_TARGET_REG_BITS == 32 */ |
ths | 48d38ca | 2008-05-18 22:50:49 +0000 | [diff] [blame] | 1709 | #define tcg_gen_add_ptr tcg_gen_add_i64 |
pbrook | 6ddbc6e | 2008-03-31 03:46:33 +0000 | [diff] [blame] | 1710 | #define tcg_gen_addi_ptr tcg_gen_addi_i64 |
ths | 48d38ca | 2008-05-18 22:50:49 +0000 | [diff] [blame] | 1711 | #define tcg_gen_ext_i32_ptr tcg_gen_ext_i32_i64 |
pbrook | 6ddbc6e | 2008-03-31 03:46:33 +0000 | [diff] [blame] | 1712 | #endif /* TCG_TARGET_REG_BITS != 32 */ |
| 1713 | |