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Paolo Bonzini78e87792016-10-06 16:12:11 +02001@node Implementation notes
2@appendix Implementation notes
bellarddebc7062006-04-30 21:58:41 +00003
4@menu
Paolo Bonzini77d47e12016-10-06 16:49:03 +02005* CPU emulation::
Igor Mammedov047f7032018-05-11 19:24:43 +02006* Managed start up options::
bellarddebc7062006-04-30 21:58:41 +00007@end menu
bellarddebc7062006-04-30 21:58:41 +00008
Paolo Bonzini77d47e12016-10-06 16:49:03 +02009@node CPU emulation
Paolo Bonzini78e87792016-10-06 16:12:11 +020010@section CPU emulation
bellard1f673132004-04-04 15:21:17 +000011
bellarddebc7062006-04-30 21:58:41 +000012@menu
Paolo Bonzini77d47e12016-10-06 16:49:03 +020013* x86:: x86 and x86-64 emulation
14* ARM:: ARM emulation
15* MIPS:: MIPS emulation
16* PPC:: PowerPC emulation
17* SPARC:: Sparc32 and Sparc64 emulation
18* Xtensa:: Xtensa emulation
bellarddebc7062006-04-30 21:58:41 +000019@end menu
20
Paolo Bonzini77d47e12016-10-06 16:49:03 +020021@node x86
Paolo Bonzini78e87792016-10-06 16:12:11 +020022@subsection x86 and x86-64 emulation
bellard1f673132004-04-04 15:21:17 +000023
24QEMU x86 target features:
25
ths5fafdf22007-09-16 21:08:06 +000026@itemize
bellard1f673132004-04-04 15:21:17 +000027
ths5fafdf22007-09-16 21:08:06 +000028@item The virtual x86 CPU supports 16 bit and 32 bit addressing with segmentation.
blueswir1998a0502008-10-09 18:52:04 +000029LDT/GDT and IDT are emulated. VM86 mode is also supported to run
30DOSEMU. There is some support for MMX/3DNow!, SSE, SSE2, SSE3, SSSE3,
31and SSE4 as well as x86-64 SVM.
bellard1f673132004-04-04 15:21:17 +000032
33@item Support of host page sizes bigger than 4KB in user mode emulation.
34
35@item QEMU can emulate itself on x86.
36
ths5fafdf22007-09-16 21:08:06 +000037@item An extensive Linux x86 CPU test program is included @file{tests/test-i386}.
bellard1f673132004-04-04 15:21:17 +000038It can be used to test other x86 virtual CPUs.
39
40@end itemize
41
42Current QEMU limitations:
43
ths5fafdf22007-09-16 21:08:06 +000044@itemize
bellard1f673132004-04-04 15:21:17 +000045
blueswir1998a0502008-10-09 18:52:04 +000046@item Limited x86-64 support.
bellard1f673132004-04-04 15:21:17 +000047
48@item IPC syscalls are missing.
49
ths5fafdf22007-09-16 21:08:06 +000050@item The x86 segment limits and access rights are not tested at every
bellard1f673132004-04-04 15:21:17 +000051memory access (yet). Hopefully, very few OSes seem to rely on that for
52normal use.
53
bellard1f673132004-04-04 15:21:17 +000054@end itemize
55
Paolo Bonzini77d47e12016-10-06 16:49:03 +020056@node ARM
Paolo Bonzini78e87792016-10-06 16:12:11 +020057@subsection ARM emulation
bellard1f673132004-04-04 15:21:17 +000058
59@itemize
60
61@item Full ARM 7 user emulation.
62
63@item NWFPE FPU support included in user Linux emulation.
64
65@item Can run most ARM Linux binaries.
66
67@end itemize
68
Paolo Bonzini77d47e12016-10-06 16:49:03 +020069@node MIPS
Paolo Bonzini78e87792016-10-06 16:12:11 +020070@subsection MIPS emulation
ths24d4de42007-07-11 10:24:28 +000071
72@itemize
73
74@item The system emulation allows full MIPS32/MIPS64 Release 2 emulation,
75including privileged instructions, FPU and MMU, in both little and big
76endian modes.
77
78@item The Linux userland emulation can run many 32 bit MIPS Linux binaries.
79
80@end itemize
81
82Current QEMU limitations:
83
84@itemize
85
86@item Self-modifying code is not always handled correctly.
87
88@item 64 bit userland emulation is not implemented.
89
90@item The system emulation is not complete enough to run real firmware.
91
thsb1f45232007-07-12 09:03:30 +000092@item The watchpoint debug facility is not implemented.
93
ths24d4de42007-07-11 10:24:28 +000094@end itemize
95
Paolo Bonzini77d47e12016-10-06 16:49:03 +020096@node PPC
Paolo Bonzini78e87792016-10-06 16:12:11 +020097@subsection PowerPC emulation
bellard1f673132004-04-04 15:21:17 +000098
99@itemize
100
ths5fafdf22007-09-16 21:08:06 +0000101@item Full PowerPC 32 bit emulation, including privileged instructions,
bellard1f673132004-04-04 15:21:17 +0000102FPU and MMU.
103
104@item Can run most PowerPC Linux binaries.
105
106@end itemize
107
Paolo Bonzini77d47e12016-10-06 16:49:03 +0200108@node SPARC
Paolo Bonzini78e87792016-10-06 16:12:11 +0200109@subsection Sparc32 and Sparc64 emulation
bellard1f673132004-04-04 15:21:17 +0000110
111@itemize
112
blueswir1f6b647c2007-04-05 18:40:23 +0000113@item Full SPARC V8 emulation, including privileged
bellard34751872005-07-02 14:31:34 +0000114instructions, FPU and MMU. SPARC V9 emulation includes most privileged
blueswir1a785e422007-10-20 08:09:05 +0000115and VIS instructions, FPU and I/D MMU. Alignment is fully enforced.
bellard1f673132004-04-04 15:21:17 +0000116
blueswir1a785e422007-10-20 08:09:05 +0000117@item Can run most 32-bit SPARC Linux binaries, SPARC32PLUS Linux binaries and
118some 64-bit SPARC Linux binaries.
bellard34751872005-07-02 14:31:34 +0000119
120@end itemize
121
122Current QEMU limitations:
123
ths5fafdf22007-09-16 21:08:06 +0000124@itemize
bellard34751872005-07-02 14:31:34 +0000125
bellard34751872005-07-02 14:31:34 +0000126@item IPC syscalls are missing.
127
blueswir11f587322007-11-25 18:40:20 +0000128@item Floating point exception support is buggy.
bellard34751872005-07-02 14:31:34 +0000129
130@item Atomic instructions are not correctly implemented.
131
blueswir1998a0502008-10-09 18:52:04 +0000132@item There are still some problems with Sparc64 emulators.
bellard1f673132004-04-04 15:21:17 +0000133
134@end itemize
135
Paolo Bonzini77d47e12016-10-06 16:49:03 +0200136@node Xtensa
Paolo Bonzini78e87792016-10-06 16:12:11 +0200137@subsection Xtensa emulation
Max Filippov3aeaea62011-10-10 14:48:23 +0400138
139@itemize
140
141@item Core Xtensa ISA emulation, including most options: code density,
142loop, extended L32R, 16- and 32-bit multiplication, 32-bit division,
Max Filippov044d0032012-11-29 19:53:20 +0400143MAC16, miscellaneous operations, boolean, FP coprocessor, coprocessor
144context, debug, multiprocessor synchronization,
Max Filippov3aeaea62011-10-10 14:48:23 +0400145conditional store, exceptions, relocatable vectors, unaligned exception,
146interrupts (including high priority and timer), hardware alignment,
147region protection, region translation, MMU, windowed registers, thread
148pointer, processor ID.
149
Max Filippov044d0032012-11-29 19:53:20 +0400150@item Not implemented options: data/instruction cache (including cache
151prefetch and locking), XLMI, processor interface. Also options not
152covered by the core ISA (e.g. FLIX, wide branches) are not implemented.
Max Filippov3aeaea62011-10-10 14:48:23 +0400153
154@item Can run most Xtensa Linux binaries.
155
156@item New core configuration that requires no additional instructions
157may be created from overlay with minimal amount of hand-written code.
158
159@end itemize
160
Igor Mammedov047f7032018-05-11 19:24:43 +0200161@node Managed start up options
162@section Managed start up options
163
164In system mode emulation, it's possible to create a VM in a paused state using
165the -S command line option. In this state the machine is completely initialized
166according to command line options and ready to execute VM code but VCPU threads
167are not executing any code. The VM state in this paused state depends on the way
168QEMU was started. It could be in:
169@table @asis
170@item initial state (after reset/power on state)
171@item with direct kernel loading, the initial state could be amended to execute
172code loaded by QEMU in the VM's RAM and with incoming migration
173@item with incoming migration, initial state will by amended with the migrated
174machine state after migration completes.
175@end table
176
177This paused state is typically used by users to query machine state and/or
178additionally configure the machine (by hotplugging devices) in runtime before
179allowing VM code to run.
180
181However, at the -S pause point, it's impossible to configure options that affect
Markus Armbruster361ac942018-07-05 11:14:02 +0200182initial VM creation (like: -smp/-m/-numa ...) or cold plug devices. The
183experimental --preconfig command line option allows pausing QEMU
184before the initial VM creation, in a ``preconfig'' state, where additional
Igor Mammedov047f7032018-05-11 19:24:43 +0200185queries and configuration can be performed via QMP before moving on to
186the resulting configuration startup. In the preconfig state, QEMU only allows
187a limited set of commands over the QMP monitor, where the commands do not
188depend on an initialized machine, including but not limited to:
189@table @asis
190@item qmp_capabilities
191@item query-qmp-schema
192@item query-commands
193@item query-status
Markus Armbruster361ac942018-07-05 11:14:02 +0200194@item x-exit-preconfig
Igor Mammedov047f7032018-05-11 19:24:43 +0200195@end table