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Fan Zhangdf75a4e2015-02-12 18:02:14 +01001/*
2 * s390 IPL device
3 *
Janosch Frankc3347ed2020-03-23 04:36:06 -04004 * Copyright 2015, 2020 IBM Corp.
Fan Zhangdf75a4e2015-02-12 18:02:14 +01005 * Author(s): Zhang Fan <bjfanzh@cn.ibm.com>
Janosch Frankc3347ed2020-03-23 04:36:06 -04006 * Janosch Frank <frankja@linux.ibm.com>
Fan Zhangdf75a4e2015-02-12 18:02:14 +01007 *
8 * This work is licensed under the terms of the GNU GPL, version 2 or (at
9 * your option) any later version. See the COPYING file in the top-level
10 * directory.
11 */
12
13#ifndef HW_S390_IPL_H
14#define HW_S390_IPL_H
15
David Hildenbranddb3b2562015-07-21 13:47:32 +020016#include "cpu.h"
Christian Borntraegerfbc13842020-04-06 06:01:58 -040017#include "exec/address-spaces.h"
Markus Armbrustera27bd6c2019-08-12 07:23:51 +020018#include "hw/qdev-core.h"
Eduardo Habkostdb1015e2020-09-03 16:43:22 -040019#include "qom/object.h"
David Hildenbranddb3b2562015-07-21 13:47:32 +020020
Janosch Frankc3347ed2020-03-23 04:36:06 -040021struct IPLBlockPVComp {
22 uint64_t tweak_pref;
23 uint64_t addr;
24 uint64_t size;
25} QEMU_PACKED;
26typedef struct IPLBlockPVComp IPLBlockPVComp;
27
28struct IPLBlockPV {
29 uint8_t reserved18[87]; /* 0x18 */
30 uint8_t version; /* 0x6f */
31 uint32_t reserved70; /* 0x70 */
32 uint32_t num_comp; /* 0x74 */
33 uint64_t pv_header_addr; /* 0x78 */
34 uint64_t pv_header_len; /* 0x80 */
Daniele Buonoa58cabd2020-11-05 17:19:00 -050035 struct IPLBlockPVComp components[0];
Janosch Frankc3347ed2020-03-23 04:36:06 -040036} QEMU_PACKED;
37typedef struct IPLBlockPV IPLBlockPV;
38
Alexander Yarygin04ca4b92015-07-13 15:04:36 +030039struct IplBlockCcw {
Collin L. Walling118ee802018-02-23 10:43:11 -050040 uint8_t reserved0[85];
Alexander Yarygin3041e3b2015-10-01 20:21:33 +030041 uint8_t ssid;
Alexander Yarygin04ca4b92015-07-13 15:04:36 +030042 uint16_t devno;
43 uint8_t vm_flags;
44 uint8_t reserved3[3];
45 uint32_t vm_parm_len;
46 uint8_t nss_name[8];
47 uint8_t vm_parm[64];
48 uint8_t reserved4[8];
49} QEMU_PACKED;
50typedef struct IplBlockCcw IplBlockCcw;
51
52struct IplBlockFcp {
53 uint8_t reserved1[305 - 1];
54 uint8_t opt;
55 uint8_t reserved2[3];
56 uint16_t reserved3;
57 uint16_t devno;
58 uint8_t reserved4[4];
59 uint64_t wwpn;
60 uint64_t lun;
61 uint32_t bootprog;
62 uint8_t reserved5[12];
63 uint64_t br_lba;
64 uint32_t scp_data_len;
65 uint8_t reserved6[260];
Daniele Buonoa58cabd2020-11-05 17:19:00 -050066 uint8_t scp_data[0];
Alexander Yarygin04ca4b92015-07-13 15:04:36 +030067} QEMU_PACKED;
68typedef struct IplBlockFcp IplBlockFcp;
69
Alexander Yarygine468b672016-06-09 15:54:10 +030070struct IplBlockQemuScsi {
71 uint32_t lun;
72 uint16_t target;
73 uint16_t channel;
74 uint8_t reserved0[77];
75 uint8_t ssid;
76 uint16_t devno;
77} QEMU_PACKED;
78typedef struct IplBlockQemuScsi IplBlockQemuScsi;
79
Farhan Alibd1badf2016-03-29 16:28:40 +020080#define DIAG308_FLAGS_LP_VALID 0x80
81
Alexander Yarygin04ca4b92015-07-13 15:04:36 +030082union IplParameterBlock {
83 struct {
84 uint32_t len;
85 uint8_t reserved0[3];
86 uint8_t version;
87 uint32_t blk0_len;
88 uint8_t pbt;
89 uint8_t flags;
90 uint16_t reserved01;
91 uint8_t loadparm[8];
92 union {
93 IplBlockCcw ccw;
94 IplBlockFcp fcp;
Janosch Frankc3347ed2020-03-23 04:36:06 -040095 IPLBlockPV pv;
Alexander Yarygine468b672016-06-09 15:54:10 +030096 IplBlockQemuScsi scsi;
Alexander Yarygin04ca4b92015-07-13 15:04:36 +030097 };
98 } QEMU_PACKED;
99 struct {
100 uint8_t reserved1[110];
101 uint16_t devno;
102 uint8_t reserved2[88];
103 uint8_t reserved_ext[4096 - 200];
104 } QEMU_PACKED;
105} QEMU_PACKED;
106typedef union IplParameterBlock IplParameterBlock;
Fan Zhangdf75a4e2015-02-12 18:02:14 +0100107
Farhan Alibd1badf2016-03-29 16:28:40 +0200108int s390_ipl_set_loadparm(uint8_t *loadparm);
David Hildenbrandfeacc6c2015-06-25 09:55:55 +0200109void s390_ipl_update_diag308(IplParameterBlock *iplb);
Janosch Frankc3347ed2020-03-23 04:36:06 -0400110int s390_ipl_prepare_pv_header(void);
111int s390_ipl_pv_unpack(void);
David Hildenbranddb3b2562015-07-21 13:47:32 +0200112void s390_ipl_prepare_cpu(S390CPU *cpu);
Fan Zhangdf75a4e2015-02-12 18:02:14 +0100113IplParameterBlock *s390_ipl_get_iplb(void);
Janosch Frankc3347ed2020-03-23 04:36:06 -0400114IplParameterBlock *s390_ipl_get_iplb_pv(void);
David Hildenbranda30fb812018-04-24 12:18:59 +0200115
116enum s390_reset {
117 /* default is a reset not triggered by a CPU e.g. issued by QMP */
118 S390_RESET_EXTERNAL = 0,
119 S390_RESET_REIPL,
120 S390_RESET_MODIFIED_CLEAR,
121 S390_RESET_LOAD_NORMAL,
Janosch Frankc3347ed2020-03-23 04:36:06 -0400122 S390_RESET_PV,
David Hildenbranda30fb812018-04-24 12:18:59 +0200123};
124void s390_ipl_reset_request(CPUState *cs, enum s390_reset reset_type);
125void s390_ipl_get_reset_request(CPUState **cs, enum s390_reset *reset_type);
126void s390_ipl_clear_reset_request(void);
Fan Zhangdf75a4e2015-02-12 18:02:14 +0100127
Collin L. Walling118ee802018-02-23 10:43:11 -0500128#define QIPL_ADDRESS 0xcc
129
Collin L. Walling26b2a2a2018-02-23 10:43:12 -0500130/* Boot Menu flags */
131#define QIPL_FLAG_BM_OPTS_CMD 0x80
Collin L. Walling53b310c2018-02-23 10:43:18 -0500132#define QIPL_FLAG_BM_OPTS_ZIPL 0x40
Collin L. Walling26b2a2a2018-02-23 10:43:12 -0500133
Collin L. Walling118ee802018-02-23 10:43:11 -0500134/*
135 * The QEMU IPL Parameters will be stored at absolute address
136 * 204 (0xcc) which means it is 32-bit word aligned but not
137 * double-word aligned.
138 * Placement of data fields in this area must account for
139 * their alignment needs. E.g., netboot_start_address must
140 * have an offset of 4 + n * 8 bytes within the struct in order
141 * to keep it double-word aligned.
142 * The total size of the struct must never exceed 28 bytes.
143 * This definition must be kept in sync with the defininition
144 * in pc-bios/s390-ccw/iplb.h.
145 */
146struct QemuIplParameters {
Collin L. Walling26b2a2a2018-02-23 10:43:12 -0500147 uint8_t qipl_flags;
148 uint8_t reserved1[3];
Collin L. Walling118ee802018-02-23 10:43:11 -0500149 uint64_t netboot_start_addr;
Collin L. Walling26b2a2a2018-02-23 10:43:12 -0500150 uint32_t boot_menu_timeout;
151 uint8_t reserved2[12];
Collin L. Walling118ee802018-02-23 10:43:11 -0500152} QEMU_PACKED;
153typedef struct QemuIplParameters QemuIplParameters;
154
David Hildenbrand04fccf12015-10-08 12:32:13 +0200155#define TYPE_S390_IPL "s390-ipl"
Eduardo Habkost80633962020-09-16 14:25:19 -0400156OBJECT_DECLARE_SIMPLE_TYPE(S390IPLState, S390_IPL)
David Hildenbrand04fccf12015-10-08 12:32:13 +0200157
158struct S390IPLState {
159 /*< private >*/
160 DeviceState parent_obj;
Thomas Huth3b8afb42018-09-27 10:23:33 +0200161 IplParameterBlock iplb;
Janosch Frankc3347ed2020-03-23 04:36:06 -0400162 IplParameterBlock iplb_pv;
Thomas Huth3b8afb42018-09-27 10:23:33 +0200163 QemuIplParameters qipl;
David Hildenbrand04fccf12015-10-08 12:32:13 +0200164 uint64_t start_addr;
David Hildenbrandbb099542016-06-09 15:36:41 +0200165 uint64_t compat_start_addr;
David Hildenbrand04fccf12015-10-08 12:32:13 +0200166 uint64_t bios_start_addr;
David Hildenbrandbb099542016-06-09 15:36:41 +0200167 uint64_t compat_bios_start_addr;
David Hildenbrand04fccf12015-10-08 12:32:13 +0200168 bool enforce_bios;
David Hildenbrand04fccf12015-10-08 12:32:13 +0200169 bool iplb_valid;
Janosch Frankc3347ed2020-03-23 04:36:06 -0400170 bool iplb_valid_pv;
Farhan Alif38b5b72016-10-20 17:59:20 -0400171 bool netboot;
David Hildenbranda30fb812018-04-24 12:18:59 +0200172 /* reset related properties don't have to be migrated or reset */
173 enum s390_reset reset_type;
174 int reset_cpu_index;
David Hildenbrand04fccf12015-10-08 12:32:13 +0200175
176 /*< public >*/
177 char *kernel;
178 char *initrd;
179 char *cmdline;
180 char *firmware;
Farhan Ali5f31ade2016-10-21 12:17:08 -0400181 char *netboot_fw;
David Hildenbrand04fccf12015-10-08 12:32:13 +0200182 uint8_t cssid;
183 uint8_t ssid;
184 uint16_t devno;
Alexander Yarygin04ca4b92015-07-13 15:04:36 +0300185 bool iplbext_migration;
David Hildenbrand04fccf12015-10-08 12:32:13 +0200186};
Thomas Huth3b8afb42018-09-27 10:23:33 +0200187QEMU_BUILD_BUG_MSG(offsetof(S390IPLState, iplb) & 3, "alignment of iplb wrong");
David Hildenbrand04fccf12015-10-08 12:32:13 +0200188
Janosch Frank9b39d292020-03-19 09:19:06 -0400189#define DIAG_308_RC_OK 0x0001
190#define DIAG_308_RC_NO_CONF 0x0102
191#define DIAG_308_RC_INVALID 0x0402
Janosch Frankc3347ed2020-03-23 04:36:06 -0400192#define DIAG_308_RC_NO_PV_CONF 0x0902
193#define DIAG_308_RC_INVAL_FOR_PV 0x0a02
Janosch Frank9b39d292020-03-19 09:19:06 -0400194
195#define DIAG308_RESET_MOD_CLR 0
196#define DIAG308_RESET_LOAD_NORM 1
197#define DIAG308_LOAD_CLEAR 3
198#define DIAG308_LOAD_NORMAL_DUMP 4
199#define DIAG308_SET 5
200#define DIAG308_STORE 6
Janosch Frankc3347ed2020-03-23 04:36:06 -0400201#define DIAG308_PV_SET 8
202#define DIAG308_PV_STORE 9
203#define DIAG308_PV_START 10
Janosch Frank9b39d292020-03-19 09:19:06 -0400204
Alexander Yarygin9946a912015-08-10 13:57:03 +0300205#define S390_IPL_TYPE_FCP 0x00
206#define S390_IPL_TYPE_CCW 0x02
Janosch Frankc3347ed2020-03-23 04:36:06 -0400207#define S390_IPL_TYPE_PV 0x05
Alexander Yarygine468b672016-06-09 15:54:10 +0300208#define S390_IPL_TYPE_QEMU_SCSI 0xff
Alexander Yarygin9946a912015-08-10 13:57:03 +0300209
Alexander Yarygin6aed9582015-07-21 14:10:39 +0300210#define S390_IPLB_HEADER_LEN 8
Janosch Frankc3347ed2020-03-23 04:36:06 -0400211#define S390_IPLB_MIN_PV_LEN 148
Alexander Yarygin04ca4b92015-07-13 15:04:36 +0300212#define S390_IPLB_MIN_CCW_LEN 200
Alexander Yarygin9946a912015-08-10 13:57:03 +0300213#define S390_IPLB_MIN_FCP_LEN 384
Alexander Yarygine468b672016-06-09 15:54:10 +0300214#define S390_IPLB_MIN_QEMU_SCSI_LEN 200
Alexander Yarygin9946a912015-08-10 13:57:03 +0300215
216static inline bool iplb_valid_len(IplParameterBlock *iplb)
217{
218 return be32_to_cpu(iplb->len) <= sizeof(IplParameterBlock);
219}
220
Janosch Frankc3347ed2020-03-23 04:36:06 -0400221static inline bool ipl_valid_pv_components(IplParameterBlock *iplb)
222{
223 IPLBlockPV *ipib_pv = &iplb->pv;
224 int i;
225
226 if (ipib_pv->num_comp == 0) {
227 return false;
228 }
229
230 for (i = 0; i < ipib_pv->num_comp; i++) {
231 /* Addr must be 4k aligned */
232 if (ipib_pv->components[i].addr & ~TARGET_PAGE_MASK) {
233 return false;
234 }
235
236 /* Tweak prefix is monotonically increasing with each component */
237 if (i < ipib_pv->num_comp - 1 &&
238 ipib_pv->components[i].tweak_pref >=
239 ipib_pv->components[i + 1].tweak_pref) {
240 return false;
241 }
242 }
243 return true;
244}
245
246static inline bool ipl_valid_pv_header(IplParameterBlock *iplb)
247{
248 IPLBlockPV *ipib_pv = &iplb->pv;
249
250 if (ipib_pv->pv_header_len > 2 * TARGET_PAGE_SIZE) {
251 return false;
252 }
253
254 if (!address_space_access_valid(&address_space_memory,
255 ipib_pv->pv_header_addr,
256 ipib_pv->pv_header_len,
257 false,
258 MEMTXATTRS_UNSPECIFIED)) {
259 return false;
260 }
261
262 return true;
263}
264
265static inline bool iplb_valid_pv(IplParameterBlock *iplb)
266{
267 if (iplb->pbt != S390_IPL_TYPE_PV ||
268 be32_to_cpu(iplb->len) < S390_IPLB_MIN_PV_LEN) {
269 return false;
270 }
271 if (!ipl_valid_pv_header(iplb)) {
272 return false;
273 }
274 return ipl_valid_pv_components(iplb);
275}
276
Janosch Frank94c21432020-03-10 05:09:50 -0400277static inline bool iplb_valid(IplParameterBlock *iplb)
Alexander Yarygin9946a912015-08-10 13:57:03 +0300278{
Janosch Frank94c21432020-03-10 05:09:50 -0400279 switch (iplb->pbt) {
280 case S390_IPL_TYPE_FCP:
281 return be32_to_cpu(iplb->len) >= S390_IPLB_MIN_FCP_LEN;
282 case S390_IPL_TYPE_CCW:
283 return be32_to_cpu(iplb->len) >= S390_IPLB_MIN_CCW_LEN;
284 default:
285 return false;
286 }
Alexander Yarygin9946a912015-08-10 13:57:03 +0300287}
Alexander Yarygin04ca4b92015-07-13 15:04:36 +0300288
Fan Zhangdf75a4e2015-02-12 18:02:14 +0100289#endif