bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1 | /* |
| 2 | * MMX/SSE/SSE2/PNI support |
| 3 | * |
| 4 | * Copyright (c) 2005 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
| 17 | * License along with this library; if not, write to the Free Software |
| 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 19 | */ |
| 20 | #if SHIFT == 0 |
| 21 | #define Reg MMXReg |
| 22 | #define XMM_ONLY(x...) |
| 23 | #define B(n) MMX_B(n) |
| 24 | #define W(n) MMX_W(n) |
| 25 | #define L(n) MMX_L(n) |
| 26 | #define Q(n) q |
| 27 | #define SUFFIX _mmx |
| 28 | #else |
| 29 | #define Reg XMMReg |
| 30 | #define XMM_ONLY(x...) x |
| 31 | #define B(n) XMM_B(n) |
| 32 | #define W(n) XMM_W(n) |
| 33 | #define L(n) XMM_L(n) |
| 34 | #define Q(n) XMM_Q(n) |
| 35 | #define SUFFIX _xmm |
| 36 | #endif |
| 37 | |
| 38 | void OPPROTO glue(op_psrlw, SUFFIX)(void) |
| 39 | { |
| 40 | Reg *d, *s; |
| 41 | int shift; |
| 42 | |
| 43 | d = (Reg *)((char *)env + PARAM1); |
| 44 | s = (Reg *)((char *)env + PARAM2); |
| 45 | |
| 46 | if (s->Q(0) > 15) { |
| 47 | d->Q(0) = 0; |
| 48 | #if SHIFT == 1 |
| 49 | d->Q(1) = 0; |
| 50 | #endif |
| 51 | } else { |
| 52 | shift = s->B(0); |
| 53 | d->W(0) >>= shift; |
| 54 | d->W(1) >>= shift; |
| 55 | d->W(2) >>= shift; |
| 56 | d->W(3) >>= shift; |
| 57 | #if SHIFT == 1 |
| 58 | d->W(4) >>= shift; |
| 59 | d->W(5) >>= shift; |
| 60 | d->W(6) >>= shift; |
| 61 | d->W(7) >>= shift; |
| 62 | #endif |
| 63 | } |
bellard | 0523c6b | 2005-01-23 20:46:31 +0000 | [diff] [blame] | 64 | FORCE_RET(); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 65 | } |
| 66 | |
| 67 | void OPPROTO glue(op_psraw, SUFFIX)(void) |
| 68 | { |
| 69 | Reg *d, *s; |
| 70 | int shift; |
| 71 | |
| 72 | d = (Reg *)((char *)env + PARAM1); |
| 73 | s = (Reg *)((char *)env + PARAM2); |
| 74 | |
| 75 | if (s->Q(0) > 15) { |
| 76 | shift = 15; |
| 77 | } else { |
| 78 | shift = s->B(0); |
| 79 | } |
| 80 | d->W(0) = (int16_t)d->W(0) >> shift; |
| 81 | d->W(1) = (int16_t)d->W(1) >> shift; |
| 82 | d->W(2) = (int16_t)d->W(2) >> shift; |
| 83 | d->W(3) = (int16_t)d->W(3) >> shift; |
| 84 | #if SHIFT == 1 |
| 85 | d->W(4) = (int16_t)d->W(4) >> shift; |
| 86 | d->W(5) = (int16_t)d->W(5) >> shift; |
| 87 | d->W(6) = (int16_t)d->W(6) >> shift; |
| 88 | d->W(7) = (int16_t)d->W(7) >> shift; |
| 89 | #endif |
| 90 | } |
| 91 | |
| 92 | void OPPROTO glue(op_psllw, SUFFIX)(void) |
| 93 | { |
| 94 | Reg *d, *s; |
| 95 | int shift; |
| 96 | |
| 97 | d = (Reg *)((char *)env + PARAM1); |
| 98 | s = (Reg *)((char *)env + PARAM2); |
| 99 | |
| 100 | if (s->Q(0) > 15) { |
| 101 | d->Q(0) = 0; |
| 102 | #if SHIFT == 1 |
| 103 | d->Q(1) = 0; |
| 104 | #endif |
| 105 | } else { |
| 106 | shift = s->B(0); |
| 107 | d->W(0) <<= shift; |
| 108 | d->W(1) <<= shift; |
| 109 | d->W(2) <<= shift; |
| 110 | d->W(3) <<= shift; |
| 111 | #if SHIFT == 1 |
| 112 | d->W(4) <<= shift; |
| 113 | d->W(5) <<= shift; |
| 114 | d->W(6) <<= shift; |
| 115 | d->W(7) <<= shift; |
| 116 | #endif |
| 117 | } |
bellard | 0523c6b | 2005-01-23 20:46:31 +0000 | [diff] [blame] | 118 | FORCE_RET(); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 119 | } |
| 120 | |
| 121 | void OPPROTO glue(op_psrld, SUFFIX)(void) |
| 122 | { |
| 123 | Reg *d, *s; |
| 124 | int shift; |
| 125 | |
| 126 | d = (Reg *)((char *)env + PARAM1); |
| 127 | s = (Reg *)((char *)env + PARAM2); |
| 128 | |
| 129 | if (s->Q(0) > 31) { |
| 130 | d->Q(0) = 0; |
| 131 | #if SHIFT == 1 |
| 132 | d->Q(1) = 0; |
| 133 | #endif |
| 134 | } else { |
| 135 | shift = s->B(0); |
| 136 | d->L(0) >>= shift; |
| 137 | d->L(1) >>= shift; |
| 138 | #if SHIFT == 1 |
| 139 | d->L(2) >>= shift; |
| 140 | d->L(3) >>= shift; |
| 141 | #endif |
| 142 | } |
bellard | 0523c6b | 2005-01-23 20:46:31 +0000 | [diff] [blame] | 143 | FORCE_RET(); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 144 | } |
| 145 | |
| 146 | void OPPROTO glue(op_psrad, SUFFIX)(void) |
| 147 | { |
| 148 | Reg *d, *s; |
| 149 | int shift; |
| 150 | |
| 151 | d = (Reg *)((char *)env + PARAM1); |
| 152 | s = (Reg *)((char *)env + PARAM2); |
| 153 | |
| 154 | if (s->Q(0) > 31) { |
| 155 | shift = 31; |
| 156 | } else { |
| 157 | shift = s->B(0); |
| 158 | } |
| 159 | d->L(0) = (int32_t)d->L(0) >> shift; |
| 160 | d->L(1) = (int32_t)d->L(1) >> shift; |
| 161 | #if SHIFT == 1 |
| 162 | d->L(2) = (int32_t)d->L(2) >> shift; |
| 163 | d->L(3) = (int32_t)d->L(3) >> shift; |
| 164 | #endif |
| 165 | } |
| 166 | |
| 167 | void OPPROTO glue(op_pslld, SUFFIX)(void) |
| 168 | { |
| 169 | Reg *d, *s; |
| 170 | int shift; |
| 171 | |
| 172 | d = (Reg *)((char *)env + PARAM1); |
| 173 | s = (Reg *)((char *)env + PARAM2); |
| 174 | |
| 175 | if (s->Q(0) > 31) { |
| 176 | d->Q(0) = 0; |
| 177 | #if SHIFT == 1 |
| 178 | d->Q(1) = 0; |
| 179 | #endif |
| 180 | } else { |
| 181 | shift = s->B(0); |
| 182 | d->L(0) <<= shift; |
| 183 | d->L(1) <<= shift; |
| 184 | #if SHIFT == 1 |
| 185 | d->L(2) <<= shift; |
| 186 | d->L(3) <<= shift; |
| 187 | #endif |
| 188 | } |
bellard | 0523c6b | 2005-01-23 20:46:31 +0000 | [diff] [blame] | 189 | FORCE_RET(); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 190 | } |
| 191 | |
| 192 | void OPPROTO glue(op_psrlq, SUFFIX)(void) |
| 193 | { |
| 194 | Reg *d, *s; |
| 195 | int shift; |
| 196 | |
| 197 | d = (Reg *)((char *)env + PARAM1); |
| 198 | s = (Reg *)((char *)env + PARAM2); |
| 199 | |
| 200 | if (s->Q(0) > 63) { |
| 201 | d->Q(0) = 0; |
| 202 | #if SHIFT == 1 |
| 203 | d->Q(1) = 0; |
| 204 | #endif |
| 205 | } else { |
| 206 | shift = s->B(0); |
| 207 | d->Q(0) >>= shift; |
| 208 | #if SHIFT == 1 |
| 209 | d->Q(1) >>= shift; |
| 210 | #endif |
| 211 | } |
bellard | 0523c6b | 2005-01-23 20:46:31 +0000 | [diff] [blame] | 212 | FORCE_RET(); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 213 | } |
| 214 | |
| 215 | void OPPROTO glue(op_psllq, SUFFIX)(void) |
| 216 | { |
| 217 | Reg *d, *s; |
| 218 | int shift; |
| 219 | |
| 220 | d = (Reg *)((char *)env + PARAM1); |
| 221 | s = (Reg *)((char *)env + PARAM2); |
| 222 | |
| 223 | if (s->Q(0) > 63) { |
| 224 | d->Q(0) = 0; |
| 225 | #if SHIFT == 1 |
| 226 | d->Q(1) = 0; |
| 227 | #endif |
| 228 | } else { |
| 229 | shift = s->B(0); |
| 230 | d->Q(0) <<= shift; |
| 231 | #if SHIFT == 1 |
| 232 | d->Q(1) <<= shift; |
| 233 | #endif |
| 234 | } |
bellard | 0523c6b | 2005-01-23 20:46:31 +0000 | [diff] [blame] | 235 | FORCE_RET(); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 236 | } |
| 237 | |
| 238 | #if SHIFT == 1 |
| 239 | void OPPROTO glue(op_psrldq, SUFFIX)(void) |
| 240 | { |
| 241 | Reg *d, *s; |
| 242 | int shift, i; |
| 243 | |
| 244 | d = (Reg *)((char *)env + PARAM1); |
| 245 | s = (Reg *)((char *)env + PARAM2); |
| 246 | shift = s->L(0); |
| 247 | if (shift > 16) |
| 248 | shift = 16; |
| 249 | for(i = 0; i < 16 - shift; i++) |
| 250 | d->B(i) = d->B(i + shift); |
| 251 | for(i = 16 - shift; i < 16; i++) |
| 252 | d->B(i) = 0; |
| 253 | FORCE_RET(); |
| 254 | } |
| 255 | |
| 256 | void OPPROTO glue(op_pslldq, SUFFIX)(void) |
| 257 | { |
| 258 | Reg *d, *s; |
| 259 | int shift, i; |
| 260 | |
| 261 | d = (Reg *)((char *)env + PARAM1); |
| 262 | s = (Reg *)((char *)env + PARAM2); |
| 263 | shift = s->L(0); |
| 264 | if (shift > 16) |
| 265 | shift = 16; |
| 266 | for(i = 15; i >= shift; i--) |
| 267 | d->B(i) = d->B(i - shift); |
| 268 | for(i = 0; i < shift; i++) |
| 269 | d->B(i) = 0; |
| 270 | FORCE_RET(); |
| 271 | } |
| 272 | #endif |
| 273 | |
| 274 | #define SSE_OP_B(name, F)\ |
| 275 | void OPPROTO glue(name, SUFFIX) (void)\ |
| 276 | {\ |
| 277 | Reg *d, *s;\ |
| 278 | d = (Reg *)((char *)env + PARAM1);\ |
| 279 | s = (Reg *)((char *)env + PARAM2);\ |
| 280 | d->B(0) = F(d->B(0), s->B(0));\ |
| 281 | d->B(1) = F(d->B(1), s->B(1));\ |
| 282 | d->B(2) = F(d->B(2), s->B(2));\ |
| 283 | d->B(3) = F(d->B(3), s->B(3));\ |
| 284 | d->B(4) = F(d->B(4), s->B(4));\ |
| 285 | d->B(5) = F(d->B(5), s->B(5));\ |
| 286 | d->B(6) = F(d->B(6), s->B(6));\ |
| 287 | d->B(7) = F(d->B(7), s->B(7));\ |
| 288 | XMM_ONLY(\ |
| 289 | d->B(8) = F(d->B(8), s->B(8));\ |
| 290 | d->B(9) = F(d->B(9), s->B(9));\ |
| 291 | d->B(10) = F(d->B(10), s->B(10));\ |
| 292 | d->B(11) = F(d->B(11), s->B(11));\ |
| 293 | d->B(12) = F(d->B(12), s->B(12));\ |
| 294 | d->B(13) = F(d->B(13), s->B(13));\ |
| 295 | d->B(14) = F(d->B(14), s->B(14));\ |
| 296 | d->B(15) = F(d->B(15), s->B(15));\ |
| 297 | )\ |
| 298 | } |
| 299 | |
| 300 | #define SSE_OP_W(name, F)\ |
| 301 | void OPPROTO glue(name, SUFFIX) (void)\ |
| 302 | {\ |
| 303 | Reg *d, *s;\ |
| 304 | d = (Reg *)((char *)env + PARAM1);\ |
| 305 | s = (Reg *)((char *)env + PARAM2);\ |
| 306 | d->W(0) = F(d->W(0), s->W(0));\ |
| 307 | d->W(1) = F(d->W(1), s->W(1));\ |
| 308 | d->W(2) = F(d->W(2), s->W(2));\ |
| 309 | d->W(3) = F(d->W(3), s->W(3));\ |
| 310 | XMM_ONLY(\ |
| 311 | d->W(4) = F(d->W(4), s->W(4));\ |
| 312 | d->W(5) = F(d->W(5), s->W(5));\ |
| 313 | d->W(6) = F(d->W(6), s->W(6));\ |
| 314 | d->W(7) = F(d->W(7), s->W(7));\ |
| 315 | )\ |
| 316 | } |
| 317 | |
| 318 | #define SSE_OP_L(name, F)\ |
| 319 | void OPPROTO glue(name, SUFFIX) (void)\ |
| 320 | {\ |
| 321 | Reg *d, *s;\ |
| 322 | d = (Reg *)((char *)env + PARAM1);\ |
| 323 | s = (Reg *)((char *)env + PARAM2);\ |
| 324 | d->L(0) = F(d->L(0), s->L(0));\ |
| 325 | d->L(1) = F(d->L(1), s->L(1));\ |
| 326 | XMM_ONLY(\ |
| 327 | d->L(2) = F(d->L(2), s->L(2));\ |
| 328 | d->L(3) = F(d->L(3), s->L(3));\ |
| 329 | )\ |
| 330 | } |
| 331 | |
| 332 | #define SSE_OP_Q(name, F)\ |
| 333 | void OPPROTO glue(name, SUFFIX) (void)\ |
| 334 | {\ |
| 335 | Reg *d, *s;\ |
| 336 | d = (Reg *)((char *)env + PARAM1);\ |
| 337 | s = (Reg *)((char *)env + PARAM2);\ |
| 338 | d->Q(0) = F(d->Q(0), s->Q(0));\ |
| 339 | XMM_ONLY(\ |
| 340 | d->Q(1) = F(d->Q(1), s->Q(1));\ |
| 341 | )\ |
| 342 | } |
| 343 | |
| 344 | #if SHIFT == 0 |
| 345 | static inline int satub(int x) |
| 346 | { |
| 347 | if (x < 0) |
| 348 | return 0; |
| 349 | else if (x > 255) |
| 350 | return 255; |
| 351 | else |
| 352 | return x; |
| 353 | } |
| 354 | |
| 355 | static inline int satuw(int x) |
| 356 | { |
| 357 | if (x < 0) |
| 358 | return 0; |
| 359 | else if (x > 65535) |
| 360 | return 65535; |
| 361 | else |
| 362 | return x; |
| 363 | } |
| 364 | |
| 365 | static inline int satsb(int x) |
| 366 | { |
| 367 | if (x < -128) |
| 368 | return -128; |
| 369 | else if (x > 127) |
| 370 | return 127; |
| 371 | else |
| 372 | return x; |
| 373 | } |
| 374 | |
| 375 | static inline int satsw(int x) |
| 376 | { |
| 377 | if (x < -32768) |
| 378 | return -32768; |
| 379 | else if (x > 32767) |
| 380 | return 32767; |
| 381 | else |
| 382 | return x; |
| 383 | } |
| 384 | |
| 385 | #define FADD(a, b) ((a) + (b)) |
| 386 | #define FADDUB(a, b) satub((a) + (b)) |
| 387 | #define FADDUW(a, b) satuw((a) + (b)) |
| 388 | #define FADDSB(a, b) satsb((int8_t)(a) + (int8_t)(b)) |
| 389 | #define FADDSW(a, b) satsw((int16_t)(a) + (int16_t)(b)) |
| 390 | |
| 391 | #define FSUB(a, b) ((a) - (b)) |
| 392 | #define FSUBUB(a, b) satub((a) - (b)) |
| 393 | #define FSUBUW(a, b) satuw((a) - (b)) |
| 394 | #define FSUBSB(a, b) satsb((int8_t)(a) - (int8_t)(b)) |
| 395 | #define FSUBSW(a, b) satsw((int16_t)(a) - (int16_t)(b)) |
| 396 | #define FMINUB(a, b) ((a) < (b)) ? (a) : (b) |
| 397 | #define FMINSW(a, b) ((int16_t)(a) < (int16_t)(b)) ? (a) : (b) |
| 398 | #define FMAXUB(a, b) ((a) > (b)) ? (a) : (b) |
| 399 | #define FMAXSW(a, b) ((int16_t)(a) > (int16_t)(b)) ? (a) : (b) |
| 400 | |
| 401 | #define FAND(a, b) (a) & (b) |
| 402 | #define FANDN(a, b) ((~(a)) & (b)) |
| 403 | #define FOR(a, b) (a) | (b) |
| 404 | #define FXOR(a, b) (a) ^ (b) |
| 405 | |
| 406 | #define FCMPGTB(a, b) (int8_t)(a) > (int8_t)(b) ? -1 : 0 |
| 407 | #define FCMPGTW(a, b) (int16_t)(a) > (int16_t)(b) ? -1 : 0 |
| 408 | #define FCMPGTL(a, b) (int32_t)(a) > (int32_t)(b) ? -1 : 0 |
| 409 | #define FCMPEQ(a, b) (a) == (b) ? -1 : 0 |
| 410 | |
| 411 | #define FMULLW(a, b) (a) * (b) |
| 412 | #define FMULHUW(a, b) (a) * (b) >> 16 |
| 413 | #define FMULHW(a, b) (int16_t)(a) * (int16_t)(b) >> 16 |
| 414 | |
| 415 | #define FAVG(a, b) ((a) + (b) + 1) >> 1 |
| 416 | #endif |
| 417 | |
| 418 | SSE_OP_B(op_paddb, FADD) |
| 419 | SSE_OP_W(op_paddw, FADD) |
| 420 | SSE_OP_L(op_paddl, FADD) |
| 421 | SSE_OP_Q(op_paddq, FADD) |
| 422 | |
| 423 | SSE_OP_B(op_psubb, FSUB) |
| 424 | SSE_OP_W(op_psubw, FSUB) |
| 425 | SSE_OP_L(op_psubl, FSUB) |
| 426 | SSE_OP_Q(op_psubq, FSUB) |
| 427 | |
| 428 | SSE_OP_B(op_paddusb, FADDUB) |
| 429 | SSE_OP_B(op_paddsb, FADDSB) |
| 430 | SSE_OP_B(op_psubusb, FSUBUB) |
| 431 | SSE_OP_B(op_psubsb, FSUBSB) |
| 432 | |
| 433 | SSE_OP_W(op_paddusw, FADDUW) |
| 434 | SSE_OP_W(op_paddsw, FADDSW) |
| 435 | SSE_OP_W(op_psubusw, FSUBUW) |
| 436 | SSE_OP_W(op_psubsw, FSUBSW) |
| 437 | |
| 438 | SSE_OP_B(op_pminub, FMINUB) |
| 439 | SSE_OP_B(op_pmaxub, FMAXUB) |
| 440 | |
| 441 | SSE_OP_W(op_pminsw, FMINSW) |
| 442 | SSE_OP_W(op_pmaxsw, FMAXSW) |
| 443 | |
| 444 | SSE_OP_Q(op_pand, FAND) |
| 445 | SSE_OP_Q(op_pandn, FANDN) |
| 446 | SSE_OP_Q(op_por, FOR) |
| 447 | SSE_OP_Q(op_pxor, FXOR) |
| 448 | |
| 449 | SSE_OP_B(op_pcmpgtb, FCMPGTB) |
| 450 | SSE_OP_W(op_pcmpgtw, FCMPGTW) |
| 451 | SSE_OP_L(op_pcmpgtl, FCMPGTL) |
| 452 | |
| 453 | SSE_OP_B(op_pcmpeqb, FCMPEQ) |
| 454 | SSE_OP_W(op_pcmpeqw, FCMPEQ) |
| 455 | SSE_OP_L(op_pcmpeql, FCMPEQ) |
| 456 | |
| 457 | SSE_OP_W(op_pmullw, FMULLW) |
| 458 | SSE_OP_W(op_pmulhuw, FMULHUW) |
| 459 | SSE_OP_W(op_pmulhw, FMULHW) |
| 460 | |
| 461 | SSE_OP_B(op_pavgb, FAVG) |
| 462 | SSE_OP_W(op_pavgw, FAVG) |
| 463 | |
| 464 | void OPPROTO glue(op_pmuludq, SUFFIX) (void) |
| 465 | { |
| 466 | Reg *d, *s; |
| 467 | d = (Reg *)((char *)env + PARAM1); |
| 468 | s = (Reg *)((char *)env + PARAM2); |
| 469 | |
| 470 | d->Q(0) = (uint64_t)s->L(0) * (uint64_t)d->L(0); |
| 471 | #if SHIFT == 1 |
| 472 | d->Q(1) = (uint64_t)s->L(2) * (uint64_t)d->L(2); |
| 473 | #endif |
| 474 | } |
| 475 | |
| 476 | void OPPROTO glue(op_pmaddwd, SUFFIX) (void) |
| 477 | { |
| 478 | int i; |
| 479 | Reg *d, *s; |
| 480 | d = (Reg *)((char *)env + PARAM1); |
| 481 | s = (Reg *)((char *)env + PARAM2); |
| 482 | |
| 483 | for(i = 0; i < (2 << SHIFT); i++) { |
| 484 | d->L(i) = (int16_t)s->W(2*i) * (int16_t)d->W(2*i) + |
| 485 | (int16_t)s->W(2*i+1) * (int16_t)d->W(2*i+1); |
| 486 | } |
bellard | 0523c6b | 2005-01-23 20:46:31 +0000 | [diff] [blame] | 487 | FORCE_RET(); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 488 | } |
| 489 | |
| 490 | #if SHIFT == 0 |
| 491 | static inline int abs1(int a) |
| 492 | { |
| 493 | if (a < 0) |
| 494 | return -a; |
| 495 | else |
| 496 | return a; |
| 497 | } |
| 498 | #endif |
| 499 | void OPPROTO glue(op_psadbw, SUFFIX) (void) |
| 500 | { |
| 501 | unsigned int val; |
| 502 | Reg *d, *s; |
| 503 | d = (Reg *)((char *)env + PARAM1); |
| 504 | s = (Reg *)((char *)env + PARAM2); |
| 505 | |
| 506 | val = 0; |
| 507 | val += abs1(d->B(0) - s->B(0)); |
| 508 | val += abs1(d->B(1) - s->B(1)); |
| 509 | val += abs1(d->B(2) - s->B(2)); |
| 510 | val += abs1(d->B(3) - s->B(3)); |
| 511 | val += abs1(d->B(4) - s->B(4)); |
| 512 | val += abs1(d->B(5) - s->B(5)); |
| 513 | val += abs1(d->B(6) - s->B(6)); |
| 514 | val += abs1(d->B(7) - s->B(7)); |
| 515 | d->Q(0) = val; |
| 516 | #if SHIFT == 1 |
| 517 | val = 0; |
| 518 | val += abs1(d->B(8) - s->B(8)); |
| 519 | val += abs1(d->B(9) - s->B(9)); |
| 520 | val += abs1(d->B(10) - s->B(10)); |
| 521 | val += abs1(d->B(11) - s->B(11)); |
| 522 | val += abs1(d->B(12) - s->B(12)); |
| 523 | val += abs1(d->B(13) - s->B(13)); |
| 524 | val += abs1(d->B(14) - s->B(14)); |
| 525 | val += abs1(d->B(15) - s->B(15)); |
| 526 | d->Q(1) = val; |
| 527 | #endif |
| 528 | } |
| 529 | |
| 530 | void OPPROTO glue(op_maskmov, SUFFIX) (void) |
| 531 | { |
| 532 | int i; |
| 533 | Reg *d, *s; |
| 534 | d = (Reg *)((char *)env + PARAM1); |
| 535 | s = (Reg *)((char *)env + PARAM2); |
| 536 | for(i = 0; i < (8 << SHIFT); i++) { |
| 537 | if (s->B(i) & 0x80) |
bellard | d52cf7a | 2005-01-16 01:07:28 +0000 | [diff] [blame] | 538 | stb(A0 + i, d->B(i)); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 539 | } |
bellard | 0523c6b | 2005-01-23 20:46:31 +0000 | [diff] [blame] | 540 | FORCE_RET(); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 541 | } |
| 542 | |
| 543 | void OPPROTO glue(op_movl_mm_T0, SUFFIX) (void) |
| 544 | { |
| 545 | Reg *d; |
| 546 | d = (Reg *)((char *)env + PARAM1); |
| 547 | d->L(0) = T0; |
| 548 | d->L(1) = 0; |
| 549 | #if SHIFT == 1 |
| 550 | d->Q(1) = 0; |
| 551 | #endif |
| 552 | } |
| 553 | |
| 554 | void OPPROTO glue(op_movl_T0_mm, SUFFIX) (void) |
| 555 | { |
| 556 | Reg *s; |
| 557 | s = (Reg *)((char *)env + PARAM1); |
| 558 | T0 = s->L(0); |
| 559 | } |
| 560 | |
bellard | dabd98d | 2007-01-16 19:28:58 +0000 | [diff] [blame] | 561 | #ifdef TARGET_X86_64 |
| 562 | void OPPROTO glue(op_movq_mm_T0, SUFFIX) (void) |
| 563 | { |
| 564 | Reg *d; |
| 565 | d = (Reg *)((char *)env + PARAM1); |
| 566 | d->Q(0) = T0; |
| 567 | #if SHIFT == 1 |
| 568 | d->Q(1) = 0; |
| 569 | #endif |
| 570 | } |
| 571 | |
| 572 | void OPPROTO glue(op_movq_T0_mm, SUFFIX) (void) |
| 573 | { |
| 574 | Reg *s; |
| 575 | s = (Reg *)((char *)env + PARAM1); |
| 576 | T0 = s->Q(0); |
| 577 | } |
| 578 | #endif |
| 579 | |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 580 | #if SHIFT == 0 |
| 581 | void OPPROTO glue(op_pshufw, SUFFIX) (void) |
| 582 | { |
| 583 | Reg r, *d, *s; |
| 584 | int order; |
| 585 | d = (Reg *)((char *)env + PARAM1); |
| 586 | s = (Reg *)((char *)env + PARAM2); |
| 587 | order = PARAM3; |
| 588 | r.W(0) = s->W(order & 3); |
| 589 | r.W(1) = s->W((order >> 2) & 3); |
| 590 | r.W(2) = s->W((order >> 4) & 3); |
| 591 | r.W(3) = s->W((order >> 6) & 3); |
| 592 | *d = r; |
| 593 | } |
| 594 | #else |
bellard | d52cf7a | 2005-01-16 01:07:28 +0000 | [diff] [blame] | 595 | void OPPROTO op_shufps(void) |
| 596 | { |
| 597 | Reg r, *d, *s; |
| 598 | int order; |
| 599 | d = (Reg *)((char *)env + PARAM1); |
| 600 | s = (Reg *)((char *)env + PARAM2); |
| 601 | order = PARAM3; |
| 602 | r.L(0) = d->L(order & 3); |
| 603 | r.L(1) = d->L((order >> 2) & 3); |
| 604 | r.L(2) = s->L((order >> 4) & 3); |
| 605 | r.L(3) = s->L((order >> 6) & 3); |
| 606 | *d = r; |
| 607 | } |
| 608 | |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 609 | void OPPROTO op_shufpd(void) |
| 610 | { |
| 611 | Reg r, *d, *s; |
| 612 | int order; |
| 613 | d = (Reg *)((char *)env + PARAM1); |
| 614 | s = (Reg *)((char *)env + PARAM2); |
| 615 | order = PARAM3; |
bellard | d52cf7a | 2005-01-16 01:07:28 +0000 | [diff] [blame] | 616 | r.Q(0) = d->Q(order & 1); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 617 | r.Q(1) = s->Q((order >> 1) & 1); |
| 618 | *d = r; |
| 619 | } |
| 620 | |
| 621 | void OPPROTO glue(op_pshufd, SUFFIX) (void) |
| 622 | { |
| 623 | Reg r, *d, *s; |
| 624 | int order; |
| 625 | d = (Reg *)((char *)env + PARAM1); |
| 626 | s = (Reg *)((char *)env + PARAM2); |
| 627 | order = PARAM3; |
| 628 | r.L(0) = s->L(order & 3); |
| 629 | r.L(1) = s->L((order >> 2) & 3); |
| 630 | r.L(2) = s->L((order >> 4) & 3); |
| 631 | r.L(3) = s->L((order >> 6) & 3); |
| 632 | *d = r; |
| 633 | } |
| 634 | |
| 635 | void OPPROTO glue(op_pshuflw, SUFFIX) (void) |
| 636 | { |
| 637 | Reg r, *d, *s; |
| 638 | int order; |
| 639 | d = (Reg *)((char *)env + PARAM1); |
| 640 | s = (Reg *)((char *)env + PARAM2); |
| 641 | order = PARAM3; |
| 642 | r.W(0) = s->W(order & 3); |
| 643 | r.W(1) = s->W((order >> 2) & 3); |
| 644 | r.W(2) = s->W((order >> 4) & 3); |
| 645 | r.W(3) = s->W((order >> 6) & 3); |
| 646 | r.Q(1) = s->Q(1); |
| 647 | *d = r; |
| 648 | } |
| 649 | |
| 650 | void OPPROTO glue(op_pshufhw, SUFFIX) (void) |
| 651 | { |
| 652 | Reg r, *d, *s; |
| 653 | int order; |
| 654 | d = (Reg *)((char *)env + PARAM1); |
| 655 | s = (Reg *)((char *)env + PARAM2); |
| 656 | order = PARAM3; |
| 657 | r.Q(0) = s->Q(0); |
| 658 | r.W(4) = s->W(4 + (order & 3)); |
| 659 | r.W(5) = s->W(4 + ((order >> 2) & 3)); |
| 660 | r.W(6) = s->W(4 + ((order >> 4) & 3)); |
| 661 | r.W(7) = s->W(4 + ((order >> 6) & 3)); |
| 662 | *d = r; |
| 663 | } |
| 664 | #endif |
| 665 | |
| 666 | #if SHIFT == 1 |
| 667 | /* FPU ops */ |
| 668 | /* XXX: not accurate */ |
| 669 | |
| 670 | #define SSE_OP_S(name, F)\ |
| 671 | void OPPROTO op_ ## name ## ps (void)\ |
| 672 | {\ |
| 673 | Reg *d, *s;\ |
| 674 | d = (Reg *)((char *)env + PARAM1);\ |
| 675 | s = (Reg *)((char *)env + PARAM2);\ |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 676 | d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0));\ |
| 677 | d->XMM_S(1) = F(32, d->XMM_S(1), s->XMM_S(1));\ |
| 678 | d->XMM_S(2) = F(32, d->XMM_S(2), s->XMM_S(2));\ |
| 679 | d->XMM_S(3) = F(32, d->XMM_S(3), s->XMM_S(3));\ |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 680 | }\ |
| 681 | \ |
| 682 | void OPPROTO op_ ## name ## ss (void)\ |
| 683 | {\ |
| 684 | Reg *d, *s;\ |
| 685 | d = (Reg *)((char *)env + PARAM1);\ |
| 686 | s = (Reg *)((char *)env + PARAM2);\ |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 687 | d->XMM_S(0) = F(32, d->XMM_S(0), s->XMM_S(0));\ |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 688 | }\ |
| 689 | void OPPROTO op_ ## name ## pd (void)\ |
| 690 | {\ |
| 691 | Reg *d, *s;\ |
| 692 | d = (Reg *)((char *)env + PARAM1);\ |
| 693 | s = (Reg *)((char *)env + PARAM2);\ |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 694 | d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0));\ |
| 695 | d->XMM_D(1) = F(64, d->XMM_D(1), s->XMM_D(1));\ |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 696 | }\ |
| 697 | \ |
| 698 | void OPPROTO op_ ## name ## sd (void)\ |
| 699 | {\ |
| 700 | Reg *d, *s;\ |
| 701 | d = (Reg *)((char *)env + PARAM1);\ |
| 702 | s = (Reg *)((char *)env + PARAM2);\ |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 703 | d->XMM_D(0) = F(64, d->XMM_D(0), s->XMM_D(0));\ |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 704 | } |
| 705 | |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 706 | #define FPU_ADD(size, a, b) float ## size ## _add(a, b, &env->sse_status) |
| 707 | #define FPU_SUB(size, a, b) float ## size ## _sub(a, b, &env->sse_status) |
| 708 | #define FPU_MUL(size, a, b) float ## size ## _mul(a, b, &env->sse_status) |
| 709 | #define FPU_DIV(size, a, b) float ## size ## _div(a, b, &env->sse_status) |
| 710 | #define FPU_MIN(size, a, b) (a) < (b) ? (a) : (b) |
| 711 | #define FPU_MAX(size, a, b) (a) > (b) ? (a) : (b) |
| 712 | #define FPU_SQRT(size, a, b) float ## size ## _sqrt(b, &env->sse_status) |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 713 | |
| 714 | SSE_OP_S(add, FPU_ADD) |
| 715 | SSE_OP_S(sub, FPU_SUB) |
| 716 | SSE_OP_S(mul, FPU_MUL) |
| 717 | SSE_OP_S(div, FPU_DIV) |
| 718 | SSE_OP_S(min, FPU_MIN) |
| 719 | SSE_OP_S(max, FPU_MAX) |
| 720 | SSE_OP_S(sqrt, FPU_SQRT) |
| 721 | |
| 722 | |
| 723 | /* float to float conversions */ |
| 724 | void OPPROTO op_cvtps2pd(void) |
| 725 | { |
bellard | 8422b11 | 2005-03-20 10:39:24 +0000 | [diff] [blame] | 726 | float32 s0, s1; |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 727 | Reg *d, *s; |
| 728 | d = (Reg *)((char *)env + PARAM1); |
| 729 | s = (Reg *)((char *)env + PARAM2); |
| 730 | s0 = s->XMM_S(0); |
| 731 | s1 = s->XMM_S(1); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 732 | d->XMM_D(0) = float32_to_float64(s0, &env->sse_status); |
| 733 | d->XMM_D(1) = float32_to_float64(s1, &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 734 | } |
| 735 | |
| 736 | void OPPROTO op_cvtpd2ps(void) |
| 737 | { |
| 738 | Reg *d, *s; |
| 739 | d = (Reg *)((char *)env + PARAM1); |
| 740 | s = (Reg *)((char *)env + PARAM2); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 741 | d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status); |
| 742 | d->XMM_S(1) = float64_to_float32(s->XMM_D(1), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 743 | d->Q(1) = 0; |
| 744 | } |
| 745 | |
| 746 | void OPPROTO op_cvtss2sd(void) |
| 747 | { |
| 748 | Reg *d, *s; |
| 749 | d = (Reg *)((char *)env + PARAM1); |
| 750 | s = (Reg *)((char *)env + PARAM2); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 751 | d->XMM_D(0) = float32_to_float64(s->XMM_S(0), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 752 | } |
| 753 | |
| 754 | void OPPROTO op_cvtsd2ss(void) |
| 755 | { |
| 756 | Reg *d, *s; |
| 757 | d = (Reg *)((char *)env + PARAM1); |
| 758 | s = (Reg *)((char *)env + PARAM2); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 759 | d->XMM_S(0) = float64_to_float32(s->XMM_D(0), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 760 | } |
| 761 | |
| 762 | /* integer to float */ |
| 763 | void OPPROTO op_cvtdq2ps(void) |
| 764 | { |
| 765 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 766 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 767 | d->XMM_S(0) = int32_to_float32(s->XMM_L(0), &env->sse_status); |
| 768 | d->XMM_S(1) = int32_to_float32(s->XMM_L(1), &env->sse_status); |
| 769 | d->XMM_S(2) = int32_to_float32(s->XMM_L(2), &env->sse_status); |
| 770 | d->XMM_S(3) = int32_to_float32(s->XMM_L(3), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 771 | } |
| 772 | |
| 773 | void OPPROTO op_cvtdq2pd(void) |
| 774 | { |
| 775 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 776 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
| 777 | int32_t l0, l1; |
| 778 | l0 = (int32_t)s->XMM_L(0); |
| 779 | l1 = (int32_t)s->XMM_L(1); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 780 | d->XMM_D(0) = int32_to_float64(l0, &env->sse_status); |
| 781 | d->XMM_D(1) = int32_to_float64(l1, &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 782 | } |
| 783 | |
| 784 | void OPPROTO op_cvtpi2ps(void) |
| 785 | { |
| 786 | XMMReg *d = (Reg *)((char *)env + PARAM1); |
| 787 | MMXReg *s = (MMXReg *)((char *)env + PARAM2); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 788 | d->XMM_S(0) = int32_to_float32(s->MMX_L(0), &env->sse_status); |
| 789 | d->XMM_S(1) = int32_to_float32(s->MMX_L(1), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 790 | } |
| 791 | |
| 792 | void OPPROTO op_cvtpi2pd(void) |
| 793 | { |
| 794 | XMMReg *d = (Reg *)((char *)env + PARAM1); |
| 795 | MMXReg *s = (MMXReg *)((char *)env + PARAM2); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 796 | d->XMM_D(0) = int32_to_float64(s->MMX_L(0), &env->sse_status); |
| 797 | d->XMM_D(1) = int32_to_float64(s->MMX_L(1), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 798 | } |
| 799 | |
| 800 | void OPPROTO op_cvtsi2ss(void) |
| 801 | { |
| 802 | XMMReg *d = (Reg *)((char *)env + PARAM1); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 803 | d->XMM_S(0) = int32_to_float32(T0, &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 804 | } |
| 805 | |
| 806 | void OPPROTO op_cvtsi2sd(void) |
| 807 | { |
| 808 | XMMReg *d = (Reg *)((char *)env + PARAM1); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 809 | d->XMM_D(0) = int32_to_float64(T0, &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 810 | } |
| 811 | |
| 812 | #ifdef TARGET_X86_64 |
| 813 | void OPPROTO op_cvtsq2ss(void) |
| 814 | { |
| 815 | XMMReg *d = (Reg *)((char *)env + PARAM1); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 816 | d->XMM_S(0) = int64_to_float32(T0, &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 817 | } |
| 818 | |
| 819 | void OPPROTO op_cvtsq2sd(void) |
| 820 | { |
| 821 | XMMReg *d = (Reg *)((char *)env + PARAM1); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 822 | d->XMM_D(0) = int64_to_float64(T0, &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 823 | } |
| 824 | #endif |
| 825 | |
| 826 | /* float to integer */ |
| 827 | void OPPROTO op_cvtps2dq(void) |
| 828 | { |
| 829 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 830 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 831 | d->XMM_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status); |
| 832 | d->XMM_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status); |
| 833 | d->XMM_L(2) = float32_to_int32(s->XMM_S(2), &env->sse_status); |
| 834 | d->XMM_L(3) = float32_to_int32(s->XMM_S(3), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 835 | } |
| 836 | |
| 837 | void OPPROTO op_cvtpd2dq(void) |
| 838 | { |
| 839 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 840 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 841 | d->XMM_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status); |
| 842 | d->XMM_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 843 | d->XMM_Q(1) = 0; |
| 844 | } |
| 845 | |
| 846 | void OPPROTO op_cvtps2pi(void) |
| 847 | { |
| 848 | MMXReg *d = (MMXReg *)((char *)env + PARAM1); |
| 849 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 850 | d->MMX_L(0) = float32_to_int32(s->XMM_S(0), &env->sse_status); |
| 851 | d->MMX_L(1) = float32_to_int32(s->XMM_S(1), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 852 | } |
| 853 | |
| 854 | void OPPROTO op_cvtpd2pi(void) |
| 855 | { |
| 856 | MMXReg *d = (MMXReg *)((char *)env + PARAM1); |
| 857 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 858 | d->MMX_L(0) = float64_to_int32(s->XMM_D(0), &env->sse_status); |
| 859 | d->MMX_L(1) = float64_to_int32(s->XMM_D(1), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 860 | } |
| 861 | |
| 862 | void OPPROTO op_cvtss2si(void) |
| 863 | { |
| 864 | XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 865 | T0 = float32_to_int32(s->XMM_S(0), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 866 | } |
| 867 | |
| 868 | void OPPROTO op_cvtsd2si(void) |
| 869 | { |
| 870 | XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 871 | T0 = float64_to_int32(s->XMM_D(0), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 872 | } |
| 873 | |
| 874 | #ifdef TARGET_X86_64 |
| 875 | void OPPROTO op_cvtss2sq(void) |
| 876 | { |
| 877 | XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 878 | T0 = float32_to_int64(s->XMM_S(0), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 879 | } |
| 880 | |
| 881 | void OPPROTO op_cvtsd2sq(void) |
| 882 | { |
| 883 | XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 884 | T0 = float64_to_int64(s->XMM_D(0), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 885 | } |
| 886 | #endif |
| 887 | |
| 888 | /* float to integer truncated */ |
| 889 | void OPPROTO op_cvttps2dq(void) |
| 890 | { |
| 891 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 892 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 893 | d->XMM_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status); |
| 894 | d->XMM_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status); |
| 895 | d->XMM_L(2) = float32_to_int32_round_to_zero(s->XMM_S(2), &env->sse_status); |
| 896 | d->XMM_L(3) = float32_to_int32_round_to_zero(s->XMM_S(3), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 897 | } |
| 898 | |
| 899 | void OPPROTO op_cvttpd2dq(void) |
| 900 | { |
| 901 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 902 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 903 | d->XMM_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status); |
| 904 | d->XMM_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 905 | d->XMM_Q(1) = 0; |
| 906 | } |
| 907 | |
| 908 | void OPPROTO op_cvttps2pi(void) |
| 909 | { |
| 910 | MMXReg *d = (MMXReg *)((char *)env + PARAM1); |
| 911 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 912 | d->MMX_L(0) = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status); |
| 913 | d->MMX_L(1) = float32_to_int32_round_to_zero(s->XMM_S(1), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 914 | } |
| 915 | |
| 916 | void OPPROTO op_cvttpd2pi(void) |
| 917 | { |
| 918 | MMXReg *d = (MMXReg *)((char *)env + PARAM1); |
| 919 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 920 | d->MMX_L(0) = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status); |
| 921 | d->MMX_L(1) = float64_to_int32_round_to_zero(s->XMM_D(1), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 922 | } |
| 923 | |
| 924 | void OPPROTO op_cvttss2si(void) |
| 925 | { |
| 926 | XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 927 | T0 = float32_to_int32_round_to_zero(s->XMM_S(0), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 928 | } |
| 929 | |
| 930 | void OPPROTO op_cvttsd2si(void) |
| 931 | { |
| 932 | XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 933 | T0 = float64_to_int32_round_to_zero(s->XMM_D(0), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 934 | } |
| 935 | |
| 936 | #ifdef TARGET_X86_64 |
| 937 | void OPPROTO op_cvttss2sq(void) |
| 938 | { |
| 939 | XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 940 | T0 = float32_to_int64_round_to_zero(s->XMM_S(0), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 941 | } |
| 942 | |
| 943 | void OPPROTO op_cvttsd2sq(void) |
| 944 | { |
| 945 | XMMReg *s = (XMMReg *)((char *)env + PARAM1); |
bellard | 7a0e1f4 | 2005-03-13 17:01:47 +0000 | [diff] [blame] | 946 | T0 = float64_to_int64_round_to_zero(s->XMM_D(0), &env->sse_status); |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 947 | } |
| 948 | #endif |
| 949 | |
| 950 | void OPPROTO op_rsqrtps(void) |
| 951 | { |
| 952 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 953 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
| 954 | d->XMM_S(0) = approx_rsqrt(s->XMM_S(0)); |
| 955 | d->XMM_S(1) = approx_rsqrt(s->XMM_S(1)); |
| 956 | d->XMM_S(2) = approx_rsqrt(s->XMM_S(2)); |
| 957 | d->XMM_S(3) = approx_rsqrt(s->XMM_S(3)); |
| 958 | } |
| 959 | |
| 960 | void OPPROTO op_rsqrtss(void) |
| 961 | { |
| 962 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 963 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
| 964 | d->XMM_S(0) = approx_rsqrt(s->XMM_S(0)); |
| 965 | } |
| 966 | |
| 967 | void OPPROTO op_rcpps(void) |
| 968 | { |
| 969 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 970 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
| 971 | d->XMM_S(0) = approx_rcp(s->XMM_S(0)); |
| 972 | d->XMM_S(1) = approx_rcp(s->XMM_S(1)); |
| 973 | d->XMM_S(2) = approx_rcp(s->XMM_S(2)); |
| 974 | d->XMM_S(3) = approx_rcp(s->XMM_S(3)); |
| 975 | } |
| 976 | |
| 977 | void OPPROTO op_rcpss(void) |
| 978 | { |
| 979 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 980 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
| 981 | d->XMM_S(0) = approx_rcp(s->XMM_S(0)); |
| 982 | } |
| 983 | |
| 984 | void OPPROTO op_haddps(void) |
| 985 | { |
| 986 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 987 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
| 988 | XMMReg r; |
| 989 | r.XMM_S(0) = d->XMM_S(0) + d->XMM_S(1); |
| 990 | r.XMM_S(1) = d->XMM_S(2) + d->XMM_S(3); |
| 991 | r.XMM_S(2) = s->XMM_S(0) + s->XMM_S(1); |
| 992 | r.XMM_S(3) = s->XMM_S(2) + s->XMM_S(3); |
| 993 | *d = r; |
| 994 | } |
| 995 | |
| 996 | void OPPROTO op_haddpd(void) |
| 997 | { |
| 998 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 999 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
| 1000 | XMMReg r; |
| 1001 | r.XMM_D(0) = d->XMM_D(0) + d->XMM_D(1); |
| 1002 | r.XMM_D(1) = s->XMM_D(0) + s->XMM_D(1); |
| 1003 | *d = r; |
| 1004 | } |
| 1005 | |
| 1006 | void OPPROTO op_hsubps(void) |
| 1007 | { |
| 1008 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 1009 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
| 1010 | XMMReg r; |
| 1011 | r.XMM_S(0) = d->XMM_S(0) - d->XMM_S(1); |
| 1012 | r.XMM_S(1) = d->XMM_S(2) - d->XMM_S(3); |
| 1013 | r.XMM_S(2) = s->XMM_S(0) - s->XMM_S(1); |
| 1014 | r.XMM_S(3) = s->XMM_S(2) - s->XMM_S(3); |
| 1015 | *d = r; |
| 1016 | } |
| 1017 | |
| 1018 | void OPPROTO op_hsubpd(void) |
| 1019 | { |
| 1020 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 1021 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
| 1022 | XMMReg r; |
| 1023 | r.XMM_D(0) = d->XMM_D(0) - d->XMM_D(1); |
| 1024 | r.XMM_D(1) = s->XMM_D(0) - s->XMM_D(1); |
| 1025 | *d = r; |
| 1026 | } |
| 1027 | |
| 1028 | void OPPROTO op_addsubps(void) |
| 1029 | { |
| 1030 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 1031 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
| 1032 | d->XMM_S(0) = d->XMM_S(0) - s->XMM_S(0); |
| 1033 | d->XMM_S(1) = d->XMM_S(1) + s->XMM_S(1); |
| 1034 | d->XMM_S(2) = d->XMM_S(2) - s->XMM_S(2); |
| 1035 | d->XMM_S(3) = d->XMM_S(3) + s->XMM_S(3); |
| 1036 | } |
| 1037 | |
| 1038 | void OPPROTO op_addsubpd(void) |
| 1039 | { |
| 1040 | XMMReg *d = (XMMReg *)((char *)env + PARAM1); |
| 1041 | XMMReg *s = (XMMReg *)((char *)env + PARAM2); |
| 1042 | d->XMM_D(0) = d->XMM_D(0) - s->XMM_D(0); |
| 1043 | d->XMM_D(1) = d->XMM_D(1) + s->XMM_D(1); |
| 1044 | } |
| 1045 | |
| 1046 | /* XXX: unordered */ |
| 1047 | #define SSE_OP_CMP(name, F)\ |
| 1048 | void OPPROTO op_ ## name ## ps (void)\ |
| 1049 | {\ |
| 1050 | Reg *d, *s;\ |
| 1051 | d = (Reg *)((char *)env + PARAM1);\ |
| 1052 | s = (Reg *)((char *)env + PARAM2);\ |
bellard | 8422b11 | 2005-03-20 10:39:24 +0000 | [diff] [blame] | 1053 | d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0));\ |
| 1054 | d->XMM_L(1) = F(32, d->XMM_S(1), s->XMM_S(1));\ |
| 1055 | d->XMM_L(2) = F(32, d->XMM_S(2), s->XMM_S(2));\ |
| 1056 | d->XMM_L(3) = F(32, d->XMM_S(3), s->XMM_S(3));\ |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1057 | }\ |
| 1058 | \ |
| 1059 | void OPPROTO op_ ## name ## ss (void)\ |
| 1060 | {\ |
| 1061 | Reg *d, *s;\ |
| 1062 | d = (Reg *)((char *)env + PARAM1);\ |
| 1063 | s = (Reg *)((char *)env + PARAM2);\ |
bellard | 8422b11 | 2005-03-20 10:39:24 +0000 | [diff] [blame] | 1064 | d->XMM_L(0) = F(32, d->XMM_S(0), s->XMM_S(0));\ |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1065 | }\ |
| 1066 | void OPPROTO op_ ## name ## pd (void)\ |
| 1067 | {\ |
| 1068 | Reg *d, *s;\ |
| 1069 | d = (Reg *)((char *)env + PARAM1);\ |
| 1070 | s = (Reg *)((char *)env + PARAM2);\ |
bellard | 8422b11 | 2005-03-20 10:39:24 +0000 | [diff] [blame] | 1071 | d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0));\ |
| 1072 | d->XMM_Q(1) = F(64, d->XMM_D(1), s->XMM_D(1));\ |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1073 | }\ |
| 1074 | \ |
| 1075 | void OPPROTO op_ ## name ## sd (void)\ |
| 1076 | {\ |
| 1077 | Reg *d, *s;\ |
| 1078 | d = (Reg *)((char *)env + PARAM1);\ |
| 1079 | s = (Reg *)((char *)env + PARAM2);\ |
bellard | 8422b11 | 2005-03-20 10:39:24 +0000 | [diff] [blame] | 1080 | d->XMM_Q(0) = F(64, d->XMM_D(0), s->XMM_D(0));\ |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1081 | } |
| 1082 | |
bellard | 8422b11 | 2005-03-20 10:39:24 +0000 | [diff] [blame] | 1083 | #define FPU_CMPEQ(size, a, b) float ## size ## _eq(a, b, &env->sse_status) ? -1 : 0 |
| 1084 | #define FPU_CMPLT(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? -1 : 0 |
| 1085 | #define FPU_CMPLE(size, a, b) float ## size ## _le(a, b, &env->sse_status) ? -1 : 0 |
| 1086 | #define FPU_CMPUNORD(size, a, b) float ## size ## _unordered(a, b, &env->sse_status) ? - 1 : 0 |
| 1087 | #define FPU_CMPNEQ(size, a, b) float ## size ## _eq(a, b, &env->sse_status) ? 0 : -1 |
| 1088 | #define FPU_CMPNLT(size, a, b) float ## size ## _lt(a, b, &env->sse_status) ? 0 : -1 |
| 1089 | #define FPU_CMPNLE(size, a, b) float ## size ## _le(a, b, &env->sse_status) ? 0 : -1 |
| 1090 | #define FPU_CMPORD(size, a, b) float ## size ## _unordered(a, b, &env->sse_status) ? 0 : -1 |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1091 | |
| 1092 | SSE_OP_CMP(cmpeq, FPU_CMPEQ) |
| 1093 | SSE_OP_CMP(cmplt, FPU_CMPLT) |
| 1094 | SSE_OP_CMP(cmple, FPU_CMPLE) |
| 1095 | SSE_OP_CMP(cmpunord, FPU_CMPUNORD) |
| 1096 | SSE_OP_CMP(cmpneq, FPU_CMPNEQ) |
| 1097 | SSE_OP_CMP(cmpnlt, FPU_CMPNLT) |
| 1098 | SSE_OP_CMP(cmpnle, FPU_CMPNLE) |
| 1099 | SSE_OP_CMP(cmpord, FPU_CMPORD) |
| 1100 | |
bellard | 43fb823 | 2005-04-26 20:38:17 +0000 | [diff] [blame] | 1101 | const int comis_eflags[4] = {CC_C, CC_Z, 0, CC_Z | CC_P | CC_C}; |
| 1102 | |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1103 | void OPPROTO op_ucomiss(void) |
| 1104 | { |
bellard | 43fb823 | 2005-04-26 20:38:17 +0000 | [diff] [blame] | 1105 | int ret; |
bellard | 8422b11 | 2005-03-20 10:39:24 +0000 | [diff] [blame] | 1106 | float32 s0, s1; |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1107 | Reg *d, *s; |
| 1108 | d = (Reg *)((char *)env + PARAM1); |
| 1109 | s = (Reg *)((char *)env + PARAM2); |
| 1110 | |
| 1111 | s0 = d->XMM_S(0); |
| 1112 | s1 = s->XMM_S(0); |
bellard | 43fb823 | 2005-04-26 20:38:17 +0000 | [diff] [blame] | 1113 | ret = float32_compare_quiet(s0, s1, &env->sse_status); |
| 1114 | CC_SRC = comis_eflags[ret + 1]; |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1115 | FORCE_RET(); |
| 1116 | } |
| 1117 | |
| 1118 | void OPPROTO op_comiss(void) |
| 1119 | { |
bellard | 43fb823 | 2005-04-26 20:38:17 +0000 | [diff] [blame] | 1120 | int ret; |
bellard | 8422b11 | 2005-03-20 10:39:24 +0000 | [diff] [blame] | 1121 | float32 s0, s1; |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1122 | Reg *d, *s; |
| 1123 | d = (Reg *)((char *)env + PARAM1); |
| 1124 | s = (Reg *)((char *)env + PARAM2); |
| 1125 | |
| 1126 | s0 = d->XMM_S(0); |
| 1127 | s1 = s->XMM_S(0); |
bellard | 43fb823 | 2005-04-26 20:38:17 +0000 | [diff] [blame] | 1128 | ret = float32_compare(s0, s1, &env->sse_status); |
| 1129 | CC_SRC = comis_eflags[ret + 1]; |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1130 | FORCE_RET(); |
| 1131 | } |
| 1132 | |
| 1133 | void OPPROTO op_ucomisd(void) |
| 1134 | { |
bellard | 43fb823 | 2005-04-26 20:38:17 +0000 | [diff] [blame] | 1135 | int ret; |
bellard | 8422b11 | 2005-03-20 10:39:24 +0000 | [diff] [blame] | 1136 | float64 d0, d1; |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1137 | Reg *d, *s; |
| 1138 | d = (Reg *)((char *)env + PARAM1); |
| 1139 | s = (Reg *)((char *)env + PARAM2); |
| 1140 | |
| 1141 | d0 = d->XMM_D(0); |
| 1142 | d1 = s->XMM_D(0); |
bellard | 43fb823 | 2005-04-26 20:38:17 +0000 | [diff] [blame] | 1143 | ret = float64_compare_quiet(d0, d1, &env->sse_status); |
| 1144 | CC_SRC = comis_eflags[ret + 1]; |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1145 | FORCE_RET(); |
| 1146 | } |
| 1147 | |
| 1148 | void OPPROTO op_comisd(void) |
| 1149 | { |
bellard | 43fb823 | 2005-04-26 20:38:17 +0000 | [diff] [blame] | 1150 | int ret; |
bellard | 8422b11 | 2005-03-20 10:39:24 +0000 | [diff] [blame] | 1151 | float64 d0, d1; |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1152 | Reg *d, *s; |
| 1153 | d = (Reg *)((char *)env + PARAM1); |
| 1154 | s = (Reg *)((char *)env + PARAM2); |
| 1155 | |
| 1156 | d0 = d->XMM_D(0); |
| 1157 | d1 = s->XMM_D(0); |
bellard | 43fb823 | 2005-04-26 20:38:17 +0000 | [diff] [blame] | 1158 | ret = float64_compare(d0, d1, &env->sse_status); |
| 1159 | CC_SRC = comis_eflags[ret + 1]; |
bellard | 664e0f1 | 2005-01-08 18:58:29 +0000 | [diff] [blame] | 1160 | FORCE_RET(); |
| 1161 | } |
| 1162 | |
| 1163 | void OPPROTO op_movmskps(void) |
| 1164 | { |
| 1165 | int b0, b1, b2, b3; |
| 1166 | Reg *s; |
| 1167 | s = (Reg *)((char *)env + PARAM1); |
| 1168 | b0 = s->XMM_L(0) >> 31; |
| 1169 | b1 = s->XMM_L(1) >> 31; |
| 1170 | b2 = s->XMM_L(2) >> 31; |
| 1171 | b3 = s->XMM_L(3) >> 31; |
| 1172 | T0 = b0 | (b1 << 1) | (b2 << 2) | (b3 << 3); |
| 1173 | } |
| 1174 | |
| 1175 | void OPPROTO op_movmskpd(void) |
| 1176 | { |
| 1177 | int b0, b1; |
| 1178 | Reg *s; |
| 1179 | s = (Reg *)((char *)env + PARAM1); |
| 1180 | b0 = s->XMM_L(1) >> 31; |
| 1181 | b1 = s->XMM_L(3) >> 31; |
| 1182 | T0 = b0 | (b1 << 1); |
| 1183 | } |
| 1184 | |
| 1185 | #endif |
| 1186 | |
| 1187 | void OPPROTO glue(op_pmovmskb, SUFFIX)(void) |
| 1188 | { |
| 1189 | Reg *s; |
| 1190 | s = (Reg *)((char *)env + PARAM1); |
| 1191 | T0 = 0; |
| 1192 | T0 |= (s->XMM_B(0) >> 7); |
| 1193 | T0 |= (s->XMM_B(1) >> 6) & 0x02; |
| 1194 | T0 |= (s->XMM_B(2) >> 5) & 0x04; |
| 1195 | T0 |= (s->XMM_B(3) >> 4) & 0x08; |
| 1196 | T0 |= (s->XMM_B(4) >> 3) & 0x10; |
| 1197 | T0 |= (s->XMM_B(5) >> 2) & 0x20; |
| 1198 | T0 |= (s->XMM_B(6) >> 1) & 0x40; |
| 1199 | T0 |= (s->XMM_B(7)) & 0x80; |
| 1200 | #if SHIFT == 1 |
| 1201 | T0 |= (s->XMM_B(8) << 1) & 0x0100; |
| 1202 | T0 |= (s->XMM_B(9) << 2) & 0x0200; |
| 1203 | T0 |= (s->XMM_B(10) << 3) & 0x0400; |
| 1204 | T0 |= (s->XMM_B(11) << 4) & 0x0800; |
| 1205 | T0 |= (s->XMM_B(12) << 5) & 0x1000; |
| 1206 | T0 |= (s->XMM_B(13) << 6) & 0x2000; |
| 1207 | T0 |= (s->XMM_B(14) << 7) & 0x4000; |
| 1208 | T0 |= (s->XMM_B(15) << 8) & 0x8000; |
| 1209 | #endif |
| 1210 | } |
| 1211 | |
| 1212 | void OPPROTO glue(op_pinsrw, SUFFIX) (void) |
| 1213 | { |
| 1214 | Reg *d = (Reg *)((char *)env + PARAM1); |
| 1215 | int pos = PARAM2; |
| 1216 | |
| 1217 | d->W(pos) = T0; |
| 1218 | } |
| 1219 | |
| 1220 | void OPPROTO glue(op_pextrw, SUFFIX) (void) |
| 1221 | { |
| 1222 | Reg *s = (Reg *)((char *)env + PARAM1); |
| 1223 | int pos = PARAM2; |
| 1224 | |
| 1225 | T0 = s->W(pos); |
| 1226 | } |
| 1227 | |
| 1228 | void OPPROTO glue(op_packsswb, SUFFIX) (void) |
| 1229 | { |
| 1230 | Reg r, *d, *s; |
| 1231 | d = (Reg *)((char *)env + PARAM1); |
| 1232 | s = (Reg *)((char *)env + PARAM2); |
| 1233 | |
| 1234 | r.B(0) = satsb((int16_t)d->W(0)); |
| 1235 | r.B(1) = satsb((int16_t)d->W(1)); |
| 1236 | r.B(2) = satsb((int16_t)d->W(2)); |
| 1237 | r.B(3) = satsb((int16_t)d->W(3)); |
| 1238 | #if SHIFT == 1 |
| 1239 | r.B(4) = satsb((int16_t)d->W(4)); |
| 1240 | r.B(5) = satsb((int16_t)d->W(5)); |
| 1241 | r.B(6) = satsb((int16_t)d->W(6)); |
| 1242 | r.B(7) = satsb((int16_t)d->W(7)); |
| 1243 | #endif |
| 1244 | r.B((4 << SHIFT) + 0) = satsb((int16_t)s->W(0)); |
| 1245 | r.B((4 << SHIFT) + 1) = satsb((int16_t)s->W(1)); |
| 1246 | r.B((4 << SHIFT) + 2) = satsb((int16_t)s->W(2)); |
| 1247 | r.B((4 << SHIFT) + 3) = satsb((int16_t)s->W(3)); |
| 1248 | #if SHIFT == 1 |
| 1249 | r.B(12) = satsb((int16_t)s->W(4)); |
| 1250 | r.B(13) = satsb((int16_t)s->W(5)); |
| 1251 | r.B(14) = satsb((int16_t)s->W(6)); |
| 1252 | r.B(15) = satsb((int16_t)s->W(7)); |
| 1253 | #endif |
| 1254 | *d = r; |
| 1255 | } |
| 1256 | |
| 1257 | void OPPROTO glue(op_packuswb, SUFFIX) (void) |
| 1258 | { |
| 1259 | Reg r, *d, *s; |
| 1260 | d = (Reg *)((char *)env + PARAM1); |
| 1261 | s = (Reg *)((char *)env + PARAM2); |
| 1262 | |
| 1263 | r.B(0) = satub((int16_t)d->W(0)); |
| 1264 | r.B(1) = satub((int16_t)d->W(1)); |
| 1265 | r.B(2) = satub((int16_t)d->W(2)); |
| 1266 | r.B(3) = satub((int16_t)d->W(3)); |
| 1267 | #if SHIFT == 1 |
| 1268 | r.B(4) = satub((int16_t)d->W(4)); |
| 1269 | r.B(5) = satub((int16_t)d->W(5)); |
| 1270 | r.B(6) = satub((int16_t)d->W(6)); |
| 1271 | r.B(7) = satub((int16_t)d->W(7)); |
| 1272 | #endif |
| 1273 | r.B((4 << SHIFT) + 0) = satub((int16_t)s->W(0)); |
| 1274 | r.B((4 << SHIFT) + 1) = satub((int16_t)s->W(1)); |
| 1275 | r.B((4 << SHIFT) + 2) = satub((int16_t)s->W(2)); |
| 1276 | r.B((4 << SHIFT) + 3) = satub((int16_t)s->W(3)); |
| 1277 | #if SHIFT == 1 |
| 1278 | r.B(12) = satub((int16_t)s->W(4)); |
| 1279 | r.B(13) = satub((int16_t)s->W(5)); |
| 1280 | r.B(14) = satub((int16_t)s->W(6)); |
| 1281 | r.B(15) = satub((int16_t)s->W(7)); |
| 1282 | #endif |
| 1283 | *d = r; |
| 1284 | } |
| 1285 | |
| 1286 | void OPPROTO glue(op_packssdw, SUFFIX) (void) |
| 1287 | { |
| 1288 | Reg r, *d, *s; |
| 1289 | d = (Reg *)((char *)env + PARAM1); |
| 1290 | s = (Reg *)((char *)env + PARAM2); |
| 1291 | |
| 1292 | r.W(0) = satsw(d->L(0)); |
| 1293 | r.W(1) = satsw(d->L(1)); |
| 1294 | #if SHIFT == 1 |
| 1295 | r.W(2) = satsw(d->L(2)); |
| 1296 | r.W(3) = satsw(d->L(3)); |
| 1297 | #endif |
| 1298 | r.W((2 << SHIFT) + 0) = satsw(s->L(0)); |
| 1299 | r.W((2 << SHIFT) + 1) = satsw(s->L(1)); |
| 1300 | #if SHIFT == 1 |
| 1301 | r.W(6) = satsw(s->L(2)); |
| 1302 | r.W(7) = satsw(s->L(3)); |
| 1303 | #endif |
| 1304 | *d = r; |
| 1305 | } |
| 1306 | |
| 1307 | #define UNPCK_OP(base_name, base) \ |
| 1308 | \ |
| 1309 | void OPPROTO glue(op_punpck ## base_name ## bw, SUFFIX) (void) \ |
| 1310 | { \ |
| 1311 | Reg r, *d, *s; \ |
| 1312 | d = (Reg *)((char *)env + PARAM1); \ |
| 1313 | s = (Reg *)((char *)env + PARAM2); \ |
| 1314 | \ |
| 1315 | r.B(0) = d->B((base << (SHIFT + 2)) + 0); \ |
| 1316 | r.B(1) = s->B((base << (SHIFT + 2)) + 0); \ |
| 1317 | r.B(2) = d->B((base << (SHIFT + 2)) + 1); \ |
| 1318 | r.B(3) = s->B((base << (SHIFT + 2)) + 1); \ |
| 1319 | r.B(4) = d->B((base << (SHIFT + 2)) + 2); \ |
| 1320 | r.B(5) = s->B((base << (SHIFT + 2)) + 2); \ |
| 1321 | r.B(6) = d->B((base << (SHIFT + 2)) + 3); \ |
| 1322 | r.B(7) = s->B((base << (SHIFT + 2)) + 3); \ |
| 1323 | XMM_ONLY( \ |
| 1324 | r.B(8) = d->B((base << (SHIFT + 2)) + 4); \ |
| 1325 | r.B(9) = s->B((base << (SHIFT + 2)) + 4); \ |
| 1326 | r.B(10) = d->B((base << (SHIFT + 2)) + 5); \ |
| 1327 | r.B(11) = s->B((base << (SHIFT + 2)) + 5); \ |
| 1328 | r.B(12) = d->B((base << (SHIFT + 2)) + 6); \ |
| 1329 | r.B(13) = s->B((base << (SHIFT + 2)) + 6); \ |
| 1330 | r.B(14) = d->B((base << (SHIFT + 2)) + 7); \ |
| 1331 | r.B(15) = s->B((base << (SHIFT + 2)) + 7); \ |
| 1332 | ) \ |
| 1333 | *d = r; \ |
| 1334 | } \ |
| 1335 | \ |
| 1336 | void OPPROTO glue(op_punpck ## base_name ## wd, SUFFIX) (void) \ |
| 1337 | { \ |
| 1338 | Reg r, *d, *s; \ |
| 1339 | d = (Reg *)((char *)env + PARAM1); \ |
| 1340 | s = (Reg *)((char *)env + PARAM2); \ |
| 1341 | \ |
| 1342 | r.W(0) = d->W((base << (SHIFT + 1)) + 0); \ |
| 1343 | r.W(1) = s->W((base << (SHIFT + 1)) + 0); \ |
| 1344 | r.W(2) = d->W((base << (SHIFT + 1)) + 1); \ |
| 1345 | r.W(3) = s->W((base << (SHIFT + 1)) + 1); \ |
| 1346 | XMM_ONLY( \ |
| 1347 | r.W(4) = d->W((base << (SHIFT + 1)) + 2); \ |
| 1348 | r.W(5) = s->W((base << (SHIFT + 1)) + 2); \ |
| 1349 | r.W(6) = d->W((base << (SHIFT + 1)) + 3); \ |
| 1350 | r.W(7) = s->W((base << (SHIFT + 1)) + 3); \ |
| 1351 | ) \ |
| 1352 | *d = r; \ |
| 1353 | } \ |
| 1354 | \ |
| 1355 | void OPPROTO glue(op_punpck ## base_name ## dq, SUFFIX) (void) \ |
| 1356 | { \ |
| 1357 | Reg r, *d, *s; \ |
| 1358 | d = (Reg *)((char *)env + PARAM1); \ |
| 1359 | s = (Reg *)((char *)env + PARAM2); \ |
| 1360 | \ |
| 1361 | r.L(0) = d->L((base << SHIFT) + 0); \ |
| 1362 | r.L(1) = s->L((base << SHIFT) + 0); \ |
| 1363 | XMM_ONLY( \ |
| 1364 | r.L(2) = d->L((base << SHIFT) + 1); \ |
| 1365 | r.L(3) = s->L((base << SHIFT) + 1); \ |
| 1366 | ) \ |
| 1367 | *d = r; \ |
| 1368 | } \ |
| 1369 | \ |
| 1370 | XMM_ONLY( \ |
| 1371 | void OPPROTO glue(op_punpck ## base_name ## qdq, SUFFIX) (void) \ |
| 1372 | { \ |
| 1373 | Reg r, *d, *s; \ |
| 1374 | d = (Reg *)((char *)env + PARAM1); \ |
| 1375 | s = (Reg *)((char *)env + PARAM2); \ |
| 1376 | \ |
| 1377 | r.Q(0) = d->Q(base); \ |
| 1378 | r.Q(1) = s->Q(base); \ |
| 1379 | *d = r; \ |
| 1380 | } \ |
| 1381 | ) |
| 1382 | |
| 1383 | UNPCK_OP(l, 0) |
| 1384 | UNPCK_OP(h, 1) |
| 1385 | |
| 1386 | #undef SHIFT |
| 1387 | #undef XMM_ONLY |
| 1388 | #undef Reg |
| 1389 | #undef B |
| 1390 | #undef W |
| 1391 | #undef L |
| 1392 | #undef Q |
| 1393 | #undef SUFFIX |