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bellard80cabfa2004-03-14 12:20:30 +00001/*
2 * QEMU PC System Emulator
ths5fafdf22007-09-16 21:08:06 +00003 *
bellard80cabfa2004-03-14 12:20:30 +00004 * Copyright (c) 2003-2004 Fabrice Bellard
ths5fafdf22007-09-16 21:08:06 +00005 *
bellard80cabfa2004-03-14 12:20:30 +00006 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010024#include "hw/hw.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010025#include "hw/i386/pc.h"
26#include "hw/char/serial.h"
27#include "hw/i386/apic.h"
28#include "hw/block/fdc.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010029#include "hw/ide.h"
30#include "hw/pci/pci.h"
Paolo Bonzini83c90892012-12-17 18:19:49 +010031#include "monitor/monitor.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010032#include "hw/nvram/fw_cfg.h"
33#include "hw/timer/hpet.h"
34#include "hw/i386/smbios.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010035#include "hw/loader.h"
Blue Swirlca20cf32009-09-20 14:58:02 +000036#include "elf.h"
Paolo Bonzini47b43a12013-03-18 17:36:02 +010037#include "multiboot.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010038#include "hw/timer/mc146818rtc.h"
39#include "hw/timer/i8254.h"
40#include "hw/audio/pcspk.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010041#include "hw/pci/msi.h"
42#include "hw/sysbus.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010043#include "sysemu/sysemu.h"
44#include "sysemu/kvm.h"
Peter Maydell1d31f662012-07-26 15:35:13 +010045#include "kvm_i386.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010046#include "hw/xen/xen.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010047#include "sysemu/blockdev.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010048#include "hw/block/block.h"
Gerd Hoffmanna19cbfb2010-04-27 11:50:11 +020049#include "ui/qemu-spice.h"
Paolo Bonzini022c62c2012-12-17 18:19:49 +010050#include "exec/memory.h"
51#include "exec/address-spaces.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010052#include "sysemu/arch_init.h"
Paolo Bonzini1de7afc2012-12-17 18:20:00 +010053#include "qemu/bitmap.h"
Laszlo Ersek0c764a92013-03-21 00:23:17 +010054#include "qemu/config-file.h"
Michael S. Tsirkin04452592013-04-15 09:19:22 +030055#include "hw/acpi/acpi.h"
Igor Mammedov53a89e22013-04-29 19:03:01 +020056#include "hw/cpu/icc_bus.h"
Igor Mammedovc6499832013-04-30 18:00:53 +020057#include "hw/boards.h"
bellard80cabfa2004-03-14 12:20:30 +000058
Blue Swirl471fd342010-05-29 20:23:49 +000059/* debug PC/ISA interrupts */
60//#define DEBUG_IRQ
61
62#ifdef DEBUG_IRQ
63#define DPRINTF(fmt, ...) \
64 do { printf("CPUIRQ: " fmt , ## __VA_ARGS__); } while (0)
65#else
66#define DPRINTF(fmt, ...)
67#endif
68
pbrooka80274c2007-03-31 19:41:22 +000069/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
70#define ACPI_DATA_SIZE 0x10000
blueswir13cce6242008-09-18 18:27:29 +000071#define BIOS_CFG_IOPORT 0x510
aliguori8a92ea22009-02-27 20:12:36 +000072#define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
aliguorib6f6e3d2009-04-17 18:59:56 +000073#define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
Jes Sorensen6b35e7b2009-08-06 16:25:50 +020074#define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
Jes Sorensen4c5b10b2010-02-15 18:33:46 +010075#define FW_CFG_E820_TABLE (FW_CFG_ARCH_LOCAL + 3)
Gleb Natapov40ac17c2010-06-14 11:29:28 +030076#define FW_CFG_HPET (FW_CFG_ARCH_LOCAL + 4)
bellard80cabfa2004-03-14 12:20:30 +000077
Laszlo Ersek3a4a4692013-03-21 00:23:21 +010078#define IO_APIC_DEFAULT_ADDRESS 0xfec00000
79
Jes Sorensen4c5b10b2010-02-15 18:33:46 +010080#define E820_NR_ENTRIES 16
81
82struct e820_entry {
83 uint64_t address;
84 uint64_t length;
85 uint32_t type;
Stefan Weil541dc0d2011-08-31 12:38:01 +020086} QEMU_PACKED __attribute((__aligned__(4)));
Jes Sorensen4c5b10b2010-02-15 18:33:46 +010087
88struct e820_table {
89 uint32_t count;
90 struct e820_entry entry[E820_NR_ENTRIES];
Stefan Weil541dc0d2011-08-31 12:38:01 +020091} QEMU_PACKED __attribute((__aligned__(4)));
Jes Sorensen4c5b10b2010-02-15 18:33:46 +010092
93static struct e820_table e820_table;
Blue Swirldd703b92011-02-05 14:35:00 +000094struct hpet_fw_config hpet_cfg = {.count = UINT8_MAX};
Jes Sorensen4c5b10b2010-02-15 18:33:46 +010095
Jan Kiszkab881fbe2011-10-07 09:19:35 +020096void gsi_handler(void *opaque, int n, int level)
Avi Kivity14524112009-08-09 19:44:55 +030097{
Jan Kiszkab881fbe2011-10-07 09:19:35 +020098 GSIState *s = opaque;
Avi Kivity14524112009-08-09 19:44:55 +030099
Jan Kiszkab881fbe2011-10-07 09:19:35 +0200100 DPRINTF("pc: %s GSI %d\n", level ? "raising" : "lowering", n);
101 if (n < ISA_NUM_IRQS) {
102 qemu_set_irq(s->i8259_irq[n], level);
Avi Kivity1632dc62009-08-09 19:44:56 +0300103 }
Jan Kiszkab881fbe2011-10-07 09:19:35 +0200104 qemu_set_irq(s->ioapic_irq[n], level);
Jan Kiszka2e9947d2011-10-07 09:19:34 +0200105}
Avi Kivity14524112009-08-09 19:44:55 +0300106
Julien Grall258711c2012-09-19 12:50:08 +0100107static void ioport80_write(void *opaque, hwaddr addr, uint64_t data,
108 unsigned size)
bellard80cabfa2004-03-14 12:20:30 +0000109{
110}
111
Julien Grallc02e1ea2013-01-09 18:10:22 +0000112static uint64_t ioport80_read(void *opaque, hwaddr addr, unsigned size)
113{
Julien Gralla6fc23e2013-01-11 16:41:43 +0000114 return 0xffffffffffffffffULL;
Julien Grallc02e1ea2013-01-09 18:10:22 +0000115}
116
bellardf929aad2004-05-08 21:03:41 +0000117/* MSDOS compatibility mode FPU exception support */
pbrookd537cf62007-04-07 18:14:41 +0000118static qemu_irq ferr_irq;
Isaku Yamahata8e78eb22010-05-14 16:29:09 +0900119
120void pc_register_ferr_irq(qemu_irq irq)
121{
122 ferr_irq = irq;
123}
124
bellardf929aad2004-05-08 21:03:41 +0000125/* XXX: add IGNNE support */
126void cpu_set_ferr(CPUX86State *s)
127{
pbrookd537cf62007-04-07 18:14:41 +0000128 qemu_irq_raise(ferr_irq);
bellardf929aad2004-05-08 21:03:41 +0000129}
130
Julien Grall258711c2012-09-19 12:50:08 +0100131static void ioportF0_write(void *opaque, hwaddr addr, uint64_t data,
132 unsigned size)
bellardf929aad2004-05-08 21:03:41 +0000133{
pbrookd537cf62007-04-07 18:14:41 +0000134 qemu_irq_lower(ferr_irq);
bellardf929aad2004-05-08 21:03:41 +0000135}
136
Julien Grallc02e1ea2013-01-09 18:10:22 +0000137static uint64_t ioportF0_read(void *opaque, hwaddr addr, unsigned size)
138{
Julien Gralla6fc23e2013-01-11 16:41:43 +0000139 return 0xffffffffffffffffULL;
Julien Grallc02e1ea2013-01-09 18:10:22 +0000140}
141
bellard28ab0e22004-05-20 14:02:14 +0000142/* TSC handling */
bellard28ab0e22004-05-20 14:02:14 +0000143uint64_t cpu_get_tsc(CPUX86State *env)
144{
Anthony Liguori4a1418e2009-08-10 17:07:24 -0500145 return cpu_get_ticks();
bellard28ab0e22004-05-20 14:02:14 +0000146}
147
bellarda5954d52006-09-24 18:48:00 +0000148/* SMM support */
Isaku Yamahataf885f1e2010-05-14 16:29:04 +0900149
150static cpu_set_smm_t smm_set;
151static void *smm_arg;
152
153void cpu_smm_register(cpu_set_smm_t callback, void *arg)
154{
155 assert(smm_set == NULL);
156 assert(smm_arg == NULL);
157 smm_set = callback;
158 smm_arg = arg;
159}
160
Andreas Färber4a8fa5d2012-03-14 01:38:23 +0100161void cpu_smm_update(CPUX86State *env)
bellarda5954d52006-09-24 18:48:00 +0000162{
Isaku Yamahataf885f1e2010-05-14 16:29:04 +0900163 if (smm_set && smm_arg && env == first_cpu)
164 smm_set(!!(env->hflags & HF_SMM_MASK), smm_arg);
bellarda5954d52006-09-24 18:48:00 +0000165}
166
167
bellard3de388f2005-07-02 18:11:44 +0000168/* IRQ handling */
Andreas Färber4a8fa5d2012-03-14 01:38:23 +0100169int cpu_get_pic_interrupt(CPUX86State *env)
bellard3de388f2005-07-02 18:11:44 +0000170{
171 int intno;
172
Blue Swirlcf6d64b2010-06-19 10:42:08 +0300173 intno = apic_get_interrupt(env->apic_state);
bellard3de388f2005-07-02 18:11:44 +0000174 if (intno >= 0) {
bellard3de388f2005-07-02 18:11:44 +0000175 return intno;
176 }
bellard3de388f2005-07-02 18:11:44 +0000177 /* read the irq from the PIC */
Blue Swirlcf6d64b2010-06-19 10:42:08 +0300178 if (!apic_accept_pic_intr(env->apic_state)) {
ths0e21e122007-10-09 03:08:56 +0000179 return -1;
Blue Swirlcf6d64b2010-06-19 10:42:08 +0300180 }
ths0e21e122007-10-09 03:08:56 +0000181
bellard3de388f2005-07-02 18:11:44 +0000182 intno = pic_read_irq(isa_pic);
183 return intno;
184}
185
pbrookd537cf62007-04-07 18:14:41 +0000186static void pic_irq_request(void *opaque, int irq, int level)
bellard3de388f2005-07-02 18:11:44 +0000187{
Andreas Färber4a8fa5d2012-03-14 01:38:23 +0100188 CPUX86State *env = first_cpu;
aurel32a5b38b52008-04-13 16:08:30 +0000189
Blue Swirl471fd342010-05-29 20:23:49 +0000190 DPRINTF("pic_irqs: %s irq %d\n", level? "raise" : "lower", irq);
aurel32d5529472008-08-19 12:55:20 +0000191 if (env->apic_state) {
192 while (env) {
Blue Swirlcf6d64b2010-06-19 10:42:08 +0300193 if (apic_accept_pic_intr(env->apic_state)) {
194 apic_deliver_pic_intr(env->apic_state, level);
195 }
aurel32d5529472008-08-19 12:55:20 +0000196 env = env->next_cpu;
197 }
198 } else {
Andreas Färberd8ed8872013-01-17 22:30:20 +0100199 CPUState *cs = CPU(x86_env_get_cpu(env));
200 if (level) {
Andreas Färberc3affe52013-01-18 15:03:43 +0100201 cpu_interrupt(cs, CPU_INTERRUPT_HARD);
Andreas Färberd8ed8872013-01-17 22:30:20 +0100202 } else {
203 cpu_reset_interrupt(cs, CPU_INTERRUPT_HARD);
204 }
aurel32a5b38b52008-04-13 16:08:30 +0000205 }
bellard3de388f2005-07-02 18:11:44 +0000206}
207
bellardb0a21b52004-03-31 18:58:38 +0000208/* PC cmos mappings */
209
bellard80cabfa2004-03-14 12:20:30 +0000210#define REG_EQUIPMENT_BYTE 0x14
211
Blue Swirld288c7b2011-02-12 21:23:12 +0000212static int cmos_get_fd_drive_type(FDriveType fd0)
bellard777428f2004-05-23 16:26:20 +0000213{
214 int val;
215
216 switch (fd0) {
Blue Swirld288c7b2011-02-12 21:23:12 +0000217 case FDRIVE_DRV_144:
bellard777428f2004-05-23 16:26:20 +0000218 /* 1.44 Mb 3"5 drive */
219 val = 4;
220 break;
Blue Swirld288c7b2011-02-12 21:23:12 +0000221 case FDRIVE_DRV_288:
bellard777428f2004-05-23 16:26:20 +0000222 /* 2.88 Mb 3"5 drive */
223 val = 5;
224 break;
Blue Swirld288c7b2011-02-12 21:23:12 +0000225 case FDRIVE_DRV_120:
bellard777428f2004-05-23 16:26:20 +0000226 /* 1.2 Mb 5"5 drive */
227 val = 2;
228 break;
Blue Swirld288c7b2011-02-12 21:23:12 +0000229 case FDRIVE_DRV_NONE:
bellard777428f2004-05-23 16:26:20 +0000230 default:
231 val = 0;
232 break;
233 }
234 return val;
235}
236
Markus Armbruster91390462012-07-10 11:12:38 +0200237static void cmos_init_hd(ISADevice *s, int type_ofs, int info_ofs,
238 int16_t cylinders, int8_t heads, int8_t sectors)
bellardba6c2372004-10-09 16:47:59 +0000239{
bellardba6c2372004-10-09 16:47:59 +0000240 rtc_set_memory(s, type_ofs, 47);
241 rtc_set_memory(s, info_ofs, cylinders);
242 rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
243 rtc_set_memory(s, info_ofs + 2, heads);
244 rtc_set_memory(s, info_ofs + 3, 0xff);
245 rtc_set_memory(s, info_ofs + 4, 0xff);
246 rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
247 rtc_set_memory(s, info_ofs + 6, cylinders);
248 rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
249 rtc_set_memory(s, info_ofs + 8, sectors);
250}
251
balrog6ac0e822007-10-31 01:54:04 +0000252/* convert boot_device letter to something recognizable by the bios */
253static int boot_device2nibble(char boot_device)
254{
255 switch(boot_device) {
256 case 'a':
257 case 'b':
258 return 0x01; /* floppy boot */
259 case 'c':
260 return 0x02; /* hard drive boot */
261 case 'd':
262 return 0x03; /* CD-ROM boot */
263 case 'n':
264 return 0x04; /* Network boot */
265 }
266 return 0;
267}
268
Isaku Yamahata1d914fa2010-05-14 16:29:17 +0900269static int set_boot_dev(ISADevice *s, const char *boot_device, int fd_bootchk)
aurel320ecdffb2008-05-04 20:11:34 +0000270{
271#define PC_MAX_BOOT_DEVICES 3
aurel320ecdffb2008-05-04 20:11:34 +0000272 int nbds, bds[3] = { 0, };
273 int i;
274
275 nbds = strlen(boot_device);
276 if (nbds > PC_MAX_BOOT_DEVICES) {
Markus Armbruster1ecda022010-02-18 17:25:24 +0100277 error_report("Too many boot devices for PC");
aurel320ecdffb2008-05-04 20:11:34 +0000278 return(1);
279 }
280 for (i = 0; i < nbds; i++) {
281 bds[i] = boot_device2nibble(boot_device[i]);
282 if (bds[i] == 0) {
Markus Armbruster1ecda022010-02-18 17:25:24 +0100283 error_report("Invalid boot device for PC: '%c'",
284 boot_device[i]);
aurel320ecdffb2008-05-04 20:11:34 +0000285 return(1);
286 }
287 }
288 rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
Markus Armbrusterd9346e82010-02-17 18:07:48 +0100289 rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
aurel320ecdffb2008-05-04 20:11:34 +0000290 return(0);
291}
292
Markus Armbrusterd9346e82010-02-17 18:07:48 +0100293static int pc_boot_set(void *opaque, const char *boot_device)
294{
295 return set_boot_dev(opaque, boot_device, 0);
296}
297
Markus Armbrusterc0897e02010-06-24 19:58:20 +0200298typedef struct pc_cmos_init_late_arg {
299 ISADevice *rtc_state;
Markus Armbruster91390462012-07-10 11:12:38 +0200300 BusState *idebus[2];
Markus Armbrusterc0897e02010-06-24 19:58:20 +0200301} pc_cmos_init_late_arg;
302
303static void pc_cmos_init_late(void *opaque)
304{
305 pc_cmos_init_late_arg *arg = opaque;
306 ISADevice *s = arg->rtc_state;
Markus Armbruster91390462012-07-10 11:12:38 +0200307 int16_t cylinders;
308 int8_t heads, sectors;
Markus Armbrusterc0897e02010-06-24 19:58:20 +0200309 int val;
Markus Armbruster2adc99b2012-07-10 11:12:53 +0200310 int i, trans;
Markus Armbrusterc0897e02010-06-24 19:58:20 +0200311
Markus Armbruster91390462012-07-10 11:12:38 +0200312 val = 0;
313 if (ide_get_geometry(arg->idebus[0], 0,
314 &cylinders, &heads, &sectors) >= 0) {
315 cmos_init_hd(s, 0x19, 0x1b, cylinders, heads, sectors);
316 val |= 0xf0;
317 }
318 if (ide_get_geometry(arg->idebus[0], 1,
319 &cylinders, &heads, &sectors) >= 0) {
320 cmos_init_hd(s, 0x1a, 0x24, cylinders, heads, sectors);
321 val |= 0x0f;
322 }
323 rtc_set_memory(s, 0x12, val);
Markus Armbrusterc0897e02010-06-24 19:58:20 +0200324
325 val = 0;
326 for (i = 0; i < 4; i++) {
Markus Armbruster91390462012-07-10 11:12:38 +0200327 /* NOTE: ide_get_geometry() returns the physical
328 geometry. It is always such that: 1 <= sects <= 63, 1
329 <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
330 geometry can be different if a translation is done. */
331 if (ide_get_geometry(arg->idebus[i / 2], i % 2,
332 &cylinders, &heads, &sectors) >= 0) {
Markus Armbruster2adc99b2012-07-10 11:12:53 +0200333 trans = ide_get_bios_chs_trans(arg->idebus[i / 2], i % 2) - 1;
334 assert((trans & ~3) == 0);
335 val |= trans << (i * 2);
Markus Armbrusterc0897e02010-06-24 19:58:20 +0200336 }
337 }
338 rtc_set_memory(s, 0x39, val);
339
340 qemu_unregister_reset(pc_cmos_init_late, opaque);
341}
342
Igor Mammedovb8b74562013-04-23 10:29:40 +0200343typedef struct RTCCPUHotplugArg {
344 Notifier cpu_added_notifier;
345 ISADevice *rtc_state;
346} RTCCPUHotplugArg;
347
348static void rtc_notify_cpu_added(Notifier *notifier, void *data)
349{
350 RTCCPUHotplugArg *arg = container_of(notifier, RTCCPUHotplugArg,
351 cpu_added_notifier);
352 ISADevice *s = arg->rtc_state;
353
354 /* increment the number of CPUs */
355 rtc_set_memory(s, 0x5f, rtc_get_memory(s, 0x5f) + 1);
356}
357
Isaku Yamahata845773a2010-05-14 16:29:15 +0900358void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
Markus Armbrusterc0897e02010-06-24 19:58:20 +0200359 const char *boot_device,
Kevin Wolf34d42602011-10-20 16:37:26 +0200360 ISADevice *floppy, BusState *idebus0, BusState *idebus1,
Blue Swirl63ffb562011-02-05 16:32:23 +0000361 ISADevice *s)
bellard80cabfa2004-03-14 12:20:30 +0000362{
Markus Armbruster61a8d642012-07-10 11:12:27 +0200363 int val, nb, i;
Peter Maydell980bda82011-11-09 21:59:50 +0000364 FDriveType fd_type[2] = { FDRIVE_DRV_NONE, FDRIVE_DRV_NONE };
Markus Armbrusterc0897e02010-06-24 19:58:20 +0200365 static pc_cmos_init_late_arg arg;
Igor Mammedovb8b74562013-04-23 10:29:40 +0200366 static RTCCPUHotplugArg cpu_hotplug_cb;
bellard80cabfa2004-03-14 12:20:30 +0000367
bellardb0a21b52004-03-31 18:58:38 +0000368 /* various important CMOS locations needed by PC/Bochs bios */
bellard80cabfa2004-03-14 12:20:30 +0000369
370 /* memory size */
Markus Armbrustere89001f2012-08-15 13:12:20 +0200371 /* base memory (first MiB) */
372 val = MIN(ram_size / 1024, 640);
bellard333190e2004-04-07 20:51:30 +0000373 rtc_set_memory(s, 0x15, val);
374 rtc_set_memory(s, 0x16, val >> 8);
Markus Armbrustere89001f2012-08-15 13:12:20 +0200375 /* extended memory (next 64MiB) */
376 if (ram_size > 1024 * 1024) {
377 val = (ram_size - 1024 * 1024) / 1024;
378 } else {
379 val = 0;
380 }
bellard80cabfa2004-03-14 12:20:30 +0000381 if (val > 65535)
382 val = 65535;
bellardb0a21b52004-03-31 18:58:38 +0000383 rtc_set_memory(s, 0x17, val);
384 rtc_set_memory(s, 0x18, val >> 8);
385 rtc_set_memory(s, 0x30, val);
386 rtc_set_memory(s, 0x31, val >> 8);
Markus Armbrustere89001f2012-08-15 13:12:20 +0200387 /* memory between 16MiB and 4GiB */
388 if (ram_size > 16 * 1024 * 1024) {
389 val = (ram_size - 16 * 1024 * 1024) / 65536;
390 } else {
bellard9da98862004-06-26 15:53:17 +0000391 val = 0;
Markus Armbrustere89001f2012-08-15 13:12:20 +0200392 }
bellard80cabfa2004-03-14 12:20:30 +0000393 if (val > 65535)
394 val = 65535;
bellardb0a21b52004-03-31 18:58:38 +0000395 rtc_set_memory(s, 0x34, val);
396 rtc_set_memory(s, 0x35, val >> 8);
Markus Armbrustere89001f2012-08-15 13:12:20 +0200397 /* memory above 4GiB */
398 val = above_4g_mem_size / 65536;
399 rtc_set_memory(s, 0x5b, val);
400 rtc_set_memory(s, 0x5c, val >> 8);
401 rtc_set_memory(s, 0x5d, val >> 16);
ths3b46e622007-09-17 08:09:54 +0000402
aurel32298e01b2008-03-28 22:28:08 +0000403 /* set the number of CPU */
404 rtc_set_memory(s, 0x5f, smp_cpus - 1);
Igor Mammedovb8b74562013-04-23 10:29:40 +0200405 /* init CPU hotplug notifier */
406 cpu_hotplug_cb.rtc_state = s;
407 cpu_hotplug_cb.cpu_added_notifier.notify = rtc_notify_cpu_added;
408 qemu_register_cpu_added_notifier(&cpu_hotplug_cb.cpu_added_notifier);
aurel32298e01b2008-03-28 22:28:08 +0000409
balrog6ac0e822007-10-31 01:54:04 +0000410 /* set boot devices, and disable floppy signature check if requested */
Markus Armbrusterd9346e82010-02-17 18:07:48 +0100411 if (set_boot_dev(s, boot_device, fd_bootchk)) {
j_mayer28c5af52007-11-11 01:50:45 +0000412 exit(1);
413 }
bellard80cabfa2004-03-14 12:20:30 +0000414
bellardb41a2cd2004-03-14 21:46:48 +0000415 /* floppy type */
Kevin Wolf34d42602011-10-20 16:37:26 +0200416 if (floppy) {
Kevin Wolf34d42602011-10-20 16:37:26 +0200417 for (i = 0; i < 2; i++) {
Markus Armbruster61a8d642012-07-10 11:12:27 +0200418 fd_type[i] = isa_fdc_get_drive_type(floppy, i);
Blue Swirl63ffb562011-02-05 16:32:23 +0000419 }
420 }
421 val = (cmos_get_fd_drive_type(fd_type[0]) << 4) |
422 cmos_get_fd_drive_type(fd_type[1]);
bellardb0a21b52004-03-31 18:58:38 +0000423 rtc_set_memory(s, 0x10, val);
ths3b46e622007-09-17 08:09:54 +0000424
bellardb0a21b52004-03-31 18:58:38 +0000425 val = 0;
bellardb41a2cd2004-03-14 21:46:48 +0000426 nb = 0;
Blue Swirl63ffb562011-02-05 16:32:23 +0000427 if (fd_type[0] < FDRIVE_DRV_NONE) {
bellard80cabfa2004-03-14 12:20:30 +0000428 nb++;
Blue Swirld288c7b2011-02-12 21:23:12 +0000429 }
Blue Swirl63ffb562011-02-05 16:32:23 +0000430 if (fd_type[1] < FDRIVE_DRV_NONE) {
bellard80cabfa2004-03-14 12:20:30 +0000431 nb++;
Blue Swirld288c7b2011-02-12 21:23:12 +0000432 }
bellard80cabfa2004-03-14 12:20:30 +0000433 switch (nb) {
434 case 0:
435 break;
436 case 1:
bellardb0a21b52004-03-31 18:58:38 +0000437 val |= 0x01; /* 1 drive, ready for boot */
bellard80cabfa2004-03-14 12:20:30 +0000438 break;
439 case 2:
bellardb0a21b52004-03-31 18:58:38 +0000440 val |= 0x41; /* 2 drives, ready for boot */
bellard80cabfa2004-03-14 12:20:30 +0000441 break;
442 }
bellardb0a21b52004-03-31 18:58:38 +0000443 val |= 0x02; /* FPU is there */
444 val |= 0x04; /* PS/2 mouse installed */
445 rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
446
bellardba6c2372004-10-09 16:47:59 +0000447 /* hard drives */
Markus Armbrusterc0897e02010-06-24 19:58:20 +0200448 arg.rtc_state = s;
Markus Armbruster91390462012-07-10 11:12:38 +0200449 arg.idebus[0] = idebus0;
450 arg.idebus[1] = idebus1;
Markus Armbrusterc0897e02010-06-24 19:58:20 +0200451 qemu_register_reset(pc_cmos_init_late, &arg);
bellard80cabfa2004-03-14 12:20:30 +0000452}
453
Andreas Färbera0881c62013-04-27 22:18:46 +0200454#define TYPE_PORT92 "port92"
455#define PORT92(obj) OBJECT_CHECK(Port92State, (obj), TYPE_PORT92)
456
Blue Swirl4b78a802011-01-06 18:24:35 +0000457/* port 92 stuff: could be split off */
458typedef struct Port92State {
Andreas Färbera0881c62013-04-27 22:18:46 +0200459 ISADevice parent_obj;
460
Richard Henderson23af6702011-08-16 08:32:44 -0700461 MemoryRegion io;
Blue Swirl4b78a802011-01-06 18:24:35 +0000462 uint8_t outport;
463 qemu_irq *a20_out;
464} Port92State;
465
Alexander Graf93ef4192012-10-08 13:24:52 +0200466static void port92_write(void *opaque, hwaddr addr, uint64_t val,
467 unsigned size)
Blue Swirl4b78a802011-01-06 18:24:35 +0000468{
469 Port92State *s = opaque;
470
471 DPRINTF("port92: write 0x%02x\n", val);
472 s->outport = val;
473 qemu_set_irq(*s->a20_out, (val >> 1) & 1);
474 if (val & 1) {
475 qemu_system_reset_request();
476 }
477}
478
Alexander Graf93ef4192012-10-08 13:24:52 +0200479static uint64_t port92_read(void *opaque, hwaddr addr,
480 unsigned size)
Blue Swirl4b78a802011-01-06 18:24:35 +0000481{
482 Port92State *s = opaque;
483 uint32_t ret;
484
485 ret = s->outport;
486 DPRINTF("port92: read 0x%02x\n", ret);
487 return ret;
488}
489
490static void port92_init(ISADevice *dev, qemu_irq *a20_out)
491{
Andreas Färbera0881c62013-04-27 22:18:46 +0200492 Port92State *s = PORT92(dev);
Blue Swirl4b78a802011-01-06 18:24:35 +0000493
494 s->a20_out = a20_out;
495}
496
497static const VMStateDescription vmstate_port92_isa = {
498 .name = "port92",
499 .version_id = 1,
500 .minimum_version_id = 1,
501 .minimum_version_id_old = 1,
502 .fields = (VMStateField []) {
503 VMSTATE_UINT8(outport, Port92State),
504 VMSTATE_END_OF_LIST()
505 }
506};
507
508static void port92_reset(DeviceState *d)
509{
Andreas Färbera0881c62013-04-27 22:18:46 +0200510 Port92State *s = PORT92(d);
Blue Swirl4b78a802011-01-06 18:24:35 +0000511
512 s->outport &= ~1;
513}
514
Richard Henderson23af6702011-08-16 08:32:44 -0700515static const MemoryRegionOps port92_ops = {
Alexander Graf93ef4192012-10-08 13:24:52 +0200516 .read = port92_read,
517 .write = port92_write,
518 .impl = {
519 .min_access_size = 1,
520 .max_access_size = 1,
521 },
522 .endianness = DEVICE_LITTLE_ENDIAN,
Richard Henderson23af6702011-08-16 08:32:44 -0700523};
524
Andreas Färberdb895a12012-11-25 02:37:14 +0100525static void port92_initfn(Object *obj)
Blue Swirl4b78a802011-01-06 18:24:35 +0000526{
Andreas Färberdb895a12012-11-25 02:37:14 +0100527 Port92State *s = PORT92(obj);
Blue Swirl4b78a802011-01-06 18:24:35 +0000528
Richard Henderson23af6702011-08-16 08:32:44 -0700529 memory_region_init_io(&s->io, &port92_ops, s, "port92", 1);
Richard Henderson23af6702011-08-16 08:32:44 -0700530
Blue Swirl4b78a802011-01-06 18:24:35 +0000531 s->outport = 0;
Andreas Färberdb895a12012-11-25 02:37:14 +0100532}
533
534static void port92_realizefn(DeviceState *dev, Error **errp)
535{
536 ISADevice *isadev = ISA_DEVICE(dev);
537 Port92State *s = PORT92(dev);
538
539 isa_register_ioport(isadev, &s->io, 0x92);
Blue Swirl4b78a802011-01-06 18:24:35 +0000540}
541
Anthony Liguori8f04ee02011-12-04 11:52:49 -0600542static void port92_class_initfn(ObjectClass *klass, void *data)
543{
Anthony Liguori39bffca2011-12-07 21:34:16 -0600544 DeviceClass *dc = DEVICE_CLASS(klass);
Andreas Färberdb895a12012-11-25 02:37:14 +0100545
Anthony Liguori39bffca2011-12-07 21:34:16 -0600546 dc->no_user = 1;
Andreas Färberdb895a12012-11-25 02:37:14 +0100547 dc->realize = port92_realizefn;
Anthony Liguori39bffca2011-12-07 21:34:16 -0600548 dc->reset = port92_reset;
549 dc->vmsd = &vmstate_port92_isa;
Anthony Liguori8f04ee02011-12-04 11:52:49 -0600550}
551
Andreas Färber8c43a6f2013-01-10 16:19:07 +0100552static const TypeInfo port92_info = {
Andreas Färbera0881c62013-04-27 22:18:46 +0200553 .name = TYPE_PORT92,
Anthony Liguori39bffca2011-12-07 21:34:16 -0600554 .parent = TYPE_ISA_DEVICE,
555 .instance_size = sizeof(Port92State),
Andreas Färberdb895a12012-11-25 02:37:14 +0100556 .instance_init = port92_initfn,
Anthony Liguori39bffca2011-12-07 21:34:16 -0600557 .class_init = port92_class_initfn,
Blue Swirl4b78a802011-01-06 18:24:35 +0000558};
559
Andreas Färber83f7d432012-02-09 15:20:55 +0100560static void port92_register_types(void)
Blue Swirl4b78a802011-01-06 18:24:35 +0000561{
Anthony Liguori39bffca2011-12-07 21:34:16 -0600562 type_register_static(&port92_info);
Blue Swirl4b78a802011-01-06 18:24:35 +0000563}
Andreas Färber83f7d432012-02-09 15:20:55 +0100564
565type_init(port92_register_types)
Blue Swirl4b78a802011-01-06 18:24:35 +0000566
Blue Swirl956a3e62010-05-22 07:59:01 +0000567static void handle_a20_line_change(void *opaque, int irq, int level)
bellard59b8ad82005-11-21 23:34:32 +0000568{
Andreas Färbercc36a7a2013-01-18 15:19:06 +0100569 X86CPU *cpu = opaque;
Blue Swirl956a3e62010-05-22 07:59:01 +0000570
bellard59b8ad82005-11-21 23:34:32 +0000571 /* XXX: send to all CPUs ? */
Blue Swirl4b78a802011-01-06 18:24:35 +0000572 /* XXX: add logic to handle multiple A20 line sources */
Andreas Färbercc36a7a2013-01-18 15:19:06 +0100573 x86_cpu_set_a20(cpu, level);
bellarde1a23742004-04-05 20:26:03 +0000574}
575
Jes Sorensen4c5b10b2010-02-15 18:33:46 +0100576int e820_add_entry(uint64_t address, uint64_t length, uint32_t type)
577{
Alex Williamson8ca209a2010-11-07 20:57:00 -0700578 int index = le32_to_cpu(e820_table.count);
Jes Sorensen4c5b10b2010-02-15 18:33:46 +0100579 struct e820_entry *entry;
580
581 if (index >= E820_NR_ENTRIES)
582 return -EBUSY;
Alex Williamson8ca209a2010-11-07 20:57:00 -0700583 entry = &e820_table.entry[index++];
Jes Sorensen4c5b10b2010-02-15 18:33:46 +0100584
Alex Williamson8ca209a2010-11-07 20:57:00 -0700585 entry->address = cpu_to_le64(address);
586 entry->length = cpu_to_le64(length);
587 entry->type = cpu_to_le32(type);
Jes Sorensen4c5b10b2010-02-15 18:33:46 +0100588
Alex Williamson8ca209a2010-11-07 20:57:00 -0700589 e820_table.count = cpu_to_le32(index);
590 return index;
Jes Sorensen4c5b10b2010-02-15 18:33:46 +0100591}
592
Eduardo Habkost1d934e82013-01-23 15:51:18 -0200593/* Calculates the limit to CPU APIC ID values
594 *
595 * This function returns the limit for the APIC ID value, so that all
596 * CPU APIC IDs are < pc_apic_id_limit().
597 *
598 * This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init().
599 */
600static unsigned int pc_apic_id_limit(unsigned int max_cpus)
601{
602 return x86_cpu_apic_id_from_index(max_cpus - 1) + 1;
603}
604
Laszlo Erseka88b3622013-04-16 02:24:08 +0200605static FWCfgState *bochs_bios_init(void)
bellard80cabfa2004-03-14 12:20:30 +0000606{
Laszlo Erseka88b3622013-04-16 02:24:08 +0200607 FWCfgState *fw_cfg;
aliguorib6f6e3d2009-04-17 18:59:56 +0000608 uint8_t *smbios_table;
609 size_t smbios_len;
aliguori11c2fd32009-04-21 22:31:41 +0000610 uint64_t *numa_fw_cfg;
611 int i, j;
Eduardo Habkost1d934e82013-01-23 15:51:18 -0200612 unsigned int apic_id_limit = pc_apic_id_limit(max_cpus);
blueswir13cce6242008-09-18 18:27:29 +0000613
614 fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
Eduardo Habkost1d934e82013-01-23 15:51:18 -0200615 /* FW_CFG_MAX_CPUS is a bit confusing/problematic on x86:
616 *
617 * SeaBIOS needs FW_CFG_MAX_CPUS for CPU hotplug, but the CPU hotplug
618 * QEMU<->SeaBIOS interface is not based on the "CPU index", but on the APIC
619 * ID of hotplugged CPUs[1]. This means that FW_CFG_MAX_CPUS is not the
620 * "maximum number of CPUs", but the "limit to the APIC ID values SeaBIOS
621 * may see".
622 *
623 * So, this means we must not use max_cpus, here, but the maximum possible
624 * APIC ID value, plus one.
625 *
626 * [1] The only kind of "CPU identifier" used between SeaBIOS and QEMU is
627 * the APIC ID, not the "CPU index"
628 */
629 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)apic_id_limit);
blueswir13cce6242008-09-18 18:27:29 +0000630 fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
blueswir1905fdcb2008-09-18 18:33:18 +0000631 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
Markus Armbruster089da572013-01-16 14:50:28 +0100632 fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES,
633 acpi_tables, acpi_tables_len);
Jan Kiszka9b5b76d2011-10-15 14:08:26 +0200634 fw_cfg_add_i32(fw_cfg, FW_CFG_IRQ0_OVERRIDE, kvm_allows_irq0_override());
aliguorib6f6e3d2009-04-17 18:59:56 +0000635
636 smbios_table = smbios_get_table(&smbios_len);
637 if (smbios_table)
638 fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
639 smbios_table, smbios_len);
Markus Armbruster089da572013-01-16 14:50:28 +0100640 fw_cfg_add_bytes(fw_cfg, FW_CFG_E820_TABLE,
641 &e820_table, sizeof(e820_table));
aliguori11c2fd32009-04-21 22:31:41 +0000642
Markus Armbruster089da572013-01-16 14:50:28 +0100643 fw_cfg_add_bytes(fw_cfg, FW_CFG_HPET, &hpet_cfg, sizeof(hpet_cfg));
aliguori11c2fd32009-04-21 22:31:41 +0000644 /* allocate memory for the NUMA channel: one (64bit) word for the number
645 * of nodes, one word for each VCPU->node and one word for each node to
646 * hold the amount of memory.
647 */
Eduardo Habkost1d934e82013-01-23 15:51:18 -0200648 numa_fw_cfg = g_new0(uint64_t, 1 + apic_id_limit + nb_numa_nodes);
aliguori11c2fd32009-04-21 22:31:41 +0000649 numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
Vasilis Liaskovitis991dfef2011-10-26 14:19:00 +0200650 for (i = 0; i < max_cpus; i++) {
Eduardo Habkost1d934e82013-01-23 15:51:18 -0200651 unsigned int apic_id = x86_cpu_apic_id_from_index(i);
652 assert(apic_id < apic_id_limit);
aliguori11c2fd32009-04-21 22:31:41 +0000653 for (j = 0; j < nb_numa_nodes; j++) {
Chegu Vinodee785fe2012-07-16 21:31:30 -0700654 if (test_bit(i, node_cpumask[j])) {
Eduardo Habkost1d934e82013-01-23 15:51:18 -0200655 numa_fw_cfg[apic_id + 1] = cpu_to_le64(j);
aliguori11c2fd32009-04-21 22:31:41 +0000656 break;
657 }
658 }
659 }
660 for (i = 0; i < nb_numa_nodes; i++) {
Eduardo Habkost1d934e82013-01-23 15:51:18 -0200661 numa_fw_cfg[apic_id_limit + 1 + i] = cpu_to_le64(node_mem[i]);
aliguori11c2fd32009-04-21 22:31:41 +0000662 }
Markus Armbruster089da572013-01-16 14:50:28 +0100663 fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, numa_fw_cfg,
Eduardo Habkost1d934e82013-01-23 15:51:18 -0200664 (1 + apic_id_limit + nb_numa_nodes) *
665 sizeof(*numa_fw_cfg));
Alexander Grafbf483392009-06-29 15:37:38 +0200666
667 return fw_cfg;
bellard80cabfa2004-03-14 12:20:30 +0000668}
669
ths642a4f92007-05-19 21:04:38 +0000670static long get_file_size(FILE *f)
671{
672 long where, size;
673
674 /* XXX: on Unix systems, using fstat() probably makes more sense */
675
676 where = ftell(f);
677 fseek(f, 0, SEEK_END);
678 size = ftell(f);
679 fseek(f, where, SEEK_SET);
680
681 return size;
682}
683
Laszlo Erseka88b3622013-04-16 02:24:08 +0200684static void load_linux(FWCfgState *fw_cfg,
aliguori4fc9af52008-11-08 16:27:07 +0000685 const char *kernel_filename,
liguang0f9d76e2013-03-26 16:43:19 +0800686 const char *initrd_filename,
687 const char *kernel_cmdline,
Avi Kivitya8170e52012-10-23 12:30:10 +0200688 hwaddr max_ram_size)
ths642a4f92007-05-19 21:04:38 +0000689{
690 uint16_t protocol;
Paul Brook5cea8592009-05-30 00:52:44 +0100691 int setup_size, kernel_size, initrd_size = 0, cmdline_size;
ths642a4f92007-05-19 21:04:38 +0000692 uint32_t initrd_max;
Alexander Graf57a46d02009-11-12 21:53:14 +0100693 uint8_t header[8192], *setup, *kernel, *initrd_data;
Avi Kivitya8170e52012-10-23 12:30:10 +0200694 hwaddr real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
Gerd Hoffmann45a50b12009-10-01 16:42:33 +0200695 FILE *f;
Pascal Terjanbf4e5d92009-07-13 17:46:42 +0200696 char *vmode;
ths642a4f92007-05-19 21:04:38 +0000697
698 /* Align to 16 bytes as a paranoia measure */
699 cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
700
701 /* load the kernel header */
702 f = fopen(kernel_filename, "rb");
703 if (!f || !(kernel_size = get_file_size(f)) ||
liguang0f9d76e2013-03-26 16:43:19 +0800704 fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
705 MIN(ARRAY_SIZE(header), kernel_size)) {
706 fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
707 kernel_filename, strerror(errno));
708 exit(1);
ths642a4f92007-05-19 21:04:38 +0000709 }
710
711 /* kernel protocol version */
bellardbc4edd72007-11-07 16:54:42 +0000712#if 0
ths642a4f92007-05-19 21:04:38 +0000713 fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
bellardbc4edd72007-11-07 16:54:42 +0000714#endif
liguang0f9d76e2013-03-26 16:43:19 +0800715 if (ldl_p(header+0x202) == 0x53726448) {
716 protocol = lduw_p(header+0x206);
717 } else {
718 /* This looks like a multiboot kernel. If it is, let's stop
719 treating it like a Linux kernel. */
Adam Lackorzynski52001442009-12-26 14:13:46 +0100720 if (load_multiboot(fw_cfg, f, kernel_filename, initrd_filename,
liguang0f9d76e2013-03-26 16:43:19 +0800721 kernel_cmdline, kernel_size, header)) {
Blue Swirl82663ee2009-09-06 16:31:58 +0000722 return;
liguang0f9d76e2013-03-26 16:43:19 +0800723 }
724 protocol = 0;
Alexander Graff16408d2009-06-29 15:37:39 +0200725 }
ths642a4f92007-05-19 21:04:38 +0000726
727 if (protocol < 0x200 || !(header[0x211] & 0x01)) {
liguang0f9d76e2013-03-26 16:43:19 +0800728 /* Low kernel */
729 real_addr = 0x90000;
730 cmdline_addr = 0x9a000 - cmdline_size;
731 prot_addr = 0x10000;
ths642a4f92007-05-19 21:04:38 +0000732 } else if (protocol < 0x202) {
liguang0f9d76e2013-03-26 16:43:19 +0800733 /* High but ancient kernel */
734 real_addr = 0x90000;
735 cmdline_addr = 0x9a000 - cmdline_size;
736 prot_addr = 0x100000;
ths642a4f92007-05-19 21:04:38 +0000737 } else {
liguang0f9d76e2013-03-26 16:43:19 +0800738 /* High and recent kernel */
739 real_addr = 0x10000;
740 cmdline_addr = 0x20000;
741 prot_addr = 0x100000;
ths642a4f92007-05-19 21:04:38 +0000742 }
743
bellardbc4edd72007-11-07 16:54:42 +0000744#if 0
ths642a4f92007-05-19 21:04:38 +0000745 fprintf(stderr,
liguang0f9d76e2013-03-26 16:43:19 +0800746 "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
747 "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
748 "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
749 real_addr,
750 cmdline_addr,
751 prot_addr);
bellardbc4edd72007-11-07 16:54:42 +0000752#endif
ths642a4f92007-05-19 21:04:38 +0000753
754 /* highest address for loading the initrd */
liguang0f9d76e2013-03-26 16:43:19 +0800755 if (protocol >= 0x203) {
756 initrd_max = ldl_p(header+0x22c);
757 } else {
758 initrd_max = 0x37ffffff;
759 }
ths642a4f92007-05-19 21:04:38 +0000760
Glauber Costae6ade762009-05-18 16:35:58 -0400761 if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
762 initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
ths642a4f92007-05-19 21:04:38 +0000763
Alexander Graf57a46d02009-11-12 21:53:14 +0100764 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr);
765 fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline)+1);
Markus Armbruster96f80582013-01-16 14:50:25 +0100766 fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, kernel_cmdline);
ths642a4f92007-05-19 21:04:38 +0000767
768 if (protocol >= 0x202) {
liguang0f9d76e2013-03-26 16:43:19 +0800769 stl_p(header+0x228, cmdline_addr);
ths642a4f92007-05-19 21:04:38 +0000770 } else {
liguang0f9d76e2013-03-26 16:43:19 +0800771 stw_p(header+0x20, 0xA33F);
772 stw_p(header+0x22, cmdline_addr-real_addr);
ths642a4f92007-05-19 21:04:38 +0000773 }
774
Pascal Terjanbf4e5d92009-07-13 17:46:42 +0200775 /* handle vga= parameter */
776 vmode = strstr(kernel_cmdline, "vga=");
777 if (vmode) {
778 unsigned int video_mode;
779 /* skip "vga=" */
780 vmode += 4;
781 if (!strncmp(vmode, "normal", 6)) {
782 video_mode = 0xffff;
783 } else if (!strncmp(vmode, "ext", 3)) {
784 video_mode = 0xfffe;
785 } else if (!strncmp(vmode, "ask", 3)) {
786 video_mode = 0xfffd;
787 } else {
788 video_mode = strtol(vmode, NULL, 0);
789 }
790 stw_p(header+0x1fa, video_mode);
791 }
792
ths642a4f92007-05-19 21:04:38 +0000793 /* loader type */
Stefan Weil5cbdb3a2012-04-07 09:23:39 +0200794 /* High nybble = B reserved for QEMU; low nybble is revision number.
ths642a4f92007-05-19 21:04:38 +0000795 If this code is substantially changed, you may want to consider
796 incrementing the revision. */
liguang0f9d76e2013-03-26 16:43:19 +0800797 if (protocol >= 0x200) {
798 header[0x210] = 0xB0;
799 }
ths642a4f92007-05-19 21:04:38 +0000800 /* heap */
801 if (protocol >= 0x201) {
liguang0f9d76e2013-03-26 16:43:19 +0800802 header[0x211] |= 0x80; /* CAN_USE_HEAP */
803 stw_p(header+0x224, cmdline_addr-real_addr-0x200);
ths642a4f92007-05-19 21:04:38 +0000804 }
805
806 /* load initrd */
807 if (initrd_filename) {
liguang0f9d76e2013-03-26 16:43:19 +0800808 if (protocol < 0x200) {
809 fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
810 exit(1);
811 }
ths642a4f92007-05-19 21:04:38 +0000812
liguang0f9d76e2013-03-26 16:43:19 +0800813 initrd_size = get_image_size(initrd_filename);
M. Mohan Kumard6fa4b72010-04-12 10:01:33 +0530814 if (initrd_size < 0) {
815 fprintf(stderr, "qemu: error reading initrd %s\n",
816 initrd_filename);
817 exit(1);
818 }
819
Gerd Hoffmann45a50b12009-10-01 16:42:33 +0200820 initrd_addr = (initrd_max-initrd_size) & ~4095;
Alexander Graf57a46d02009-11-12 21:53:14 +0100821
Anthony Liguori7267c092011-08-20 22:09:37 -0500822 initrd_data = g_malloc(initrd_size);
Alexander Graf57a46d02009-11-12 21:53:14 +0100823 load_image(initrd_filename, initrd_data);
824
825 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
826 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
827 fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size);
ths642a4f92007-05-19 21:04:38 +0000828
liguang0f9d76e2013-03-26 16:43:19 +0800829 stl_p(header+0x218, initrd_addr);
830 stl_p(header+0x21c, initrd_size);
ths642a4f92007-05-19 21:04:38 +0000831 }
832
Gerd Hoffmann45a50b12009-10-01 16:42:33 +0200833 /* load kernel and setup */
ths642a4f92007-05-19 21:04:38 +0000834 setup_size = header[0x1f1];
liguang0f9d76e2013-03-26 16:43:19 +0800835 if (setup_size == 0) {
836 setup_size = 4;
837 }
ths642a4f92007-05-19 21:04:38 +0000838 setup_size = (setup_size+1)*512;
Gerd Hoffmann45a50b12009-10-01 16:42:33 +0200839 kernel_size -= setup_size;
ths642a4f92007-05-19 21:04:38 +0000840
Anthony Liguori7267c092011-08-20 22:09:37 -0500841 setup = g_malloc(setup_size);
842 kernel = g_malloc(kernel_size);
Gerd Hoffmann45a50b12009-10-01 16:42:33 +0200843 fseek(f, 0, SEEK_SET);
Kirill A. Shutemov5a41ecc2009-12-25 18:19:17 +0000844 if (fread(setup, 1, setup_size, f) != setup_size) {
845 fprintf(stderr, "fread() failed\n");
846 exit(1);
847 }
848 if (fread(kernel, 1, kernel_size, f) != kernel_size) {
849 fprintf(stderr, "fread() failed\n");
850 exit(1);
851 }
ths642a4f92007-05-19 21:04:38 +0000852 fclose(f);
Gerd Hoffmann45a50b12009-10-01 16:42:33 +0200853 memcpy(setup, header, MIN(sizeof(header), setup_size));
ths642a4f92007-05-19 21:04:38 +0000854
Alexander Graf57a46d02009-11-12 21:53:14 +0100855 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr);
856 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
857 fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size);
ths642a4f92007-05-19 21:04:38 +0000858
Alexander Graf57a46d02009-11-12 21:53:14 +0100859 fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr);
860 fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size);
861 fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size);
862
Gleb Natapov2e55e842010-12-08 13:35:07 +0200863 option_rom[nb_option_roms].name = "linuxboot.bin";
864 option_rom[nb_option_roms].bootindex = 0;
Alexander Graf57a46d02009-11-12 21:53:14 +0100865 nb_option_roms++;
ths642a4f92007-05-19 21:04:38 +0000866}
867
bellardb41a2cd2004-03-14 21:46:48 +0000868#define NE2000_NB_MAX 6
869
Blue Swirl675d6f82009-09-13 08:32:37 +0000870static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360,
871 0x280, 0x380 };
872static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
bellardb41a2cd2004-03-14 21:46:48 +0000873
Blue Swirl675d6f82009-09-13 08:32:37 +0000874static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
875static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
bellard6508fe52005-01-15 12:02:56 +0000876
Hervé Poussineau48a18b32011-12-15 22:09:51 +0100877void pc_init_ne2k_isa(ISABus *bus, NICInfo *nd)
pbrooka41b2ff2006-02-05 04:14:41 +0000878{
879 static int nb_ne2k = 0;
880
881 if (nb_ne2k == NE2000_NB_MAX)
882 return;
Hervé Poussineau48a18b32011-12-15 22:09:51 +0100883 isa_ne2000_init(bus, ne2000_io[nb_ne2k],
Gerd Hoffmann9453c5b2009-09-10 11:43:33 +0200884 ne2000_irq[nb_ne2k], nd);
pbrooka41b2ff2006-02-05 04:14:41 +0000885 nb_ne2k++;
886}
887
Blue Swirl92a16d72010-06-19 07:47:42 +0000888DeviceState *cpu_get_current_apic(void)
Blue Swirl0e26b7b2010-06-19 10:42:34 +0300889{
890 if (cpu_single_env) {
891 return cpu_single_env->apic_state;
892 } else {
893 return NULL;
894 }
895}
896
Isaku Yamahata845773a2010-05-14 16:29:15 +0900897void pc_acpi_smi_interrupt(void *opaque, int irq, int level)
Blue Swirl53b67b32010-03-29 19:23:52 +0000898{
Andreas Färberc3affe52013-01-18 15:03:43 +0100899 X86CPU *cpu = opaque;
Blue Swirl53b67b32010-03-29 19:23:52 +0000900
901 if (level) {
Andreas Färberc3affe52013-01-18 15:03:43 +0100902 cpu_interrupt(CPU(cpu), CPU_INTERRUPT_SMI);
Blue Swirl53b67b32010-03-29 19:23:52 +0000903 }
904}
905
Igor Mammedov62fc4032013-04-29 18:54:13 +0200906static X86CPU *pc_new_cpu(const char *cpu_model, int64_t apic_id,
907 DeviceState *icc_bridge, Error **errp)
Igor Mammedov31050932013-04-25 16:05:26 +0200908{
909 X86CPU *cpu;
910 Error *local_err = NULL;
911
Igor Mammedov62fc4032013-04-29 18:54:13 +0200912 cpu = cpu_x86_create(cpu_model, icc_bridge, errp);
Igor Mammedov31050932013-04-25 16:05:26 +0200913 if (!cpu) {
914 return cpu;
915 }
916
917 object_property_set_int(OBJECT(cpu), apic_id, "apic-id", &local_err);
918 object_property_set_bool(OBJECT(cpu), true, "realized", &local_err);
919
920 if (local_err) {
921 if (cpu != NULL) {
922 object_unref(OBJECT(cpu));
923 cpu = NULL;
924 }
925 error_propagate(errp, local_err);
926 }
927 return cpu;
928}
929
Igor Mammedovc6499832013-04-30 18:00:53 +0200930static const char *current_cpu_model;
931
932void pc_hot_add_cpu(const int64_t id, Error **errp)
933{
934 DeviceState *icc_bridge;
935 int64_t apic_id = x86_cpu_apic_id_from_index(id);
936
937 if (cpu_exists(apic_id)) {
938 error_setg(errp, "Unable to add CPU: %" PRIi64
939 ", it already exists", id);
940 return;
941 }
942
943 if (id >= max_cpus) {
944 error_setg(errp, "Unable to add CPU: %" PRIi64
945 ", max allowed: %d", id, max_cpus - 1);
946 return;
947 }
948
949 icc_bridge = DEVICE(object_resolve_path_type("icc-bridge",
950 TYPE_ICC_BRIDGE, NULL));
951 pc_new_cpu(current_cpu_model, apic_id, icc_bridge, errp);
952}
953
Igor Mammedov62fc4032013-04-29 18:54:13 +0200954void pc_cpus_init(const char *cpu_model, DeviceState *icc_bridge)
Isaku Yamahata70166472010-05-14 16:29:10 +0900955{
956 int i;
Igor Mammedov53a89e22013-04-29 19:03:01 +0200957 X86CPU *cpu = NULL;
Igor Mammedov31050932013-04-25 16:05:26 +0200958 Error *error = NULL;
Isaku Yamahata70166472010-05-14 16:29:10 +0900959
960 /* init CPUs */
961 if (cpu_model == NULL) {
962#ifdef TARGET_X86_64
963 cpu_model = "qemu64";
964#else
965 cpu_model = "qemu32";
966#endif
967 }
Igor Mammedovc6499832013-04-30 18:00:53 +0200968 current_cpu_model = cpu_model;
Isaku Yamahata70166472010-05-14 16:29:10 +0900969
Igor Mammedovbdeec802012-10-13 22:35:39 +0200970 for (i = 0; i < smp_cpus; i++) {
Igor Mammedov53a89e22013-04-29 19:03:01 +0200971 cpu = pc_new_cpu(cpu_model, x86_cpu_apic_id_from_index(i),
972 icc_bridge, &error);
Igor Mammedov31050932013-04-25 16:05:26 +0200973 if (error) {
974 fprintf(stderr, "%s\n", error_get_pretty(error));
975 error_free(error);
Igor Mammedovbdeec802012-10-13 22:35:39 +0200976 exit(1);
977 }
Isaku Yamahata70166472010-05-14 16:29:10 +0900978 }
Igor Mammedov53a89e22013-04-29 19:03:01 +0200979
980 /* map APIC MMIO area if CPU has APIC */
981 if (cpu && cpu->env.apic_state) {
982 /* XXX: what if the base changes? */
983 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(icc_bridge), 0,
984 APIC_DEFAULT_ADDRESS, 0x1000);
985 }
Isaku Yamahata70166472010-05-14 16:29:10 +0900986}
987
Gerd Hoffmannf7e4dd62012-12-03 10:47:27 +0100988void pc_acpi_init(const char *default_dsdt)
989{
Laszlo Ersekc5a98cf2013-03-21 00:23:22 +0100990 char *filename;
Gerd Hoffmannf7e4dd62012-12-03 10:47:27 +0100991
992 if (acpi_tables != NULL) {
993 /* manually set via -acpitable, leave it alone */
994 return;
995 }
996
997 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, default_dsdt);
998 if (filename == NULL) {
999 fprintf(stderr, "WARNING: failed to find %s\n", default_dsdt);
Laszlo Ersekc5a98cf2013-03-21 00:23:22 +01001000 } else {
1001 char *arg;
1002 QemuOpts *opts;
1003 Error *err = NULL;
1004
1005 arg = g_strdup_printf("file=%s", filename);
1006
1007 /* creates a deep copy of "arg" */
1008 opts = qemu_opts_parse(qemu_find_opts("acpi"), arg, 0);
1009 g_assert(opts != NULL);
1010
1011 acpi_table_add(opts, &err);
1012 if (err) {
1013 fprintf(stderr, "WARNING: failed to load %s: %s\n", filename,
1014 error_get_pretty(err));
1015 error_free(err);
1016 }
1017 g_free(arg);
1018 g_free(filename);
Gerd Hoffmannf7e4dd62012-12-03 10:47:27 +01001019 }
Gerd Hoffmannf7e4dd62012-12-03 10:47:27 +01001020}
1021
Laszlo Erseka88b3622013-04-16 02:24:08 +02001022FWCfgState *pc_memory_init(MemoryRegion *system_memory,
1023 const char *kernel_filename,
1024 const char *kernel_cmdline,
1025 const char *initrd_filename,
1026 ram_addr_t below_4g_mem_size,
1027 ram_addr_t above_4g_mem_size,
1028 MemoryRegion *rom_memory,
1029 MemoryRegion **ram_memory)
bellard80cabfa2004-03-14 12:20:30 +00001030{
Jordan Justencbc5b5f2012-02-21 23:18:51 -08001031 int linux_boot, i;
1032 MemoryRegion *ram, *option_rom_mr;
Avi Kivity00cb2a92011-07-26 14:26:17 +03001033 MemoryRegion *ram_below_4g, *ram_above_4g;
Laszlo Erseka88b3622013-04-16 02:24:08 +02001034 FWCfgState *fw_cfg;
bellardd592d302005-07-23 19:05:37 +00001035
bellard80cabfa2004-03-14 12:20:30 +00001036 linux_boot = (kernel_filename != NULL);
1037
Avi Kivity00cb2a92011-07-26 14:26:17 +03001038 /* Allocate RAM. We allocate it as a single memory region and use
Dong Xu Wang66a0a2c2011-11-29 16:52:39 +08001039 * aliases to address portions of it, mostly for backwards compatibility
Avi Kivity00cb2a92011-07-26 14:26:17 +03001040 * with older qemus that used qemu_ram_alloc().
1041 */
Anthony Liguori7267c092011-08-20 22:09:37 -05001042 ram = g_malloc(sizeof(*ram));
Avi Kivityc5705a72011-12-20 15:59:12 +02001043 memory_region_init_ram(ram, "pc.ram",
Avi Kivity00cb2a92011-07-26 14:26:17 +03001044 below_4g_mem_size + above_4g_mem_size);
Avi Kivityc5705a72011-12-20 15:59:12 +02001045 vmstate_register_ram_global(ram);
Avi Kivityae0a5462011-08-15 17:17:38 +03001046 *ram_memory = ram;
Anthony Liguori7267c092011-08-20 22:09:37 -05001047 ram_below_4g = g_malloc(sizeof(*ram_below_4g));
Avi Kivity00cb2a92011-07-26 14:26:17 +03001048 memory_region_init_alias(ram_below_4g, "ram-below-4g", ram,
1049 0, below_4g_mem_size);
1050 memory_region_add_subregion(system_memory, 0, ram_below_4g);
Alex Williamsonbbe80ad2010-07-06 10:37:17 -06001051 if (above_4g_mem_size > 0) {
Anthony Liguori7267c092011-08-20 22:09:37 -05001052 ram_above_4g = g_malloc(sizeof(*ram_above_4g));
Avi Kivity00cb2a92011-07-26 14:26:17 +03001053 memory_region_init_alias(ram_above_4g, "ram-above-4g", ram,
1054 below_4g_mem_size, above_4g_mem_size);
1055 memory_region_add_subregion(system_memory, 0x100000000ULL,
1056 ram_above_4g);
Alex Williamsonbbe80ad2010-07-06 10:37:17 -06001057 }
aliguori82b36dc2008-09-15 16:01:01 +00001058
Jordan Justencbc5b5f2012-02-21 23:18:51 -08001059
1060 /* Initialize PC system firmware */
1061 pc_system_firmware_init(rom_memory);
ths9ae02552007-01-05 17:39:04 +00001062
Anthony Liguori7267c092011-08-20 22:09:37 -05001063 option_rom_mr = g_malloc(sizeof(*option_rom_mr));
Avi Kivityc5705a72011-12-20 15:59:12 +02001064 memory_region_init_ram(option_rom_mr, "pc.rom", PC_ROM_SIZE);
1065 vmstate_register_ram_global(option_rom_mr);
Jan Kiszka4463aee2011-09-21 20:49:29 +02001066 memory_region_add_subregion_overlap(rom_memory,
Avi Kivity00cb2a92011-07-26 14:26:17 +03001067 PC_ROM_MIN_VGA,
1068 option_rom_mr,
1069 1);
pbrookf753ff12009-04-09 20:59:05 +00001070
Alexander Grafbf483392009-06-29 15:37:38 +02001071 fw_cfg = bochs_bios_init();
Gerd Hoffmann8832cb82010-01-08 15:25:40 +01001072 rom_set_fw(fw_cfg);
Alexander Graf1d108d92009-06-29 15:37:37 +02001073
pbrookf753ff12009-04-09 20:59:05 +00001074 if (linux_boot) {
Eduard - Gabriel Munteanu81a204e2010-05-20 09:14:04 +03001075 load_linux(fw_cfg, kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
pbrookf753ff12009-04-09 20:59:05 +00001076 }
1077
1078 for (i = 0; i < nb_option_roms; i++) {
Gleb Natapov2e55e842010-12-08 13:35:07 +02001079 rom_add_option(option_rom[i].name, option_rom[i].bootindex);
Glauber Costa406c8df2009-06-17 09:05:30 -04001080 }
Gleb Natapov459ae5e2012-06-04 14:31:55 +03001081 return fw_cfg;
Isaku Yamahata3d53f5c2010-05-14 16:29:11 +09001082}
1083
Isaku Yamahata845773a2010-05-14 16:29:15 +09001084qemu_irq *pc_allocate_cpu_irq(void)
1085{
1086 return qemu_allocate_irqs(pic_irq_request, NULL, 1);
1087}
1088
Hervé Poussineau48a18b32011-12-15 22:09:51 +01001089DeviceState *pc_vga_init(ISABus *isa_bus, PCIBus *pci_bus)
Isaku Yamahata765d7902010-05-14 16:29:12 +09001090{
Anthony Liguoriad6d45f2011-12-12 14:29:41 -06001091 DeviceState *dev = NULL;
1092
Aurelien Jarno16094b72012-09-08 12:47:45 +02001093 if (pci_bus) {
1094 PCIDevice *pcidev = pci_vga_init(pci_bus);
1095 dev = pcidev ? &pcidev->qdev : NULL;
1096 } else if (isa_bus) {
1097 ISADevice *isadev = isa_vga_init(isa_bus);
Andreas Färber4a17cc42013-06-07 13:49:13 +02001098 dev = isadev ? DEVICE(isadev) : NULL;
Isaku Yamahata765d7902010-05-14 16:29:12 +09001099 }
Anthony Liguoriad6d45f2011-12-12 14:29:41 -06001100 return dev;
Isaku Yamahata765d7902010-05-14 16:29:12 +09001101}
1102
Blue Swirl4556bd82010-05-22 08:00:52 +00001103static void cpu_request_exit(void *opaque, int irq, int level)
1104{
Andreas Färber4a8fa5d2012-03-14 01:38:23 +01001105 CPUX86State *env = cpu_single_env;
Blue Swirl4556bd82010-05-22 08:00:52 +00001106
1107 if (env && level) {
1108 cpu_exit(env);
1109 }
1110}
1111
Julien Grall258711c2012-09-19 12:50:08 +01001112static const MemoryRegionOps ioport80_io_ops = {
1113 .write = ioport80_write,
Julien Grallc02e1ea2013-01-09 18:10:22 +00001114 .read = ioport80_read,
Julien Grall258711c2012-09-19 12:50:08 +01001115 .endianness = DEVICE_NATIVE_ENDIAN,
1116 .impl = {
1117 .min_access_size = 1,
1118 .max_access_size = 1,
1119 },
1120};
1121
1122static const MemoryRegionOps ioportF0_io_ops = {
1123 .write = ioportF0_write,
Julien Grallc02e1ea2013-01-09 18:10:22 +00001124 .read = ioportF0_read,
Julien Grall258711c2012-09-19 12:50:08 +01001125 .endianness = DEVICE_NATIVE_ENDIAN,
1126 .impl = {
1127 .min_access_size = 1,
1128 .max_access_size = 1,
1129 },
1130};
1131
Hervé Poussineau48a18b32011-12-15 22:09:51 +01001132void pc_basic_device_init(ISABus *isa_bus, qemu_irq *gsi,
Anthony PERARD16119772011-05-03 17:06:54 +01001133 ISADevice **rtc_state,
Kevin Wolf34d42602011-10-20 16:37:26 +02001134 ISADevice **floppy,
Anthony PERARD16119772011-05-03 17:06:54 +01001135 bool no_vmport)
Isaku Yamahataffe513d2010-05-14 16:29:13 +09001136{
1137 int i;
1138 DriveInfo *fd[MAX_FD];
Jan Kiszkace967e22012-02-01 20:31:41 +01001139 DeviceState *hpet = NULL;
1140 int pit_isa_irq = 0;
1141 qemu_irq pit_alt_irq = NULL;
Jan Kiszka7d932df2010-06-13 14:15:40 +02001142 qemu_irq rtc_irq = NULL;
Blue Swirl956a3e62010-05-22 07:59:01 +00001143 qemu_irq *a20_line;
Stefano Stabellinic2d8d312011-11-14 15:07:01 +00001144 ISADevice *i8042, *port92, *vmmouse, *pit = NULL;
Blue Swirl4556bd82010-05-22 08:00:52 +00001145 qemu_irq *cpu_exit_irq;
Julien Grall258711c2012-09-19 12:50:08 +01001146 MemoryRegion *ioport80_io = g_new(MemoryRegion, 1);
1147 MemoryRegion *ioportF0_io = g_new(MemoryRegion, 1);
Isaku Yamahataffe513d2010-05-14 16:29:13 +09001148
Julien Grall258711c2012-09-19 12:50:08 +01001149 memory_region_init_io(ioport80_io, &ioport80_io_ops, NULL, "ioport80", 1);
1150 memory_region_add_subregion(isa_bus->address_space_io, 0x80, ioport80_io);
Isaku Yamahataffe513d2010-05-14 16:29:13 +09001151
Julien Grall258711c2012-09-19 12:50:08 +01001152 memory_region_init_io(ioportF0_io, &ioportF0_io_ops, NULL, "ioportF0", 1);
1153 memory_region_add_subregion(isa_bus->address_space_io, 0xf0, ioportF0_io);
Isaku Yamahataffe513d2010-05-14 16:29:13 +09001154
Jan Kiszka5d17c0d2012-03-02 20:28:49 +01001155 /*
1156 * Check if an HPET shall be created.
1157 *
1158 * Without KVM_CAP_PIT_STATE2, we cannot switch off the in-kernel PIT
1159 * when the HPET wants to take over. Thus we have to disable the latter.
1160 */
1161 if (!no_hpet && (!kvm_irqchip_in_kernel() || kvm_has_pit_state2())) {
Jan Kiszkace967e22012-02-01 20:31:41 +01001162 hpet = sysbus_try_create_simple("hpet", HPET_BASE, NULL);
Jan Kiszka822557e2010-06-13 14:15:38 +02001163
Blue Swirldd703b92011-02-05 14:35:00 +00001164 if (hpet) {
Jan Kiszkab881fbe2011-10-07 09:19:35 +02001165 for (i = 0; i < GSI_NUM_PINS; i++) {
Andreas Färber1356b982013-01-20 02:47:33 +01001166 sysbus_connect_irq(SYS_BUS_DEVICE(hpet), i, gsi[i]);
Blue Swirldd703b92011-02-05 14:35:00 +00001167 }
Jan Kiszkace967e22012-02-01 20:31:41 +01001168 pit_isa_irq = -1;
1169 pit_alt_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_PIT_INT);
1170 rtc_irq = qdev_get_gpio_in(hpet, HPET_LEGACY_RTC_INT);
Jan Kiszka822557e2010-06-13 14:15:38 +02001171 }
Isaku Yamahataffe513d2010-05-14 16:29:13 +09001172 }
Hervé Poussineau48a18b32011-12-15 22:09:51 +01001173 *rtc_state = rtc_init(isa_bus, 2000, rtc_irq);
Jan Kiszka7d932df2010-06-13 14:15:40 +02001174
1175 qemu_register_boot_set(pc_boot_set, *rtc_state);
1176
Stefano Stabellinic2d8d312011-11-14 15:07:01 +00001177 if (!xen_enabled()) {
1178 if (kvm_irqchip_in_kernel()) {
1179 pit = kvm_pit_init(isa_bus, 0x40);
1180 } else {
1181 pit = pit_init(isa_bus, 0x40, pit_isa_irq, pit_alt_irq);
1182 }
1183 if (hpet) {
1184 /* connect PIT to output control line of the HPET */
Andreas Färber4a17cc42013-06-07 13:49:13 +02001185 qdev_connect_gpio_out(hpet, 0, qdev_get_gpio_in(DEVICE(pit), 0));
Stefano Stabellinic2d8d312011-11-14 15:07:01 +00001186 }
1187 pcspk_init(isa_bus, pit);
Jan Kiszka5d17c0d2012-03-02 20:28:49 +01001188 }
Isaku Yamahataffe513d2010-05-14 16:29:13 +09001189
1190 for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1191 if (serial_hds[i]) {
Hervé Poussineau48a18b32011-12-15 22:09:51 +01001192 serial_isa_init(isa_bus, i, serial_hds[i]);
Isaku Yamahataffe513d2010-05-14 16:29:13 +09001193 }
1194 }
1195
1196 for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1197 if (parallel_hds[i]) {
Hervé Poussineau48a18b32011-12-15 22:09:51 +01001198 parallel_init(isa_bus, i, parallel_hds[i]);
Isaku Yamahataffe513d2010-05-14 16:29:13 +09001199 }
1200 }
1201
Andreas Färbercc36a7a2013-01-18 15:19:06 +01001202 a20_line = qemu_allocate_irqs(handle_a20_line_change,
1203 x86_env_get_cpu(first_cpu), 2);
Hervé Poussineau48a18b32011-12-15 22:09:51 +01001204 i8042 = isa_create_simple(isa_bus, "i8042");
Blue Swirl4b78a802011-01-06 18:24:35 +00001205 i8042_setup_a20_line(i8042, &a20_line[0]);
Anthony PERARD16119772011-05-03 17:06:54 +01001206 if (!no_vmport) {
Hervé Poussineau48a18b32011-12-15 22:09:51 +01001207 vmport_init(isa_bus);
1208 vmmouse = isa_try_create(isa_bus, "vmmouse");
Anthony PERARD16119772011-05-03 17:06:54 +01001209 } else {
1210 vmmouse = NULL;
1211 }
Blue Swirl86d86412011-02-05 14:34:52 +00001212 if (vmmouse) {
Andreas Färber4a17cc42013-06-07 13:49:13 +02001213 DeviceState *dev = DEVICE(vmmouse);
1214 qdev_prop_set_ptr(dev, "ps2_mouse", i8042);
1215 qdev_init_nofail(dev);
Blue Swirl86d86412011-02-05 14:34:52 +00001216 }
Hervé Poussineau48a18b32011-12-15 22:09:51 +01001217 port92 = isa_create_simple(isa_bus, "port92");
Blue Swirl4b78a802011-01-06 18:24:35 +00001218 port92_init(port92, &a20_line[1]);
Blue Swirl956a3e62010-05-22 07:59:01 +00001219
Blue Swirl4556bd82010-05-22 08:00:52 +00001220 cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
1221 DMA_init(0, cpu_exit_irq);
Isaku Yamahataffe513d2010-05-14 16:29:13 +09001222
1223 for(i = 0; i < MAX_FD; i++) {
1224 fd[i] = drive_get(IF_FLOPPY, 0, i);
1225 }
Hervé Poussineau48a18b32011-12-15 22:09:51 +01001226 *floppy = fdctrl_init_isa(isa_bus, fd);
Isaku Yamahataffe513d2010-05-14 16:29:13 +09001227}
1228
Isaku Yamahata9011a1a2012-11-14 15:54:01 -05001229void pc_nic_init(ISABus *isa_bus, PCIBus *pci_bus)
1230{
1231 int i;
1232
1233 for (i = 0; i < nb_nics; i++) {
1234 NICInfo *nd = &nd_table[i];
1235
1236 if (!pci_bus || (nd->model && strcmp(nd->model, "ne2k_isa") == 0)) {
1237 pc_init_ne2k_isa(isa_bus, nd);
1238 } else {
1239 pci_nic_init_nofail(nd, "e1000", NULL);
1240 }
1241 }
1242}
1243
Isaku Yamahata845773a2010-05-14 16:29:15 +09001244void pc_pci_device_init(PCIBus *pci_bus)
Isaku Yamahatae3a5cf42010-05-14 16:29:14 +09001245{
1246 int max_bus;
1247 int bus;
1248
1249 max_bus = drive_get_max_bus(IF_SCSI);
1250 for (bus = 0; bus <= max_bus; bus++) {
1251 pci_create_simple(pci_bus, -1, "lsi53c895a");
1252 }
1253}
Jason Barona39e3562012-11-14 15:54:01 -05001254
1255void ioapic_init_gsi(GSIState *gsi_state, const char *parent_name)
1256{
1257 DeviceState *dev;
1258 SysBusDevice *d;
1259 unsigned int i;
1260
1261 if (kvm_irqchip_in_kernel()) {
1262 dev = qdev_create(NULL, "kvm-ioapic");
1263 } else {
1264 dev = qdev_create(NULL, "ioapic");
1265 }
1266 if (parent_name) {
1267 object_property_add_child(object_resolve_path(parent_name, NULL),
1268 "ioapic", OBJECT(dev), NULL);
1269 }
1270 qdev_init_nofail(dev);
Andreas Färber1356b982013-01-20 02:47:33 +01001271 d = SYS_BUS_DEVICE(dev);
Laszlo Ersek3a4a4692013-03-21 00:23:21 +01001272 sysbus_mmio_map(d, 0, IO_APIC_DEFAULT_ADDRESS);
Jason Barona39e3562012-11-14 15:54:01 -05001273
1274 for (i = 0; i < IOAPIC_NUM_PINS; i++) {
1275 gsi_state->ioapic_irq[i] = qdev_get_gpio_in(dev, i);
1276 }
1277}