bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Software MMU support |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 18 | */ |
| 19 | #define DATA_SIZE (1 << SHIFT) |
| 20 | |
| 21 | #if DATA_SIZE == 8 |
| 22 | #define SUFFIX q |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 23 | #define USUFFIX q |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 24 | #define DATA_TYPE uint64_t |
| 25 | #elif DATA_SIZE == 4 |
| 26 | #define SUFFIX l |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 27 | #define USUFFIX l |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 28 | #define DATA_TYPE uint32_t |
| 29 | #elif DATA_SIZE == 2 |
| 30 | #define SUFFIX w |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 31 | #define USUFFIX uw |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 32 | #define DATA_TYPE uint16_t |
| 33 | #elif DATA_SIZE == 1 |
| 34 | #define SUFFIX b |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 35 | #define USUFFIX ub |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 36 | #define DATA_TYPE uint8_t |
| 37 | #else |
| 38 | #error unsupported data size |
| 39 | #endif |
| 40 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 41 | #ifdef SOFTMMU_CODE_ACCESS |
| 42 | #define READ_ACCESS_TYPE 2 |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 43 | #define ADDR_READ addr_code |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 44 | #else |
| 45 | #define READ_ACCESS_TYPE 0 |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 46 | #define ADDR_READ addr_read |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 47 | #endif |
| 48 | |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 49 | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 50 | int mmu_idx, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 51 | void *retaddr); |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 52 | static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr, |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 53 | target_ulong addr, |
| 54 | void *retaddr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 55 | { |
| 56 | DATA_TYPE res; |
| 57 | int index; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 58 | index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); |
| 59 | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 60 | env->mem_io_pc = (unsigned long)retaddr; |
| 61 | if (index > (IO_MEM_NOTDIRTY >> IO_MEM_SHIFT) |
| 62 | && !can_do_io(env)) { |
| 63 | cpu_io_recompile(env, retaddr); |
| 64 | } |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 65 | |
aliguori | db8886d | 2008-11-18 20:09:43 +0000 | [diff] [blame] | 66 | env->mem_io_vaddr = addr; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 67 | #if SHIFT <= 2 |
bellard | a4193c8 | 2004-06-03 14:01:43 +0000 | [diff] [blame] | 68 | res = io_mem_read[index][SHIFT](io_mem_opaque[index], physaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 69 | #else |
| 70 | #ifdef TARGET_WORDS_BIGENDIAN |
bellard | a4193c8 | 2004-06-03 14:01:43 +0000 | [diff] [blame] | 71 | res = (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr) << 32; |
| 72 | res |= io_mem_read[index][2](io_mem_opaque[index], physaddr + 4); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 73 | #else |
bellard | a4193c8 | 2004-06-03 14:01:43 +0000 | [diff] [blame] | 74 | res = io_mem_read[index][2](io_mem_opaque[index], physaddr); |
| 75 | res |= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr + 4) << 32; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 76 | #endif |
| 77 | #endif /* SHIFT > 2 */ |
| 78 | return res; |
| 79 | } |
| 80 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 81 | /* handle all cases except unaligned access which span two pages */ |
bellard | d656469 | 2008-01-31 09:22:27 +0000 | [diff] [blame] | 82 | DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
| 83 | int mmu_idx) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 84 | { |
| 85 | DATA_TYPE res; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 86 | int index; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 87 | target_ulong tlb_addr; |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 88 | target_phys_addr_t addend; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 89 | void *retaddr; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 90 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 91 | /* test if there is match for unaligned or IO access */ |
| 92 | /* XXX: could done more in memory macro in a non portable way */ |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 93 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 94 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 95 | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 96 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 97 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 98 | /* IO access */ |
| 99 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 100 | goto do_unaligned_access; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 101 | retaddr = GETPC(); |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 102 | addend = env->iotlb[mmu_idx][index]; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 103 | res = glue(io_read, SUFFIX)(addend, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 104 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 105 | /* slow unaligned access (it spans two pages or IO) */ |
| 106 | do_unaligned_access: |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 107 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 108 | #ifdef ALIGNED_ONLY |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 109 | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 110 | #endif |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 111 | res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 112 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 113 | } else { |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 114 | /* unaligned/aligned access in the same page */ |
| 115 | #ifdef ALIGNED_ONLY |
| 116 | if ((addr & (DATA_SIZE - 1)) != 0) { |
| 117 | retaddr = GETPC(); |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 118 | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 119 | } |
| 120 | #endif |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 121 | addend = env->tlb_table[mmu_idx][index].addend; |
| 122 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend)); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 123 | } |
| 124 | } else { |
| 125 | /* the page is not in the TLB : fill it */ |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 126 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 127 | #ifdef ALIGNED_ONLY |
| 128 | if ((addr & (DATA_SIZE - 1)) != 0) |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 129 | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 130 | #endif |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 131 | tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 132 | goto redo; |
| 133 | } |
| 134 | return res; |
| 135 | } |
| 136 | |
| 137 | /* handle all unaligned cases */ |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 138 | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 139 | int mmu_idx, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 140 | void *retaddr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 141 | { |
| 142 | DATA_TYPE res, res1, res2; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 143 | int index, shift; |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 144 | target_phys_addr_t addend; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 145 | target_ulong tlb_addr, addr1, addr2; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 146 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 147 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 148 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 149 | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 150 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 151 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 152 | /* IO access */ |
| 153 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 154 | goto do_unaligned_access; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 155 | addend = env->iotlb[mmu_idx][index]; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 156 | res = glue(io_read, SUFFIX)(addend, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 157 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 158 | do_unaligned_access: |
| 159 | /* slow unaligned access (it spans two pages) */ |
| 160 | addr1 = addr & ~(DATA_SIZE - 1); |
| 161 | addr2 = addr1 + DATA_SIZE; |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 162 | res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 163 | mmu_idx, retaddr); |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 164 | res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 165 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 166 | shift = (addr & (DATA_SIZE - 1)) * 8; |
| 167 | #ifdef TARGET_WORDS_BIGENDIAN |
| 168 | res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift)); |
| 169 | #else |
| 170 | res = (res1 >> shift) | (res2 << ((DATA_SIZE * 8) - shift)); |
| 171 | #endif |
bellard | 6986f88 | 2004-01-18 21:53:18 +0000 | [diff] [blame] | 172 | res = (DATA_TYPE)res; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 173 | } else { |
| 174 | /* unaligned/aligned access in the same page */ |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 175 | addend = env->tlb_table[mmu_idx][index].addend; |
| 176 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend)); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 177 | } |
| 178 | } else { |
| 179 | /* the page is not in the TLB : fill it */ |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 180 | tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 181 | goto redo; |
| 182 | } |
| 183 | return res; |
| 184 | } |
| 185 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 186 | #ifndef SOFTMMU_CODE_ACCESS |
| 187 | |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 188 | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
| 189 | DATA_TYPE val, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 190 | int mmu_idx, |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 191 | void *retaddr); |
| 192 | |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 193 | static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr, |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 194 | DATA_TYPE val, |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 195 | target_ulong addr, |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 196 | void *retaddr) |
| 197 | { |
| 198 | int index; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 199 | index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); |
| 200 | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 201 | if (index > (IO_MEM_NOTDIRTY >> IO_MEM_SHIFT) |
| 202 | && !can_do_io(env)) { |
| 203 | cpu_io_recompile(env, retaddr); |
| 204 | } |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 205 | |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 206 | env->mem_io_vaddr = addr; |
| 207 | env->mem_io_pc = (unsigned long)retaddr; |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 208 | #if SHIFT <= 2 |
| 209 | io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val); |
| 210 | #else |
| 211 | #ifdef TARGET_WORDS_BIGENDIAN |
| 212 | io_mem_write[index][2](io_mem_opaque[index], physaddr, val >> 32); |
| 213 | io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val); |
| 214 | #else |
| 215 | io_mem_write[index][2](io_mem_opaque[index], physaddr, val); |
| 216 | io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val >> 32); |
| 217 | #endif |
| 218 | #endif /* SHIFT > 2 */ |
| 219 | } |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 220 | |
bellard | d656469 | 2008-01-31 09:22:27 +0000 | [diff] [blame] | 221 | void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
| 222 | DATA_TYPE val, |
| 223 | int mmu_idx) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 224 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 225 | target_phys_addr_t addend; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 226 | target_ulong tlb_addr; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 227 | void *retaddr; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 228 | int index; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 229 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 230 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 231 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 232 | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 233 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 234 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 235 | /* IO access */ |
| 236 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 237 | goto do_unaligned_access; |
bellard | d720b93 | 2004-04-25 17:57:43 +0000 | [diff] [blame] | 238 | retaddr = GETPC(); |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 239 | addend = env->iotlb[mmu_idx][index]; |
| 240 | glue(io_write, SUFFIX)(addend, val, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 241 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 242 | do_unaligned_access: |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 243 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 244 | #ifdef ALIGNED_ONLY |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 245 | do_unaligned_access(addr, 1, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 246 | #endif |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 247 | glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 248 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 249 | } else { |
| 250 | /* aligned/unaligned access in the same page */ |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 251 | #ifdef ALIGNED_ONLY |
| 252 | if ((addr & (DATA_SIZE - 1)) != 0) { |
| 253 | retaddr = GETPC(); |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 254 | do_unaligned_access(addr, 1, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 255 | } |
| 256 | #endif |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 257 | addend = env->tlb_table[mmu_idx][index].addend; |
| 258 | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 259 | } |
| 260 | } else { |
| 261 | /* the page is not in the TLB : fill it */ |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 262 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 263 | #ifdef ALIGNED_ONLY |
| 264 | if ((addr & (DATA_SIZE - 1)) != 0) |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 265 | do_unaligned_access(addr, 1, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 266 | #endif |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 267 | tlb_fill(addr, 1, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 268 | goto redo; |
| 269 | } |
| 270 | } |
| 271 | |
| 272 | /* handles all unaligned cases */ |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 273 | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 274 | DATA_TYPE val, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 275 | int mmu_idx, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 276 | void *retaddr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 277 | { |
Anthony Liguori | c227f09 | 2009-10-01 16:12:16 -0500 | [diff] [blame] | 278 | target_phys_addr_t addend; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 279 | target_ulong tlb_addr; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 280 | int index, i; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 281 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 282 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 283 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 284 | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 285 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 286 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 287 | /* IO access */ |
| 288 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 289 | goto do_unaligned_access; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 290 | addend = env->iotlb[mmu_idx][index]; |
| 291 | glue(io_write, SUFFIX)(addend, val, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 292 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 293 | do_unaligned_access: |
| 294 | /* XXX: not efficient, but simple */ |
balrog | 6c41b27 | 2007-11-17 12:12:29 +0000 | [diff] [blame] | 295 | /* Note: relies on the fact that tlb_fill() does not remove the |
| 296 | * previous page from the TLB cache. */ |
balrog | 7221fa9 | 2007-11-17 09:53:42 +0000 | [diff] [blame] | 297 | for(i = DATA_SIZE - 1; i >= 0; i--) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 298 | #ifdef TARGET_WORDS_BIGENDIAN |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 299 | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)), |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 300 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 301 | #else |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 302 | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8), |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 303 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 304 | #endif |
| 305 | } |
| 306 | } else { |
| 307 | /* aligned/unaligned access in the same page */ |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 308 | addend = env->tlb_table[mmu_idx][index].addend; |
| 309 | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 310 | } |
| 311 | } else { |
| 312 | /* the page is not in the TLB : fill it */ |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 313 | tlb_fill(addr, 1, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 314 | goto redo; |
| 315 | } |
| 316 | } |
| 317 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 318 | #endif /* !defined(SOFTMMU_CODE_ACCESS) */ |
| 319 | |
| 320 | #undef READ_ACCESS_TYPE |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 321 | #undef SHIFT |
| 322 | #undef DATA_TYPE |
| 323 | #undef SUFFIX |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 324 | #undef USUFFIX |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 325 | #undef DATA_SIZE |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 326 | #undef ADDR_READ |