blob: 319784d689047b546709246b30705abdb557e950 [file] [log] [blame]
Christoffer Dall494b00c2013-03-05 00:34:41 +00001/*
2 * ARM implementation of KVM hooks
3 *
4 * Copyright Christoffer Dall 2009-2010
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2 or later.
7 * See the COPYING file in the top-level directory.
8 *
9 */
10
11#include <stdio.h>
12#include <sys/types.h>
13#include <sys/ioctl.h>
14#include <sys/mman.h>
15
16#include <linux/kvm.h>
17
18#include "qemu-common.h"
19#include "qemu/timer.h"
20#include "sysemu/sysemu.h"
21#include "sysemu/kvm.h"
Peter Maydelleb035b42013-03-05 00:34:42 +000022#include "kvm_arm.h"
Christoffer Dall494b00c2013-03-05 00:34:41 +000023#include "cpu.h"
Peter Maydellbd2be152013-04-09 15:26:55 +010024#include "hw/arm/arm.h"
Christoffer Dall494b00c2013-03-05 00:34:41 +000025
26const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
27 KVM_CAP_LAST_INFO
28};
29
Pranavkumar Sawargaonkar228d5e02014-06-19 18:06:26 +010030int kvm_arm_vcpu_init(CPUState *cs)
31{
32 ARMCPU *cpu = ARM_CPU(cs);
33 struct kvm_vcpu_init init;
34
35 init.target = cpu->kvm_target;
36 memcpy(init.features, cpu->kvm_init_features, sizeof(init.features));
37
38 return kvm_vcpu_ioctl(cs, KVM_ARM_VCPU_INIT, &init);
39}
40
Peter Maydella96c0512013-11-22 17:17:17 +000041bool kvm_arm_create_scratch_host_vcpu(const uint32_t *cpus_to_try,
42 int *fdarray,
43 struct kvm_vcpu_init *init)
44{
45 int ret, kvmfd = -1, vmfd = -1, cpufd = -1;
46
47 kvmfd = qemu_open("/dev/kvm", O_RDWR);
48 if (kvmfd < 0) {
49 goto err;
50 }
51 vmfd = ioctl(kvmfd, KVM_CREATE_VM, 0);
52 if (vmfd < 0) {
53 goto err;
54 }
55 cpufd = ioctl(vmfd, KVM_CREATE_VCPU, 0);
56 if (cpufd < 0) {
57 goto err;
58 }
59
60 ret = ioctl(vmfd, KVM_ARM_PREFERRED_TARGET, init);
61 if (ret >= 0) {
62 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
63 if (ret < 0) {
64 goto err;
65 }
66 } else {
67 /* Old kernel which doesn't know about the
68 * PREFERRED_TARGET ioctl: we know it will only support
69 * creating one kind of guest CPU which is its preferred
70 * CPU type.
71 */
72 while (*cpus_to_try != QEMU_KVM_ARM_TARGET_NONE) {
73 init->target = *cpus_to_try++;
74 memset(init->features, 0, sizeof(init->features));
75 ret = ioctl(cpufd, KVM_ARM_VCPU_INIT, init);
76 if (ret >= 0) {
77 break;
78 }
79 }
80 if (ret < 0) {
81 goto err;
82 }
83 }
84
85 fdarray[0] = kvmfd;
86 fdarray[1] = vmfd;
87 fdarray[2] = cpufd;
88
89 return true;
90
91err:
92 if (cpufd >= 0) {
93 close(cpufd);
94 }
95 if (vmfd >= 0) {
96 close(vmfd);
97 }
98 if (kvmfd >= 0) {
99 close(kvmfd);
100 }
101
102 return false;
103}
104
105void kvm_arm_destroy_scratch_host_vcpu(int *fdarray)
106{
107 int i;
108
109 for (i = 2; i >= 0; i--) {
110 close(fdarray[i]);
111 }
112}
113
Peter Maydella96c0512013-11-22 17:17:17 +0000114static void kvm_arm_host_cpu_class_init(ObjectClass *oc, void *data)
115{
116 ARMHostCPUClass *ahcc = ARM_HOST_CPU_CLASS(oc);
117
118 /* All we really need to set up for the 'host' CPU
119 * is the feature bits -- we rely on the fact that the
120 * various ID register values in ARMCPU are only used for
121 * TCG CPUs.
122 */
123 if (!kvm_arm_get_host_cpu_features(ahcc)) {
124 fprintf(stderr, "Failed to retrieve host CPU features!\n");
125 abort();
126 }
127}
128
129static void kvm_arm_host_cpu_initfn(Object *obj)
130{
131 ARMHostCPUClass *ahcc = ARM_HOST_CPU_GET_CLASS(obj);
132 ARMCPU *cpu = ARM_CPU(obj);
133 CPUARMState *env = &cpu->env;
134
135 cpu->kvm_target = ahcc->target;
136 cpu->dtb_compatible = ahcc->dtb_compatible;
137 env->features = ahcc->features;
138}
139
140static const TypeInfo host_arm_cpu_type_info = {
141 .name = TYPE_ARM_HOST_CPU,
Mian M. Hamayun26861c72013-12-17 19:42:30 +0000142#ifdef TARGET_AARCH64
143 .parent = TYPE_AARCH64_CPU,
144#else
Peter Maydella96c0512013-11-22 17:17:17 +0000145 .parent = TYPE_ARM_CPU,
Mian M. Hamayun26861c72013-12-17 19:42:30 +0000146#endif
Peter Maydella96c0512013-11-22 17:17:17 +0000147 .instance_init = kvm_arm_host_cpu_initfn,
148 .class_init = kvm_arm_host_cpu_class_init,
149 .class_size = sizeof(ARMHostCPUClass),
150};
151
Christoffer Dall494b00c2013-03-05 00:34:41 +0000152int kvm_arch_init(KVMState *s)
153{
154 /* For ARM interrupt delivery is always asynchronous,
155 * whether we are using an in-kernel VGIC or not.
156 */
157 kvm_async_interrupts_allowed = true;
Peter Maydella96c0512013-11-22 17:17:17 +0000158
159 type_register_static(&host_arm_cpu_type_info);
160
Christoffer Dall494b00c2013-03-05 00:34:41 +0000161 return 0;
162}
163
164unsigned long kvm_arch_vcpu_id(CPUState *cpu)
165{
166 return cpu->cpu_index;
167}
168
Peter Maydelleb035b42013-03-05 00:34:42 +0000169/* We track all the KVM devices which need their memory addresses
170 * passing to the kernel in a list of these structures.
171 * When board init is complete we run through the list and
172 * tell the kernel the base addresses of the memory regions.
173 * We use a MemoryListener to track mapping and unmapping of
174 * the regions during board creation, so the board models don't
175 * need to do anything special for the KVM case.
176 */
177typedef struct KVMDevice {
178 struct kvm_arm_device_addr kda;
Christoffer Dall1da41cc2014-02-26 17:20:00 +0000179 struct kvm_device_attr kdattr;
Peter Maydelleb035b42013-03-05 00:34:42 +0000180 MemoryRegion *mr;
181 QSLIST_ENTRY(KVMDevice) entries;
Christoffer Dall1da41cc2014-02-26 17:20:00 +0000182 int dev_fd;
Peter Maydelleb035b42013-03-05 00:34:42 +0000183} KVMDevice;
184
185static QSLIST_HEAD(kvm_devices_head, KVMDevice) kvm_devices_head;
186
187static void kvm_arm_devlistener_add(MemoryListener *listener,
188 MemoryRegionSection *section)
189{
190 KVMDevice *kd;
191
192 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
193 if (section->mr == kd->mr) {
194 kd->kda.addr = section->offset_within_address_space;
195 }
196 }
197}
198
199static void kvm_arm_devlistener_del(MemoryListener *listener,
200 MemoryRegionSection *section)
201{
202 KVMDevice *kd;
203
204 QSLIST_FOREACH(kd, &kvm_devices_head, entries) {
205 if (section->mr == kd->mr) {
206 kd->kda.addr = -1;
207 }
208 }
209}
210
211static MemoryListener devlistener = {
212 .region_add = kvm_arm_devlistener_add,
213 .region_del = kvm_arm_devlistener_del,
214};
215
Christoffer Dall1da41cc2014-02-26 17:20:00 +0000216static void kvm_arm_set_device_addr(KVMDevice *kd)
217{
218 struct kvm_device_attr *attr = &kd->kdattr;
219 int ret;
220
221 /* If the device control API is available and we have a device fd on the
222 * KVMDevice struct, let's use the newer API
223 */
224 if (kd->dev_fd >= 0) {
225 uint64_t addr = kd->kda.addr;
226 attr->addr = (uintptr_t)&addr;
227 ret = kvm_device_ioctl(kd->dev_fd, KVM_SET_DEVICE_ATTR, attr);
228 } else {
229 ret = kvm_vm_ioctl(kvm_state, KVM_ARM_SET_DEVICE_ADDR, &kd->kda);
230 }
231
232 if (ret < 0) {
233 fprintf(stderr, "Failed to set device address: %s\n",
234 strerror(-ret));
235 abort();
236 }
237}
238
Peter Maydelleb035b42013-03-05 00:34:42 +0000239static void kvm_arm_machine_init_done(Notifier *notifier, void *data)
240{
241 KVMDevice *kd, *tkd;
242
243 memory_listener_unregister(&devlistener);
244 QSLIST_FOREACH_SAFE(kd, &kvm_devices_head, entries, tkd) {
245 if (kd->kda.addr != -1) {
Christoffer Dall1da41cc2014-02-26 17:20:00 +0000246 kvm_arm_set_device_addr(kd);
Peter Maydelleb035b42013-03-05 00:34:42 +0000247 }
Paolo Bonzinidfde4e62013-05-06 10:46:11 +0200248 memory_region_unref(kd->mr);
Peter Maydelleb035b42013-03-05 00:34:42 +0000249 g_free(kd);
250 }
251}
252
253static Notifier notify = {
254 .notify = kvm_arm_machine_init_done,
255};
256
Christoffer Dall1da41cc2014-02-26 17:20:00 +0000257void kvm_arm_register_device(MemoryRegion *mr, uint64_t devid, uint64_t group,
258 uint64_t attr, int dev_fd)
Peter Maydelleb035b42013-03-05 00:34:42 +0000259{
260 KVMDevice *kd;
261
262 if (!kvm_irqchip_in_kernel()) {
263 return;
264 }
265
266 if (QSLIST_EMPTY(&kvm_devices_head)) {
267 memory_listener_register(&devlistener, NULL);
268 qemu_add_machine_init_done_notifier(&notify);
269 }
270 kd = g_new0(KVMDevice, 1);
271 kd->mr = mr;
272 kd->kda.id = devid;
273 kd->kda.addr = -1;
Christoffer Dall1da41cc2014-02-26 17:20:00 +0000274 kd->kdattr.flags = 0;
275 kd->kdattr.group = group;
276 kd->kdattr.attr = attr;
277 kd->dev_fd = dev_fd;
Peter Maydelleb035b42013-03-05 00:34:42 +0000278 QSLIST_INSERT_HEAD(&kvm_devices_head, kd, entries);
Paolo Bonzinidfde4e62013-05-06 10:46:11 +0200279 memory_region_ref(kd->mr);
Peter Maydelleb035b42013-03-05 00:34:42 +0000280}
281
Peter Maydellff047452013-06-25 18:16:07 +0100282bool write_kvmstate_to_list(ARMCPU *cpu)
283{
284 CPUState *cs = CPU(cpu);
285 int i;
286 bool ok = true;
287
288 for (i = 0; i < cpu->cpreg_array_len; i++) {
289 struct kvm_one_reg r;
290 uint64_t regidx = cpu->cpreg_indexes[i];
291 uint32_t v32;
292 int ret;
293
294 r.id = regidx;
295
296 switch (regidx & KVM_REG_SIZE_MASK) {
297 case KVM_REG_SIZE_U32:
298 r.addr = (uintptr_t)&v32;
299 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
300 if (!ret) {
301 cpu->cpreg_values[i] = v32;
302 }
303 break;
304 case KVM_REG_SIZE_U64:
305 r.addr = (uintptr_t)(cpu->cpreg_values + i);
306 ret = kvm_vcpu_ioctl(cs, KVM_GET_ONE_REG, &r);
307 break;
308 default:
309 abort();
310 }
311 if (ret) {
312 ok = false;
313 }
314 }
315 return ok;
316}
317
318bool write_list_to_kvmstate(ARMCPU *cpu)
319{
320 CPUState *cs = CPU(cpu);
321 int i;
322 bool ok = true;
323
324 for (i = 0; i < cpu->cpreg_array_len; i++) {
325 struct kvm_one_reg r;
326 uint64_t regidx = cpu->cpreg_indexes[i];
327 uint32_t v32;
328 int ret;
329
330 r.id = regidx;
331 switch (regidx & KVM_REG_SIZE_MASK) {
332 case KVM_REG_SIZE_U32:
333 v32 = cpu->cpreg_values[i];
334 r.addr = (uintptr_t)&v32;
335 break;
336 case KVM_REG_SIZE_U64:
337 r.addr = (uintptr_t)(cpu->cpreg_values + i);
338 break;
339 default:
340 abort();
341 }
342 ret = kvm_vcpu_ioctl(cs, KVM_SET_ONE_REG, &r);
343 if (ret) {
344 /* We might fail for "unknown register" and also for
345 * "you tried to set a register which is constant with
346 * a different value from what it actually contains".
347 */
348 ok = false;
349 }
350 }
351 return ok;
352}
353
Christoffer Dall494b00c2013-03-05 00:34:41 +0000354void kvm_arch_pre_run(CPUState *cs, struct kvm_run *run)
355{
356}
357
358void kvm_arch_post_run(CPUState *cs, struct kvm_run *run)
359{
360}
361
362int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
363{
364 return 0;
365}
366
Christoffer Dall494b00c2013-03-05 00:34:41 +0000367bool kvm_arch_stop_on_emulation_error(CPUState *cs)
368{
369 return true;
370}
371
372int kvm_arch_process_async_events(CPUState *cs)
373{
374 return 0;
375}
376
377int kvm_arch_on_sigbus_vcpu(CPUState *cs, int code, void *addr)
378{
379 return 1;
380}
381
382int kvm_arch_on_sigbus(int code, void *addr)
383{
384 return 1;
385}
386
387void kvm_arch_update_guest_debug(CPUState *cs, struct kvm_guest_debug *dbg)
388{
389 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
390}
391
392int kvm_arch_insert_sw_breakpoint(CPUState *cs,
393 struct kvm_sw_breakpoint *bp)
394{
395 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
396 return -EINVAL;
397}
398
399int kvm_arch_insert_hw_breakpoint(target_ulong addr,
400 target_ulong len, int type)
401{
402 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
403 return -EINVAL;
404}
405
406int kvm_arch_remove_hw_breakpoint(target_ulong addr,
407 target_ulong len, int type)
408{
409 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
410 return -EINVAL;
411}
412
413int kvm_arch_remove_sw_breakpoint(CPUState *cs,
414 struct kvm_sw_breakpoint *bp)
415{
416 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
417 return -EINVAL;
418}
419
420void kvm_arch_remove_all_hw_breakpoints(void)
421{
422 qemu_log_mask(LOG_UNIMP, "%s: not implemented\n", __func__);
423}
Alexey Kardashevskiyb3a1c622013-06-12 17:26:52 +1000424
425void kvm_arch_init_irq_routing(KVMState *s)
426{
427}
Christoffer Dall1da41cc2014-02-26 17:20:00 +0000428
429int kvm_arch_irqchip_create(KVMState *s)
430{
431 int ret;
432
433 /* If we can create the VGIC using the newer device control API, we
434 * let the device do this when it initializes itself, otherwise we
435 * fall back to the old API */
436
437 ret = kvm_create_device(s, KVM_DEV_TYPE_ARM_VGIC_V2, true);
438 if (ret == 0) {
439 return 1;
440 }
441
442 return 0;
443}