blob: 641464eea4892e385e854604c6c211e086104603 [file] [log] [blame]
Alexander Graf28278222009-12-05 12:44:23 +01001/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2009 Ulrich Hecht <uli@suse.de>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
Markus Armbruster14e54f82016-06-29 11:14:47 +020024
25#ifndef S390_TCG_TARGET_H
26#define S390_TCG_TARGET_H
Alexander Graf28278222009-12-05 12:44:23 +010027
Richard Henderson8c081b12014-04-25 10:18:59 -040028#define TCG_TARGET_INSN_UNIT_SIZE 2
Paolo Bonzini006f8632015-05-05 09:18:22 +020029#define TCG_TARGET_TLB_DISPLACEMENT_BITS 19
Richard Henderson8c081b12014-04-25 10:18:59 -040030
Richard Henderson48bb3752010-06-28 19:15:37 -070031typedef enum TCGReg {
Alexander Graf28278222009-12-05 12:44:23 +010032 TCG_REG_R0 = 0,
33 TCG_REG_R1,
34 TCG_REG_R2,
35 TCG_REG_R3,
36 TCG_REG_R4,
37 TCG_REG_R5,
38 TCG_REG_R6,
39 TCG_REG_R7,
40 TCG_REG_R8,
41 TCG_REG_R9,
42 TCG_REG_R10,
43 TCG_REG_R11,
44 TCG_REG_R12,
45 TCG_REG_R13,
46 TCG_REG_R14,
47 TCG_REG_R15
Richard Henderson48bb3752010-06-28 19:15:37 -070048} TCGReg;
49
Alexander Graf28278222009-12-05 12:44:23 +010050#define TCG_TARGET_NB_REGS 16
51
Richard Hendersonb2c98d92016-10-17 11:24:38 -040052/* A list of relevant facilities used by this translator. Some of these
53 are required for proper operation, and these are checked at startup. */
54
55#define FACILITY_ZARCH_ACTIVE (1ULL << (63 - 2))
56#define FACILITY_LONG_DISP (1ULL << (63 - 18))
57#define FACILITY_EXT_IMM (1ULL << (63 - 21))
58#define FACILITY_GEN_INST_EXT (1ULL << (63 - 34))
59#define FACILITY_LOAD_ON_COND (1ULL << (63 - 45))
60#define FACILITY_FAST_BCR_SER FACILITY_LOAD_ON_COND
Richard Hendersonc2097132017-06-16 13:43:17 -070061#define FACILITY_DISTINCT_OPS FACILITY_LOAD_ON_COND
Richard Henderson7af525a2017-06-16 15:33:28 -070062#define FACILITY_LOAD_ON_COND2 (1ULL << (63 - 53))
Richard Hendersonb2c98d92016-10-17 11:24:38 -040063
64extern uint64_t s390_facilities;
65
Richard Henderson36828252010-02-18 14:44:39 -080066/* optional instructions */
Richard Hendersonb2c98d92016-10-17 11:24:38 -040067#define TCG_TARGET_HAS_div2_i32 1
68#define TCG_TARGET_HAS_rot_i32 1
69#define TCG_TARGET_HAS_ext8s_i32 1
70#define TCG_TARGET_HAS_ext16s_i32 1
71#define TCG_TARGET_HAS_ext8u_i32 1
72#define TCG_TARGET_HAS_ext16u_i32 1
73#define TCG_TARGET_HAS_bswap16_i32 1
74#define TCG_TARGET_HAS_bswap32_i32 1
75#define TCG_TARGET_HAS_not_i32 0
76#define TCG_TARGET_HAS_neg_i32 1
77#define TCG_TARGET_HAS_andc_i32 0
78#define TCG_TARGET_HAS_orc_i32 0
79#define TCG_TARGET_HAS_eqv_i32 0
80#define TCG_TARGET_HAS_nand_i32 0
81#define TCG_TARGET_HAS_nor_i32 0
Richard Henderson0e28d002016-11-16 09:23:28 +010082#define TCG_TARGET_HAS_clz_i32 0
83#define TCG_TARGET_HAS_ctz_i32 0
Richard Hendersona768e4e2016-11-21 11:13:39 +010084#define TCG_TARGET_HAS_ctpop_i32 0
Richard Hendersonb2c98d92016-10-17 11:24:38 -040085#define TCG_TARGET_HAS_deposit_i32 (s390_facilities & FACILITY_GEN_INST_EXT)
Richard Hendersonb0bf5fe2016-10-14 14:26:40 -050086#define TCG_TARGET_HAS_extract_i32 (s390_facilities & FACILITY_GEN_INST_EXT)
Richard Hendersonb2c98d92016-10-17 11:24:38 -040087#define TCG_TARGET_HAS_sextract_i32 0
Richard Hendersonfce12962019-02-25 10:29:25 -080088#define TCG_TARGET_HAS_extract2_i32 0
Richard Hendersonb2c98d92016-10-17 11:24:38 -040089#define TCG_TARGET_HAS_movcond_i32 1
90#define TCG_TARGET_HAS_add2_i32 1
91#define TCG_TARGET_HAS_sub2_i32 1
92#define TCG_TARGET_HAS_mulu2_i32 0
93#define TCG_TARGET_HAS_muls2_i32 0
94#define TCG_TARGET_HAS_muluh_i32 0
95#define TCG_TARGET_HAS_mulsh_i32 0
96#define TCG_TARGET_HAS_extrl_i64_i32 0
97#define TCG_TARGET_HAS_extrh_i64_i32 0
Richard Henderson46644482017-04-26 18:40:59 -040098#define TCG_TARGET_HAS_goto_ptr 1
Richard Henderson829e1372017-07-25 11:53:50 -070099#define TCG_TARGET_HAS_direct_jump (s390_facilities & FACILITY_GEN_INST_EXT)
Richard Henderson07ce0b02020-12-09 13:58:39 -0600100#define TCG_TARGET_HAS_qemu_st8_i32 0
Richard Henderson36828252010-02-18 14:44:39 -0800101
Richard Hendersonb2c98d92016-10-17 11:24:38 -0400102#define TCG_TARGET_HAS_div2_i64 1
103#define TCG_TARGET_HAS_rot_i64 1
104#define TCG_TARGET_HAS_ext8s_i64 1
105#define TCG_TARGET_HAS_ext16s_i64 1
106#define TCG_TARGET_HAS_ext32s_i64 1
107#define TCG_TARGET_HAS_ext8u_i64 1
108#define TCG_TARGET_HAS_ext16u_i64 1
109#define TCG_TARGET_HAS_ext32u_i64 1
110#define TCG_TARGET_HAS_bswap16_i64 1
111#define TCG_TARGET_HAS_bswap32_i64 1
112#define TCG_TARGET_HAS_bswap64_i64 1
113#define TCG_TARGET_HAS_not_i64 0
114#define TCG_TARGET_HAS_neg_i64 1
115#define TCG_TARGET_HAS_andc_i64 0
116#define TCG_TARGET_HAS_orc_i64 0
117#define TCG_TARGET_HAS_eqv_i64 0
118#define TCG_TARGET_HAS_nand_i64 0
119#define TCG_TARGET_HAS_nor_i64 0
Richard Hendersonce411062016-11-16 16:10:37 +0100120#define TCG_TARGET_HAS_clz_i64 (s390_facilities & FACILITY_EXT_IMM)
Richard Henderson0e28d002016-11-16 09:23:28 +0100121#define TCG_TARGET_HAS_ctz_i64 0
Richard Hendersona768e4e2016-11-21 11:13:39 +0100122#define TCG_TARGET_HAS_ctpop_i64 0
Richard Hendersonb2c98d92016-10-17 11:24:38 -0400123#define TCG_TARGET_HAS_deposit_i64 (s390_facilities & FACILITY_GEN_INST_EXT)
Richard Hendersonb0bf5fe2016-10-14 14:26:40 -0500124#define TCG_TARGET_HAS_extract_i64 (s390_facilities & FACILITY_GEN_INST_EXT)
Richard Hendersonb2c98d92016-10-17 11:24:38 -0400125#define TCG_TARGET_HAS_sextract_i64 0
Richard Hendersonfce12962019-02-25 10:29:25 -0800126#define TCG_TARGET_HAS_extract2_i64 0
Richard Hendersonb2c98d92016-10-17 11:24:38 -0400127#define TCG_TARGET_HAS_movcond_i64 1
128#define TCG_TARGET_HAS_add2_i64 1
129#define TCG_TARGET_HAS_sub2_i64 1
130#define TCG_TARGET_HAS_mulu2_i64 1
131#define TCG_TARGET_HAS_muls2_i64 0
132#define TCG_TARGET_HAS_muluh_i64 0
133#define TCG_TARGET_HAS_mulsh_i64 0
Richard Hendersond5690ea2013-03-27 09:30:58 -0400134
Alexander Graf28278222009-12-05 12:44:23 +0100135/* used for function call generation */
136#define TCG_REG_CALL_STACK TCG_REG_R15
137#define TCG_TARGET_STACK_ALIGN 8
Richard Hendersona4924e82013-03-25 20:54:30 -0700138#define TCG_TARGET_CALL_STACK_OFFSET 160
Alexander Graf28278222009-12-05 12:44:23 +0100139
Richard Henderson2bece2c2010-06-14 17:35:27 -0700140#define TCG_TARGET_EXTEND_ARGS 1
Richard Hendersone1dcf352018-11-20 08:37:42 +0100141#define TCG_TARGET_HAS_MEMORY_BSWAP 1
Richard Henderson2bece2c2010-06-14 17:35:27 -0700142
Pranith Kumar71650df2017-08-29 02:33:11 -0400143#define TCG_TARGET_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD)
144
Alexander Graf28278222009-12-05 12:44:23 +0100145enum {
Alexander Graf28278222009-12-05 12:44:23 +0100146 TCG_AREG0 = TCG_REG_R10,
Alexander Graf28278222009-12-05 12:44:23 +0100147};
148
Richard Henderson1acbad02020-10-28 23:30:21 -0700149static inline void tb_target_set_jmp_target(uintptr_t tc_ptr, uintptr_t jmp_rx,
150 uintptr_t jmp_rw, uintptr_t addr)
Richard Hendersona8583392017-07-31 22:02:31 -0700151{
152 /* patch the branch destination */
Richard Henderson1acbad02020-10-28 23:30:21 -0700153 intptr_t disp = addr - (jmp_rx - 2);
154 qatomic_set((int32_t *)jmp_rw, disp / 2);
Richard Hendersona8583392017-07-31 22:02:31 -0700155 /* no need to flush icache explicitly */
156}
157
Richard Henderson659ef5c2017-07-30 12:30:41 -0700158#ifdef CONFIG_SOFTMMU
159#define TCG_TARGET_NEED_LDST_LABELS
160#endif
Richard Henderson28eef8a2017-07-31 19:16:02 -0700161#define TCG_TARGET_NEED_POOL_LABELS
Richard Henderson659ef5c2017-07-30 12:30:41 -0700162
Paolo Bonzinicb9c3772012-12-06 12:15:58 +0100163#endif