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bellardd19893d2003-06-15 19:58:51 +00001/*
2 * Host code generation
ths5fafdf22007-09-16 21:08:06 +00003 *
bellardd19893d2003-06-15 19:58:51 +00004 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
Blue Swirl8167ee82009-07-16 20:47:01 +000017 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
bellardd19893d2003-06-15 19:58:51 +000018 */
19#include <stdarg.h>
20#include <stdlib.h>
21#include <stdio.h>
22#include <string.h>
23#include <inttypes.h>
24
25#include "config.h"
bellard20543962003-06-15 23:28:43 +000026
bellardaf5ad102004-01-04 23:28:12 +000027#define NO_CPU_IO_DEFS
bellardd3eead22003-09-30 20:59:51 +000028#include "cpu.h"
29#include "exec-all.h"
bellardd19893d2003-06-15 19:58:51 +000030#include "disas.h"
bellard57fec1f2008-02-01 10:50:11 +000031#include "tcg.h"
Blue Swirl29e922b2010-03-29 19:24:00 +000032#include "qemu-timer.h"
bellardd19893d2003-06-15 19:58:51 +000033
bellard57fec1f2008-02-01 10:50:11 +000034/* code generation context */
35TCGContext tcg_ctx;
bellardd19893d2003-06-15 19:58:51 +000036
bellardd19893d2003-06-15 19:58:51 +000037uint16_t gen_opc_buf[OPC_BUF_SIZE];
bellard57fec1f2008-02-01 10:50:11 +000038TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE];
bellardc4687872005-01-03 23:44:44 +000039
40target_ulong gen_opc_pc[OPC_BUF_SIZE];
pbrook2e70f6e2008-06-29 01:03:05 +000041uint16_t gen_opc_icount[OPC_BUF_SIZE];
bellardd19893d2003-06-15 19:58:51 +000042uint8_t gen_opc_instr_start[OPC_BUF_SIZE];
bellardd19893d2003-06-15 19:58:51 +000043
bellard57fec1f2008-02-01 10:50:11 +000044void cpu_gen_init(void)
45{
46 tcg_context_init(&tcg_ctx);
47 tcg_set_frame(&tcg_ctx, TCG_AREG0, offsetof(CPUState, temp_buf),
blueswir1a20e31d2008-04-08 19:29:54 +000048 CPU_TEMP_BUF_NLONGS * sizeof(long));
bellard57fec1f2008-02-01 10:50:11 +000049}
50
bellardd19893d2003-06-15 19:58:51 +000051/* return non zero if the very first instruction is invalid so that
ths5fafdf22007-09-16 21:08:06 +000052 the virtual CPU can trigger an exception.
bellardd19893d2003-06-15 19:58:51 +000053
54 '*gen_code_size_ptr' contains the size of the generated code (host
55 code).
56*/
blueswir1d07bde82007-12-11 19:35:45 +000057int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr)
bellardd19893d2003-06-15 19:58:51 +000058{
bellard57fec1f2008-02-01 10:50:11 +000059 TCGContext *s = &tcg_ctx;
bellardd19893d2003-06-15 19:58:51 +000060 uint8_t *gen_code_buf;
61 int gen_code_size;
bellard57fec1f2008-02-01 10:50:11 +000062#ifdef CONFIG_PROFILER
63 int64_t ti;
64#endif
65
66#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +000067 s->tb_count1++; /* includes aborted translations because of
68 exceptions */
bellard57fec1f2008-02-01 10:50:11 +000069 ti = profile_getclock();
70#endif
71 tcg_func_start(s);
bellardd19893d2003-06-15 19:58:51 +000072
ths2cfc5f12008-07-18 18:01:29 +000073 gen_intermediate_code(env, tb);
74
bellardec6338b2007-11-08 14:25:03 +000075 /* generate machine code */
bellard57fec1f2008-02-01 10:50:11 +000076 gen_code_buf = tb->tc_ptr;
bellardec6338b2007-11-08 14:25:03 +000077 tb->tb_next_offset[0] = 0xffff;
78 tb->tb_next_offset[1] = 0xffff;
bellard57fec1f2008-02-01 10:50:11 +000079 s->tb_next_offset = tb->tb_next_offset;
bellard4cbb86e2003-09-17 22:53:29 +000080#ifdef USE_DIRECT_JUMP
bellard57fec1f2008-02-01 10:50:11 +000081 s->tb_jmp_offset = tb->tb_jmp_offset;
82 s->tb_next = NULL;
bellardd19893d2003-06-15 19:58:51 +000083#else
bellard57fec1f2008-02-01 10:50:11 +000084 s->tb_jmp_offset = NULL;
85 s->tb_next = tb->tb_next;
bellardd19893d2003-06-15 19:58:51 +000086#endif
bellard57fec1f2008-02-01 10:50:11 +000087
88#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +000089 s->tb_count++;
90 s->interm_time += profile_getclock() - ti;
91 s->code_time -= profile_getclock();
bellard57fec1f2008-02-01 10:50:11 +000092#endif
aurel3254604f72008-12-07 20:35:00 +000093 gen_code_size = tcg_gen_code(s, gen_code_buf);
bellardd19893d2003-06-15 19:58:51 +000094 *gen_code_size_ptr = gen_code_size;
bellard57fec1f2008-02-01 10:50:11 +000095#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +000096 s->code_time += profile_getclock();
97 s->code_in_len += tb->size;
98 s->code_out_len += gen_code_size;
bellard57fec1f2008-02-01 10:50:11 +000099#endif
100
bellardd19893d2003-06-15 19:58:51 +0000101#ifdef DEBUG_DISAS
aliguori8fec2b82009-01-15 22:36:53 +0000102 if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
aliguori93fcfe32009-01-15 22:34:14 +0000103 qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr);
104 log_disas(tb->tc_ptr, *gen_code_size_ptr);
105 qemu_log("\n");
aliguori31b1a7b2009-01-15 22:35:09 +0000106 qemu_log_flush();
bellardd19893d2003-06-15 19:58:51 +0000107 }
108#endif
109 return 0;
110}
111
ths5fafdf22007-09-16 21:08:06 +0000112/* The cpu state corresponding to 'searched_pc' is restored.
bellardd19893d2003-06-15 19:58:51 +0000113 */
ths5fafdf22007-09-16 21:08:06 +0000114int cpu_restore_state(TranslationBlock *tb,
bellard58fe2f12004-02-16 22:11:32 +0000115 CPUState *env, unsigned long searched_pc,
116 void *puc)
bellardd19893d2003-06-15 19:58:51 +0000117{
bellard57fec1f2008-02-01 10:50:11 +0000118 TCGContext *s = &tcg_ctx;
119 int j;
bellardd19893d2003-06-15 19:58:51 +0000120 unsigned long tc_ptr;
bellard57fec1f2008-02-01 10:50:11 +0000121#ifdef CONFIG_PROFILER
122 int64_t ti;
123#endif
124
125#ifdef CONFIG_PROFILER
126 ti = profile_getclock();
127#endif
128 tcg_func_start(s);
bellardd19893d2003-06-15 19:58:51 +0000129
ths2cfc5f12008-07-18 18:01:29 +0000130 gen_intermediate_code_pc(env, tb);
ths3b46e622007-09-17 08:09:54 +0000131
pbrook2e70f6e2008-06-29 01:03:05 +0000132 if (use_icount) {
133 /* Reset the cycle counter to the start of the block. */
134 env->icount_decr.u16.low += tb->icount;
135 /* Clear the IO flag. */
136 env->can_do_io = 0;
137 }
138
bellardd19893d2003-06-15 19:58:51 +0000139 /* find opc index corresponding to search_pc */
140 tc_ptr = (unsigned long)tb->tc_ptr;
141 if (searched_pc < tc_ptr)
142 return -1;
bellard57fec1f2008-02-01 10:50:11 +0000143
144 s->tb_next_offset = tb->tb_next_offset;
145#ifdef USE_DIRECT_JUMP
146 s->tb_jmp_offset = tb->tb_jmp_offset;
147 s->tb_next = NULL;
148#else
149 s->tb_jmp_offset = NULL;
150 s->tb_next = tb->tb_next;
151#endif
aurel3254604f72008-12-07 20:35:00 +0000152 j = tcg_gen_code_search_pc(s, (uint8_t *)tc_ptr, searched_pc - tc_ptr);
bellard57fec1f2008-02-01 10:50:11 +0000153 if (j < 0)
154 return -1;
bellardd19893d2003-06-15 19:58:51 +0000155 /* now find start of instruction before */
156 while (gen_opc_instr_start[j] == 0)
157 j--;
pbrook2e70f6e2008-06-29 01:03:05 +0000158 env->icount_decr.u16.low -= gen_opc_icount[j];
ths3b46e622007-09-17 08:09:54 +0000159
aurel32d2856f12008-04-28 00:32:32 +0000160 gen_pc_load(env, tb, searched_pc, j, puc);
bellard57fec1f2008-02-01 10:50:11 +0000161
162#ifdef CONFIG_PROFILER
bellardb67d9a52008-05-23 09:57:34 +0000163 s->restore_time += profile_getclock() - ti;
164 s->restore_count++;
bellard57fec1f2008-02-01 10:50:11 +0000165#endif
bellardd19893d2003-06-15 19:58:51 +0000166 return 0;
167}