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Subbaraya Sundeep6d262dc2017-09-20 17:17:37 -03001/*
2 * SmartFusion2 SOM starter kit(from Emcraft) emulation.
3 *
4 * Copyright (c) 2017 Subbaraya Sundeep <sundeep.lkml@gmail.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25#include "qemu/osdep.h"
Philippe Mathieu-Daudéfc6b3cf2018-06-25 09:41:58 -030026#include "qemu/units.h"
Subbaraya Sundeep6d262dc2017-09-20 17:17:37 -030027#include "qapi/error.h"
28#include "qemu/error-report.h"
29#include "hw/boards.h"
Markus Armbrustera27bd6c2019-08-12 07:23:51 +020030#include "hw/qdev-properties.h"
Peter Maydell12ec8bd2019-05-23 14:47:43 +010031#include "hw/arm/boot.h"
Subbaraya Sundeep6d262dc2017-09-20 17:17:37 -030032#include "exec/address-spaces.h"
Subbaraya Sundeep6d262dc2017-09-20 17:17:37 -030033#include "hw/arm/msf2-soc.h"
Subbaraya Sundeep6d262dc2017-09-20 17:17:37 -030034
35#define DDR_BASE_ADDRESS 0xA0000000
Philippe Mathieu-Daudéd23b6ca2018-06-25 09:41:57 -030036#define DDR_SIZE (64 * MiB)
Subbaraya Sundeep6d262dc2017-09-20 17:17:37 -030037
Philippe Mathieu-Daudéd23b6ca2018-06-25 09:41:57 -030038#define M2S010_ENVM_SIZE (256 * KiB)
39#define M2S010_ESRAM_SIZE (64 * KiB)
Subbaraya Sundeep6d262dc2017-09-20 17:17:37 -030040
41static void emcraft_sf2_s2s010_init(MachineState *machine)
42{
43 DeviceState *dev;
44 DeviceState *spi_flash;
45 MSF2State *soc;
46 MachineClass *mc = MACHINE_GET_CLASS(machine);
47 DriveInfo *dinfo = drive_get_next(IF_MTD);
48 qemu_irq cs_line;
Markus Armbruster57d479c2020-06-10 07:32:12 +020049 BusState *spi_bus;
Subbaraya Sundeep6d262dc2017-09-20 17:17:37 -030050 MemoryRegion *sysmem = get_system_memory();
51 MemoryRegion *ddr = g_new(MemoryRegion, 1);
52
53 if (strcmp(machine->cpu_type, mc->default_cpu_type) != 0) {
54 error_report("This board can only be used with CPU %s",
55 mc->default_cpu_type);
Philippe Mathieu-Daudédd97ef02019-07-01 17:26:14 +010056 exit(1);
Subbaraya Sundeep6d262dc2017-09-20 17:17:37 -030057 }
58
59 memory_region_init_ram(ddr, NULL, "ddr-ram", DDR_SIZE,
60 &error_fatal);
61 memory_region_add_subregion(sysmem, DDR_BASE_ADDRESS, ddr);
62
Markus Armbruster3e80f692020-06-10 07:31:58 +020063 dev = qdev_new(TYPE_MSF2_SOC);
Subbaraya Sundeep6d262dc2017-09-20 17:17:37 -030064 qdev_prop_set_string(dev, "part-name", "M2S010");
65 qdev_prop_set_string(dev, "cpu-type", mc->default_cpu_type);
66
67 qdev_prop_set_uint64(dev, "eNVM-size", M2S010_ENVM_SIZE);
68 qdev_prop_set_uint64(dev, "eSRAM-size", M2S010_ESRAM_SIZE);
69
70 /*
71 * CPU clock and peripheral clocks(APB0, APB1)are configurable
72 * in Libero. CPU clock is divided by APB0 and APB1 divisors for
73 * peripherals. Emcraft's SoM kit comes with these settings by default.
74 */
75 qdev_prop_set_uint32(dev, "m3clk", 142 * 1000000);
76 qdev_prop_set_uint32(dev, "apb0div", 2);
77 qdev_prop_set_uint32(dev, "apb1div", 2);
78
Markus Armbruster3c6ef472020-06-10 07:32:34 +020079 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
Subbaraya Sundeep6d262dc2017-09-20 17:17:37 -030080
81 soc = MSF2_SOC(dev);
82
83 /* Attach SPI flash to SPI0 controller */
Markus Armbruster57d479c2020-06-10 07:32:12 +020084 spi_bus = qdev_get_child_bus(dev, "spi0");
85 spi_flash = qdev_new("s25sl12801");
Subbaraya Sundeep6d262dc2017-09-20 17:17:37 -030086 qdev_prop_set_uint8(spi_flash, "spansion-cr2nv", 1);
87 if (dinfo) {
Markus Armbruster934df912020-06-22 11:42:24 +020088 qdev_prop_set_drive_err(spi_flash, "drive",
89 blk_by_legacy_dinfo(dinfo), &error_fatal);
Subbaraya Sundeep6d262dc2017-09-20 17:17:37 -030090 }
Markus Armbruster57d479c2020-06-10 07:32:12 +020091 qdev_realize_and_unref(spi_flash, spi_bus, &error_fatal);
Subbaraya Sundeep6d262dc2017-09-20 17:17:37 -030092 cs_line = qdev_get_gpio_in_named(spi_flash, SSI_GPIO_CS, 0);
93 sysbus_connect_irq(SYS_BUS_DEVICE(&soc->spi[0]), 1, cs_line);
94
95 armv7m_load_kernel(ARM_CPU(first_cpu), machine->kernel_filename,
96 soc->envm_size);
97}
98
99static void emcraft_sf2_machine_init(MachineClass *mc)
100{
101 mc->desc = "SmartFusion2 SOM kit from Emcraft (M2S010)";
102 mc->init = emcraft_sf2_s2s010_init;
103 mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-m3");
104}
105
106DEFINE_MACHINE("emcraft-sf2", emcraft_sf2_machine_init)