Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Microblaze helper routines. |
| 3 | * |
| 4 | * Copyright (c) 2009 Edgar E. Iglesias <edgar.iglesias@gmail.com>. |
Peter A. G. Crosthwaite | dadc106 | 2012-04-12 14:30:30 +1000 | [diff] [blame] | 5 | * Copyright (c) 2009-2012 PetaLogix Qld Pty Ltd. |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 6 | * |
| 7 | * This library is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU Lesser General Public |
| 9 | * License as published by the Free Software Foundation; either |
| 10 | * version 2 of the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This library is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 15 | * Lesser General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 18 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 19 | */ |
| 20 | |
Peter Maydell | 8fd9dec | 2016-01-26 18:05:31 +0000 | [diff] [blame] | 21 | #include "qemu/osdep.h" |
Blue Swirl | 3e45717 | 2011-07-13 12:44:15 +0000 | [diff] [blame] | 22 | #include "cpu.h" |
Richard Henderson | 2ef6175 | 2014-04-07 22:31:41 -0700 | [diff] [blame] | 23 | #include "exec/helper-proto.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 24 | #include "qemu/host-utils.h" |
Paolo Bonzini | 63c9155 | 2016-03-15 13:18:37 +0100 | [diff] [blame] | 25 | #include "exec/exec-all.h" |
Paolo Bonzini | f08b617 | 2014-03-28 19:42:10 +0100 | [diff] [blame] | 26 | #include "exec/cpu_ldst.h" |
Alex Bennée | 24f91e8 | 2018-01-19 18:24:22 +0000 | [diff] [blame] | 27 | #include "fpu/softfloat.h" |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 28 | |
| 29 | #define D(x) |
| 30 | |
Edgar E. Iglesias | 6d76d23 | 2011-04-12 00:48:33 +0200 | [diff] [blame] | 31 | void helper_put(uint32_t id, uint32_t ctrl, uint32_t data) |
| 32 | { |
| 33 | int test = ctrl & STREAM_TEST; |
| 34 | int atomic = ctrl & STREAM_ATOMIC; |
| 35 | int control = ctrl & STREAM_CONTROL; |
| 36 | int nonblock = ctrl & STREAM_NONBLOCK; |
| 37 | int exception = ctrl & STREAM_EXCEPTION; |
| 38 | |
Paolo Bonzini | 1d512a6 | 2015-11-13 13:24:57 +0100 | [diff] [blame] | 39 | qemu_log_mask(LOG_UNIMP, "Unhandled stream put to stream-id=%d data=%x %s%s%s%s%s\n", |
Edgar E. Iglesias | 6d76d23 | 2011-04-12 00:48:33 +0200 | [diff] [blame] | 40 | id, data, |
| 41 | test ? "t" : "", |
| 42 | nonblock ? "n" : "", |
| 43 | exception ? "e" : "", |
| 44 | control ? "c" : "", |
| 45 | atomic ? "a" : ""); |
| 46 | } |
| 47 | |
| 48 | uint32_t helper_get(uint32_t id, uint32_t ctrl) |
| 49 | { |
| 50 | int test = ctrl & STREAM_TEST; |
| 51 | int atomic = ctrl & STREAM_ATOMIC; |
| 52 | int control = ctrl & STREAM_CONTROL; |
| 53 | int nonblock = ctrl & STREAM_NONBLOCK; |
| 54 | int exception = ctrl & STREAM_EXCEPTION; |
| 55 | |
Paolo Bonzini | 1d512a6 | 2015-11-13 13:24:57 +0100 | [diff] [blame] | 56 | qemu_log_mask(LOG_UNIMP, "Unhandled stream get from stream-id=%d %s%s%s%s%s\n", |
Edgar E. Iglesias | 6d76d23 | 2011-04-12 00:48:33 +0200 | [diff] [blame] | 57 | id, |
| 58 | test ? "t" : "", |
| 59 | nonblock ? "n" : "", |
| 60 | exception ? "e" : "", |
| 61 | control ? "c" : "", |
| 62 | atomic ? "a" : ""); |
| 63 | return 0xdead0000 | id; |
| 64 | } |
| 65 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 66 | void helper_raise_exception(CPUMBState *env, uint32_t index) |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 67 | { |
Richard Henderson | f5c7e93 | 2019-03-22 18:27:36 -0700 | [diff] [blame] | 68 | CPUState *cs = env_cpu(env); |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 69 | |
| 70 | cs->exception_index = index; |
Andreas Färber | 5638d18 | 2013-08-27 17:52:12 +0200 | [diff] [blame] | 71 | cpu_loop_exit(cs); |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 72 | } |
| 73 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 74 | void helper_debug(CPUMBState *env) |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 75 | { |
| 76 | int i; |
| 77 | |
Edgar E. Iglesias | 0a22f8c | 2018-04-14 17:59:29 +0200 | [diff] [blame] | 78 | qemu_log("PC=%" PRIx64 "\n", env->sregs[SR_PC]); |
| 79 | qemu_log("rmsr=%" PRIx64 " resr=%" PRIx64 " rear=%" PRIx64 " " |
| 80 | "debug[%x] imm=%x iflags=%x\n", |
Michal Simek | 4c24aa0 | 2009-12-07 14:12:49 +0100 | [diff] [blame] | 81 | env->sregs[SR_MSR], env->sregs[SR_ESR], env->sregs[SR_EAR], |
Edgar E. Iglesias | 17c52a4 | 2009-12-16 12:52:56 +0100 | [diff] [blame] | 82 | env->debug, env->imm, env->iflags); |
Edgar E. Iglesias | 43d318b | 2018-05-08 18:31:06 +0200 | [diff] [blame] | 83 | qemu_log("btaken=%d btarget=%" PRIx64 " mode=%s(saved=%s) eip=%d ie=%d\n", |
Edgar E. Iglesias | 17c52a4 | 2009-12-16 12:52:56 +0100 | [diff] [blame] | 84 | env->btaken, env->btarget, |
| 85 | (env->sregs[SR_MSR] & MSR_UM) ? "user" : "kernel", |
| 86 | (env->sregs[SR_MSR] & MSR_UMS) ? "user" : "kernel", |
Edgar E. Iglesias | 0a22f8c | 2018-04-14 17:59:29 +0200 | [diff] [blame] | 87 | (bool)(env->sregs[SR_MSR] & MSR_EIP), |
| 88 | (bool)(env->sregs[SR_MSR] & MSR_IE)); |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 89 | for (i = 0; i < 32; i++) { |
| 90 | qemu_log("r%2.2d=%8.8x ", i, env->regs[i]); |
| 91 | if ((i + 1) % 4 == 0) |
| 92 | qemu_log("\n"); |
| 93 | } |
| 94 | qemu_log("\n\n"); |
| 95 | } |
| 96 | |
| 97 | static inline uint32_t compute_carry(uint32_t a, uint32_t b, uint32_t cin) |
| 98 | { |
| 99 | uint32_t cout = 0; |
| 100 | |
| 101 | if ((b == ~0) && cin) |
| 102 | cout = 1; |
| 103 | else if ((~0 - a) < (b + cin)) |
| 104 | cout = 1; |
| 105 | return cout; |
| 106 | } |
| 107 | |
| 108 | uint32_t helper_cmp(uint32_t a, uint32_t b) |
| 109 | { |
| 110 | uint32_t t; |
| 111 | |
| 112 | t = b + ~a + 1; |
| 113 | if ((b & 0x80000000) ^ (a & 0x80000000)) |
| 114 | t = (t & 0x7fffffff) | (b & 0x80000000); |
| 115 | return t; |
| 116 | } |
| 117 | |
| 118 | uint32_t helper_cmpu(uint32_t a, uint32_t b) |
| 119 | { |
| 120 | uint32_t t; |
| 121 | |
| 122 | t = b + ~a + 1; |
| 123 | if ((b & 0x80000000) ^ (a & 0x80000000)) |
| 124 | t = (t & 0x7fffffff) | (a & 0x80000000); |
| 125 | return t; |
| 126 | } |
| 127 | |
Edgar E. Iglesias | 5d0bb82 | 2011-01-23 03:52:20 +0100 | [diff] [blame] | 128 | uint32_t helper_carry(uint32_t a, uint32_t b, uint32_t cf) |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 129 | { |
Shraddha Barke | 738c8b0 | 2015-09-25 14:07:56 +0530 | [diff] [blame] | 130 | return compute_carry(a, b, cf); |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 131 | } |
| 132 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 133 | static inline int div_prepare(CPUMBState *env, uint32_t a, uint32_t b) |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 134 | { |
| 135 | if (b == 0) { |
| 136 | env->sregs[SR_MSR] |= MSR_DZ; |
Edgar E. Iglesias | 821ebb3 | 2009-09-03 12:52:01 +0200 | [diff] [blame] | 137 | |
| 138 | if ((env->sregs[SR_MSR] & MSR_EE) |
| 139 | && !(env->pvr.regs[2] & PVR2_DIV_ZERO_EXC_MASK)) { |
| 140 | env->sregs[SR_ESR] = ESR_EC_DIVZERO; |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 141 | helper_raise_exception(env, EXCP_HW_EXCP); |
Edgar E. Iglesias | 821ebb3 | 2009-09-03 12:52:01 +0200 | [diff] [blame] | 142 | } |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 143 | return 0; |
| 144 | } |
| 145 | env->sregs[SR_MSR] &= ~MSR_DZ; |
| 146 | return 1; |
| 147 | } |
| 148 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 149 | uint32_t helper_divs(CPUMBState *env, uint32_t a, uint32_t b) |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 150 | { |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 151 | if (!div_prepare(env, a, b)) { |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 152 | return 0; |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 153 | } |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 154 | return (int32_t)a / (int32_t)b; |
| 155 | } |
| 156 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 157 | uint32_t helper_divu(CPUMBState *env, uint32_t a, uint32_t b) |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 158 | { |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 159 | if (!div_prepare(env, a, b)) { |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 160 | return 0; |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 161 | } |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 162 | return a / b; |
| 163 | } |
| 164 | |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 165 | /* raise FPU exception. */ |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 166 | static void raise_fpu_exception(CPUMBState *env) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 167 | { |
| 168 | env->sregs[SR_ESR] = ESR_EC_FPU; |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 169 | helper_raise_exception(env, EXCP_HW_EXCP); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 170 | } |
| 171 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 172 | static void update_fpu_flags(CPUMBState *env, int flags) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 173 | { |
| 174 | int raise = 0; |
| 175 | |
| 176 | if (flags & float_flag_invalid) { |
| 177 | env->sregs[SR_FSR] |= FSR_IO; |
| 178 | raise = 1; |
| 179 | } |
| 180 | if (flags & float_flag_divbyzero) { |
| 181 | env->sregs[SR_FSR] |= FSR_DZ; |
| 182 | raise = 1; |
| 183 | } |
| 184 | if (flags & float_flag_overflow) { |
| 185 | env->sregs[SR_FSR] |= FSR_OF; |
| 186 | raise = 1; |
| 187 | } |
| 188 | if (flags & float_flag_underflow) { |
| 189 | env->sregs[SR_FSR] |= FSR_UF; |
| 190 | raise = 1; |
| 191 | } |
| 192 | if (raise |
| 193 | && (env->pvr.regs[2] & PVR2_FPU_EXC_MASK) |
| 194 | && (env->sregs[SR_MSR] & MSR_EE)) { |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 195 | raise_fpu_exception(env); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 196 | } |
| 197 | } |
| 198 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 199 | uint32_t helper_fadd(CPUMBState *env, uint32_t a, uint32_t b) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 200 | { |
| 201 | CPU_FloatU fd, fa, fb; |
| 202 | int flags; |
| 203 | |
| 204 | set_float_exception_flags(0, &env->fp_status); |
| 205 | fa.l = a; |
| 206 | fb.l = b; |
| 207 | fd.f = float32_add(fa.f, fb.f, &env->fp_status); |
| 208 | |
| 209 | flags = get_float_exception_flags(&env->fp_status); |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 210 | update_fpu_flags(env, flags); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 211 | return fd.l; |
| 212 | } |
| 213 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 214 | uint32_t helper_frsub(CPUMBState *env, uint32_t a, uint32_t b) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 215 | { |
| 216 | CPU_FloatU fd, fa, fb; |
| 217 | int flags; |
| 218 | |
| 219 | set_float_exception_flags(0, &env->fp_status); |
| 220 | fa.l = a; |
| 221 | fb.l = b; |
| 222 | fd.f = float32_sub(fb.f, fa.f, &env->fp_status); |
| 223 | flags = get_float_exception_flags(&env->fp_status); |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 224 | update_fpu_flags(env, flags); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 225 | return fd.l; |
| 226 | } |
| 227 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 228 | uint32_t helper_fmul(CPUMBState *env, uint32_t a, uint32_t b) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 229 | { |
| 230 | CPU_FloatU fd, fa, fb; |
| 231 | int flags; |
| 232 | |
| 233 | set_float_exception_flags(0, &env->fp_status); |
| 234 | fa.l = a; |
| 235 | fb.l = b; |
| 236 | fd.f = float32_mul(fa.f, fb.f, &env->fp_status); |
| 237 | flags = get_float_exception_flags(&env->fp_status); |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 238 | update_fpu_flags(env, flags); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 239 | |
| 240 | return fd.l; |
| 241 | } |
| 242 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 243 | uint32_t helper_fdiv(CPUMBState *env, uint32_t a, uint32_t b) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 244 | { |
| 245 | CPU_FloatU fd, fa, fb; |
| 246 | int flags; |
| 247 | |
| 248 | set_float_exception_flags(0, &env->fp_status); |
| 249 | fa.l = a; |
| 250 | fb.l = b; |
| 251 | fd.f = float32_div(fb.f, fa.f, &env->fp_status); |
| 252 | flags = get_float_exception_flags(&env->fp_status); |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 253 | update_fpu_flags(env, flags); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 254 | |
| 255 | return fd.l; |
| 256 | } |
| 257 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 258 | uint32_t helper_fcmp_un(CPUMBState *env, uint32_t a, uint32_t b) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 259 | { |
Edgar E. Iglesias | ef9d48d | 2010-09-09 22:05:48 +0200 | [diff] [blame] | 260 | CPU_FloatU fa, fb; |
| 261 | uint32_t r = 0; |
| 262 | |
| 263 | fa.l = a; |
| 264 | fb.l = b; |
| 265 | |
Aleksandar Markovic | af39bc8 | 2016-06-10 11:57:28 +0200 | [diff] [blame] | 266 | if (float32_is_signaling_nan(fa.f, &env->fp_status) || |
| 267 | float32_is_signaling_nan(fb.f, &env->fp_status)) { |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 268 | update_fpu_flags(env, float_flag_invalid); |
Edgar E. Iglesias | ef9d48d | 2010-09-09 22:05:48 +0200 | [diff] [blame] | 269 | r = 1; |
| 270 | } |
| 271 | |
Aleksandar Markovic | af39bc8 | 2016-06-10 11:57:28 +0200 | [diff] [blame] | 272 | if (float32_is_quiet_nan(fa.f, &env->fp_status) || |
| 273 | float32_is_quiet_nan(fb.f, &env->fp_status)) { |
Edgar E. Iglesias | ef9d48d | 2010-09-09 22:05:48 +0200 | [diff] [blame] | 274 | r = 1; |
| 275 | } |
| 276 | |
| 277 | return r; |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 278 | } |
| 279 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 280 | uint32_t helper_fcmp_lt(CPUMBState *env, uint32_t a, uint32_t b) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 281 | { |
| 282 | CPU_FloatU fa, fb; |
| 283 | int r; |
| 284 | int flags; |
| 285 | |
| 286 | set_float_exception_flags(0, &env->fp_status); |
| 287 | fa.l = a; |
| 288 | fb.l = b; |
| 289 | r = float32_lt(fb.f, fa.f, &env->fp_status); |
| 290 | flags = get_float_exception_flags(&env->fp_status); |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 291 | update_fpu_flags(env, flags & float_flag_invalid); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 292 | |
| 293 | return r; |
| 294 | } |
| 295 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 296 | uint32_t helper_fcmp_eq(CPUMBState *env, uint32_t a, uint32_t b) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 297 | { |
| 298 | CPU_FloatU fa, fb; |
| 299 | int flags; |
| 300 | int r; |
| 301 | |
| 302 | set_float_exception_flags(0, &env->fp_status); |
| 303 | fa.l = a; |
| 304 | fb.l = b; |
Aurelien Jarno | 211315f | 2011-04-14 00:49:29 +0200 | [diff] [blame] | 305 | r = float32_eq_quiet(fa.f, fb.f, &env->fp_status); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 306 | flags = get_float_exception_flags(&env->fp_status); |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 307 | update_fpu_flags(env, flags & float_flag_invalid); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 308 | |
| 309 | return r; |
| 310 | } |
| 311 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 312 | uint32_t helper_fcmp_le(CPUMBState *env, uint32_t a, uint32_t b) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 313 | { |
| 314 | CPU_FloatU fa, fb; |
| 315 | int flags; |
| 316 | int r; |
| 317 | |
| 318 | fa.l = a; |
| 319 | fb.l = b; |
| 320 | set_float_exception_flags(0, &env->fp_status); |
| 321 | r = float32_le(fa.f, fb.f, &env->fp_status); |
| 322 | flags = get_float_exception_flags(&env->fp_status); |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 323 | update_fpu_flags(env, flags & float_flag_invalid); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 324 | |
| 325 | |
| 326 | return r; |
| 327 | } |
| 328 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 329 | uint32_t helper_fcmp_gt(CPUMBState *env, uint32_t a, uint32_t b) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 330 | { |
| 331 | CPU_FloatU fa, fb; |
| 332 | int flags, r; |
| 333 | |
| 334 | fa.l = a; |
| 335 | fb.l = b; |
| 336 | set_float_exception_flags(0, &env->fp_status); |
| 337 | r = float32_lt(fa.f, fb.f, &env->fp_status); |
| 338 | flags = get_float_exception_flags(&env->fp_status); |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 339 | update_fpu_flags(env, flags & float_flag_invalid); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 340 | return r; |
| 341 | } |
| 342 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 343 | uint32_t helper_fcmp_ne(CPUMBState *env, uint32_t a, uint32_t b) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 344 | { |
| 345 | CPU_FloatU fa, fb; |
| 346 | int flags, r; |
| 347 | |
| 348 | fa.l = a; |
| 349 | fb.l = b; |
| 350 | set_float_exception_flags(0, &env->fp_status); |
Aurelien Jarno | 211315f | 2011-04-14 00:49:29 +0200 | [diff] [blame] | 351 | r = !float32_eq_quiet(fa.f, fb.f, &env->fp_status); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 352 | flags = get_float_exception_flags(&env->fp_status); |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 353 | update_fpu_flags(env, flags & float_flag_invalid); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 354 | |
| 355 | return r; |
| 356 | } |
| 357 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 358 | uint32_t helper_fcmp_ge(CPUMBState *env, uint32_t a, uint32_t b) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 359 | { |
| 360 | CPU_FloatU fa, fb; |
| 361 | int flags, r; |
| 362 | |
| 363 | fa.l = a; |
| 364 | fb.l = b; |
| 365 | set_float_exception_flags(0, &env->fp_status); |
| 366 | r = !float32_lt(fa.f, fb.f, &env->fp_status); |
| 367 | flags = get_float_exception_flags(&env->fp_status); |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 368 | update_fpu_flags(env, flags & float_flag_invalid); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 369 | |
| 370 | return r; |
| 371 | } |
| 372 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 373 | uint32_t helper_flt(CPUMBState *env, uint32_t a) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 374 | { |
| 375 | CPU_FloatU fd, fa; |
| 376 | |
| 377 | fa.l = a; |
| 378 | fd.f = int32_to_float32(fa.l, &env->fp_status); |
| 379 | return fd.l; |
| 380 | } |
| 381 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 382 | uint32_t helper_fint(CPUMBState *env, uint32_t a) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 383 | { |
| 384 | CPU_FloatU fa; |
| 385 | uint32_t r; |
| 386 | int flags; |
| 387 | |
| 388 | set_float_exception_flags(0, &env->fp_status); |
| 389 | fa.l = a; |
| 390 | r = float32_to_int32(fa.f, &env->fp_status); |
| 391 | flags = get_float_exception_flags(&env->fp_status); |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 392 | update_fpu_flags(env, flags); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 393 | |
| 394 | return r; |
| 395 | } |
| 396 | |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 397 | uint32_t helper_fsqrt(CPUMBState *env, uint32_t a) |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 398 | { |
| 399 | CPU_FloatU fd, fa; |
| 400 | int flags; |
| 401 | |
| 402 | set_float_exception_flags(0, &env->fp_status); |
| 403 | fa.l = a; |
| 404 | fd.l = float32_sqrt(fa.f, &env->fp_status); |
| 405 | flags = get_float_exception_flags(&env->fp_status); |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 406 | update_fpu_flags(env, flags); |
Edgar E. Iglesias | 97694c5 | 2010-09-09 10:20:17 +0200 | [diff] [blame] | 407 | |
| 408 | return fd.l; |
| 409 | } |
| 410 | |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 411 | uint32_t helper_pcmpbf(uint32_t a, uint32_t b) |
| 412 | { |
| 413 | unsigned int i; |
| 414 | uint32_t mask = 0xff000000; |
| 415 | |
| 416 | for (i = 0; i < 4; i++) { |
| 417 | if ((a & mask) == (b & mask)) |
| 418 | return i + 1; |
| 419 | mask >>= 8; |
| 420 | } |
| 421 | return 0; |
| 422 | } |
| 423 | |
Edgar E. Iglesias | 403322e | 2018-04-13 20:20:25 +0200 | [diff] [blame] | 424 | void helper_memalign(CPUMBState *env, target_ulong addr, |
| 425 | uint32_t dr, uint32_t wr, |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 426 | uint32_t mask) |
Edgar E. Iglesias | 968a40f | 2009-09-03 12:59:46 +0200 | [diff] [blame] | 427 | { |
Edgar E. Iglesias | 968a40f | 2009-09-03 12:59:46 +0200 | [diff] [blame] | 428 | if (addr & mask) { |
Edgar E. Iglesias | 97f90cb | 2009-09-11 10:27:38 +0200 | [diff] [blame] | 429 | qemu_log_mask(CPU_LOG_INT, |
Edgar E. Iglesias | 403322e | 2018-04-13 20:20:25 +0200 | [diff] [blame] | 430 | "unaligned access addr=" TARGET_FMT_lx |
| 431 | " mask=%x, wr=%d dr=r%d\n", |
Edgar E. Iglesias | 97f90cb | 2009-09-11 10:27:38 +0200 | [diff] [blame] | 432 | addr, mask, wr, dr); |
| 433 | env->sregs[SR_EAR] = addr; |
Edgar E. Iglesias | 968a40f | 2009-09-03 12:59:46 +0200 | [diff] [blame] | 434 | env->sregs[SR_ESR] = ESR_EC_UNALIGNED_DATA | (wr << 10) \ |
| 435 | | (dr & 31) << 5; |
Edgar E. Iglesias | 3aa8098 | 2009-09-03 22:28:21 +0200 | [diff] [blame] | 436 | if (mask == 3) { |
Edgar E. Iglesias | 968a40f | 2009-09-03 12:59:46 +0200 | [diff] [blame] | 437 | env->sregs[SR_ESR] |= 1 << 11; |
| 438 | } |
Edgar E. Iglesias | 97f90cb | 2009-09-11 10:27:38 +0200 | [diff] [blame] | 439 | if (!(env->sregs[SR_MSR] & MSR_EE)) { |
| 440 | return; |
| 441 | } |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 442 | helper_raise_exception(env, EXCP_HW_EXCP); |
Edgar E. Iglesias | 968a40f | 2009-09-03 12:59:46 +0200 | [diff] [blame] | 443 | } |
| 444 | } |
| 445 | |
Edgar E. Iglesias | 403322e | 2018-04-13 20:20:25 +0200 | [diff] [blame] | 446 | void helper_stackprot(CPUMBState *env, target_ulong addr) |
Edgar E. Iglesias | 5818dee | 2012-01-10 10:27:11 +0100 | [diff] [blame] | 447 | { |
| 448 | if (addr < env->slr || addr > env->shr) { |
Edgar E. Iglesias | 403322e | 2018-04-13 20:20:25 +0200 | [diff] [blame] | 449 | qemu_log_mask(CPU_LOG_INT, "Stack protector violation at " |
| 450 | TARGET_FMT_lx " %x %x\n", |
Paolo Bonzini | 1d512a6 | 2015-11-13 13:24:57 +0100 | [diff] [blame] | 451 | addr, env->slr, env->shr); |
Alistair Francis | 53432dc | 2015-05-29 16:29:28 +1000 | [diff] [blame] | 452 | env->sregs[SR_EAR] = addr; |
| 453 | env->sregs[SR_ESR] = ESR_EC_STACKPROT; |
| 454 | helper_raise_exception(env, EXCP_HW_EXCP); |
Edgar E. Iglesias | 5818dee | 2012-01-10 10:27:11 +0100 | [diff] [blame] | 455 | } |
| 456 | } |
| 457 | |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 458 | #if !defined(CONFIG_USER_ONLY) |
| 459 | /* Writes/reads to the MMU's special regs end up here. */ |
Edgar E. Iglesias | f0f7e7f | 2018-04-16 21:25:01 +0200 | [diff] [blame] | 460 | uint32_t helper_mmu_read(CPUMBState *env, uint32_t ext, uint32_t rn) |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 461 | { |
Edgar E. Iglesias | f0f7e7f | 2018-04-16 21:25:01 +0200 | [diff] [blame] | 462 | return mmu_read(env, ext, rn); |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 463 | } |
| 464 | |
Edgar E. Iglesias | f0f7e7f | 2018-04-16 21:25:01 +0200 | [diff] [blame] | 465 | void helper_mmu_write(CPUMBState *env, uint32_t ext, uint32_t rn, uint32_t v) |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 466 | { |
Edgar E. Iglesias | f0f7e7f | 2018-04-16 21:25:01 +0200 | [diff] [blame] | 467 | mmu_write(env, ext, rn, v); |
Edgar E. Iglesias | 4acb54b | 2009-05-20 19:37:39 +0200 | [diff] [blame] | 468 | } |
Edgar E. Iglesias | faed1c2 | 2009-09-03 13:25:09 +0200 | [diff] [blame] | 469 | |
Peter Maydell | bdff812 | 2018-12-10 17:56:30 +0000 | [diff] [blame] | 470 | void mb_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr, |
| 471 | unsigned size, MMUAccessType access_type, |
| 472 | int mmu_idx, MemTxAttrs attrs, |
| 473 | MemTxResult response, uintptr_t retaddr) |
Edgar E. Iglesias | faed1c2 | 2009-09-03 13:25:09 +0200 | [diff] [blame] | 474 | { |
Andreas Färber | c658b94 | 2013-05-27 06:49:53 +0200 | [diff] [blame] | 475 | MicroBlazeCPU *cpu; |
| 476 | CPUMBState *env; |
Peter Maydell | bdff812 | 2018-12-10 17:56:30 +0000 | [diff] [blame] | 477 | qemu_log_mask(CPU_LOG_INT, "Transaction failed: vaddr 0x%" VADDR_PRIx |
| 478 | " physaddr 0x" TARGET_FMT_plx " size %d access type %s\n", |
| 479 | addr, physaddr, size, |
| 480 | access_type == MMU_INST_FETCH ? "INST_FETCH" : |
| 481 | (access_type == MMU_DATA_LOAD ? "DATA_LOAD" : "DATA_STORE")); |
Andreas Färber | c658b94 | 2013-05-27 06:49:53 +0200 | [diff] [blame] | 482 | cpu = MICROBLAZE_CPU(cs); |
| 483 | env = &cpu->env; |
Peter Maydell | bdff812 | 2018-12-10 17:56:30 +0000 | [diff] [blame] | 484 | |
| 485 | cpu_restore_state(cs, retaddr, true); |
Andreas Färber | c658b94 | 2013-05-27 06:49:53 +0200 | [diff] [blame] | 486 | if (!(env->sregs[SR_MSR] & MSR_EE)) { |
Edgar E. Iglesias | faed1c2 | 2009-09-03 13:25:09 +0200 | [diff] [blame] | 487 | return; |
| 488 | } |
| 489 | |
Edgar E. Iglesias | 97f90cb | 2009-09-11 10:27:38 +0200 | [diff] [blame] | 490 | env->sregs[SR_EAR] = addr; |
Peter Maydell | bdff812 | 2018-12-10 17:56:30 +0000 | [diff] [blame] | 491 | if (access_type == MMU_INST_FETCH) { |
Edgar E. Iglesias | 97f90cb | 2009-09-11 10:27:38 +0200 | [diff] [blame] | 492 | if ((env->pvr.regs[2] & PVR2_IOPB_BUS_EXC_MASK)) { |
Edgar E. Iglesias | faed1c2 | 2009-09-03 13:25:09 +0200 | [diff] [blame] | 493 | env->sregs[SR_ESR] = ESR_EC_INSN_BUS; |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 494 | helper_raise_exception(env, EXCP_HW_EXCP); |
Edgar E. Iglesias | faed1c2 | 2009-09-03 13:25:09 +0200 | [diff] [blame] | 495 | } |
| 496 | } else { |
Edgar E. Iglesias | 97f90cb | 2009-09-11 10:27:38 +0200 | [diff] [blame] | 497 | if ((env->pvr.regs[2] & PVR2_DOPB_BUS_EXC_MASK)) { |
Edgar E. Iglesias | faed1c2 | 2009-09-03 13:25:09 +0200 | [diff] [blame] | 498 | env->sregs[SR_ESR] = ESR_EC_DATA_BUS; |
Blue Swirl | 64254eb | 2012-09-02 08:39:22 +0000 | [diff] [blame] | 499 | helper_raise_exception(env, EXCP_HW_EXCP); |
Edgar E. Iglesias | faed1c2 | 2009-09-03 13:25:09 +0200 | [diff] [blame] | 500 | } |
| 501 | } |
| 502 | } |
Paul Brook | 3c7b48b | 2010-03-01 04:11:28 +0000 | [diff] [blame] | 503 | #endif |