ths | 94cff60 | 2007-10-08 13:11:58 +0000 | [diff] [blame] | 1 | #define CRIS_MMU_ERR_EXEC 0 |
| 2 | #define CRIS_MMU_ERR_READ 1 |
| 3 | #define CRIS_MMU_ERR_WRITE 2 |
| 4 | #define CRIS_MMU_ERR_FLUSH 3 |
| 5 | |
Edgar E. Iglesias | 2fa73ec | 2009-04-25 15:51:53 +0200 | [diff] [blame] | 6 | struct cris_mmu_result |
ths | 94cff60 | 2007-10-08 13:11:58 +0000 | [diff] [blame] | 7 | { |
| 8 | uint32_t phy; |
edgar_igl | b41f7df | 2008-05-02 22:16:17 +0000 | [diff] [blame] | 9 | int prot; |
edgar_igl | 786c02f | 2008-03-14 01:08:09 +0000 | [diff] [blame] | 10 | int bf_vec; |
ths | 94cff60 | 2007-10-08 13:11:58 +0000 | [diff] [blame] | 11 | }; |
| 12 | |
edgar_igl | 5281966 | 2009-01-26 22:21:30 +0000 | [diff] [blame] | 13 | void cris_mmu_init(CPUState *env); |
edgar_igl | cf1d97f | 2008-05-13 10:59:14 +0000 | [diff] [blame] | 14 | void cris_mmu_flush_pid(CPUState *env, uint32_t pid); |
Edgar E. Iglesias | 2fa73ec | 2009-04-25 15:51:53 +0200 | [diff] [blame] | 15 | int cris_mmu_translate(struct cris_mmu_result *res, |
ths | 94cff60 | 2007-10-08 13:11:58 +0000 | [diff] [blame] | 16 | CPUState *env, uint32_t vaddr, |
Edgar E. Iglesias | 9f5a1fa | 2010-07-05 11:39:04 +0200 | [diff] [blame] | 17 | int rw, int mmu_idx, int debug); |