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Richard Henderson61766fe2016-12-15 11:26:14 -08001/*
2 * HPPA gdb server stub
3 *
4 * Copyright (c) 2016 Richard Henderson <rth@twiddle.net>
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
Chetan Pantd6ea4232020-10-23 12:33:53 +00009 * version 2.1 of the License, or (at your option) any later version.
Richard Henderson61766fe2016-12-15 11:26:14 -080010 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
20#include "qemu/osdep.h"
Richard Henderson61766fe2016-12-15 11:26:14 -080021#include "cpu.h"
22#include "exec/gdbstub.h"
23
Alex Bennéea010bdb2020-03-16 17:21:41 +000024int hppa_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)
Richard Henderson61766fe2016-12-15 11:26:14 -080025{
26 HPPACPU *cpu = HPPA_CPU(cs);
27 CPUHPPAState *env = &cpu->env;
Richard Hendersoneaa37832017-10-09 12:35:48 -070028 target_ureg val;
Richard Henderson61766fe2016-12-15 11:26:14 -080029
30 switch (n) {
31 case 0:
32 val = cpu_hppa_get_psw(env);
33 break;
34 case 1 ... 31:
35 val = env->gr[n];
36 break;
37 case 32:
Richard Henderson35136a72017-10-10 21:19:34 -070038 val = env->cr[CR_SAR];
Richard Henderson61766fe2016-12-15 11:26:14 -080039 break;
40 case 33:
41 val = env->iaoq_f;
42 break;
Richard Hendersone33348a2017-11-07 05:42:14 +010043 case 34:
44 val = env->iasq_f >> 32;
45 break;
Richard Henderson61766fe2016-12-15 11:26:14 -080046 case 35:
47 val = env->iaoq_b;
48 break;
Richard Hendersone33348a2017-11-07 05:42:14 +010049 case 36:
50 val = env->iasq_b >> 32;
51 break;
52 case 37:
53 val = env->cr[CR_EIEM];
54 break;
55 case 38:
56 val = env->cr[CR_IIR];
57 break;
58 case 39:
59 val = env->cr[CR_ISR];
60 break;
61 case 40:
62 val = env->cr[CR_IOR];
63 break;
64 case 41:
65 val = env->cr[CR_IPSW];
66 break;
67 case 43:
68 val = env->sr[4] >> 32;
69 break;
70 case 44:
71 val = env->sr[0] >> 32;
72 break;
73 case 45:
74 val = env->sr[1] >> 32;
75 break;
76 case 46:
77 val = env->sr[2] >> 32;
78 break;
79 case 47:
80 val = env->sr[3] >> 32;
81 break;
82 case 48:
83 val = env->sr[5] >> 32;
84 break;
85 case 49:
86 val = env->sr[6] >> 32;
87 break;
88 case 50:
89 val = env->sr[7] >> 32;
90 break;
91 case 51:
92 val = env->cr[CR_RC];
93 break;
94 case 52:
Sven Schnelled5de20b2019-03-11 20:16:00 +010095 val = env->cr[CR_PID1];
Richard Hendersone33348a2017-11-07 05:42:14 +010096 break;
97 case 53:
Sven Schnelled5de20b2019-03-11 20:16:00 +010098 val = env->cr[CR_PID2];
Richard Hendersone33348a2017-11-07 05:42:14 +010099 break;
100 case 54:
101 val = env->cr[CR_SCRCCR];
102 break;
103 case 55:
Sven Schnelled5de20b2019-03-11 20:16:00 +0100104 val = env->cr[CR_PID3];
Richard Hendersone33348a2017-11-07 05:42:14 +0100105 break;
106 case 56:
Sven Schnelled5de20b2019-03-11 20:16:00 +0100107 val = env->cr[CR_PID4];
Richard Hendersone33348a2017-11-07 05:42:14 +0100108 break;
109 case 57:
110 val = env->cr[24];
111 break;
112 case 58:
113 val = env->cr[25];
114 break;
Richard Henderson61766fe2016-12-15 11:26:14 -0800115 case 59:
Richard Henderson35136a72017-10-10 21:19:34 -0700116 val = env->cr[26];
Richard Henderson61766fe2016-12-15 11:26:14 -0800117 break;
118 case 60:
Richard Henderson35136a72017-10-10 21:19:34 -0700119 val = env->cr[27];
Richard Henderson61766fe2016-12-15 11:26:14 -0800120 break;
Richard Hendersone33348a2017-11-07 05:42:14 +0100121 case 61:
122 val = env->cr[28];
123 break;
124 case 62:
125 val = env->cr[29];
126 break;
127 case 63:
128 val = env->cr[30];
129 break;
Richard Henderson61766fe2016-12-15 11:26:14 -0800130 case 64 ... 127:
131 val = extract64(env->fr[(n - 64) / 2], (n & 1 ? 0 : 32), 32);
132 break;
133 default:
134 if (n < 128) {
135 val = 0;
136 } else {
137 return 0;
138 }
139 break;
140 }
Richard Hendersoneaa37832017-10-09 12:35:48 -0700141
142 if (TARGET_REGISTER_BITS == 64) {
143 return gdb_get_reg64(mem_buf, val);
144 } else {
145 return gdb_get_reg32(mem_buf, val);
146 }
Richard Henderson61766fe2016-12-15 11:26:14 -0800147}
148
149int hppa_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)
150{
151 HPPACPU *cpu = HPPA_CPU(cs);
152 CPUHPPAState *env = &cpu->env;
Richard Hendersoneaa37832017-10-09 12:35:48 -0700153 target_ureg val;
154
155 if (TARGET_REGISTER_BITS == 64) {
156 val = ldq_p(mem_buf);
157 } else {
158 val = ldl_p(mem_buf);
159 }
Richard Henderson61766fe2016-12-15 11:26:14 -0800160
161 switch (n) {
162 case 0:
163 cpu_hppa_put_psw(env, val);
164 break;
165 case 1 ... 31:
166 env->gr[n] = val;
167 break;
168 case 32:
Richard Henderson35136a72017-10-10 21:19:34 -0700169 env->cr[CR_SAR] = val;
Richard Henderson61766fe2016-12-15 11:26:14 -0800170 break;
171 case 33:
172 env->iaoq_f = val;
173 break;
Richard Hendersone33348a2017-11-07 05:42:14 +0100174 case 34:
175 env->iasq_f = (uint64_t)val << 32;
176 break;
Richard Henderson61766fe2016-12-15 11:26:14 -0800177 case 35:
178 env->iaoq_b = val;
Richard Henderson6836a8f2017-02-06 18:25:31 -0800179 break;
Richard Hendersone33348a2017-11-07 05:42:14 +0100180 case 36:
181 env->iasq_b = (uint64_t)val << 32;
182 break;
183 case 37:
184 env->cr[CR_EIEM] = val;
185 break;
186 case 38:
187 env->cr[CR_IIR] = val;
188 break;
189 case 39:
190 env->cr[CR_ISR] = val;
191 break;
192 case 40:
193 env->cr[CR_IOR] = val;
194 break;
195 case 41:
196 env->cr[CR_IPSW] = val;
197 break;
198 case 43:
199 env->sr[4] = (uint64_t)val << 32;
200 break;
201 case 44:
202 env->sr[0] = (uint64_t)val << 32;
203 break;
204 case 45:
205 env->sr[1] = (uint64_t)val << 32;
206 break;
207 case 46:
208 env->sr[2] = (uint64_t)val << 32;
209 break;
210 case 47:
211 env->sr[3] = (uint64_t)val << 32;
212 break;
213 case 48:
214 env->sr[5] = (uint64_t)val << 32;
215 break;
216 case 49:
217 env->sr[6] = (uint64_t)val << 32;
218 break;
219 case 50:
220 env->sr[7] = (uint64_t)val << 32;
221 break;
222 case 51:
223 env->cr[CR_RC] = val;
224 break;
225 case 52:
Sven Schnelled5de20b2019-03-11 20:16:00 +0100226 env->cr[CR_PID1] = val;
227 cpu_hppa_change_prot_id(env);
Richard Hendersone33348a2017-11-07 05:42:14 +0100228 break;
229 case 53:
Sven Schnelled5de20b2019-03-11 20:16:00 +0100230 env->cr[CR_PID2] = val;
231 cpu_hppa_change_prot_id(env);
Richard Hendersone33348a2017-11-07 05:42:14 +0100232 break;
233 case 54:
234 env->cr[CR_SCRCCR] = val;
235 break;
236 case 55:
Sven Schnelled5de20b2019-03-11 20:16:00 +0100237 env->cr[CR_PID3] = val;
238 cpu_hppa_change_prot_id(env);
Richard Hendersone33348a2017-11-07 05:42:14 +0100239 break;
240 case 56:
Sven Schnelled5de20b2019-03-11 20:16:00 +0100241 env->cr[CR_PID4] = val;
242 cpu_hppa_change_prot_id(env);
Richard Hendersone33348a2017-11-07 05:42:14 +0100243 break;
244 case 57:
245 env->cr[24] = val;
246 break;
247 case 58:
248 env->cr[25] = val;
249 break;
Richard Henderson61766fe2016-12-15 11:26:14 -0800250 case 59:
Richard Henderson35136a72017-10-10 21:19:34 -0700251 env->cr[26] = val;
Richard Henderson61766fe2016-12-15 11:26:14 -0800252 break;
253 case 60:
Richard Henderson35136a72017-10-10 21:19:34 -0700254 env->cr[27] = val;
Richard Henderson61766fe2016-12-15 11:26:14 -0800255 break;
Richard Hendersone33348a2017-11-07 05:42:14 +0100256 case 61:
257 env->cr[28] = val;
258 break;
259 case 62:
260 env->cr[29] = val;
261 break;
262 case 63:
263 env->cr[30] = val;
264 break;
Richard Henderson61766fe2016-12-15 11:26:14 -0800265 case 64:
266 env->fr[0] = deposit64(env->fr[0], 32, 32, val);
267 cpu_hppa_loaded_fr0(env);
268 break;
269 case 65 ... 127:
270 {
271 uint64_t *fr = &env->fr[(n - 64) / 2];
Sven Schnelle5c414962019-01-28 17:53:33 +0100272 *fr = deposit64(*fr, (n & 1 ? 0 : 32), 32, val);
Richard Henderson61766fe2016-12-15 11:26:14 -0800273 }
274 break;
275 default:
276 if (n >= 128) {
277 return 0;
278 }
279 break;
280 }
Richard Hendersoneaa37832017-10-09 12:35:48 -0700281 return sizeof(target_ureg);
Richard Henderson61766fe2016-12-15 11:26:14 -0800282}