Philippe Mathieu-Daudé | 61c7f98 | 2020-09-13 21:53:48 +0200 | [diff] [blame] | 1 | # -*- Mode: Python -*- |
| 2 | # vim: filetype=python |
| 3 | # |
| 4 | # This work is licensed under the terms of the GNU GPL, version 2 or later. |
| 5 | # See the COPYING file in the top-level directory. |
| 6 | # SPDX-License-Identifier: GPL-2.0-or-later |
| 7 | |
| 8 | ## |
| 9 | # = PCI |
| 10 | ## |
| 11 | |
| 12 | ## |
| 13 | # @PciMemoryRange: |
| 14 | # |
| 15 | # A PCI device memory region |
| 16 | # |
| 17 | # @base: the starting address (guest physical) |
| 18 | # |
| 19 | # @limit: the ending address (guest physical) |
| 20 | # |
Markus Armbruster | 9bc6e89 | 2020-11-18 07:41:58 +0100 | [diff] [blame] | 21 | # Since: 0.14 |
Philippe Mathieu-Daudé | 61c7f98 | 2020-09-13 21:53:48 +0200 | [diff] [blame] | 22 | ## |
| 23 | { 'struct': 'PciMemoryRange', 'data': {'base': 'int', 'limit': 'int'} } |
| 24 | |
| 25 | ## |
| 26 | # @PciMemoryRegion: |
| 27 | # |
| 28 | # Information about a PCI device I/O region. |
| 29 | # |
| 30 | # @bar: the index of the Base Address Register for this region |
| 31 | # |
| 32 | # @type: - 'io' if the region is a PIO region |
| 33 | # - 'memory' if the region is a MMIO region |
| 34 | # |
| 35 | # @size: memory size |
| 36 | # |
| 37 | # @prefetch: if @type is 'memory', true if the memory is prefetchable |
| 38 | # |
| 39 | # @mem_type_64: if @type is 'memory', true if the BAR is 64-bit |
| 40 | # |
Markus Armbruster | 9bc6e89 | 2020-11-18 07:41:58 +0100 | [diff] [blame] | 41 | # Since: 0.14 |
Philippe Mathieu-Daudé | 61c7f98 | 2020-09-13 21:53:48 +0200 | [diff] [blame] | 42 | ## |
| 43 | { 'struct': 'PciMemoryRegion', |
| 44 | 'data': {'bar': 'int', 'type': 'str', 'address': 'int', 'size': 'int', |
| 45 | '*prefetch': 'bool', '*mem_type_64': 'bool' } } |
| 46 | |
| 47 | ## |
| 48 | # @PciBusInfo: |
| 49 | # |
| 50 | # Information about a bus of a PCI Bridge device |
| 51 | # |
| 52 | # @number: primary bus interface number. This should be the number of the |
| 53 | # bus the device resides on. |
| 54 | # |
| 55 | # @secondary: secondary bus interface number. This is the number of the |
| 56 | # main bus for the bridge |
| 57 | # |
| 58 | # @subordinate: This is the highest number bus that resides below the |
| 59 | # bridge. |
| 60 | # |
| 61 | # @io_range: The PIO range for all devices on this bridge |
| 62 | # |
| 63 | # @memory_range: The MMIO range for all devices on this bridge |
| 64 | # |
| 65 | # @prefetchable_range: The range of prefetchable MMIO for all devices on |
| 66 | # this bridge |
| 67 | # |
| 68 | # Since: 2.4 |
| 69 | ## |
| 70 | { 'struct': 'PciBusInfo', |
| 71 | 'data': {'number': 'int', 'secondary': 'int', 'subordinate': 'int', |
| 72 | 'io_range': 'PciMemoryRange', |
| 73 | 'memory_range': 'PciMemoryRange', |
| 74 | 'prefetchable_range': 'PciMemoryRange' } } |
| 75 | |
| 76 | ## |
| 77 | # @PciBridgeInfo: |
| 78 | # |
| 79 | # Information about a PCI Bridge device |
| 80 | # |
| 81 | # @bus: information about the bus the device resides on |
| 82 | # |
| 83 | # @devices: a list of @PciDeviceInfo for each device on this bridge |
| 84 | # |
Markus Armbruster | 9bc6e89 | 2020-11-18 07:41:58 +0100 | [diff] [blame] | 85 | # Since: 0.14 |
Philippe Mathieu-Daudé | 61c7f98 | 2020-09-13 21:53:48 +0200 | [diff] [blame] | 86 | ## |
| 87 | { 'struct': 'PciBridgeInfo', |
| 88 | 'data': {'bus': 'PciBusInfo', '*devices': ['PciDeviceInfo']} } |
| 89 | |
| 90 | ## |
| 91 | # @PciDeviceClass: |
| 92 | # |
| 93 | # Information about the Class of a PCI device |
| 94 | # |
| 95 | # @desc: a string description of the device's class |
| 96 | # |
| 97 | # @class: the class code of the device |
| 98 | # |
| 99 | # Since: 2.4 |
| 100 | ## |
| 101 | { 'struct': 'PciDeviceClass', |
| 102 | 'data': {'*desc': 'str', 'class': 'int'} } |
| 103 | |
| 104 | ## |
| 105 | # @PciDeviceId: |
| 106 | # |
| 107 | # Information about the Id of a PCI device |
| 108 | # |
| 109 | # @device: the PCI device id |
| 110 | # |
| 111 | # @vendor: the PCI vendor id |
| 112 | # |
| 113 | # @subsystem: the PCI subsystem id (since 3.1) |
| 114 | # |
| 115 | # @subsystem-vendor: the PCI subsystem vendor id (since 3.1) |
| 116 | # |
| 117 | # Since: 2.4 |
| 118 | ## |
| 119 | { 'struct': 'PciDeviceId', |
| 120 | 'data': {'device': 'int', 'vendor': 'int', '*subsystem': 'int', |
| 121 | '*subsystem-vendor': 'int'} } |
| 122 | |
| 123 | ## |
| 124 | # @PciDeviceInfo: |
| 125 | # |
| 126 | # Information about a PCI device |
| 127 | # |
| 128 | # @bus: the bus number of the device |
| 129 | # |
| 130 | # @slot: the slot the device is located in |
| 131 | # |
| 132 | # @function: the function of the slot used by the device |
| 133 | # |
| 134 | # @class_info: the class of the device |
| 135 | # |
| 136 | # @id: the PCI device id |
| 137 | # |
| 138 | # @irq: if an IRQ is assigned to the device, the IRQ number |
| 139 | # |
| 140 | # @irq_pin: the IRQ pin, zero means no IRQ (since 5.1) |
| 141 | # |
| 142 | # @qdev_id: the device name of the PCI device |
| 143 | # |
| 144 | # @pci_bridge: if the device is a PCI bridge, the bridge information |
| 145 | # |
| 146 | # @regions: a list of the PCI I/O regions associated with the device |
| 147 | # |
| 148 | # Notes: the contents of @class_info.desc are not stable and should only be |
| 149 | # treated as informational. |
| 150 | # |
Markus Armbruster | 9bc6e89 | 2020-11-18 07:41:58 +0100 | [diff] [blame] | 151 | # Since: 0.14 |
Philippe Mathieu-Daudé | 61c7f98 | 2020-09-13 21:53:48 +0200 | [diff] [blame] | 152 | ## |
| 153 | { 'struct': 'PciDeviceInfo', |
| 154 | 'data': {'bus': 'int', 'slot': 'int', 'function': 'int', |
| 155 | 'class_info': 'PciDeviceClass', 'id': 'PciDeviceId', |
| 156 | '*irq': 'int', 'irq_pin': 'int', 'qdev_id': 'str', |
| 157 | '*pci_bridge': 'PciBridgeInfo', 'regions': ['PciMemoryRegion'] }} |
| 158 | |
| 159 | ## |
| 160 | # @PciInfo: |
| 161 | # |
| 162 | # Information about a PCI bus |
| 163 | # |
| 164 | # @bus: the bus index |
| 165 | # |
| 166 | # @devices: a list of devices on this bus |
| 167 | # |
Markus Armbruster | 9bc6e89 | 2020-11-18 07:41:58 +0100 | [diff] [blame] | 168 | # Since: 0.14 |
Philippe Mathieu-Daudé | 61c7f98 | 2020-09-13 21:53:48 +0200 | [diff] [blame] | 169 | ## |
| 170 | { 'struct': 'PciInfo', 'data': {'bus': 'int', 'devices': ['PciDeviceInfo']} } |
| 171 | |
| 172 | ## |
| 173 | # @query-pci: |
| 174 | # |
| 175 | # Return information about the PCI bus topology of the guest. |
| 176 | # |
| 177 | # Returns: a list of @PciInfo for each PCI bus. Each bus is |
| 178 | # represented by a json-object, which has a key with a json-array of |
| 179 | # all PCI devices attached to it. Each device is represented by a |
| 180 | # json-object. |
| 181 | # |
Markus Armbruster | 9bc6e89 | 2020-11-18 07:41:58 +0100 | [diff] [blame] | 182 | # Since: 0.14 |
Philippe Mathieu-Daudé | 61c7f98 | 2020-09-13 21:53:48 +0200 | [diff] [blame] | 183 | # |
| 184 | # Example: |
| 185 | # |
| 186 | # -> { "execute": "query-pci" } |
| 187 | # <- { "return": [ |
| 188 | # { |
| 189 | # "bus": 0, |
| 190 | # "devices": [ |
| 191 | # { |
| 192 | # "bus": 0, |
| 193 | # "qdev_id": "", |
| 194 | # "slot": 0, |
| 195 | # "class_info": { |
| 196 | # "class": 1536, |
| 197 | # "desc": "Host bridge" |
| 198 | # }, |
| 199 | # "id": { |
| 200 | # "device": 32902, |
| 201 | # "vendor": 4663 |
| 202 | # }, |
| 203 | # "function": 0, |
| 204 | # "regions": [ |
| 205 | # ] |
| 206 | # }, |
| 207 | # { |
| 208 | # "bus": 0, |
| 209 | # "qdev_id": "", |
| 210 | # "slot": 1, |
| 211 | # "class_info": { |
| 212 | # "class": 1537, |
| 213 | # "desc": "ISA bridge" |
| 214 | # }, |
| 215 | # "id": { |
| 216 | # "device": 32902, |
| 217 | # "vendor": 28672 |
| 218 | # }, |
| 219 | # "function": 0, |
| 220 | # "regions": [ |
| 221 | # ] |
| 222 | # }, |
| 223 | # { |
| 224 | # "bus": 0, |
| 225 | # "qdev_id": "", |
| 226 | # "slot": 1, |
| 227 | # "class_info": { |
| 228 | # "class": 257, |
| 229 | # "desc": "IDE controller" |
| 230 | # }, |
| 231 | # "id": { |
| 232 | # "device": 32902, |
| 233 | # "vendor": 28688 |
| 234 | # }, |
| 235 | # "function": 1, |
| 236 | # "regions": [ |
| 237 | # { |
| 238 | # "bar": 4, |
| 239 | # "size": 16, |
| 240 | # "address": 49152, |
| 241 | # "type": "io" |
| 242 | # } |
| 243 | # ] |
| 244 | # }, |
| 245 | # { |
| 246 | # "bus": 0, |
| 247 | # "qdev_id": "", |
| 248 | # "slot": 2, |
| 249 | # "class_info": { |
| 250 | # "class": 768, |
| 251 | # "desc": "VGA controller" |
| 252 | # }, |
| 253 | # "id": { |
| 254 | # "device": 4115, |
| 255 | # "vendor": 184 |
| 256 | # }, |
| 257 | # "function": 0, |
| 258 | # "regions": [ |
| 259 | # { |
| 260 | # "prefetch": true, |
| 261 | # "mem_type_64": false, |
| 262 | # "bar": 0, |
| 263 | # "size": 33554432, |
| 264 | # "address": 4026531840, |
| 265 | # "type": "memory" |
| 266 | # }, |
| 267 | # { |
| 268 | # "prefetch": false, |
| 269 | # "mem_type_64": false, |
| 270 | # "bar": 1, |
| 271 | # "size": 4096, |
| 272 | # "address": 4060086272, |
| 273 | # "type": "memory" |
| 274 | # }, |
| 275 | # { |
| 276 | # "prefetch": false, |
| 277 | # "mem_type_64": false, |
| 278 | # "bar": 6, |
| 279 | # "size": 65536, |
| 280 | # "address": -1, |
| 281 | # "type": "memory" |
| 282 | # } |
| 283 | # ] |
| 284 | # }, |
| 285 | # { |
| 286 | # "bus": 0, |
| 287 | # "qdev_id": "", |
| 288 | # "irq": 11, |
| 289 | # "slot": 4, |
| 290 | # "class_info": { |
| 291 | # "class": 1280, |
| 292 | # "desc": "RAM controller" |
| 293 | # }, |
| 294 | # "id": { |
| 295 | # "device": 6900, |
| 296 | # "vendor": 4098 |
| 297 | # }, |
| 298 | # "function": 0, |
| 299 | # "regions": [ |
| 300 | # { |
| 301 | # "bar": 0, |
| 302 | # "size": 32, |
| 303 | # "address": 49280, |
| 304 | # "type": "io" |
| 305 | # } |
| 306 | # ] |
| 307 | # } |
| 308 | # ] |
| 309 | # } |
| 310 | # ] |
| 311 | # } |
| 312 | # |
| 313 | # Note: This example has been shortened as the real response is too long. |
| 314 | # |
| 315 | ## |
| 316 | { 'command': 'query-pci', 'returns': ['PciInfo'] } |