aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 1 | /* |
| 2 | * QEMU KVM support |
| 3 | * |
| 4 | * Copyright (C) 2006-2008 Qumranet Technologies |
| 5 | * Copyright IBM, Corp. 2008 |
| 6 | * |
| 7 | * Authors: |
| 8 | * Anthony Liguori <aliguori@us.ibm.com> |
| 9 | * |
| 10 | * This work is licensed under the terms of the GNU GPL, version 2 or later. |
| 11 | * See the COPYING file in the top-level directory. |
| 12 | * |
| 13 | */ |
| 14 | |
| 15 | #include <sys/types.h> |
| 16 | #include <sys/ioctl.h> |
| 17 | #include <sys/mman.h> |
| 18 | |
| 19 | #include <linux/kvm.h> |
| 20 | |
| 21 | #include "qemu-common.h" |
| 22 | #include "sysemu.h" |
| 23 | #include "kvm.h" |
| 24 | #include "cpu.h" |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 25 | #include "gdbstub.h" |
Jan Kiszka | 0e607a8 | 2009-11-06 19:39:24 +0100 | [diff] [blame] | 26 | #include "host-utils.h" |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 27 | |
Gleb Natapov | bb0300d | 2010-01-13 15:25:06 +0200 | [diff] [blame] | 28 | #ifdef CONFIG_KVM_PARA |
| 29 | #include <linux/kvm_para.h> |
| 30 | #endif |
| 31 | // |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 32 | //#define DEBUG_KVM |
| 33 | |
| 34 | #ifdef DEBUG_KVM |
| 35 | #define dprintf(fmt, ...) \ |
| 36 | do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) |
| 37 | #else |
| 38 | #define dprintf(fmt, ...) \ |
| 39 | do { } while (0) |
| 40 | #endif |
| 41 | |
Glauber Costa | 1a03675 | 2009-10-22 10:26:56 -0200 | [diff] [blame] | 42 | #define MSR_KVM_WALL_CLOCK 0x11 |
| 43 | #define MSR_KVM_SYSTEM_TIME 0x12 |
| 44 | |
Avi Kivity | b827df5 | 2009-05-03 17:04:01 +0300 | [diff] [blame] | 45 | #ifdef KVM_CAP_EXT_CPUID |
| 46 | |
| 47 | static struct kvm_cpuid2 *try_get_cpuid(KVMState *s, int max) |
| 48 | { |
| 49 | struct kvm_cpuid2 *cpuid; |
| 50 | int r, size; |
| 51 | |
| 52 | size = sizeof(*cpuid) + max * sizeof(*cpuid->entries); |
| 53 | cpuid = (struct kvm_cpuid2 *)qemu_mallocz(size); |
| 54 | cpuid->nent = max; |
| 55 | r = kvm_ioctl(s, KVM_GET_SUPPORTED_CPUID, cpuid); |
Mark McLoughlin | 76ae317 | 2009-05-19 18:55:21 +0100 | [diff] [blame] | 56 | if (r == 0 && cpuid->nent >= max) { |
| 57 | r = -E2BIG; |
| 58 | } |
Avi Kivity | b827df5 | 2009-05-03 17:04:01 +0300 | [diff] [blame] | 59 | if (r < 0) { |
| 60 | if (r == -E2BIG) { |
| 61 | qemu_free(cpuid); |
| 62 | return NULL; |
| 63 | } else { |
| 64 | fprintf(stderr, "KVM_GET_SUPPORTED_CPUID failed: %s\n", |
| 65 | strerror(-r)); |
| 66 | exit(1); |
| 67 | } |
| 68 | } |
| 69 | return cpuid; |
| 70 | } |
| 71 | |
| 72 | uint32_t kvm_arch_get_supported_cpuid(CPUState *env, uint32_t function, int reg) |
| 73 | { |
| 74 | struct kvm_cpuid2 *cpuid; |
| 75 | int i, max; |
| 76 | uint32_t ret = 0; |
| 77 | uint32_t cpuid_1_edx; |
| 78 | |
| 79 | if (!kvm_check_extension(env->kvm_state, KVM_CAP_EXT_CPUID)) { |
| 80 | return -1U; |
| 81 | } |
| 82 | |
| 83 | max = 1; |
| 84 | while ((cpuid = try_get_cpuid(env->kvm_state, max)) == NULL) { |
| 85 | max *= 2; |
| 86 | } |
| 87 | |
| 88 | for (i = 0; i < cpuid->nent; ++i) { |
| 89 | if (cpuid->entries[i].function == function) { |
| 90 | switch (reg) { |
| 91 | case R_EAX: |
| 92 | ret = cpuid->entries[i].eax; |
| 93 | break; |
| 94 | case R_EBX: |
| 95 | ret = cpuid->entries[i].ebx; |
| 96 | break; |
| 97 | case R_ECX: |
| 98 | ret = cpuid->entries[i].ecx; |
| 99 | break; |
| 100 | case R_EDX: |
| 101 | ret = cpuid->entries[i].edx; |
| 102 | if (function == 0x80000001) { |
| 103 | /* On Intel, kvm returns cpuid according to the Intel spec, |
| 104 | * so add missing bits according to the AMD spec: |
| 105 | */ |
| 106 | cpuid_1_edx = kvm_arch_get_supported_cpuid(env, 1, R_EDX); |
| 107 | ret |= cpuid_1_edx & 0xdfeff7ff; |
| 108 | } |
| 109 | break; |
| 110 | } |
| 111 | } |
| 112 | } |
| 113 | |
| 114 | qemu_free(cpuid); |
| 115 | |
| 116 | return ret; |
| 117 | } |
| 118 | |
| 119 | #else |
| 120 | |
| 121 | uint32_t kvm_arch_get_supported_cpuid(CPUState *env, uint32_t function, int reg) |
| 122 | { |
| 123 | return -1U; |
| 124 | } |
| 125 | |
| 126 | #endif |
| 127 | |
Andre Przywara | 6c1f42f | 2009-06-25 00:08:02 +0200 | [diff] [blame] | 128 | static void kvm_trim_features(uint32_t *features, uint32_t supported) |
| 129 | { |
| 130 | int i; |
| 131 | uint32_t mask; |
| 132 | |
| 133 | for (i = 0; i < 32; ++i) { |
| 134 | mask = 1U << i; |
| 135 | if ((*features & mask) && !(supported & mask)) { |
| 136 | *features &= ~mask; |
| 137 | } |
| 138 | } |
| 139 | } |
| 140 | |
Gleb Natapov | bb0300d | 2010-01-13 15:25:06 +0200 | [diff] [blame] | 141 | #ifdef CONFIG_KVM_PARA |
| 142 | struct kvm_para_features { |
| 143 | int cap; |
| 144 | int feature; |
| 145 | } para_features[] = { |
| 146 | #ifdef KVM_CAP_CLOCKSOURCE |
| 147 | { KVM_CAP_CLOCKSOURCE, KVM_FEATURE_CLOCKSOURCE }, |
| 148 | #endif |
| 149 | #ifdef KVM_CAP_NOP_IO_DELAY |
| 150 | { KVM_CAP_NOP_IO_DELAY, KVM_FEATURE_NOP_IO_DELAY }, |
| 151 | #endif |
| 152 | #ifdef KVM_CAP_PV_MMU |
| 153 | { KVM_CAP_PV_MMU, KVM_FEATURE_MMU_OP }, |
| 154 | #endif |
| 155 | #ifdef KVM_CAP_CR3_CACHE |
| 156 | { KVM_CAP_CR3_CACHE, KVM_FEATURE_CR3_CACHE }, |
| 157 | #endif |
| 158 | { -1, -1 } |
| 159 | }; |
| 160 | |
| 161 | static int get_para_features(CPUState *env) |
| 162 | { |
| 163 | int i, features = 0; |
| 164 | |
| 165 | for (i = 0; i < ARRAY_SIZE(para_features) - 1; i++) { |
| 166 | if (kvm_check_extension(env->kvm_state, para_features[i].cap)) |
| 167 | features |= (1 << para_features[i].feature); |
| 168 | } |
| 169 | |
| 170 | return features; |
| 171 | } |
| 172 | #endif |
| 173 | |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 174 | int kvm_arch_init_vcpu(CPUState *env) |
| 175 | { |
| 176 | struct { |
aliguori | 486bd5a | 2009-02-09 15:50:31 +0000 | [diff] [blame] | 177 | struct kvm_cpuid2 cpuid; |
| 178 | struct kvm_cpuid_entry2 entries[100]; |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 179 | } __attribute__((packed)) cpuid_data; |
aliguori | 486bd5a | 2009-02-09 15:50:31 +0000 | [diff] [blame] | 180 | uint32_t limit, i, j, cpuid_i; |
aliguori | a33609c | 2009-04-17 20:50:54 +0000 | [diff] [blame] | 181 | uint32_t unused; |
Gleb Natapov | bb0300d | 2010-01-13 15:25:06 +0200 | [diff] [blame] | 182 | struct kvm_cpuid_entry2 *c; |
| 183 | #ifdef KVM_CPUID_SIGNATURE |
| 184 | uint32_t signature[3]; |
| 185 | #endif |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 186 | |
Jan Kiszka | f8d926e | 2009-05-02 02:18:38 +0200 | [diff] [blame] | 187 | env->mp_state = KVM_MP_STATE_RUNNABLE; |
| 188 | |
Andre Przywara | 6c1f42f | 2009-06-25 00:08:02 +0200 | [diff] [blame] | 189 | kvm_trim_features(&env->cpuid_features, |
| 190 | kvm_arch_get_supported_cpuid(env, 1, R_EDX)); |
Andre Przywara | 6c0d7ee | 2009-06-25 00:08:04 +0200 | [diff] [blame] | 191 | |
| 192 | i = env->cpuid_ext_features & CPUID_EXT_HYPERVISOR; |
Andre Przywara | 6c1f42f | 2009-06-25 00:08:02 +0200 | [diff] [blame] | 193 | kvm_trim_features(&env->cpuid_ext_features, |
| 194 | kvm_arch_get_supported_cpuid(env, 1, R_ECX)); |
Andre Przywara | 6c0d7ee | 2009-06-25 00:08:04 +0200 | [diff] [blame] | 195 | env->cpuid_ext_features |= i; |
| 196 | |
Andre Przywara | 6c1f42f | 2009-06-25 00:08:02 +0200 | [diff] [blame] | 197 | kvm_trim_features(&env->cpuid_ext2_features, |
| 198 | kvm_arch_get_supported_cpuid(env, 0x80000001, R_EDX)); |
| 199 | kvm_trim_features(&env->cpuid_ext3_features, |
| 200 | kvm_arch_get_supported_cpuid(env, 0x80000001, R_ECX)); |
| 201 | |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 202 | cpuid_i = 0; |
| 203 | |
Gleb Natapov | bb0300d | 2010-01-13 15:25:06 +0200 | [diff] [blame] | 204 | #ifdef CONFIG_KVM_PARA |
| 205 | /* Paravirtualization CPUIDs */ |
| 206 | memcpy(signature, "KVMKVMKVM\0\0\0", 12); |
| 207 | c = &cpuid_data.entries[cpuid_i++]; |
| 208 | memset(c, 0, sizeof(*c)); |
| 209 | c->function = KVM_CPUID_SIGNATURE; |
| 210 | c->eax = 0; |
| 211 | c->ebx = signature[0]; |
| 212 | c->ecx = signature[1]; |
| 213 | c->edx = signature[2]; |
| 214 | |
| 215 | c = &cpuid_data.entries[cpuid_i++]; |
| 216 | memset(c, 0, sizeof(*c)); |
| 217 | c->function = KVM_CPUID_FEATURES; |
| 218 | c->eax = env->cpuid_kvm_features & get_para_features(env); |
| 219 | #endif |
| 220 | |
aliguori | a33609c | 2009-04-17 20:50:54 +0000 | [diff] [blame] | 221 | cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused); |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 222 | |
| 223 | for (i = 0; i <= limit; i++) { |
Gleb Natapov | bb0300d | 2010-01-13 15:25:06 +0200 | [diff] [blame] | 224 | c = &cpuid_data.entries[cpuid_i++]; |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 225 | |
aliguori | 486bd5a | 2009-02-09 15:50:31 +0000 | [diff] [blame] | 226 | switch (i) { |
aliguori | a36b102 | 2009-02-09 15:50:36 +0000 | [diff] [blame] | 227 | case 2: { |
| 228 | /* Keep reading function 2 till all the input is received */ |
| 229 | int times; |
| 230 | |
aliguori | a36b102 | 2009-02-09 15:50:36 +0000 | [diff] [blame] | 231 | c->function = i; |
aliguori | a33609c | 2009-04-17 20:50:54 +0000 | [diff] [blame] | 232 | c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC | |
| 233 | KVM_CPUID_FLAG_STATE_READ_NEXT; |
| 234 | cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); |
| 235 | times = c->eax & 0xff; |
aliguori | a36b102 | 2009-02-09 15:50:36 +0000 | [diff] [blame] | 236 | |
| 237 | for (j = 1; j < times; ++j) { |
aliguori | a33609c | 2009-04-17 20:50:54 +0000 | [diff] [blame] | 238 | c = &cpuid_data.entries[cpuid_i++]; |
aliguori | a36b102 | 2009-02-09 15:50:36 +0000 | [diff] [blame] | 239 | c->function = i; |
aliguori | a33609c | 2009-04-17 20:50:54 +0000 | [diff] [blame] | 240 | c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC; |
| 241 | cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); |
aliguori | a36b102 | 2009-02-09 15:50:36 +0000 | [diff] [blame] | 242 | } |
| 243 | break; |
| 244 | } |
aliguori | 486bd5a | 2009-02-09 15:50:31 +0000 | [diff] [blame] | 245 | case 4: |
| 246 | case 0xb: |
| 247 | case 0xd: |
| 248 | for (j = 0; ; j++) { |
aliguori | 486bd5a | 2009-02-09 15:50:31 +0000 | [diff] [blame] | 249 | c->function = i; |
| 250 | c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX; |
| 251 | c->index = j; |
aliguori | a33609c | 2009-04-17 20:50:54 +0000 | [diff] [blame] | 252 | cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx); |
aliguori | 486bd5a | 2009-02-09 15:50:31 +0000 | [diff] [blame] | 253 | |
aliguori | a33609c | 2009-04-17 20:50:54 +0000 | [diff] [blame] | 254 | if (i == 4 && c->eax == 0) |
aliguori | 486bd5a | 2009-02-09 15:50:31 +0000 | [diff] [blame] | 255 | break; |
aliguori | a33609c | 2009-04-17 20:50:54 +0000 | [diff] [blame] | 256 | if (i == 0xb && !(c->ecx & 0xff00)) |
aliguori | 486bd5a | 2009-02-09 15:50:31 +0000 | [diff] [blame] | 257 | break; |
aliguori | a33609c | 2009-04-17 20:50:54 +0000 | [diff] [blame] | 258 | if (i == 0xd && c->eax == 0) |
aliguori | 486bd5a | 2009-02-09 15:50:31 +0000 | [diff] [blame] | 259 | break; |
aliguori | a33609c | 2009-04-17 20:50:54 +0000 | [diff] [blame] | 260 | |
| 261 | c = &cpuid_data.entries[cpuid_i++]; |
aliguori | 486bd5a | 2009-02-09 15:50:31 +0000 | [diff] [blame] | 262 | } |
| 263 | break; |
| 264 | default: |
aliguori | 486bd5a | 2009-02-09 15:50:31 +0000 | [diff] [blame] | 265 | c->function = i; |
aliguori | a33609c | 2009-04-17 20:50:54 +0000 | [diff] [blame] | 266 | c->flags = 0; |
| 267 | cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); |
aliguori | 486bd5a | 2009-02-09 15:50:31 +0000 | [diff] [blame] | 268 | break; |
| 269 | } |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 270 | } |
aliguori | a33609c | 2009-04-17 20:50:54 +0000 | [diff] [blame] | 271 | cpu_x86_cpuid(env, 0x80000000, 0, &limit, &unused, &unused, &unused); |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 272 | |
| 273 | for (i = 0x80000000; i <= limit; i++) { |
Gleb Natapov | bb0300d | 2010-01-13 15:25:06 +0200 | [diff] [blame] | 274 | c = &cpuid_data.entries[cpuid_i++]; |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 275 | |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 276 | c->function = i; |
aliguori | a33609c | 2009-04-17 20:50:54 +0000 | [diff] [blame] | 277 | c->flags = 0; |
| 278 | cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx); |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 279 | } |
| 280 | |
| 281 | cpuid_data.cpuid.nent = cpuid_i; |
| 282 | |
aliguori | 486bd5a | 2009-02-09 15:50:31 +0000 | [diff] [blame] | 283 | return kvm_vcpu_ioctl(env, KVM_SET_CPUID2, &cpuid_data); |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 284 | } |
| 285 | |
Jan Kiszka | caa5af0 | 2009-11-06 19:39:24 +0100 | [diff] [blame] | 286 | void kvm_arch_reset_vcpu(CPUState *env) |
| 287 | { |
Gleb Natapov | e73223a | 2010-01-06 16:30:10 +0200 | [diff] [blame] | 288 | env->exception_injected = -1; |
Jan Kiszka | 0e607a8 | 2009-11-06 19:39:24 +0100 | [diff] [blame] | 289 | env->interrupt_injected = -1; |
Jan Kiszka | a0fb002 | 2009-11-25 00:33:03 +0100 | [diff] [blame] | 290 | env->nmi_injected = 0; |
| 291 | env->nmi_pending = 0; |
Jan Kiszka | caa5af0 | 2009-11-06 19:39:24 +0100 | [diff] [blame] | 292 | } |
| 293 | |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 294 | static int kvm_has_msr_star(CPUState *env) |
| 295 | { |
| 296 | static int has_msr_star; |
| 297 | int ret; |
| 298 | |
| 299 | /* first time */ |
| 300 | if (has_msr_star == 0) { |
| 301 | struct kvm_msr_list msr_list, *kvm_msr_list; |
| 302 | |
| 303 | has_msr_star = -1; |
| 304 | |
| 305 | /* Obtain MSR list from KVM. These are the MSRs that we must |
| 306 | * save/restore */ |
aliguori | 4c9f737 | 2008-12-13 20:41:58 +0000 | [diff] [blame] | 307 | msr_list.nmsrs = 0; |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 308 | ret = kvm_ioctl(env->kvm_state, KVM_GET_MSR_INDEX_LIST, &msr_list); |
Jan Kiszka | 6fb6d24 | 2009-12-06 15:51:24 +0100 | [diff] [blame] | 309 | if (ret < 0 && ret != -E2BIG) { |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 310 | return 0; |
Jan Kiszka | 6fb6d24 | 2009-12-06 15:51:24 +0100 | [diff] [blame] | 311 | } |
Jan Kiszka | d9db889 | 2009-07-02 22:04:48 +0200 | [diff] [blame] | 312 | /* Old kernel modules had a bug and could write beyond the provided |
| 313 | memory. Allocate at least a safe amount of 1K. */ |
| 314 | kvm_msr_list = qemu_mallocz(MAX(1024, sizeof(msr_list) + |
| 315 | msr_list.nmsrs * |
| 316 | sizeof(msr_list.indices[0]))); |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 317 | |
aliguori | 5530845 | 2008-12-13 20:49:31 +0000 | [diff] [blame] | 318 | kvm_msr_list->nmsrs = msr_list.nmsrs; |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 319 | ret = kvm_ioctl(env->kvm_state, KVM_GET_MSR_INDEX_LIST, kvm_msr_list); |
| 320 | if (ret >= 0) { |
| 321 | int i; |
| 322 | |
| 323 | for (i = 0; i < kvm_msr_list->nmsrs; i++) { |
| 324 | if (kvm_msr_list->indices[i] == MSR_STAR) { |
| 325 | has_msr_star = 1; |
| 326 | break; |
| 327 | } |
| 328 | } |
| 329 | } |
| 330 | |
| 331 | free(kvm_msr_list); |
| 332 | } |
| 333 | |
| 334 | if (has_msr_star == 1) |
| 335 | return 1; |
| 336 | return 0; |
| 337 | } |
| 338 | |
| 339 | int kvm_arch_init(KVMState *s, int smp_cpus) |
| 340 | { |
| 341 | int ret; |
| 342 | |
| 343 | /* create vm86 tss. KVM uses vm86 mode to emulate 16-bit code |
| 344 | * directly. In order to use vm86 mode, a TSS is needed. Since this |
| 345 | * must be part of guest physical memory, we need to allocate it. Older |
| 346 | * versions of KVM just assumed that it would be at the end of physical |
| 347 | * memory but that doesn't work with more than 4GB of memory. We simply |
| 348 | * refuse to work with those older versions of KVM. */ |
aliguori | 984b518 | 2008-11-13 19:21:00 +0000 | [diff] [blame] | 349 | ret = kvm_ioctl(s, KVM_CHECK_EXTENSION, KVM_CAP_SET_TSS_ADDR); |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 350 | if (ret <= 0) { |
| 351 | fprintf(stderr, "kvm does not support KVM_CAP_SET_TSS_ADDR\n"); |
| 352 | return ret; |
| 353 | } |
| 354 | |
| 355 | /* this address is 3 pages before the bios, and the bios should present |
| 356 | * as unavaible memory. FIXME, need to ensure the e820 map deals with |
| 357 | * this? |
| 358 | */ |
aliguori | 984b518 | 2008-11-13 19:21:00 +0000 | [diff] [blame] | 359 | return kvm_vm_ioctl(s, KVM_SET_TSS_ADDR, 0xfffbd000); |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 360 | } |
| 361 | |
| 362 | static void set_v8086_seg(struct kvm_segment *lhs, const SegmentCache *rhs) |
| 363 | { |
| 364 | lhs->selector = rhs->selector; |
| 365 | lhs->base = rhs->base; |
| 366 | lhs->limit = rhs->limit; |
| 367 | lhs->type = 3; |
| 368 | lhs->present = 1; |
| 369 | lhs->dpl = 3; |
| 370 | lhs->db = 0; |
| 371 | lhs->s = 1; |
| 372 | lhs->l = 0; |
| 373 | lhs->g = 0; |
| 374 | lhs->avl = 0; |
| 375 | lhs->unusable = 0; |
| 376 | } |
| 377 | |
| 378 | static void set_seg(struct kvm_segment *lhs, const SegmentCache *rhs) |
| 379 | { |
| 380 | unsigned flags = rhs->flags; |
| 381 | lhs->selector = rhs->selector; |
| 382 | lhs->base = rhs->base; |
| 383 | lhs->limit = rhs->limit; |
| 384 | lhs->type = (flags >> DESC_TYPE_SHIFT) & 15; |
| 385 | lhs->present = (flags & DESC_P_MASK) != 0; |
| 386 | lhs->dpl = rhs->selector & 3; |
| 387 | lhs->db = (flags >> DESC_B_SHIFT) & 1; |
| 388 | lhs->s = (flags & DESC_S_MASK) != 0; |
| 389 | lhs->l = (flags >> DESC_L_SHIFT) & 1; |
| 390 | lhs->g = (flags & DESC_G_MASK) != 0; |
| 391 | lhs->avl = (flags & DESC_AVL_MASK) != 0; |
| 392 | lhs->unusable = 0; |
| 393 | } |
| 394 | |
| 395 | static void get_seg(SegmentCache *lhs, const struct kvm_segment *rhs) |
| 396 | { |
| 397 | lhs->selector = rhs->selector; |
| 398 | lhs->base = rhs->base; |
| 399 | lhs->limit = rhs->limit; |
| 400 | lhs->flags = |
| 401 | (rhs->type << DESC_TYPE_SHIFT) |
| 402 | | (rhs->present * DESC_P_MASK) |
| 403 | | (rhs->dpl << DESC_DPL_SHIFT) |
| 404 | | (rhs->db << DESC_B_SHIFT) |
| 405 | | (rhs->s * DESC_S_MASK) |
| 406 | | (rhs->l << DESC_L_SHIFT) |
| 407 | | (rhs->g * DESC_G_MASK) |
| 408 | | (rhs->avl * DESC_AVL_MASK); |
| 409 | } |
| 410 | |
| 411 | static void kvm_getput_reg(__u64 *kvm_reg, target_ulong *qemu_reg, int set) |
| 412 | { |
| 413 | if (set) |
| 414 | *kvm_reg = *qemu_reg; |
| 415 | else |
| 416 | *qemu_reg = *kvm_reg; |
| 417 | } |
| 418 | |
| 419 | static int kvm_getput_regs(CPUState *env, int set) |
| 420 | { |
| 421 | struct kvm_regs regs; |
| 422 | int ret = 0; |
| 423 | |
| 424 | if (!set) { |
| 425 | ret = kvm_vcpu_ioctl(env, KVM_GET_REGS, ®s); |
| 426 | if (ret < 0) |
| 427 | return ret; |
| 428 | } |
| 429 | |
| 430 | kvm_getput_reg(®s.rax, &env->regs[R_EAX], set); |
| 431 | kvm_getput_reg(®s.rbx, &env->regs[R_EBX], set); |
| 432 | kvm_getput_reg(®s.rcx, &env->regs[R_ECX], set); |
| 433 | kvm_getput_reg(®s.rdx, &env->regs[R_EDX], set); |
| 434 | kvm_getput_reg(®s.rsi, &env->regs[R_ESI], set); |
| 435 | kvm_getput_reg(®s.rdi, &env->regs[R_EDI], set); |
| 436 | kvm_getput_reg(®s.rsp, &env->regs[R_ESP], set); |
| 437 | kvm_getput_reg(®s.rbp, &env->regs[R_EBP], set); |
| 438 | #ifdef TARGET_X86_64 |
| 439 | kvm_getput_reg(®s.r8, &env->regs[8], set); |
| 440 | kvm_getput_reg(®s.r9, &env->regs[9], set); |
| 441 | kvm_getput_reg(®s.r10, &env->regs[10], set); |
| 442 | kvm_getput_reg(®s.r11, &env->regs[11], set); |
| 443 | kvm_getput_reg(®s.r12, &env->regs[12], set); |
| 444 | kvm_getput_reg(®s.r13, &env->regs[13], set); |
| 445 | kvm_getput_reg(®s.r14, &env->regs[14], set); |
| 446 | kvm_getput_reg(®s.r15, &env->regs[15], set); |
| 447 | #endif |
| 448 | |
| 449 | kvm_getput_reg(®s.rflags, &env->eflags, set); |
| 450 | kvm_getput_reg(®s.rip, &env->eip, set); |
| 451 | |
| 452 | if (set) |
| 453 | ret = kvm_vcpu_ioctl(env, KVM_SET_REGS, ®s); |
| 454 | |
| 455 | return ret; |
| 456 | } |
| 457 | |
| 458 | static int kvm_put_fpu(CPUState *env) |
| 459 | { |
| 460 | struct kvm_fpu fpu; |
| 461 | int i; |
| 462 | |
| 463 | memset(&fpu, 0, sizeof fpu); |
| 464 | fpu.fsw = env->fpus & ~(7 << 11); |
| 465 | fpu.fsw |= (env->fpstt & 7) << 11; |
| 466 | fpu.fcw = env->fpuc; |
| 467 | for (i = 0; i < 8; ++i) |
| 468 | fpu.ftwx |= (!env->fptags[i]) << i; |
| 469 | memcpy(fpu.fpr, env->fpregs, sizeof env->fpregs); |
| 470 | memcpy(fpu.xmm, env->xmm_regs, sizeof env->xmm_regs); |
| 471 | fpu.mxcsr = env->mxcsr; |
| 472 | |
| 473 | return kvm_vcpu_ioctl(env, KVM_SET_FPU, &fpu); |
| 474 | } |
| 475 | |
| 476 | static int kvm_put_sregs(CPUState *env) |
| 477 | { |
| 478 | struct kvm_sregs sregs; |
| 479 | |
Jan Kiszka | 0e607a8 | 2009-11-06 19:39:24 +0100 | [diff] [blame] | 480 | memset(sregs.interrupt_bitmap, 0, sizeof(sregs.interrupt_bitmap)); |
| 481 | if (env->interrupt_injected >= 0) { |
| 482 | sregs.interrupt_bitmap[env->interrupt_injected / 64] |= |
| 483 | (uint64_t)1 << (env->interrupt_injected % 64); |
| 484 | } |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 485 | |
| 486 | if ((env->eflags & VM_MASK)) { |
| 487 | set_v8086_seg(&sregs.cs, &env->segs[R_CS]); |
| 488 | set_v8086_seg(&sregs.ds, &env->segs[R_DS]); |
| 489 | set_v8086_seg(&sregs.es, &env->segs[R_ES]); |
| 490 | set_v8086_seg(&sregs.fs, &env->segs[R_FS]); |
| 491 | set_v8086_seg(&sregs.gs, &env->segs[R_GS]); |
| 492 | set_v8086_seg(&sregs.ss, &env->segs[R_SS]); |
| 493 | } else { |
| 494 | set_seg(&sregs.cs, &env->segs[R_CS]); |
| 495 | set_seg(&sregs.ds, &env->segs[R_DS]); |
| 496 | set_seg(&sregs.es, &env->segs[R_ES]); |
| 497 | set_seg(&sregs.fs, &env->segs[R_FS]); |
| 498 | set_seg(&sregs.gs, &env->segs[R_GS]); |
| 499 | set_seg(&sregs.ss, &env->segs[R_SS]); |
| 500 | |
| 501 | if (env->cr[0] & CR0_PE_MASK) { |
| 502 | /* force ss cpl to cs cpl */ |
| 503 | sregs.ss.selector = (sregs.ss.selector & ~3) | |
| 504 | (sregs.cs.selector & 3); |
| 505 | sregs.ss.dpl = sregs.ss.selector & 3; |
| 506 | } |
| 507 | } |
| 508 | |
| 509 | set_seg(&sregs.tr, &env->tr); |
| 510 | set_seg(&sregs.ldt, &env->ldt); |
| 511 | |
| 512 | sregs.idt.limit = env->idt.limit; |
| 513 | sregs.idt.base = env->idt.base; |
| 514 | sregs.gdt.limit = env->gdt.limit; |
| 515 | sregs.gdt.base = env->gdt.base; |
| 516 | |
| 517 | sregs.cr0 = env->cr[0]; |
| 518 | sregs.cr2 = env->cr[2]; |
| 519 | sregs.cr3 = env->cr[3]; |
| 520 | sregs.cr4 = env->cr[4]; |
| 521 | |
| 522 | sregs.cr8 = cpu_get_apic_tpr(env); |
| 523 | sregs.apic_base = cpu_get_apic_base(env); |
| 524 | |
| 525 | sregs.efer = env->efer; |
| 526 | |
| 527 | return kvm_vcpu_ioctl(env, KVM_SET_SREGS, &sregs); |
| 528 | } |
| 529 | |
| 530 | static void kvm_msr_entry_set(struct kvm_msr_entry *entry, |
| 531 | uint32_t index, uint64_t value) |
| 532 | { |
| 533 | entry->index = index; |
| 534 | entry->data = value; |
| 535 | } |
| 536 | |
| 537 | static int kvm_put_msrs(CPUState *env) |
| 538 | { |
| 539 | struct { |
| 540 | struct kvm_msrs info; |
| 541 | struct kvm_msr_entry entries[100]; |
| 542 | } msr_data; |
| 543 | struct kvm_msr_entry *msrs = msr_data.entries; |
| 544 | int n = 0; |
| 545 | |
| 546 | kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_CS, env->sysenter_cs); |
| 547 | kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_ESP, env->sysenter_esp); |
| 548 | kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_EIP, env->sysenter_eip); |
| 549 | if (kvm_has_msr_star(env)) |
| 550 | kvm_msr_entry_set(&msrs[n++], MSR_STAR, env->star); |
| 551 | kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSC, env->tsc); |
| 552 | #ifdef TARGET_X86_64 |
| 553 | /* FIXME if lm capable */ |
| 554 | kvm_msr_entry_set(&msrs[n++], MSR_CSTAR, env->cstar); |
| 555 | kvm_msr_entry_set(&msrs[n++], MSR_KERNELGSBASE, env->kernelgsbase); |
| 556 | kvm_msr_entry_set(&msrs[n++], MSR_FMASK, env->fmask); |
| 557 | kvm_msr_entry_set(&msrs[n++], MSR_LSTAR, env->lstar); |
| 558 | #endif |
Glauber Costa | 1a03675 | 2009-10-22 10:26:56 -0200 | [diff] [blame] | 559 | kvm_msr_entry_set(&msrs[n++], MSR_KVM_SYSTEM_TIME, env->system_time_msr); |
| 560 | kvm_msr_entry_set(&msrs[n++], MSR_KVM_WALL_CLOCK, env->wall_clock_msr); |
| 561 | |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 562 | msr_data.info.nmsrs = n; |
| 563 | |
| 564 | return kvm_vcpu_ioctl(env, KVM_SET_MSRS, &msr_data); |
| 565 | |
| 566 | } |
| 567 | |
| 568 | |
| 569 | static int kvm_get_fpu(CPUState *env) |
| 570 | { |
| 571 | struct kvm_fpu fpu; |
| 572 | int i, ret; |
| 573 | |
| 574 | ret = kvm_vcpu_ioctl(env, KVM_GET_FPU, &fpu); |
| 575 | if (ret < 0) |
| 576 | return ret; |
| 577 | |
| 578 | env->fpstt = (fpu.fsw >> 11) & 7; |
| 579 | env->fpus = fpu.fsw; |
| 580 | env->fpuc = fpu.fcw; |
| 581 | for (i = 0; i < 8; ++i) |
| 582 | env->fptags[i] = !((fpu.ftwx >> i) & 1); |
| 583 | memcpy(env->fpregs, fpu.fpr, sizeof env->fpregs); |
| 584 | memcpy(env->xmm_regs, fpu.xmm, sizeof env->xmm_regs); |
| 585 | env->mxcsr = fpu.mxcsr; |
| 586 | |
| 587 | return 0; |
| 588 | } |
| 589 | |
| 590 | static int kvm_get_sregs(CPUState *env) |
| 591 | { |
| 592 | struct kvm_sregs sregs; |
| 593 | uint32_t hflags; |
Jan Kiszka | 0e607a8 | 2009-11-06 19:39:24 +0100 | [diff] [blame] | 594 | int bit, i, ret; |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 595 | |
| 596 | ret = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs); |
| 597 | if (ret < 0) |
| 598 | return ret; |
| 599 | |
Jan Kiszka | 0e607a8 | 2009-11-06 19:39:24 +0100 | [diff] [blame] | 600 | /* There can only be one pending IRQ set in the bitmap at a time, so try |
| 601 | to find it and save its number instead (-1 for none). */ |
| 602 | env->interrupt_injected = -1; |
| 603 | for (i = 0; i < ARRAY_SIZE(sregs.interrupt_bitmap); i++) { |
| 604 | if (sregs.interrupt_bitmap[i]) { |
| 605 | bit = ctz64(sregs.interrupt_bitmap[i]); |
| 606 | env->interrupt_injected = i * 64 + bit; |
| 607 | break; |
| 608 | } |
| 609 | } |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 610 | |
| 611 | get_seg(&env->segs[R_CS], &sregs.cs); |
| 612 | get_seg(&env->segs[R_DS], &sregs.ds); |
| 613 | get_seg(&env->segs[R_ES], &sregs.es); |
| 614 | get_seg(&env->segs[R_FS], &sregs.fs); |
| 615 | get_seg(&env->segs[R_GS], &sregs.gs); |
| 616 | get_seg(&env->segs[R_SS], &sregs.ss); |
| 617 | |
| 618 | get_seg(&env->tr, &sregs.tr); |
| 619 | get_seg(&env->ldt, &sregs.ldt); |
| 620 | |
| 621 | env->idt.limit = sregs.idt.limit; |
| 622 | env->idt.base = sregs.idt.base; |
| 623 | env->gdt.limit = sregs.gdt.limit; |
| 624 | env->gdt.base = sregs.gdt.base; |
| 625 | |
| 626 | env->cr[0] = sregs.cr0; |
| 627 | env->cr[2] = sregs.cr2; |
| 628 | env->cr[3] = sregs.cr3; |
| 629 | env->cr[4] = sregs.cr4; |
| 630 | |
| 631 | cpu_set_apic_base(env, sregs.apic_base); |
| 632 | |
| 633 | env->efer = sregs.efer; |
| 634 | //cpu_set_apic_tpr(env, sregs.cr8); |
| 635 | |
| 636 | #define HFLAG_COPY_MASK ~( \ |
| 637 | HF_CPL_MASK | HF_PE_MASK | HF_MP_MASK | HF_EM_MASK | \ |
| 638 | HF_TS_MASK | HF_TF_MASK | HF_VM_MASK | HF_IOPL_MASK | \ |
| 639 | HF_OSFXSR_MASK | HF_LMA_MASK | HF_CS32_MASK | \ |
| 640 | HF_SS32_MASK | HF_CS64_MASK | HF_ADDSEG_MASK) |
| 641 | |
| 642 | |
| 643 | |
| 644 | hflags = (env->segs[R_CS].flags >> DESC_DPL_SHIFT) & HF_CPL_MASK; |
| 645 | hflags |= (env->cr[0] & CR0_PE_MASK) << (HF_PE_SHIFT - CR0_PE_SHIFT); |
| 646 | hflags |= (env->cr[0] << (HF_MP_SHIFT - CR0_MP_SHIFT)) & |
| 647 | (HF_MP_MASK | HF_EM_MASK | HF_TS_MASK); |
| 648 | hflags |= (env->eflags & (HF_TF_MASK | HF_VM_MASK | HF_IOPL_MASK)); |
| 649 | hflags |= (env->cr[4] & CR4_OSFXSR_MASK) << |
| 650 | (HF_OSFXSR_SHIFT - CR4_OSFXSR_SHIFT); |
| 651 | |
| 652 | if (env->efer & MSR_EFER_LMA) { |
| 653 | hflags |= HF_LMA_MASK; |
| 654 | } |
| 655 | |
| 656 | if ((hflags & HF_LMA_MASK) && (env->segs[R_CS].flags & DESC_L_MASK)) { |
| 657 | hflags |= HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK; |
| 658 | } else { |
| 659 | hflags |= (env->segs[R_CS].flags & DESC_B_MASK) >> |
| 660 | (DESC_B_SHIFT - HF_CS32_SHIFT); |
| 661 | hflags |= (env->segs[R_SS].flags & DESC_B_MASK) >> |
| 662 | (DESC_B_SHIFT - HF_SS32_SHIFT); |
| 663 | if (!(env->cr[0] & CR0_PE_MASK) || |
| 664 | (env->eflags & VM_MASK) || |
| 665 | !(hflags & HF_CS32_MASK)) { |
| 666 | hflags |= HF_ADDSEG_MASK; |
| 667 | } else { |
| 668 | hflags |= ((env->segs[R_DS].base | |
| 669 | env->segs[R_ES].base | |
| 670 | env->segs[R_SS].base) != 0) << |
| 671 | HF_ADDSEG_SHIFT; |
| 672 | } |
| 673 | } |
| 674 | env->hflags = (env->hflags & HFLAG_COPY_MASK) | hflags; |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 675 | |
| 676 | return 0; |
| 677 | } |
| 678 | |
| 679 | static int kvm_get_msrs(CPUState *env) |
| 680 | { |
| 681 | struct { |
| 682 | struct kvm_msrs info; |
| 683 | struct kvm_msr_entry entries[100]; |
| 684 | } msr_data; |
| 685 | struct kvm_msr_entry *msrs = msr_data.entries; |
| 686 | int ret, i, n; |
| 687 | |
| 688 | n = 0; |
| 689 | msrs[n++].index = MSR_IA32_SYSENTER_CS; |
| 690 | msrs[n++].index = MSR_IA32_SYSENTER_ESP; |
| 691 | msrs[n++].index = MSR_IA32_SYSENTER_EIP; |
| 692 | if (kvm_has_msr_star(env)) |
| 693 | msrs[n++].index = MSR_STAR; |
| 694 | msrs[n++].index = MSR_IA32_TSC; |
| 695 | #ifdef TARGET_X86_64 |
| 696 | /* FIXME lm_capable_kernel */ |
| 697 | msrs[n++].index = MSR_CSTAR; |
| 698 | msrs[n++].index = MSR_KERNELGSBASE; |
| 699 | msrs[n++].index = MSR_FMASK; |
| 700 | msrs[n++].index = MSR_LSTAR; |
| 701 | #endif |
Glauber Costa | 1a03675 | 2009-10-22 10:26:56 -0200 | [diff] [blame] | 702 | msrs[n++].index = MSR_KVM_SYSTEM_TIME; |
| 703 | msrs[n++].index = MSR_KVM_WALL_CLOCK; |
| 704 | |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 705 | msr_data.info.nmsrs = n; |
| 706 | ret = kvm_vcpu_ioctl(env, KVM_GET_MSRS, &msr_data); |
| 707 | if (ret < 0) |
| 708 | return ret; |
| 709 | |
| 710 | for (i = 0; i < ret; i++) { |
| 711 | switch (msrs[i].index) { |
| 712 | case MSR_IA32_SYSENTER_CS: |
| 713 | env->sysenter_cs = msrs[i].data; |
| 714 | break; |
| 715 | case MSR_IA32_SYSENTER_ESP: |
| 716 | env->sysenter_esp = msrs[i].data; |
| 717 | break; |
| 718 | case MSR_IA32_SYSENTER_EIP: |
| 719 | env->sysenter_eip = msrs[i].data; |
| 720 | break; |
| 721 | case MSR_STAR: |
| 722 | env->star = msrs[i].data; |
| 723 | break; |
| 724 | #ifdef TARGET_X86_64 |
| 725 | case MSR_CSTAR: |
| 726 | env->cstar = msrs[i].data; |
| 727 | break; |
| 728 | case MSR_KERNELGSBASE: |
| 729 | env->kernelgsbase = msrs[i].data; |
| 730 | break; |
| 731 | case MSR_FMASK: |
| 732 | env->fmask = msrs[i].data; |
| 733 | break; |
| 734 | case MSR_LSTAR: |
| 735 | env->lstar = msrs[i].data; |
| 736 | break; |
| 737 | #endif |
| 738 | case MSR_IA32_TSC: |
| 739 | env->tsc = msrs[i].data; |
| 740 | break; |
Glauber Costa | 1a03675 | 2009-10-22 10:26:56 -0200 | [diff] [blame] | 741 | case MSR_KVM_SYSTEM_TIME: |
| 742 | env->system_time_msr = msrs[i].data; |
| 743 | break; |
| 744 | case MSR_KVM_WALL_CLOCK: |
| 745 | env->wall_clock_msr = msrs[i].data; |
| 746 | break; |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 747 | } |
| 748 | } |
| 749 | |
| 750 | return 0; |
| 751 | } |
| 752 | |
Hollis Blanchard | 9bdbe55 | 2009-11-09 21:05:37 +0000 | [diff] [blame] | 753 | static int kvm_put_mp_state(CPUState *env) |
| 754 | { |
| 755 | struct kvm_mp_state mp_state = { .mp_state = env->mp_state }; |
| 756 | |
| 757 | return kvm_vcpu_ioctl(env, KVM_SET_MP_STATE, &mp_state); |
| 758 | } |
| 759 | |
| 760 | static int kvm_get_mp_state(CPUState *env) |
| 761 | { |
| 762 | struct kvm_mp_state mp_state; |
| 763 | int ret; |
| 764 | |
| 765 | ret = kvm_vcpu_ioctl(env, KVM_GET_MP_STATE, &mp_state); |
| 766 | if (ret < 0) { |
| 767 | return ret; |
| 768 | } |
| 769 | env->mp_state = mp_state.mp_state; |
| 770 | return 0; |
| 771 | } |
| 772 | |
Jan Kiszka | a0fb002 | 2009-11-25 00:33:03 +0100 | [diff] [blame] | 773 | static int kvm_put_vcpu_events(CPUState *env) |
| 774 | { |
| 775 | #ifdef KVM_CAP_VCPU_EVENTS |
| 776 | struct kvm_vcpu_events events; |
| 777 | |
| 778 | if (!kvm_has_vcpu_events()) { |
| 779 | return 0; |
| 780 | } |
| 781 | |
Jan Kiszka | 3182737 | 2009-12-14 12:26:17 +0100 | [diff] [blame] | 782 | events.exception.injected = (env->exception_injected >= 0); |
| 783 | events.exception.nr = env->exception_injected; |
Jan Kiszka | a0fb002 | 2009-11-25 00:33:03 +0100 | [diff] [blame] | 784 | events.exception.has_error_code = env->has_error_code; |
| 785 | events.exception.error_code = env->error_code; |
| 786 | |
| 787 | events.interrupt.injected = (env->interrupt_injected >= 0); |
| 788 | events.interrupt.nr = env->interrupt_injected; |
| 789 | events.interrupt.soft = env->soft_interrupt; |
| 790 | |
| 791 | events.nmi.injected = env->nmi_injected; |
| 792 | events.nmi.pending = env->nmi_pending; |
| 793 | events.nmi.masked = !!(env->hflags2 & HF2_NMI_MASK); |
| 794 | |
| 795 | events.sipi_vector = env->sipi_vector; |
| 796 | |
| 797 | return kvm_vcpu_ioctl(env, KVM_SET_VCPU_EVENTS, &events); |
| 798 | #else |
| 799 | return 0; |
| 800 | #endif |
| 801 | } |
| 802 | |
| 803 | static int kvm_get_vcpu_events(CPUState *env) |
| 804 | { |
| 805 | #ifdef KVM_CAP_VCPU_EVENTS |
| 806 | struct kvm_vcpu_events events; |
| 807 | int ret; |
| 808 | |
| 809 | if (!kvm_has_vcpu_events()) { |
| 810 | return 0; |
| 811 | } |
| 812 | |
| 813 | ret = kvm_vcpu_ioctl(env, KVM_GET_VCPU_EVENTS, &events); |
| 814 | if (ret < 0) { |
| 815 | return ret; |
| 816 | } |
Jan Kiszka | 3182737 | 2009-12-14 12:26:17 +0100 | [diff] [blame] | 817 | env->exception_injected = |
Jan Kiszka | a0fb002 | 2009-11-25 00:33:03 +0100 | [diff] [blame] | 818 | events.exception.injected ? events.exception.nr : -1; |
| 819 | env->has_error_code = events.exception.has_error_code; |
| 820 | env->error_code = events.exception.error_code; |
| 821 | |
| 822 | env->interrupt_injected = |
| 823 | events.interrupt.injected ? events.interrupt.nr : -1; |
| 824 | env->soft_interrupt = events.interrupt.soft; |
| 825 | |
| 826 | env->nmi_injected = events.nmi.injected; |
| 827 | env->nmi_pending = events.nmi.pending; |
| 828 | if (events.nmi.masked) { |
| 829 | env->hflags2 |= HF2_NMI_MASK; |
| 830 | } else { |
| 831 | env->hflags2 &= ~HF2_NMI_MASK; |
| 832 | } |
| 833 | |
| 834 | env->sipi_vector = events.sipi_vector; |
| 835 | #endif |
| 836 | |
| 837 | return 0; |
| 838 | } |
| 839 | |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 840 | int kvm_arch_put_registers(CPUState *env) |
| 841 | { |
| 842 | int ret; |
| 843 | |
| 844 | ret = kvm_getput_regs(env, 1); |
| 845 | if (ret < 0) |
| 846 | return ret; |
| 847 | |
| 848 | ret = kvm_put_fpu(env); |
| 849 | if (ret < 0) |
| 850 | return ret; |
| 851 | |
| 852 | ret = kvm_put_sregs(env); |
| 853 | if (ret < 0) |
| 854 | return ret; |
| 855 | |
| 856 | ret = kvm_put_msrs(env); |
| 857 | if (ret < 0) |
| 858 | return ret; |
| 859 | |
Jan Kiszka | f8d926e | 2009-05-02 02:18:38 +0200 | [diff] [blame] | 860 | ret = kvm_put_mp_state(env); |
| 861 | if (ret < 0) |
| 862 | return ret; |
| 863 | |
Jan Kiszka | a0fb002 | 2009-11-25 00:33:03 +0100 | [diff] [blame] | 864 | ret = kvm_put_vcpu_events(env); |
| 865 | if (ret < 0) |
| 866 | return ret; |
| 867 | |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 868 | return 0; |
| 869 | } |
| 870 | |
| 871 | int kvm_arch_get_registers(CPUState *env) |
| 872 | { |
| 873 | int ret; |
| 874 | |
| 875 | ret = kvm_getput_regs(env, 0); |
| 876 | if (ret < 0) |
| 877 | return ret; |
| 878 | |
| 879 | ret = kvm_get_fpu(env); |
| 880 | if (ret < 0) |
| 881 | return ret; |
| 882 | |
| 883 | ret = kvm_get_sregs(env); |
| 884 | if (ret < 0) |
| 885 | return ret; |
| 886 | |
| 887 | ret = kvm_get_msrs(env); |
| 888 | if (ret < 0) |
| 889 | return ret; |
| 890 | |
Jan Kiszka | 5a2e3c2 | 2009-11-25 00:31:03 +0100 | [diff] [blame] | 891 | ret = kvm_get_mp_state(env); |
| 892 | if (ret < 0) |
| 893 | return ret; |
| 894 | |
Jan Kiszka | a0fb002 | 2009-11-25 00:33:03 +0100 | [diff] [blame] | 895 | ret = kvm_get_vcpu_events(env); |
| 896 | if (ret < 0) |
| 897 | return ret; |
| 898 | |
aliguori | 0533044 | 2008-11-05 16:29:27 +0000 | [diff] [blame] | 899 | return 0; |
| 900 | } |
| 901 | |
| 902 | int kvm_arch_pre_run(CPUState *env, struct kvm_run *run) |
| 903 | { |
| 904 | /* Try to inject an interrupt if the guest can accept it */ |
| 905 | if (run->ready_for_interrupt_injection && |
| 906 | (env->interrupt_request & CPU_INTERRUPT_HARD) && |
| 907 | (env->eflags & IF_MASK)) { |
| 908 | int irq; |
| 909 | |
| 910 | env->interrupt_request &= ~CPU_INTERRUPT_HARD; |
| 911 | irq = cpu_get_pic_interrupt(env); |
| 912 | if (irq >= 0) { |
| 913 | struct kvm_interrupt intr; |
| 914 | intr.irq = irq; |
| 915 | /* FIXME: errors */ |
| 916 | dprintf("injected interrupt %d\n", irq); |
| 917 | kvm_vcpu_ioctl(env, KVM_INTERRUPT, &intr); |
| 918 | } |
| 919 | } |
| 920 | |
| 921 | /* If we have an interrupt but the guest is not ready to receive an |
| 922 | * interrupt, request an interrupt window exit. This will |
| 923 | * cause a return to userspace as soon as the guest is ready to |
| 924 | * receive interrupts. */ |
| 925 | if ((env->interrupt_request & CPU_INTERRUPT_HARD)) |
| 926 | run->request_interrupt_window = 1; |
| 927 | else |
| 928 | run->request_interrupt_window = 0; |
| 929 | |
| 930 | dprintf("setting tpr\n"); |
| 931 | run->cr8 = cpu_get_apic_tpr(env); |
| 932 | |
| 933 | return 0; |
| 934 | } |
| 935 | |
| 936 | int kvm_arch_post_run(CPUState *env, struct kvm_run *run) |
| 937 | { |
| 938 | if (run->if_flag) |
| 939 | env->eflags |= IF_MASK; |
| 940 | else |
| 941 | env->eflags &= ~IF_MASK; |
| 942 | |
| 943 | cpu_set_apic_tpr(env, run->cr8); |
| 944 | cpu_set_apic_base(env, run->apic_base); |
| 945 | |
| 946 | return 0; |
| 947 | } |
| 948 | |
| 949 | static int kvm_handle_halt(CPUState *env) |
| 950 | { |
| 951 | if (!((env->interrupt_request & CPU_INTERRUPT_HARD) && |
| 952 | (env->eflags & IF_MASK)) && |
| 953 | !(env->interrupt_request & CPU_INTERRUPT_NMI)) { |
| 954 | env->halted = 1; |
| 955 | env->exception_index = EXCP_HLT; |
| 956 | return 0; |
| 957 | } |
| 958 | |
| 959 | return 1; |
| 960 | } |
| 961 | |
| 962 | int kvm_arch_handle_exit(CPUState *env, struct kvm_run *run) |
| 963 | { |
| 964 | int ret = 0; |
| 965 | |
| 966 | switch (run->exit_reason) { |
| 967 | case KVM_EXIT_HLT: |
| 968 | dprintf("handle_hlt\n"); |
| 969 | ret = kvm_handle_halt(env); |
| 970 | break; |
| 971 | } |
| 972 | |
| 973 | return ret; |
| 974 | } |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 975 | |
| 976 | #ifdef KVM_CAP_SET_GUEST_DEBUG |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 977 | int kvm_arch_insert_sw_breakpoint(CPUState *env, struct kvm_sw_breakpoint *bp) |
| 978 | { |
Juan Quintela | 3897293 | 2009-09-23 01:19:02 +0200 | [diff] [blame] | 979 | static const uint8_t int3 = 0xcc; |
aliguori | 64bf3f4 | 2009-03-28 17:51:40 +0000 | [diff] [blame] | 980 | |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 981 | if (cpu_memory_rw_debug(env, bp->pc, (uint8_t *)&bp->saved_insn, 1, 0) || |
aliguori | 64bf3f4 | 2009-03-28 17:51:40 +0000 | [diff] [blame] | 982 | cpu_memory_rw_debug(env, bp->pc, (uint8_t *)&int3, 1, 1)) |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 983 | return -EINVAL; |
| 984 | return 0; |
| 985 | } |
| 986 | |
| 987 | int kvm_arch_remove_sw_breakpoint(CPUState *env, struct kvm_sw_breakpoint *bp) |
| 988 | { |
| 989 | uint8_t int3; |
| 990 | |
| 991 | if (cpu_memory_rw_debug(env, bp->pc, &int3, 1, 0) || int3 != 0xcc || |
aliguori | 64bf3f4 | 2009-03-28 17:51:40 +0000 | [diff] [blame] | 992 | cpu_memory_rw_debug(env, bp->pc, (uint8_t *)&bp->saved_insn, 1, 1)) |
aliguori | e22a25c | 2009-03-12 20:12:48 +0000 | [diff] [blame] | 993 | return -EINVAL; |
| 994 | return 0; |
| 995 | } |
| 996 | |
| 997 | static struct { |
| 998 | target_ulong addr; |
| 999 | int len; |
| 1000 | int type; |
| 1001 | } hw_breakpoint[4]; |
| 1002 | |
| 1003 | static int nb_hw_breakpoint; |
| 1004 | |
| 1005 | static int find_hw_breakpoint(target_ulong addr, int len, int type) |
| 1006 | { |
| 1007 | int n; |
| 1008 | |
| 1009 | for (n = 0; n < nb_hw_breakpoint; n++) |
| 1010 | if (hw_breakpoint[n].addr == addr && hw_breakpoint[n].type == type && |
| 1011 | (hw_breakpoint[n].len == len || len == -1)) |
| 1012 | return n; |
| 1013 | return -1; |
| 1014 | } |
| 1015 | |
| 1016 | int kvm_arch_insert_hw_breakpoint(target_ulong addr, |
| 1017 | target_ulong len, int type) |
| 1018 | { |
| 1019 | switch (type) { |
| 1020 | case GDB_BREAKPOINT_HW: |
| 1021 | len = 1; |
| 1022 | break; |
| 1023 | case GDB_WATCHPOINT_WRITE: |
| 1024 | case GDB_WATCHPOINT_ACCESS: |
| 1025 | switch (len) { |
| 1026 | case 1: |
| 1027 | break; |
| 1028 | case 2: |
| 1029 | case 4: |
| 1030 | case 8: |
| 1031 | if (addr & (len - 1)) |
| 1032 | return -EINVAL; |
| 1033 | break; |
| 1034 | default: |
| 1035 | return -EINVAL; |
| 1036 | } |
| 1037 | break; |
| 1038 | default: |
| 1039 | return -ENOSYS; |
| 1040 | } |
| 1041 | |
| 1042 | if (nb_hw_breakpoint == 4) |
| 1043 | return -ENOBUFS; |
| 1044 | |
| 1045 | if (find_hw_breakpoint(addr, len, type) >= 0) |
| 1046 | return -EEXIST; |
| 1047 | |
| 1048 | hw_breakpoint[nb_hw_breakpoint].addr = addr; |
| 1049 | hw_breakpoint[nb_hw_breakpoint].len = len; |
| 1050 | hw_breakpoint[nb_hw_breakpoint].type = type; |
| 1051 | nb_hw_breakpoint++; |
| 1052 | |
| 1053 | return 0; |
| 1054 | } |
| 1055 | |
| 1056 | int kvm_arch_remove_hw_breakpoint(target_ulong addr, |
| 1057 | target_ulong len, int type) |
| 1058 | { |
| 1059 | int n; |
| 1060 | |
| 1061 | n = find_hw_breakpoint(addr, (type == GDB_BREAKPOINT_HW) ? 1 : len, type); |
| 1062 | if (n < 0) |
| 1063 | return -ENOENT; |
| 1064 | |
| 1065 | nb_hw_breakpoint--; |
| 1066 | hw_breakpoint[n] = hw_breakpoint[nb_hw_breakpoint]; |
| 1067 | |
| 1068 | return 0; |
| 1069 | } |
| 1070 | |
| 1071 | void kvm_arch_remove_all_hw_breakpoints(void) |
| 1072 | { |
| 1073 | nb_hw_breakpoint = 0; |
| 1074 | } |
| 1075 | |
| 1076 | static CPUWatchpoint hw_watchpoint; |
| 1077 | |
| 1078 | int kvm_arch_debug(struct kvm_debug_exit_arch *arch_info) |
| 1079 | { |
| 1080 | int handle = 0; |
| 1081 | int n; |
| 1082 | |
| 1083 | if (arch_info->exception == 1) { |
| 1084 | if (arch_info->dr6 & (1 << 14)) { |
| 1085 | if (cpu_single_env->singlestep_enabled) |
| 1086 | handle = 1; |
| 1087 | } else { |
| 1088 | for (n = 0; n < 4; n++) |
| 1089 | if (arch_info->dr6 & (1 << n)) |
| 1090 | switch ((arch_info->dr7 >> (16 + n*4)) & 0x3) { |
| 1091 | case 0x0: |
| 1092 | handle = 1; |
| 1093 | break; |
| 1094 | case 0x1: |
| 1095 | handle = 1; |
| 1096 | cpu_single_env->watchpoint_hit = &hw_watchpoint; |
| 1097 | hw_watchpoint.vaddr = hw_breakpoint[n].addr; |
| 1098 | hw_watchpoint.flags = BP_MEM_WRITE; |
| 1099 | break; |
| 1100 | case 0x3: |
| 1101 | handle = 1; |
| 1102 | cpu_single_env->watchpoint_hit = &hw_watchpoint; |
| 1103 | hw_watchpoint.vaddr = hw_breakpoint[n].addr; |
| 1104 | hw_watchpoint.flags = BP_MEM_ACCESS; |
| 1105 | break; |
| 1106 | } |
| 1107 | } |
| 1108 | } else if (kvm_find_sw_breakpoint(cpu_single_env, arch_info->pc)) |
| 1109 | handle = 1; |
| 1110 | |
| 1111 | if (!handle) |
| 1112 | kvm_update_guest_debug(cpu_single_env, |
| 1113 | (arch_info->exception == 1) ? |
| 1114 | KVM_GUESTDBG_INJECT_DB : KVM_GUESTDBG_INJECT_BP); |
| 1115 | |
| 1116 | return handle; |
| 1117 | } |
| 1118 | |
| 1119 | void kvm_arch_update_guest_debug(CPUState *env, struct kvm_guest_debug *dbg) |
| 1120 | { |
| 1121 | const uint8_t type_code[] = { |
| 1122 | [GDB_BREAKPOINT_HW] = 0x0, |
| 1123 | [GDB_WATCHPOINT_WRITE] = 0x1, |
| 1124 | [GDB_WATCHPOINT_ACCESS] = 0x3 |
| 1125 | }; |
| 1126 | const uint8_t len_code[] = { |
| 1127 | [1] = 0x0, [2] = 0x1, [4] = 0x3, [8] = 0x2 |
| 1128 | }; |
| 1129 | int n; |
| 1130 | |
| 1131 | if (kvm_sw_breakpoints_active(env)) |
| 1132 | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP; |
| 1133 | |
| 1134 | if (nb_hw_breakpoint > 0) { |
| 1135 | dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP; |
| 1136 | dbg->arch.debugreg[7] = 0x0600; |
| 1137 | for (n = 0; n < nb_hw_breakpoint; n++) { |
| 1138 | dbg->arch.debugreg[n] = hw_breakpoint[n].addr; |
| 1139 | dbg->arch.debugreg[7] |= (2 << (n * 2)) | |
| 1140 | (type_code[hw_breakpoint[n].type] << (16 + n*4)) | |
| 1141 | (len_code[hw_breakpoint[n].len] << (18 + n*4)); |
| 1142 | } |
| 1143 | } |
| 1144 | } |
| 1145 | #endif /* KVM_CAP_SET_GUEST_DEBUG */ |