blob: 67f116a19b02a81881b599b1d939e64b45ba786d [file] [log] [blame]
bellardb9adb4a2003-04-29 20:41:16 +00001/* General "disassemble this chunk" code. Used for debugging. */
Peter Maydelld38ea872016-01-29 17:50:05 +00002#include "qemu/osdep.h"
Peter Crosthwaite37b9de42015-06-23 20:57:33 -07003#include "qemu-common.h"
Paolo Bonzini76cad712012-10-24 11:12:21 +02004#include "disas/bfd.h"
bellardb9adb4a2003-04-29 20:41:16 +00005#include "elf.h"
6
bellardc6105c02003-10-27 21:13:58 +00007#include "cpu.h"
Paolo Bonzini76cad712012-10-24 11:12:21 +02008#include "disas/disas.h"
bellardc6105c02003-10-27 21:13:58 +00009
Blue Swirlf4359b92012-09-08 12:40:00 +000010typedef struct CPUDebug {
11 struct disassemble_info info;
Peter Crosthwaited49190c2015-05-24 14:20:41 -070012 CPUState *cpu;
Blue Swirlf4359b92012-09-08 12:40:00 +000013} CPUDebug;
14
bellardb9adb4a2003-04-29 20:41:16 +000015/* Filled in by elfload.c. Simplistic, but will do for now. */
bellarde80cfcf2004-12-19 23:18:01 +000016struct syminfo *syminfos = NULL;
bellardb9adb4a2003-04-29 20:41:16 +000017
bellardaa0aa4f2003-06-09 15:23:31 +000018/* Get LENGTH bytes from info's buffer, at target address memaddr.
19 Transfer them to myaddr. */
20int
pbrook3a742b72008-10-22 15:55:18 +000021buffer_read_memory(bfd_vma memaddr, bfd_byte *myaddr, int length,
22 struct disassemble_info *info)
bellardaa0aa4f2003-06-09 15:23:31 +000023{
bellardc6105c02003-10-27 21:13:58 +000024 if (memaddr < info->buffer_vma
25 || memaddr + length > info->buffer_vma + info->buffer_length)
26 /* Out of bounds. Use EIO because GDB uses it. */
27 return EIO;
28 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
29 return 0;
bellardaa0aa4f2003-06-09 15:23:31 +000030}
31
bellardc6105c02003-10-27 21:13:58 +000032/* Get LENGTH bytes from info's buffer, at target address memaddr.
33 Transfer them to myaddr. */
34static int
bellardc27004e2005-01-03 23:35:10 +000035target_read_memory (bfd_vma memaddr,
36 bfd_byte *myaddr,
37 int length,
38 struct disassemble_info *info)
bellardc6105c02003-10-27 21:13:58 +000039{
Blue Swirlf4359b92012-09-08 12:40:00 +000040 CPUDebug *s = container_of(info, CPUDebug, info);
41
Peter Crosthwaited49190c2015-05-24 14:20:41 -070042 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
bellardc6105c02003-10-27 21:13:58 +000043 return 0;
44}
bellardc6105c02003-10-27 21:13:58 +000045
bellardaa0aa4f2003-06-09 15:23:31 +000046/* Print an error message. We can assume that this is in response to
47 an error return from buffer_read_memory. */
48void
pbrook3a742b72008-10-22 15:55:18 +000049perror_memory (int status, bfd_vma memaddr, struct disassemble_info *info)
bellardaa0aa4f2003-06-09 15:23:31 +000050{
51 if (status != EIO)
52 /* Can't happen. */
53 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
54 else
55 /* Actually, address between memaddr and memaddr + len was
56 out of bounds. */
57 (*info->fprintf_func) (info->stream,
bellard26a76462006-06-25 18:15:32 +000058 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
bellardaa0aa4f2003-06-09 15:23:31 +000059}
60
Jim Meyeringa31f0532012-05-09 05:12:04 +000061/* This could be in a separate file, to save minuscule amounts of space
bellardaa0aa4f2003-06-09 15:23:31 +000062 in statically linked executables. */
63
64/* Just print the address is hex. This is included for completeness even
65 though both GDB and objdump provide their own (to print symbolic
66 addresses). */
67
68void
pbrook3a742b72008-10-22 15:55:18 +000069generic_print_address (bfd_vma addr, struct disassemble_info *info)
bellardaa0aa4f2003-06-09 15:23:31 +000070{
bellard26a76462006-06-25 18:15:32 +000071 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
bellardaa0aa4f2003-06-09 15:23:31 +000072}
73
Peter Maydell636bd282012-06-25 04:55:55 +000074/* Print address in hex, truncated to the width of a host virtual address. */
75static void
76generic_print_host_address(bfd_vma addr, struct disassemble_info *info)
77{
78 uint64_t mask = ~0ULL >> (64 - (sizeof(void *) * 8));
79 generic_print_address(addr & mask, info);
80}
81
bellardaa0aa4f2003-06-09 15:23:31 +000082/* Just return the given address. */
83
84int
pbrook3a742b72008-10-22 15:55:18 +000085generic_symbol_at_address (bfd_vma addr, struct disassemble_info *info)
bellardaa0aa4f2003-06-09 15:23:31 +000086{
87 return 1;
88}
89
Aurelien Jarno903ec552010-03-29 02:12:51 +020090bfd_vma bfd_getl64 (const bfd_byte *addr)
91{
92 unsigned long long v;
93
94 v = (unsigned long long) addr[0];
95 v |= (unsigned long long) addr[1] << 8;
96 v |= (unsigned long long) addr[2] << 16;
97 v |= (unsigned long long) addr[3] << 24;
98 v |= (unsigned long long) addr[4] << 32;
99 v |= (unsigned long long) addr[5] << 40;
100 v |= (unsigned long long) addr[6] << 48;
101 v |= (unsigned long long) addr[7] << 56;
102 return (bfd_vma) v;
103}
104
bellardaa0aa4f2003-06-09 15:23:31 +0000105bfd_vma bfd_getl32 (const bfd_byte *addr)
106{
107 unsigned long v;
108
109 v = (unsigned long) addr[0];
110 v |= (unsigned long) addr[1] << 8;
111 v |= (unsigned long) addr[2] << 16;
112 v |= (unsigned long) addr[3] << 24;
113 return (bfd_vma) v;
114}
115
116bfd_vma bfd_getb32 (const bfd_byte *addr)
117{
118 unsigned long v;
119
120 v = (unsigned long) addr[0] << 24;
121 v |= (unsigned long) addr[1] << 16;
122 v |= (unsigned long) addr[2] << 8;
123 v |= (unsigned long) addr[3];
124 return (bfd_vma) v;
125}
126
bellard6af0bf92005-07-02 14:58:51 +0000127bfd_vma bfd_getl16 (const bfd_byte *addr)
128{
129 unsigned long v;
130
131 v = (unsigned long) addr[0];
132 v |= (unsigned long) addr[1] << 8;
133 return (bfd_vma) v;
134}
135
136bfd_vma bfd_getb16 (const bfd_byte *addr)
137{
138 unsigned long v;
139
140 v = (unsigned long) addr[0] << 24;
141 v |= (unsigned long) addr[1] << 16;
142 return (bfd_vma) v;
143}
144
Richard Hendersonc46ffd52013-08-16 23:29:45 -0700145static int print_insn_objdump(bfd_vma pc, disassemble_info *info,
146 const char *prefix)
147{
148 int i, n = info->buffer_length;
149 uint8_t *buf = g_malloc(n);
150
151 info->read_memory_func(pc, buf, n, info);
152
153 for (i = 0; i < n; ++i) {
154 if (i % 32 == 0) {
155 info->fprintf_func(info->stream, "\n%s: ", prefix);
156 }
157 info->fprintf_func(info->stream, "%02x", buf[i]);
158 }
159
160 g_free(buf);
161 return n;
162}
163
164static int print_insn_od_host(bfd_vma pc, disassemble_info *info)
165{
166 return print_insn_objdump(pc, info, "OBJD-H");
167}
168
169static int print_insn_od_target(bfd_vma pc, disassemble_info *info)
170{
171 return print_insn_objdump(pc, info, "OBJD-T");
172}
173
thse91c8a72007-06-03 13:35:16 +0000174/* Disassemble this for me please... (debugging). 'flags' has the following
bellardc2d551f2005-04-27 20:15:00 +0000175 values:
Frediano Ziglioe99722f2011-08-25 09:14:38 +0200176 i386 - 1 means 16 bit code, 2 means 64 bit code
Tom Mustae13951f2014-04-09 14:53:23 -0500177 ppc - bits 0:15 specify (optionally) the machine instruction set;
178 bit 16 indicates little endian.
bellardc2d551f2005-04-27 20:15:00 +0000179 other targets - unused
180 */
Peter Crosthwaited49190c2015-05-24 14:20:41 -0700181void target_disas(FILE *out, CPUState *cpu, target_ulong code,
Blue Swirlf4359b92012-09-08 12:40:00 +0000182 target_ulong size, int flags)
bellardb9adb4a2003-04-29 20:41:16 +0000183{
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700184 CPUClass *cc = CPU_GET_CLASS(cpu);
bellardc27004e2005-01-03 23:35:10 +0000185 target_ulong pc;
bellardb9adb4a2003-04-29 20:41:16 +0000186 int count;
Blue Swirlf4359b92012-09-08 12:40:00 +0000187 CPUDebug s;
bellardb9adb4a2003-04-29 20:41:16 +0000188
Blue Swirlf4359b92012-09-08 12:40:00 +0000189 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
bellardb9adb4a2003-04-29 20:41:16 +0000190
Peter Crosthwaited49190c2015-05-24 14:20:41 -0700191 s.cpu = cpu;
Blue Swirlf4359b92012-09-08 12:40:00 +0000192 s.info.read_memory_func = target_read_memory;
193 s.info.buffer_vma = code;
194 s.info.buffer_length = size;
Peter Crosthwaite9504c542015-07-05 13:50:32 -0700195 s.info.print_address_func = generic_print_address;
bellardc27004e2005-01-03 23:35:10 +0000196
197#ifdef TARGET_WORDS_BIGENDIAN
Blue Swirlf4359b92012-09-08 12:40:00 +0000198 s.info.endian = BFD_ENDIAN_BIG;
bellardc27004e2005-01-03 23:35:10 +0000199#else
Blue Swirlf4359b92012-09-08 12:40:00 +0000200 s.info.endian = BFD_ENDIAN_LITTLE;
bellardc6105c02003-10-27 21:13:58 +0000201#endif
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700202
203 if (cc->disas_set_info) {
204 cc->disas_set_info(cpu, &s.info);
205 }
206
bellardc27004e2005-01-03 23:35:10 +0000207#if defined(TARGET_I386)
Blue Swirlf4359b92012-09-08 12:40:00 +0000208 if (flags == 2) {
209 s.info.mach = bfd_mach_x86_64;
210 } else if (flags == 1) {
211 s.info.mach = bfd_mach_i386_i8086;
212 } else {
213 s.info.mach = bfd_mach_i386_i386;
214 }
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700215 s.info.print_insn = print_insn_i386;
bellardc27004e2005-01-03 23:35:10 +0000216#elif defined(TARGET_PPC)
Tom Mustae13951f2014-04-09 14:53:23 -0500217 if ((flags >> 16) & 1) {
Blue Swirlf4359b92012-09-08 12:40:00 +0000218 s.info.endian = BFD_ENDIAN_LITTLE;
219 }
j_mayer237c0af2007-09-29 12:01:46 +0000220 if (flags & 0xFFFF) {
Tom Mustae13951f2014-04-09 14:53:23 -0500221 /* If we have a precise definition of the instruction set, use it. */
Blue Swirlf4359b92012-09-08 12:40:00 +0000222 s.info.mach = flags & 0xFFFF;
j_mayer237c0af2007-09-29 12:01:46 +0000223 } else {
bellarda2458622005-07-23 22:39:53 +0000224#ifdef TARGET_PPC64
Blue Swirlf4359b92012-09-08 12:40:00 +0000225 s.info.mach = bfd_mach_ppc64;
bellarda2458622005-07-23 22:39:53 +0000226#else
Blue Swirlf4359b92012-09-08 12:40:00 +0000227 s.info.mach = bfd_mach_ppc;
bellarda2458622005-07-23 22:39:53 +0000228#endif
j_mayer237c0af2007-09-29 12:01:46 +0000229 }
Aurelien Jarno88770fe2013-04-20 08:56:14 +0000230 s.info.disassembler_options = (char *)"any";
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700231 s.info.print_insn = print_insn_ppc;
bellardc27004e2005-01-03 23:35:10 +0000232#endif
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700233 if (s.info.print_insn == NULL) {
234 s.info.print_insn = print_insn_od_target;
Richard Hendersonc46ffd52013-08-16 23:29:45 -0700235 }
bellardc27004e2005-01-03 23:35:10 +0000236
blueswir17e000c22009-02-13 21:44:41 +0000237 for (pc = code; size > 0; pc += count, size -= count) {
bellardfa15e032005-01-31 23:32:31 +0000238 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700239 count = s.info.print_insn(pc, &s.info);
bellardc27004e2005-01-03 23:35:10 +0000240#if 0
241 {
242 int i;
243 uint8_t b;
244 fprintf(out, " {");
245 for(i = 0; i < count; i++) {
Blue Swirlf4359b92012-09-08 12:40:00 +0000246 target_read_memory(pc + i, &b, 1, &s.info);
bellardc27004e2005-01-03 23:35:10 +0000247 fprintf(out, " %02x", b);
248 }
249 fprintf(out, " }");
250 }
251#endif
252 fprintf(out, "\n");
253 if (count < 0)
254 break;
malc754d00a2009-04-21 22:26:22 +0000255 if (size < count) {
256 fprintf(out,
257 "Disassembler disagrees with translator over instruction "
258 "decoding\n"
259 "Please report this to qemu-devel@nongnu.org\n");
260 break;
261 }
bellardc27004e2005-01-03 23:35:10 +0000262 }
263}
264
265/* Disassemble this for me please... (debugging). */
266void disas(FILE *out, void *code, unsigned long size)
267{
Stefan Weilb0b0f1c2012-04-12 15:44:35 +0200268 uintptr_t pc;
bellardc27004e2005-01-03 23:35:10 +0000269 int count;
Blue Swirlf4359b92012-09-08 12:40:00 +0000270 CPUDebug s;
Richard Hendersonc46ffd52013-08-16 23:29:45 -0700271 int (*print_insn)(bfd_vma pc, disassemble_info *info) = NULL;
bellardc27004e2005-01-03 23:35:10 +0000272
Blue Swirlf4359b92012-09-08 12:40:00 +0000273 INIT_DISASSEMBLE_INFO(s.info, out, fprintf);
274 s.info.print_address_func = generic_print_host_address;
bellardc6105c02003-10-27 21:13:58 +0000275
Blue Swirlf4359b92012-09-08 12:40:00 +0000276 s.info.buffer = code;
277 s.info.buffer_vma = (uintptr_t)code;
278 s.info.buffer_length = size;
bellardb9adb4a2003-04-29 20:41:16 +0000279
Juan Quintelae2542fe2009-07-27 16:13:06 +0200280#ifdef HOST_WORDS_BIGENDIAN
Blue Swirlf4359b92012-09-08 12:40:00 +0000281 s.info.endian = BFD_ENDIAN_BIG;
bellardb9adb4a2003-04-29 20:41:16 +0000282#else
Blue Swirlf4359b92012-09-08 12:40:00 +0000283 s.info.endian = BFD_ENDIAN_LITTLE;
bellardb9adb4a2003-04-29 20:41:16 +0000284#endif
Stefan Weil5826e512011-10-05 20:03:53 +0200285#if defined(CONFIG_TCG_INTERPRETER)
286 print_insn = print_insn_tci;
287#elif defined(__i386__)
Blue Swirlf4359b92012-09-08 12:40:00 +0000288 s.info.mach = bfd_mach_i386_i386;
bellardc27004e2005-01-03 23:35:10 +0000289 print_insn = print_insn_i386;
bellardbc51c5c2004-03-17 23:46:04 +0000290#elif defined(__x86_64__)
Blue Swirlf4359b92012-09-08 12:40:00 +0000291 s.info.mach = bfd_mach_x86_64;
bellardc27004e2005-01-03 23:35:10 +0000292 print_insn = print_insn_i386;
malce58ffeb2009-01-14 18:39:49 +0000293#elif defined(_ARCH_PPC)
Richard Henderson66d4f6a2013-01-31 11:16:21 -0800294 s.info.disassembler_options = (char *)"any";
bellardc27004e2005-01-03 23:35:10 +0000295 print_insn = print_insn_ppc;
Claudio Fontana999b53e2014-02-05 17:27:28 +0000296#elif defined(__aarch64__) && defined(CONFIG_ARM_A64_DIS)
297 print_insn = print_insn_arm_a64;
bellarda993ba82003-05-11 12:25:45 +0000298#elif defined(__alpha__)
bellardc27004e2005-01-03 23:35:10 +0000299 print_insn = print_insn_alpha;
bellardaa0aa4f2003-06-09 15:23:31 +0000300#elif defined(__sparc__)
bellardc27004e2005-01-03 23:35:10 +0000301 print_insn = print_insn_sparc;
Blue Swirlf4359b92012-09-08 12:40:00 +0000302 s.info.mach = bfd_mach_sparc_v9b;
ths5fafdf22007-09-16 21:08:06 +0000303#elif defined(__arm__)
bellardc27004e2005-01-03 23:35:10 +0000304 print_insn = print_insn_arm;
bellard6af0bf92005-07-02 14:58:51 +0000305#elif defined(__MIPSEB__)
306 print_insn = print_insn_big_mips;
307#elif defined(__MIPSEL__)
308 print_insn = print_insn_little_mips;
bellard48024e42005-11-06 16:52:11 +0000309#elif defined(__m68k__)
310 print_insn = print_insn_m68k;
ths8f860bb2007-07-31 23:44:21 +0000311#elif defined(__s390__)
312 print_insn = print_insn_s390;
Aurelien Jarno903ec552010-03-29 02:12:51 +0200313#elif defined(__ia64__)
314 print_insn = print_insn_ia64;
bellardb9adb4a2003-04-29 20:41:16 +0000315#endif
Richard Hendersonc46ffd52013-08-16 23:29:45 -0700316 if (print_insn == NULL) {
317 print_insn = print_insn_od_host;
318 }
Stefan Weilb0b0f1c2012-04-12 15:44:35 +0200319 for (pc = (uintptr_t)code; size > 0; pc += count, size -= count) {
320 fprintf(out, "0x%08" PRIxPTR ": ", pc);
Blue Swirlf4359b92012-09-08 12:40:00 +0000321 count = print_insn(pc, &s.info);
bellardb9adb4a2003-04-29 20:41:16 +0000322 fprintf(out, "\n");
323 if (count < 0)
324 break;
325 }
326}
327
328/* Look up symbol for debugging purpose. Returns "" if unknown. */
bellardc27004e2005-01-03 23:35:10 +0000329const char *lookup_symbol(target_ulong orig_addr)
bellardb9adb4a2003-04-29 20:41:16 +0000330{
pbrook49918a72008-10-22 15:11:31 +0000331 const char *symbol = "";
bellarde80cfcf2004-12-19 23:18:01 +0000332 struct syminfo *s;
ths3b46e622007-09-17 08:09:54 +0000333
bellarde80cfcf2004-12-19 23:18:01 +0000334 for (s = syminfos; s; s = s->next) {
pbrook49918a72008-10-22 15:11:31 +0000335 symbol = s->lookup_symbol(s, orig_addr);
336 if (symbol[0] != '\0') {
337 break;
338 }
bellardb9adb4a2003-04-29 20:41:16 +0000339 }
pbrook49918a72008-10-22 15:11:31 +0000340
341 return symbol;
bellardb9adb4a2003-04-29 20:41:16 +0000342}
bellard9307c4c2004-04-04 12:57:25 +0000343
344#if !defined(CONFIG_USER_ONLY)
345
Paolo Bonzini83c90892012-12-17 18:19:49 +0100346#include "monitor/monitor.h"
bellard3d2cfdf2004-08-01 21:49:07 +0000347
bellard9307c4c2004-04-04 12:57:25 +0000348static int monitor_disas_is_physical;
349
350static int
blueswir1a5f1b962008-08-17 20:21:51 +0000351monitor_read_memory (bfd_vma memaddr, bfd_byte *myaddr, int length,
352 struct disassemble_info *info)
bellard9307c4c2004-04-04 12:57:25 +0000353{
Blue Swirlf4359b92012-09-08 12:40:00 +0000354 CPUDebug *s = container_of(info, CPUDebug, info);
355
bellard9307c4c2004-04-04 12:57:25 +0000356 if (monitor_disas_is_physical) {
Stefan Weil54f7b4a2011-04-10 18:23:39 +0200357 cpu_physical_memory_read(memaddr, myaddr, length);
bellard9307c4c2004-04-04 12:57:25 +0000358 } else {
Peter Crosthwaited49190c2015-05-24 14:20:41 -0700359 cpu_memory_rw_debug(s->cpu, memaddr, myaddr, length, 0);
bellard9307c4c2004-04-04 12:57:25 +0000360 }
361 return 0;
362}
363
Tom Musta1c38f842014-04-09 14:53:24 -0500364/* Disassembler for the monitor.
365 See target_disas for a description of flags. */
Peter Crosthwaited49190c2015-05-24 14:20:41 -0700366void monitor_disas(Monitor *mon, CPUState *cpu,
bellard6a00d602005-11-21 23:25:50 +0000367 target_ulong pc, int nb_insn, int is_physical, int flags)
bellard9307c4c2004-04-04 12:57:25 +0000368{
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700369 CPUClass *cc = CPU_GET_CLASS(cpu);
bellard9307c4c2004-04-04 12:57:25 +0000370 int count, i;
Blue Swirlf4359b92012-09-08 12:40:00 +0000371 CPUDebug s;
bellard9307c4c2004-04-04 12:57:25 +0000372
Blue Swirlf4359b92012-09-08 12:40:00 +0000373 INIT_DISASSEMBLE_INFO(s.info, (FILE *)mon, monitor_fprintf);
bellard9307c4c2004-04-04 12:57:25 +0000374
Peter Crosthwaited49190c2015-05-24 14:20:41 -0700375 s.cpu = cpu;
bellard9307c4c2004-04-04 12:57:25 +0000376 monitor_disas_is_physical = is_physical;
Blue Swirlf4359b92012-09-08 12:40:00 +0000377 s.info.read_memory_func = monitor_read_memory;
Peter Crosthwaite9504c542015-07-05 13:50:32 -0700378 s.info.print_address_func = generic_print_address;
bellard9307c4c2004-04-04 12:57:25 +0000379
Blue Swirlf4359b92012-09-08 12:40:00 +0000380 s.info.buffer_vma = pc;
bellard9307c4c2004-04-04 12:57:25 +0000381
382#ifdef TARGET_WORDS_BIGENDIAN
Blue Swirlf4359b92012-09-08 12:40:00 +0000383 s.info.endian = BFD_ENDIAN_BIG;
bellard9307c4c2004-04-04 12:57:25 +0000384#else
Blue Swirlf4359b92012-09-08 12:40:00 +0000385 s.info.endian = BFD_ENDIAN_LITTLE;
bellard9307c4c2004-04-04 12:57:25 +0000386#endif
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700387
388 if (cc->disas_set_info) {
389 cc->disas_set_info(cpu, &s.info);
390 }
391
bellard9307c4c2004-04-04 12:57:25 +0000392#if defined(TARGET_I386)
Blue Swirlf4359b92012-09-08 12:40:00 +0000393 if (flags == 2) {
394 s.info.mach = bfd_mach_x86_64;
395 } else if (flags == 1) {
396 s.info.mach = bfd_mach_i386_i8086;
397 } else {
398 s.info.mach = bfd_mach_i386_i386;
399 }
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700400 s.info.print_insn = print_insn_i386;
bellard9307c4c2004-04-04 12:57:25 +0000401#elif defined(TARGET_PPC)
Tom Musta1c38f842014-04-09 14:53:24 -0500402 if (flags & 0xFFFF) {
403 /* If we have a precise definition of the instruction set, use it. */
404 s.info.mach = flags & 0xFFFF;
405 } else {
bellarda2458622005-07-23 22:39:53 +0000406#ifdef TARGET_PPC64
Tom Musta1c38f842014-04-09 14:53:24 -0500407 s.info.mach = bfd_mach_ppc64;
bellarda2458622005-07-23 22:39:53 +0000408#else
Tom Musta1c38f842014-04-09 14:53:24 -0500409 s.info.mach = bfd_mach_ppc;
bellarda2458622005-07-23 22:39:53 +0000410#endif
Tom Musta1c38f842014-04-09 14:53:24 -0500411 }
412 if ((flags >> 16) & 1) {
413 s.info.endian = BFD_ENDIAN_LITTLE;
414 }
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700415 s.info.print_insn = print_insn_ppc;
bellard9307c4c2004-04-04 12:57:25 +0000416#endif
Peter Crosthwaite37b9de42015-06-23 20:57:33 -0700417 if (!s.info.print_insn) {
418 monitor_printf(mon, "0x" TARGET_FMT_lx
419 ": Asm output not supported on this arch\n", pc);
420 return;
421 }
bellard9307c4c2004-04-04 12:57:25 +0000422
423 for(i = 0; i < nb_insn; i++) {
aliguori376253e2009-03-05 23:01:23 +0000424 monitor_printf(mon, "0x" TARGET_FMT_lx ": ", pc);
Peter Crosthwaite2de295c2015-06-23 20:57:32 -0700425 count = s.info.print_insn(pc, &s.info);
aliguori376253e2009-03-05 23:01:23 +0000426 monitor_printf(mon, "\n");
bellard9307c4c2004-04-04 12:57:25 +0000427 if (count < 0)
428 break;
429 pc += count;
430 }
431}
432#endif