Bin Meng | a8fb0a5 | 2020-09-01 09:39:00 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Microchip PolarFire SoC MMUART emulation |
| 3 | * |
| 4 | * Copyright (c) 2020 Wind River Systems, Inc. |
| 5 | * |
| 6 | * Author: |
| 7 | * Bin Meng <bin.meng@windriver.com> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or |
| 10 | * modify it under the terms of the GNU General Public License as |
| 11 | * published by the Free Software Foundation; either version 2 or |
| 12 | * (at your option) version 3 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License along |
| 20 | * with this program; if not, see <http://www.gnu.org/licenses/>. |
| 21 | */ |
| 22 | |
| 23 | #include "qemu/osdep.h" |
| 24 | #include "qemu/log.h" |
| 25 | #include "chardev/char.h" |
Bin Meng | a8fb0a5 | 2020-09-01 09:39:00 +0800 | [diff] [blame] | 26 | #include "hw/char/mchp_pfsoc_mmuart.h" |
| 27 | |
Philippe Mathieu-Daudé | 24ce762 | 2021-09-25 15:34:06 +0200 | [diff] [blame^] | 28 | #define REGS_OFFSET 0x20 |
| 29 | |
Bin Meng | a8fb0a5 | 2020-09-01 09:39:00 +0800 | [diff] [blame] | 30 | static uint64_t mchp_pfsoc_mmuart_read(void *opaque, hwaddr addr, unsigned size) |
| 31 | { |
| 32 | MchpPfSoCMMUartState *s = opaque; |
| 33 | |
Philippe Mathieu-Daudé | 284a66a | 2021-09-25 15:34:05 +0200 | [diff] [blame] | 34 | addr >>= 2; |
| 35 | if (addr >= MCHP_PFSOC_MMUART_REG_COUNT) { |
Bin Meng | a8fb0a5 | 2020-09-01 09:39:00 +0800 | [diff] [blame] | 36 | qemu_log_mask(LOG_GUEST_ERROR, "%s: read: addr=0x%" HWADDR_PRIx "\n", |
Philippe Mathieu-Daudé | 284a66a | 2021-09-25 15:34:05 +0200 | [diff] [blame] | 37 | __func__, addr << 2); |
Bin Meng | a8fb0a5 | 2020-09-01 09:39:00 +0800 | [diff] [blame] | 38 | return 0; |
| 39 | } |
| 40 | |
Philippe Mathieu-Daudé | 284a66a | 2021-09-25 15:34:05 +0200 | [diff] [blame] | 41 | return s->reg[addr]; |
Bin Meng | a8fb0a5 | 2020-09-01 09:39:00 +0800 | [diff] [blame] | 42 | } |
| 43 | |
| 44 | static void mchp_pfsoc_mmuart_write(void *opaque, hwaddr addr, |
| 45 | uint64_t value, unsigned size) |
| 46 | { |
| 47 | MchpPfSoCMMUartState *s = opaque; |
| 48 | uint32_t val32 = (uint32_t)value; |
| 49 | |
Philippe Mathieu-Daudé | 284a66a | 2021-09-25 15:34:05 +0200 | [diff] [blame] | 50 | addr >>= 2; |
| 51 | if (addr >= MCHP_PFSOC_MMUART_REG_COUNT) { |
Bin Meng | a8fb0a5 | 2020-09-01 09:39:00 +0800 | [diff] [blame] | 52 | qemu_log_mask(LOG_GUEST_ERROR, "%s: bad write: addr=0x%" HWADDR_PRIx |
Philippe Mathieu-Daudé | 284a66a | 2021-09-25 15:34:05 +0200 | [diff] [blame] | 53 | " v=0x%x\n", __func__, addr << 2, val32); |
Bin Meng | a8fb0a5 | 2020-09-01 09:39:00 +0800 | [diff] [blame] | 54 | return; |
| 55 | } |
| 56 | |
Philippe Mathieu-Daudé | 284a66a | 2021-09-25 15:34:05 +0200 | [diff] [blame] | 57 | s->reg[addr] = val32; |
Bin Meng | a8fb0a5 | 2020-09-01 09:39:00 +0800 | [diff] [blame] | 58 | } |
| 59 | |
| 60 | static const MemoryRegionOps mchp_pfsoc_mmuart_ops = { |
| 61 | .read = mchp_pfsoc_mmuart_read, |
| 62 | .write = mchp_pfsoc_mmuart_write, |
| 63 | .endianness = DEVICE_LITTLE_ENDIAN, |
| 64 | .impl = { |
| 65 | .min_access_size = 4, |
| 66 | .max_access_size = 4, |
| 67 | }, |
| 68 | }; |
| 69 | |
| 70 | MchpPfSoCMMUartState *mchp_pfsoc_mmuart_create(MemoryRegion *sysmem, |
| 71 | hwaddr base, qemu_irq irq, Chardev *chr) |
| 72 | { |
| 73 | MchpPfSoCMMUartState *s; |
| 74 | |
| 75 | s = g_new0(MchpPfSoCMMUartState, 1); |
| 76 | |
Philippe Mathieu-Daudé | 24ce762 | 2021-09-25 15:34:06 +0200 | [diff] [blame^] | 77 | memory_region_init(&s->container, NULL, "mchp.pfsoc.mmuart", 0x1000); |
| 78 | |
Bin Meng | a8fb0a5 | 2020-09-01 09:39:00 +0800 | [diff] [blame] | 79 | memory_region_init_io(&s->iomem, NULL, &mchp_pfsoc_mmuart_ops, s, |
Philippe Mathieu-Daudé | 24ce762 | 2021-09-25 15:34:06 +0200 | [diff] [blame^] | 80 | "mchp.pfsoc.mmuart.regs", 0x1000 - REGS_OFFSET); |
| 81 | memory_region_add_subregion(&s->container, REGS_OFFSET, &s->iomem); |
Bin Meng | a8fb0a5 | 2020-09-01 09:39:00 +0800 | [diff] [blame] | 82 | |
| 83 | s->base = base; |
| 84 | s->irq = irq; |
| 85 | |
Philippe Mathieu-Daudé | 24ce762 | 2021-09-25 15:34:06 +0200 | [diff] [blame^] | 86 | s->serial = serial_mm_init(&s->container, 0, 2, irq, 399193, chr, |
Bin Meng | a8fb0a5 | 2020-09-01 09:39:00 +0800 | [diff] [blame] | 87 | DEVICE_LITTLE_ENDIAN); |
| 88 | |
Philippe Mathieu-Daudé | 24ce762 | 2021-09-25 15:34:06 +0200 | [diff] [blame^] | 89 | memory_region_add_subregion(sysmem, base, &s->container); |
Bin Meng | a8fb0a5 | 2020-09-01 09:39:00 +0800 | [diff] [blame] | 90 | |
| 91 | return s; |
| 92 | } |