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balrog811d4cf2008-05-19 23:59:38 +00001/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 * Copyright (c) 2008 Andrzej Zaborowski
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25#define TCG_TARGET_ARM 1
26
27#define TCG_TARGET_REG_BITS 32
28#undef TCG_TARGET_WORDS_BIGENDIAN
29#undef TCG_TARGET_HAS_div_i32
30#undef TCG_TARGET_HAS_div_i64
aurel3266896cb2009-03-13 09:34:48 +000031#undef TCG_TARGET_HAS_bswap32_i32
balrog811d4cf2008-05-19 23:59:38 +000032#define TCG_TARGET_HAS_ext8s_i32
33#define TCG_TARGET_HAS_ext16s_i32
balrog650bbb32008-05-20 11:26:40 +000034#define TCG_TARGET_HAS_neg_i32
35#undef TCG_TARGET_HAS_neg_i64
Laurent Desnoguesf878d2d2009-08-22 13:55:06 +020036#define TCG_TARGET_HAS_not_i32
balrog811d4cf2008-05-19 23:59:38 +000037#undef TCG_TARGET_STACK_GROWSUP
38
39enum {
40 TCG_REG_R0 = 0,
41 TCG_REG_R1,
42 TCG_REG_R2,
43 TCG_REG_R3,
44 TCG_REG_R4,
45 TCG_REG_R5,
46 TCG_REG_R6,
47 TCG_REG_R7,
48 TCG_REG_R8,
49 TCG_REG_R9,
50 TCG_REG_R10,
51 TCG_REG_R11,
52 TCG_REG_R12,
53 TCG_REG_R13,
54 TCG_REG_R14,
balrog811d4cf2008-05-19 23:59:38 +000055};
56
Paul Brook2d69f352009-07-17 11:21:12 +010057#define TCG_TARGET_NB_REGS 15
58
Laurent Desnoguescb4e5812009-07-18 14:20:30 +020059#define TCG_CT_CONST_ARM 0x100
60
balrog811d4cf2008-05-19 23:59:38 +000061/* used for function call generation */
balrogbedba0c2008-05-23 12:47:22 +000062#define TCG_REG_CALL_STACK TCG_REG_R13
63#define TCG_TARGET_STACK_ALIGN 8
64#define TCG_TARGET_CALL_STACK_OFFSET 0
balrog811d4cf2008-05-19 23:59:38 +000065
Paul Brook379f6692009-07-17 12:48:08 +010066#define TCG_TARGET_HAS_GUEST_BASE
67
balrog811d4cf2008-05-19 23:59:38 +000068enum {
69 /* Note: must be synced with dyngen-exec.h */
70 TCG_AREG0 = TCG_REG_R7,
71 TCG_AREG1 = TCG_REG_R4,
72 TCG_AREG2 = TCG_REG_R5,
balrog811d4cf2008-05-19 23:59:38 +000073};
74
75static inline void flush_icache_range(unsigned long start, unsigned long stop)
76{
balrog3233f0d2008-12-01 02:02:37 +000077#if QEMU_GNUC_PREREQ(4, 1)
Paul Brook2d69f352009-07-17 11:21:12 +010078 __builtin___clear_cache((char *) start, (char *) stop);
balrog3233f0d2008-12-01 02:02:37 +000079#else
balrog811d4cf2008-05-19 23:59:38 +000080 register unsigned long _beg __asm ("a1") = start;
81 register unsigned long _end __asm ("a2") = stop;
82 register unsigned long _flg __asm ("a3") = 0;
83 __asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
balrog3233f0d2008-12-01 02:02:37 +000084#endif
balrog811d4cf2008-05-19 23:59:38 +000085}