bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 1 | /* |
| 2 | * SH4 emulation |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 4 | * Copyright (c) 2005 Samuel Tardieu |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
Thomas Huth | 6faf2b6 | 2019-02-13 14:52:50 +0100 | [diff] [blame] | 9 | * version 2.1 of the License, or (at your option) any later version. |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
Blue Swirl | 8167ee8 | 2009-07-16 20:47:01 +0000 | [diff] [blame] | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 18 | */ |
Peter Maydell | 9d4c994 | 2016-01-26 18:17:20 +0000 | [diff] [blame] | 19 | #include "qemu/osdep.h" |
Blue Swirl | 3e45717 | 2011-07-13 12:44:15 +0000 | [diff] [blame] | 20 | #include "cpu.h" |
Richard Henderson | 2ef6175 | 2014-04-07 22:31:41 -0700 | [diff] [blame] | 21 | #include "exec/helper-proto.h" |
Paolo Bonzini | 63c9155 | 2016-03-15 13:18:37 +0100 | [diff] [blame] | 22 | #include "exec/exec-all.h" |
Paolo Bonzini | f08b617 | 2014-03-28 19:42:10 +0100 | [diff] [blame] | 23 | #include "exec/cpu_ldst.h" |
Alex Bennée | 24f91e8 | 2018-01-19 18:24:22 +0000 | [diff] [blame] | 24 | #include "fpu/softfloat.h" |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 25 | |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 26 | #ifndef CONFIG_USER_ONLY |
| 27 | |
Aurelien Jarno | 34257c2 | 2017-05-01 23:20:43 +0200 | [diff] [blame] | 28 | void superh_cpu_do_unaligned_access(CPUState *cs, vaddr addr, |
| 29 | MMUAccessType access_type, |
| 30 | int mmu_idx, uintptr_t retaddr) |
| 31 | { |
| 32 | switch (access_type) { |
| 33 | case MMU_INST_FETCH: |
| 34 | case MMU_DATA_LOAD: |
| 35 | cs->exception_index = 0x0e0; |
| 36 | break; |
| 37 | case MMU_DATA_STORE: |
| 38 | cs->exception_index = 0x100; |
| 39 | break; |
| 40 | } |
| 41 | cpu_loop_exit_restore(cs, retaddr); |
| 42 | } |
| 43 | |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 44 | #endif |
| 45 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 46 | void helper_ldtlb(CPUSH4State *env) |
aurel32 | ea2b542 | 2008-05-09 18:45:55 +0000 | [diff] [blame] | 47 | { |
| 48 | #ifdef CONFIG_USER_ONLY |
Richard Henderson | dad1c8e | 2019-03-22 19:26:42 -0700 | [diff] [blame] | 49 | cpu_abort(env_cpu(env), "Unhandled ldtlb"); |
aurel32 | ea2b542 | 2008-05-09 18:45:55 +0000 | [diff] [blame] | 50 | #else |
| 51 | cpu_load_tlb(env); |
| 52 | #endif |
| 53 | } |
| 54 | |
Aurelien Jarno | 1012740 | 2012-09-16 13:12:21 +0200 | [diff] [blame] | 55 | static inline void QEMU_NORETURN raise_exception(CPUSH4State *env, int index, |
| 56 | uintptr_t retaddr) |
Aurelien Jarno | fd4bab1 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 57 | { |
Richard Henderson | dad1c8e | 2019-03-22 19:26:42 -0700 | [diff] [blame] | 58 | CPUState *cs = env_cpu(env); |
Andreas Färber | 2710342 | 2013-08-26 08:31:06 +0200 | [diff] [blame] | 59 | |
| 60 | cs->exception_index = index; |
Aurelien Jarno | 57e2d41 | 2017-05-10 08:58:27 +0200 | [diff] [blame] | 61 | cpu_loop_exit_restore(cs, retaddr); |
Aurelien Jarno | fd4bab1 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 62 | } |
| 63 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 64 | void helper_raise_illegal_instruction(CPUSH4State *env) |
aurel32 | e6afc2f | 2008-08-29 23:01:41 +0000 | [diff] [blame] | 65 | { |
Aurelien Jarno | 1012740 | 2012-09-16 13:12:21 +0200 | [diff] [blame] | 66 | raise_exception(env, 0x180, 0); |
aurel32 | e6afc2f | 2008-08-29 23:01:41 +0000 | [diff] [blame] | 67 | } |
| 68 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 69 | void helper_raise_slot_illegal_instruction(CPUSH4State *env) |
aurel32 | e6afc2f | 2008-08-29 23:01:41 +0000 | [diff] [blame] | 70 | { |
Aurelien Jarno | 1012740 | 2012-09-16 13:12:21 +0200 | [diff] [blame] | 71 | raise_exception(env, 0x1a0, 0); |
aurel32 | e6afc2f | 2008-08-29 23:01:41 +0000 | [diff] [blame] | 72 | } |
| 73 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 74 | void helper_raise_fpu_disable(CPUSH4State *env) |
aurel32 | d8299bc | 2008-12-07 22:46:31 +0000 | [diff] [blame] | 75 | { |
Aurelien Jarno | 1012740 | 2012-09-16 13:12:21 +0200 | [diff] [blame] | 76 | raise_exception(env, 0x800, 0); |
aurel32 | d8299bc | 2008-12-07 22:46:31 +0000 | [diff] [blame] | 77 | } |
| 78 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 79 | void helper_raise_slot_fpu_disable(CPUSH4State *env) |
aurel32 | d8299bc | 2008-12-07 22:46:31 +0000 | [diff] [blame] | 80 | { |
Aurelien Jarno | 1012740 | 2012-09-16 13:12:21 +0200 | [diff] [blame] | 81 | raise_exception(env, 0x820, 0); |
aurel32 | d8299bc | 2008-12-07 22:46:31 +0000 | [diff] [blame] | 82 | } |
| 83 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 84 | void helper_debug(CPUSH4State *env) |
aurel32 | e6afc2f | 2008-08-29 23:01:41 +0000 | [diff] [blame] | 85 | { |
Aurelien Jarno | 1012740 | 2012-09-16 13:12:21 +0200 | [diff] [blame] | 86 | raise_exception(env, EXCP_DEBUG, 0); |
aurel32 | e6afc2f | 2008-08-29 23:01:41 +0000 | [diff] [blame] | 87 | } |
| 88 | |
Aurelien Jarno | 1012740 | 2012-09-16 13:12:21 +0200 | [diff] [blame] | 89 | void helper_sleep(CPUSH4State *env) |
aurel32 | e6afc2f | 2008-08-29 23:01:41 +0000 | [diff] [blame] | 90 | { |
Richard Henderson | dad1c8e | 2019-03-22 19:26:42 -0700 | [diff] [blame] | 91 | CPUState *cs = env_cpu(env); |
Andreas Färber | 259186a | 2013-01-17 18:51:17 +0100 | [diff] [blame] | 92 | |
| 93 | cs->halted = 1; |
Aurelien Jarno | efac415 | 2011-02-24 12:31:41 +0100 | [diff] [blame] | 94 | env->in_sleep = 1; |
Aurelien Jarno | 1012740 | 2012-09-16 13:12:21 +0200 | [diff] [blame] | 95 | raise_exception(env, EXCP_HLT, 0); |
aurel32 | e6afc2f | 2008-08-29 23:01:41 +0000 | [diff] [blame] | 96 | } |
| 97 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 98 | void helper_trapa(CPUSH4State *env, uint32_t tra) |
aurel32 | e6afc2f | 2008-08-29 23:01:41 +0000 | [diff] [blame] | 99 | { |
| 100 | env->tra = tra << 2; |
Aurelien Jarno | 1012740 | 2012-09-16 13:12:21 +0200 | [diff] [blame] | 101 | raise_exception(env, 0x160, 0); |
aurel32 | e6afc2f | 2008-08-29 23:01:41 +0000 | [diff] [blame] | 102 | } |
| 103 | |
Richard Henderson | 4bfa602 | 2017-07-18 10:02:31 -1000 | [diff] [blame] | 104 | void helper_exclusive(CPUSH4State *env) |
| 105 | { |
| 106 | /* We do not want cpu_restore_state to run. */ |
Richard Henderson | 29a0af6 | 2019-03-22 16:07:18 -0700 | [diff] [blame] | 107 | cpu_loop_exit_atomic(env_cpu(env), 0); |
Richard Henderson | 4bfa602 | 2017-07-18 10:02:31 -1000 | [diff] [blame] | 108 | } |
| 109 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 110 | void helper_movcal(CPUSH4State *env, uint32_t address, uint32_t value) |
edgar_igl | 852d481 | 2009-04-01 23:10:46 +0000 | [diff] [blame] | 111 | { |
| 112 | if (cpu_sh4_is_cached (env, address)) |
| 113 | { |
Peter Maydell | 01a7201 | 2016-07-12 13:50:59 +0100 | [diff] [blame] | 114 | memory_content *r = g_new(memory_content, 1); |
| 115 | |
edgar_igl | 852d481 | 2009-04-01 23:10:46 +0000 | [diff] [blame] | 116 | r->address = address; |
| 117 | r->value = value; |
| 118 | r->next = NULL; |
| 119 | |
| 120 | *(env->movcal_backup_tail) = r; |
| 121 | env->movcal_backup_tail = &(r->next); |
| 122 | } |
| 123 | } |
| 124 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 125 | void helper_discard_movcal_backup(CPUSH4State *env) |
edgar_igl | 852d481 | 2009-04-01 23:10:46 +0000 | [diff] [blame] | 126 | { |
| 127 | memory_content *current = env->movcal_backup; |
| 128 | |
| 129 | while(current) |
| 130 | { |
| 131 | memory_content *next = current->next; |
Peter Maydell | 01a7201 | 2016-07-12 13:50:59 +0100 | [diff] [blame] | 132 | g_free(current); |
edgar_igl | 852d481 | 2009-04-01 23:10:46 +0000 | [diff] [blame] | 133 | env->movcal_backup = current = next; |
Blue Swirl | b9d38e9 | 2009-09-21 18:11:34 +0000 | [diff] [blame] | 134 | if (current == NULL) |
edgar_igl | 852d481 | 2009-04-01 23:10:46 +0000 | [diff] [blame] | 135 | env->movcal_backup_tail = &(env->movcal_backup); |
| 136 | } |
| 137 | } |
| 138 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 139 | void helper_ocbi(CPUSH4State *env, uint32_t address) |
edgar_igl | 852d481 | 2009-04-01 23:10:46 +0000 | [diff] [blame] | 140 | { |
| 141 | memory_content **current = &(env->movcal_backup); |
| 142 | while (*current) |
| 143 | { |
| 144 | uint32_t a = (*current)->address; |
| 145 | if ((a & ~0x1F) == (address & ~0x1F)) |
| 146 | { |
| 147 | memory_content *next = (*current)->next; |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 148 | cpu_stl_data(env, a, (*current)->value); |
edgar_igl | 852d481 | 2009-04-01 23:10:46 +0000 | [diff] [blame] | 149 | |
Blue Swirl | b9d38e9 | 2009-09-21 18:11:34 +0000 | [diff] [blame] | 150 | if (next == NULL) |
edgar_igl | 852d481 | 2009-04-01 23:10:46 +0000 | [diff] [blame] | 151 | { |
| 152 | env->movcal_backup_tail = current; |
| 153 | } |
| 154 | |
Peter Maydell | 01a7201 | 2016-07-12 13:50:59 +0100 | [diff] [blame] | 155 | g_free(*current); |
edgar_igl | 852d481 | 2009-04-01 23:10:46 +0000 | [diff] [blame] | 156 | *current = next; |
| 157 | break; |
| 158 | } |
| 159 | } |
| 160 | } |
| 161 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 162 | void helper_macl(CPUSH4State *env, uint32_t arg0, uint32_t arg1) |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 163 | { |
| 164 | int64_t res; |
| 165 | |
| 166 | res = ((uint64_t) env->mach << 32) | env->macl; |
aurel32 | 6f06939 | 2008-08-30 13:55:14 +0000 | [diff] [blame] | 167 | res += (int64_t) (int32_t) arg0 *(int64_t) (int32_t) arg1; |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 168 | env->mach = (res >> 32) & 0xffffffff; |
| 169 | env->macl = res & 0xffffffff; |
Aurelien Jarno | 5ed9a25 | 2015-05-25 01:28:56 +0200 | [diff] [blame] | 170 | if (env->sr & (1u << SR_S)) { |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 171 | if (res < 0) |
| 172 | env->mach |= 0xffff0000; |
| 173 | else |
| 174 | env->mach &= 0x00007fff; |
| 175 | } |
| 176 | } |
| 177 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 178 | void helper_macw(CPUSH4State *env, uint32_t arg0, uint32_t arg1) |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 179 | { |
| 180 | int64_t res; |
| 181 | |
| 182 | res = ((uint64_t) env->mach << 32) | env->macl; |
aurel32 | 6f06939 | 2008-08-30 13:55:14 +0000 | [diff] [blame] | 183 | res += (int64_t) (int16_t) arg0 *(int64_t) (int16_t) arg1; |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 184 | env->mach = (res >> 32) & 0xffffffff; |
| 185 | env->macl = res & 0xffffffff; |
Aurelien Jarno | 5ed9a25 | 2015-05-25 01:28:56 +0200 | [diff] [blame] | 186 | if (env->sr & (1u << SR_S)) { |
bellard | fdf9b3e | 2006-04-27 21:07:38 +0000 | [diff] [blame] | 187 | if (res < -0x80000000) { |
| 188 | env->mach = 1; |
| 189 | env->macl = 0x80000000; |
| 190 | } else if (res > 0x000000007fffffff) { |
| 191 | env->mach = 1; |
| 192 | env->macl = 0x7fffffff; |
| 193 | } |
| 194 | } |
| 195 | } |
| 196 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 197 | void helper_ld_fpscr(CPUSH4State *env, uint32_t val) |
aurel32 | 390af82 | 2008-08-30 22:07:52 +0000 | [diff] [blame] | 198 | { |
Aurelien Jarno | 26ac1ea | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 199 | env->fpscr = val & FPSCR_MASK; |
| 200 | if ((val & FPSCR_RM_MASK) == FPSCR_RM_ZERO) { |
aurel32 | 390af82 | 2008-08-30 22:07:52 +0000 | [diff] [blame] | 201 | set_float_rounding_mode(float_round_to_zero, &env->fp_status); |
Aurelien Jarno | 26ac1ea | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 202 | } else { |
aurel32 | 390af82 | 2008-08-30 22:07:52 +0000 | [diff] [blame] | 203 | set_float_rounding_mode(float_round_nearest_even, &env->fp_status); |
Aurelien Jarno | 26ac1ea | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 204 | } |
Aurelien Jarno | a0d4ac3 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 205 | set_flush_to_zero((val & FPSCR_DN) != 0, &env->fp_status); |
aurel32 | 390af82 | 2008-08-30 22:07:52 +0000 | [diff] [blame] | 206 | } |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 207 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 208 | static void update_fpscr(CPUSH4State *env, uintptr_t retaddr) |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 209 | { |
| 210 | int xcpt, cause, enable; |
| 211 | |
| 212 | xcpt = get_float_exception_flags(&env->fp_status); |
| 213 | |
Aurelien Jarno | 801f4da | 2017-07-02 20:34:55 +0200 | [diff] [blame] | 214 | /* Clear the cause entries */ |
| 215 | env->fpscr &= ~FPSCR_CAUSE_MASK; |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 216 | |
| 217 | if (unlikely(xcpt)) { |
| 218 | if (xcpt & float_flag_invalid) { |
Aurelien Jarno | 801f4da | 2017-07-02 20:34:55 +0200 | [diff] [blame] | 219 | env->fpscr |= FPSCR_CAUSE_V; |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 220 | } |
| 221 | if (xcpt & float_flag_divbyzero) { |
Aurelien Jarno | 801f4da | 2017-07-02 20:34:55 +0200 | [diff] [blame] | 222 | env->fpscr |= FPSCR_CAUSE_Z; |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 223 | } |
| 224 | if (xcpt & float_flag_overflow) { |
Aurelien Jarno | 801f4da | 2017-07-02 20:34:55 +0200 | [diff] [blame] | 225 | env->fpscr |= FPSCR_CAUSE_O; |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 226 | } |
| 227 | if (xcpt & float_flag_underflow) { |
Aurelien Jarno | 801f4da | 2017-07-02 20:34:55 +0200 | [diff] [blame] | 228 | env->fpscr |= FPSCR_CAUSE_U; |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 229 | } |
| 230 | if (xcpt & float_flag_inexact) { |
Aurelien Jarno | 801f4da | 2017-07-02 20:34:55 +0200 | [diff] [blame] | 231 | env->fpscr |= FPSCR_CAUSE_I; |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 232 | } |
| 233 | |
Aurelien Jarno | 801f4da | 2017-07-02 20:34:55 +0200 | [diff] [blame] | 234 | /* Accumulate in flag entries */ |
| 235 | env->fpscr |= (env->fpscr & FPSCR_CAUSE_MASK) |
| 236 | >> (FPSCR_CAUSE_SHIFT - FPSCR_FLAG_SHIFT); |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 237 | |
| 238 | /* Generate an exception if enabled */ |
| 239 | cause = (env->fpscr & FPSCR_CAUSE_MASK) >> FPSCR_CAUSE_SHIFT; |
| 240 | enable = (env->fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT; |
| 241 | if (cause & enable) { |
Aurelien Jarno | 1012740 | 2012-09-16 13:12:21 +0200 | [diff] [blame] | 242 | raise_exception(env, 0x120, retaddr); |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 243 | } |
| 244 | } |
| 245 | } |
| 246 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 247 | float32 helper_fadd_FT(CPUSH4State *env, float32 t0, float32 t1) |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 248 | { |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 249 | set_float_exception_flags(0, &env->fp_status); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 250 | t0 = float32_add(t0, t1, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 251 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 252 | return t0; |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 253 | } |
| 254 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 255 | float64 helper_fadd_DT(CPUSH4State *env, float64 t0, float64 t1) |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 256 | { |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 257 | set_float_exception_flags(0, &env->fp_status); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 258 | t0 = float64_add(t0, t1, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 259 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 260 | return t0; |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 261 | } |
| 262 | |
Aurelien Jarno | 92f1f83 | 2017-07-02 21:31:25 +0200 | [diff] [blame] | 263 | uint32_t helper_fcmp_eq_FT(CPUSH4State *env, float32 t0, float32 t1) |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 264 | { |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 265 | int relation; |
aurel32 | 9850d1e | 2008-11-19 18:00:39 +0000 | [diff] [blame] | 266 | |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 267 | set_float_exception_flags(0, &env->fp_status); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 268 | relation = float32_compare(t0, t1, &env->fp_status); |
Aurelien Jarno | fea7d77 | 2017-07-02 21:23:56 +0200 | [diff] [blame] | 269 | update_fpscr(env, GETPC()); |
Aurelien Jarno | 92f1f83 | 2017-07-02 21:31:25 +0200 | [diff] [blame] | 270 | return relation == float_relation_equal; |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 271 | } |
| 272 | |
Aurelien Jarno | 92f1f83 | 2017-07-02 21:31:25 +0200 | [diff] [blame] | 273 | uint32_t helper_fcmp_eq_DT(CPUSH4State *env, float64 t0, float64 t1) |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 274 | { |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 275 | int relation; |
aurel32 | 9850d1e | 2008-11-19 18:00:39 +0000 | [diff] [blame] | 276 | |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 277 | set_float_exception_flags(0, &env->fp_status); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 278 | relation = float64_compare(t0, t1, &env->fp_status); |
Aurelien Jarno | fea7d77 | 2017-07-02 21:23:56 +0200 | [diff] [blame] | 279 | update_fpscr(env, GETPC()); |
Aurelien Jarno | 92f1f83 | 2017-07-02 21:31:25 +0200 | [diff] [blame] | 280 | return relation == float_relation_equal; |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 281 | } |
| 282 | |
Aurelien Jarno | 92f1f83 | 2017-07-02 21:31:25 +0200 | [diff] [blame] | 283 | uint32_t helper_fcmp_gt_FT(CPUSH4State *env, float32 t0, float32 t1) |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 284 | { |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 285 | int relation; |
aurel32 | 9850d1e | 2008-11-19 18:00:39 +0000 | [diff] [blame] | 286 | |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 287 | set_float_exception_flags(0, &env->fp_status); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 288 | relation = float32_compare(t0, t1, &env->fp_status); |
Aurelien Jarno | fea7d77 | 2017-07-02 21:23:56 +0200 | [diff] [blame] | 289 | update_fpscr(env, GETPC()); |
Aurelien Jarno | 92f1f83 | 2017-07-02 21:31:25 +0200 | [diff] [blame] | 290 | return relation == float_relation_greater; |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 291 | } |
| 292 | |
Aurelien Jarno | 92f1f83 | 2017-07-02 21:31:25 +0200 | [diff] [blame] | 293 | uint32_t helper_fcmp_gt_DT(CPUSH4State *env, float64 t0, float64 t1) |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 294 | { |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 295 | int relation; |
aurel32 | 9850d1e | 2008-11-19 18:00:39 +0000 | [diff] [blame] | 296 | |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 297 | set_float_exception_flags(0, &env->fp_status); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 298 | relation = float64_compare(t0, t1, &env->fp_status); |
Aurelien Jarno | fea7d77 | 2017-07-02 21:23:56 +0200 | [diff] [blame] | 299 | update_fpscr(env, GETPC()); |
Aurelien Jarno | 92f1f83 | 2017-07-02 21:31:25 +0200 | [diff] [blame] | 300 | return relation == float_relation_greater; |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 301 | } |
| 302 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 303 | float64 helper_fcnvsd_FT_DT(CPUSH4State *env, float32 t0) |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 304 | { |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 305 | float64 ret; |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 306 | set_float_exception_flags(0, &env->fp_status); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 307 | ret = float32_to_float64(t0, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 308 | update_fpscr(env, GETPC()); |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 309 | return ret; |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 310 | } |
| 311 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 312 | float32 helper_fcnvds_DT_FT(CPUSH4State *env, float64 t0) |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 313 | { |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 314 | float32 ret; |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 315 | set_float_exception_flags(0, &env->fp_status); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 316 | ret = float64_to_float32(t0, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 317 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 318 | return ret; |
| 319 | } |
| 320 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 321 | float32 helper_fdiv_FT(CPUSH4State *env, float32 t0, float32 t1) |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 322 | { |
| 323 | set_float_exception_flags(0, &env->fp_status); |
| 324 | t0 = float32_div(t0, t1, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 325 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 326 | return t0; |
| 327 | } |
| 328 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 329 | float64 helper_fdiv_DT(CPUSH4State *env, float64 t0, float64 t1) |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 330 | { |
| 331 | set_float_exception_flags(0, &env->fp_status); |
| 332 | t0 = float64_div(t0, t1, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 333 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 334 | return t0; |
| 335 | } |
| 336 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 337 | float32 helper_float_FT(CPUSH4State *env, uint32_t t0) |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 338 | { |
| 339 | float32 ret; |
| 340 | set_float_exception_flags(0, &env->fp_status); |
| 341 | ret = int32_to_float32(t0, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 342 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 343 | return ret; |
| 344 | } |
| 345 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 346 | float64 helper_float_DT(CPUSH4State *env, uint32_t t0) |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 347 | { |
| 348 | float64 ret; |
| 349 | set_float_exception_flags(0, &env->fp_status); |
| 350 | ret = int32_to_float64(t0, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 351 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 352 | return ret; |
| 353 | } |
| 354 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 355 | float32 helper_fmac_FT(CPUSH4State *env, float32 t0, float32 t1, float32 t2) |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 356 | { |
| 357 | set_float_exception_flags(0, &env->fp_status); |
Aurelien Jarno | ff2086f | 2012-09-16 13:12:20 +0200 | [diff] [blame] | 358 | t0 = float32_muladd(t0, t1, t2, 0, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 359 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 360 | return t0; |
| 361 | } |
| 362 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 363 | float32 helper_fmul_FT(CPUSH4State *env, float32 t0, float32 t1) |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 364 | { |
| 365 | set_float_exception_flags(0, &env->fp_status); |
| 366 | t0 = float32_mul(t0, t1, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 367 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 368 | return t0; |
| 369 | } |
| 370 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 371 | float64 helper_fmul_DT(CPUSH4State *env, float64 t0, float64 t1) |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 372 | { |
| 373 | set_float_exception_flags(0, &env->fp_status); |
| 374 | t0 = float64_mul(t0, t1, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 375 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 376 | return t0; |
| 377 | } |
| 378 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 379 | float32 helper_fsqrt_FT(CPUSH4State *env, float32 t0) |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 380 | { |
| 381 | set_float_exception_flags(0, &env->fp_status); |
| 382 | t0 = float32_sqrt(t0, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 383 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 384 | return t0; |
| 385 | } |
| 386 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 387 | float64 helper_fsqrt_DT(CPUSH4State *env, float64 t0) |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 388 | { |
| 389 | set_float_exception_flags(0, &env->fp_status); |
| 390 | t0 = float64_sqrt(t0, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 391 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 392 | return t0; |
| 393 | } |
| 394 | |
Richard Henderson | 11b7aa2 | 2017-07-18 10:02:51 -1000 | [diff] [blame] | 395 | float32 helper_fsrra_FT(CPUSH4State *env, float32 t0) |
| 396 | { |
| 397 | set_float_exception_flags(0, &env->fp_status); |
| 398 | /* "Approximate" 1/sqrt(x) via actual computation. */ |
| 399 | t0 = float32_sqrt(t0, &env->fp_status); |
| 400 | t0 = float32_div(float32_one, t0, &env->fp_status); |
| 401 | /* Since this is supposed to be an approximation, an imprecision |
| 402 | exception is required. One supposes this also follows the usual |
| 403 | IEEE rule that other exceptions take precidence. */ |
| 404 | if (get_float_exception_flags(&env->fp_status) == 0) { |
| 405 | set_float_exception_flags(float_flag_inexact, &env->fp_status); |
| 406 | } |
| 407 | update_fpscr(env, GETPC()); |
| 408 | return t0; |
| 409 | } |
| 410 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 411 | float32 helper_fsub_FT(CPUSH4State *env, float32 t0, float32 t1) |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 412 | { |
| 413 | set_float_exception_flags(0, &env->fp_status); |
| 414 | t0 = float32_sub(t0, t1, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 415 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 416 | return t0; |
| 417 | } |
| 418 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 419 | float64 helper_fsub_DT(CPUSH4State *env, float64 t0, float64 t1) |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 420 | { |
| 421 | set_float_exception_flags(0, &env->fp_status); |
| 422 | t0 = float64_sub(t0, t1, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 423 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 424 | return t0; |
| 425 | } |
| 426 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 427 | uint32_t helper_ftrc_FT(CPUSH4State *env, float32 t0) |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 428 | { |
| 429 | uint32_t ret; |
| 430 | set_float_exception_flags(0, &env->fp_status); |
| 431 | ret = float32_to_int32_round_to_zero(t0, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 432 | update_fpscr(env, GETPC()); |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 433 | return ret; |
| 434 | } |
| 435 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 436 | uint32_t helper_ftrc_DT(CPUSH4State *env, float64 t0) |
Aurelien Jarno | d6c424c | 2011-04-10 21:09:12 +0200 | [diff] [blame] | 437 | { |
| 438 | uint32_t ret; |
| 439 | set_float_exception_flags(0, &env->fp_status); |
| 440 | ret = float64_to_int32_round_to_zero(t0, &env->fp_status); |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 441 | update_fpscr(env, GETPC()); |
Aurelien Jarno | 21829e9 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 442 | return ret; |
aurel32 | cc4ba6a | 2008-09-01 22:11:56 +0000 | [diff] [blame] | 443 | } |
Aurelien Jarno | af8c2bd | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 444 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 445 | void helper_fipr(CPUSH4State *env, uint32_t m, uint32_t n) |
Aurelien Jarno | af8c2bd | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 446 | { |
| 447 | int bank, i; |
| 448 | float32 r, p; |
| 449 | |
| 450 | bank = (env->sr & FPSCR_FR) ? 16 : 0; |
| 451 | r = float32_zero; |
| 452 | set_float_exception_flags(0, &env->fp_status); |
| 453 | |
| 454 | for (i = 0 ; i < 4 ; i++) { |
| 455 | p = float32_mul(env->fregs[bank + m + i], |
| 456 | env->fregs[bank + n + i], |
| 457 | &env->fp_status); |
| 458 | r = float32_add(r, p, &env->fp_status); |
| 459 | } |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 460 | update_fpscr(env, GETPC()); |
Aurelien Jarno | af8c2bd | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 461 | |
| 462 | env->fregs[bank + n + 3] = r; |
| 463 | } |
Aurelien Jarno | 17075f1 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 464 | |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 465 | void helper_ftrv(CPUSH4State *env, uint32_t n) |
Aurelien Jarno | 17075f1 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 466 | { |
| 467 | int bank_matrix, bank_vector; |
| 468 | int i, j; |
| 469 | float32 r[4]; |
| 470 | float32 p; |
| 471 | |
| 472 | bank_matrix = (env->sr & FPSCR_FR) ? 0 : 16; |
| 473 | bank_vector = (env->sr & FPSCR_FR) ? 16 : 0; |
| 474 | set_float_exception_flags(0, &env->fp_status); |
| 475 | for (i = 0 ; i < 4 ; i++) { |
| 476 | r[i] = float32_zero; |
| 477 | for (j = 0 ; j < 4 ; j++) { |
| 478 | p = float32_mul(env->fregs[bank_matrix + 4 * j + i], |
| 479 | env->fregs[bank_vector + j], |
| 480 | &env->fp_status); |
| 481 | r[i] = float32_add(r[i], p, &env->fp_status); |
| 482 | } |
| 483 | } |
Blue Swirl | 485d003 | 2012-09-02 10:37:06 +0000 | [diff] [blame] | 484 | update_fpscr(env, GETPC()); |
Aurelien Jarno | 17075f1 | 2011-01-14 20:39:18 +0100 | [diff] [blame] | 485 | |
| 486 | for (i = 0 ; i < 4 ; i++) { |
| 487 | env->fregs[bank_vector + i] = r[i]; |
| 488 | } |
| 489 | } |