bellard | a541f29 | 2004-04-12 20:39:29 +0000 | [diff] [blame] | 1 | /* |
| 2 | * QEMU PPC PREP hardware System Emulator |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
j_mayer | 4710357 | 2007-03-30 09:38:04 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003-2007 Jocelyn Mayer |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 5 | * Copyright (c) 2017 Hervé Poussineau |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 6 | * |
bellard | a541f29 | 2004-04-12 20:39:29 +0000 | [diff] [blame] | 7 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 8 | * of this software and associated documentation files (the "Software"), to deal |
| 9 | * in the Software without restriction, including without limitation the rights |
| 10 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell |
| 11 | * copies of the Software, and to permit persons to whom the Software is |
| 12 | * furnished to do so, subject to the following conditions: |
| 13 | * |
| 14 | * The above copyright notice and this permission notice shall be included in |
| 15 | * all copies or substantial portions of the Software. |
| 16 | * |
| 17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 22 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN |
| 23 | * THE SOFTWARE. |
| 24 | */ |
Markus Armbruster | 71e8a91 | 2019-08-12 07:23:38 +0200 | [diff] [blame] | 25 | |
Peter Maydell | 0d75590 | 2016-01-26 18:16:58 +0000 | [diff] [blame] | 26 | #include "qemu/osdep.h" |
Philippe Mathieu-Daudé | 819ce6b | 2019-10-04 01:03:54 +0200 | [diff] [blame] | 27 | #include "hw/rtc/m48t59.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 28 | #include "hw/block/fdc.h" |
Paolo Bonzini | 1422e32 | 2012-10-24 08:43:34 +0200 | [diff] [blame] | 29 | #include "net/net.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 30 | #include "hw/isa/isa.h" |
Andreas Färber | 7561015 | 2013-01-26 20:41:58 +0100 | [diff] [blame] | 31 | #include "hw/pci/pci.h" |
| 32 | #include "hw/pci/pci_host.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 33 | #include "hw/ppc/ppc.h" |
Andreas Färber | 7561015 | 2013-01-26 20:41:58 +0100 | [diff] [blame] | 34 | #include "hw/boards.h" |
Markus Armbruster | 3e80f69 | 2020-06-10 07:31:58 +0200 | [diff] [blame] | 35 | #include "qapi/error.h" |
Markus Armbruster | c525436 | 2015-12-17 17:35:09 +0100 | [diff] [blame] | 36 | #include "qemu/error-report.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 37 | #include "qemu/log.h" |
Andreas Färber | 7561015 | 2013-01-26 20:41:58 +0100 | [diff] [blame] | 38 | #include "hw/loader.h" |
Philippe Mathieu-Daudé | bcdb906 | 2019-10-04 01:03:53 +0200 | [diff] [blame] | 39 | #include "hw/rtc/mc146818rtc.h" |
Paolo Bonzini | 0d09e41 | 2013-02-05 17:06:20 +0100 | [diff] [blame] | 40 | #include "hw/isa/pc87312.h" |
Thomas Huth | b2ce76a | 2020-01-14 12:46:17 +0100 | [diff] [blame] | 41 | #include "hw/qdev-properties.h" |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 42 | #include "sysemu/kvm.h" |
Markus Armbruster | 71e8a91 | 2019-08-12 07:23:38 +0200 | [diff] [blame] | 43 | #include "sysemu/reset.h" |
Paolo Bonzini | 659f7f6 | 2015-10-16 15:16:11 +0200 | [diff] [blame] | 44 | #include "trace.h" |
Andreas Färber | 97c42c3 | 2013-04-27 21:23:23 +0200 | [diff] [blame] | 45 | #include "elf.h" |
Philippe Mathieu-Daudé | ab3dd74 | 2018-06-25 09:42:24 -0300 | [diff] [blame] | 46 | #include "qemu/units.h" |
Martin Kletzander | 2b16397 | 2022-04-25 10:21:55 +0200 | [diff] [blame] | 47 | #include "audio/audio.h" |
bellard | 9fddaa0 | 2004-05-21 12:59:32 +0000 | [diff] [blame] | 48 | |
j_mayer | fe33cc7 | 2007-10-03 01:06:57 +0000 | [diff] [blame] | 49 | /* SMP is not enabled, for now */ |
| 50 | #define MAX_CPUS 1 |
| 51 | |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 52 | #define CFG_ADDR 0xf0000510 |
| 53 | |
bellard | b6b8bd1 | 2004-06-21 16:55:53 +0000 | [diff] [blame] | 54 | #define KERNEL_LOAD_ADDR 0x01000000 |
| 55 | #define INITRD_LOAD_ADDR 0x01800000 |
bellard | 6420120 | 2004-05-26 22:55:16 +0000 | [diff] [blame] | 56 | |
bellard | 6420120 | 2004-05-26 22:55:16 +0000 | [diff] [blame] | 57 | #define NVRAM_SIZE 0x2000 |
bellard | a541f29 | 2004-04-12 20:39:29 +0000 | [diff] [blame] | 58 | |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 59 | static void fw_cfg_boot_set(void *opaque, const char *boot_device, |
| 60 | Error **errp) |
| 61 | { |
| 62 | fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]); |
| 63 | } |
| 64 | |
Andreas Färber | 1bba0dc | 2012-02-08 03:03:33 +0100 | [diff] [blame] | 65 | static void ppc_prep_reset(void *opaque) |
| 66 | { |
Andreas Färber | 5c3e735 | 2012-05-04 17:46:13 +0200 | [diff] [blame] | 67 | PowerPCCPU *cpu = opaque; |
Andreas Färber | 1bba0dc | 2012-02-08 03:03:33 +0100 | [diff] [blame] | 68 | |
Andreas Färber | 5c3e735 | 2012-05-04 17:46:13 +0200 | [diff] [blame] | 69 | cpu_reset(CPU(cpu)); |
Nicholas Piggin | 30d0647 | 2023-08-08 14:19:53 +1000 | [diff] [blame] | 70 | cpu_ppc_tb_reset(&cpu->env); |
Andreas Färber | 1bba0dc | 2012-02-08 03:03:33 +0100 | [diff] [blame] | 71 | } |
| 72 | |
Kirill Batuzov | 848696b | 2014-04-29 17:38:39 +0400 | [diff] [blame] | 73 | |
Hervé Poussineau | 3168824 | 2015-03-02 22:23:27 +0000 | [diff] [blame] | 74 | /*****************************************************************************/ |
| 75 | /* NVRAM helpers */ |
| 76 | static inline uint32_t nvram_read(Nvram *nvram, uint32_t addr) |
| 77 | { |
Hervé Poussineau | 5904bca | 2016-12-29 23:12:13 +0100 | [diff] [blame] | 78 | NvramClass *k = NVRAM_GET_CLASS(nvram); |
Hervé Poussineau | 3168824 | 2015-03-02 22:23:27 +0000 | [diff] [blame] | 79 | return (k->read)(nvram, addr); |
| 80 | } |
| 81 | |
| 82 | static inline void nvram_write(Nvram *nvram, uint32_t addr, uint32_t val) |
| 83 | { |
Hervé Poussineau | 5904bca | 2016-12-29 23:12:13 +0100 | [diff] [blame] | 84 | NvramClass *k = NVRAM_GET_CLASS(nvram); |
Hervé Poussineau | 3168824 | 2015-03-02 22:23:27 +0000 | [diff] [blame] | 85 | (k->write)(nvram, addr, val); |
| 86 | } |
| 87 | |
| 88 | static void NVRAM_set_byte(Nvram *nvram, uint32_t addr, uint8_t value) |
| 89 | { |
| 90 | nvram_write(nvram, addr, value); |
| 91 | } |
| 92 | |
| 93 | static uint8_t NVRAM_get_byte(Nvram *nvram, uint32_t addr) |
| 94 | { |
| 95 | return nvram_read(nvram, addr); |
| 96 | } |
| 97 | |
| 98 | static void NVRAM_set_word(Nvram *nvram, uint32_t addr, uint16_t value) |
| 99 | { |
| 100 | nvram_write(nvram, addr, value >> 8); |
| 101 | nvram_write(nvram, addr + 1, value & 0xFF); |
| 102 | } |
| 103 | |
| 104 | static uint16_t NVRAM_get_word(Nvram *nvram, uint32_t addr) |
| 105 | { |
| 106 | uint16_t tmp; |
| 107 | |
| 108 | tmp = nvram_read(nvram, addr) << 8; |
| 109 | tmp |= nvram_read(nvram, addr + 1); |
| 110 | |
| 111 | return tmp; |
| 112 | } |
| 113 | |
| 114 | static void NVRAM_set_lword(Nvram *nvram, uint32_t addr, uint32_t value) |
| 115 | { |
| 116 | nvram_write(nvram, addr, value >> 24); |
| 117 | nvram_write(nvram, addr + 1, (value >> 16) & 0xFF); |
| 118 | nvram_write(nvram, addr + 2, (value >> 8) & 0xFF); |
| 119 | nvram_write(nvram, addr + 3, value & 0xFF); |
| 120 | } |
| 121 | |
| 122 | static void NVRAM_set_string(Nvram *nvram, uint32_t addr, const char *str, |
| 123 | uint32_t max) |
| 124 | { |
| 125 | int i; |
| 126 | |
| 127 | for (i = 0; i < max && str[i] != '\0'; i++) { |
| 128 | nvram_write(nvram, addr + i, str[i]); |
| 129 | } |
| 130 | nvram_write(nvram, addr + i, str[i]); |
| 131 | nvram_write(nvram, addr + max - 1, '\0'); |
| 132 | } |
| 133 | |
| 134 | static uint16_t NVRAM_crc_update (uint16_t prev, uint16_t value) |
| 135 | { |
| 136 | uint16_t tmp; |
| 137 | uint16_t pd, pd1, pd2; |
| 138 | |
| 139 | tmp = prev >> 8; |
| 140 | pd = prev ^ value; |
| 141 | pd1 = pd & 0x000F; |
| 142 | pd2 = ((pd >> 4) & 0x000F) ^ pd1; |
| 143 | tmp ^= (pd1 << 3) | (pd1 << 8); |
| 144 | tmp ^= pd2 | (pd2 << 7) | (pd2 << 12); |
| 145 | |
| 146 | return tmp; |
| 147 | } |
| 148 | |
| 149 | static uint16_t NVRAM_compute_crc (Nvram *nvram, uint32_t start, uint32_t count) |
| 150 | { |
| 151 | uint32_t i; |
| 152 | uint16_t crc = 0xFFFF; |
| 153 | int odd; |
| 154 | |
| 155 | odd = count & 1; |
| 156 | count &= ~1; |
| 157 | for (i = 0; i != count; i++) { |
| 158 | crc = NVRAM_crc_update(crc, NVRAM_get_word(nvram, start + i)); |
| 159 | } |
| 160 | if (odd) { |
| 161 | crc = NVRAM_crc_update(crc, NVRAM_get_byte(nvram, start + i) << 8); |
| 162 | } |
| 163 | |
| 164 | return crc; |
| 165 | } |
| 166 | |
| 167 | #define CMDLINE_ADDR 0x017ff000 |
| 168 | |
| 169 | static int PPC_NVRAM_set_params (Nvram *nvram, uint16_t NVRAM_size, |
| 170 | const char *arch, |
| 171 | uint32_t RAM_size, int boot_device, |
| 172 | uint32_t kernel_image, uint32_t kernel_size, |
| 173 | const char *cmdline, |
| 174 | uint32_t initrd_image, uint32_t initrd_size, |
| 175 | uint32_t NVRAM_image, |
| 176 | int width, int height, int depth) |
| 177 | { |
| 178 | uint16_t crc; |
| 179 | |
| 180 | /* Set parameters for Open Hack'Ware BIOS */ |
| 181 | NVRAM_set_string(nvram, 0x00, "QEMU_BIOS", 16); |
| 182 | NVRAM_set_lword(nvram, 0x10, 0x00000002); /* structure v2 */ |
| 183 | NVRAM_set_word(nvram, 0x14, NVRAM_size); |
| 184 | NVRAM_set_string(nvram, 0x20, arch, 16); |
| 185 | NVRAM_set_lword(nvram, 0x30, RAM_size); |
| 186 | NVRAM_set_byte(nvram, 0x34, boot_device); |
| 187 | NVRAM_set_lword(nvram, 0x38, kernel_image); |
| 188 | NVRAM_set_lword(nvram, 0x3C, kernel_size); |
| 189 | if (cmdline) { |
| 190 | /* XXX: put the cmdline in NVRAM too ? */ |
| 191 | pstrcpy_targphys("cmdline", CMDLINE_ADDR, RAM_size - CMDLINE_ADDR, |
| 192 | cmdline); |
| 193 | NVRAM_set_lword(nvram, 0x40, CMDLINE_ADDR); |
| 194 | NVRAM_set_lword(nvram, 0x44, strlen(cmdline)); |
| 195 | } else { |
| 196 | NVRAM_set_lword(nvram, 0x40, 0); |
| 197 | NVRAM_set_lword(nvram, 0x44, 0); |
| 198 | } |
| 199 | NVRAM_set_lword(nvram, 0x48, initrd_image); |
| 200 | NVRAM_set_lword(nvram, 0x4C, initrd_size); |
| 201 | NVRAM_set_lword(nvram, 0x50, NVRAM_image); |
| 202 | |
| 203 | NVRAM_set_word(nvram, 0x54, width); |
| 204 | NVRAM_set_word(nvram, 0x56, height); |
| 205 | NVRAM_set_word(nvram, 0x58, depth); |
| 206 | crc = NVRAM_compute_crc(nvram, 0x00, 0xF8); |
| 207 | NVRAM_set_word(nvram, 0xFC, crc); |
| 208 | |
| 209 | return 0; |
| 210 | } |
| 211 | |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 212 | static int prep_set_cmos_checksum(DeviceState *dev, void *opaque) |
| 213 | { |
| 214 | uint16_t checksum = *(uint16_t *)opaque; |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 215 | |
Philippe Mathieu-Daudé | c50be9e | 2019-05-05 17:28:37 +0200 | [diff] [blame] | 216 | if (object_dynamic_cast(OBJECT(dev), TYPE_MC146818_RTC)) { |
Philippe Mathieu-Daudé | 55c86cb | 2023-02-11 00:17:51 +0100 | [diff] [blame] | 217 | MC146818RtcState *rtc = MC146818_RTC(dev); |
Philippe Mathieu-Daudé | 2d4bd81 | 2023-02-11 00:18:53 +0100 | [diff] [blame] | 218 | mc146818rtc_set_cmos_data(rtc, 0x2e, checksum & 0xff); |
| 219 | mc146818rtc_set_cmos_data(rtc, 0x3e, checksum & 0xff); |
| 220 | mc146818rtc_set_cmos_data(rtc, 0x2f, checksum >> 8); |
| 221 | mc146818rtc_set_cmos_data(rtc, 0x3f, checksum >> 8); |
Thomas Huth | 29551fd | 2018-08-16 13:35:54 +0200 | [diff] [blame] | 222 | |
| 223 | object_property_add_alias(qdev_get_machine(), "rtc-time", OBJECT(rtc), |
Markus Armbruster | d262312 | 2020-05-05 17:29:22 +0200 | [diff] [blame] | 224 | "date"); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 225 | } |
| 226 | return 0; |
| 227 | } |
| 228 | |
| 229 | static void ibm_40p_init(MachineState *machine) |
| 230 | { |
Paolo Bonzini | cd7b949 | 2020-10-26 10:30:23 -0400 | [diff] [blame] | 231 | const char *bios_name = machine->firmware ?: "openbios-ppc"; |
Thomas Huth | 053b708 | 2023-05-12 14:40:20 +0200 | [diff] [blame] | 232 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 233 | CPUPPCState *env = NULL; |
| 234 | uint16_t cmos_checksum; |
| 235 | PowerPCCPU *cpu; |
Mark Cave-Ayland | 0358687 | 2018-09-19 18:21:01 +0100 | [diff] [blame] | 236 | DeviceState *dev, *i82378_dev; |
Mark Cave-Ayland | 0f08085 | 2018-08-10 13:04:18 +0100 | [diff] [blame] | 237 | SysBusDevice *pcihost, *s; |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 238 | Nvram *m48t59 = NULL; |
| 239 | PCIBus *pci_bus; |
Markus Armbruster | 96927c7 | 2020-06-10 07:32:08 +0200 | [diff] [blame] | 240 | ISADevice *isa_dev; |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 241 | ISABus *isa_bus; |
| 242 | void *fw_cfg; |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 243 | uint32_t kernel_base = 0, initrd_base = 0; |
| 244 | long kernel_size = 0, initrd_size = 0; |
| 245 | char boot_device; |
| 246 | |
Cédric Le Goater | 9df480d | 2023-06-20 07:59:06 +0200 | [diff] [blame] | 247 | if (kvm_enabled()) { |
| 248 | error_report("machine %s does not support the KVM accelerator", |
| 249 | MACHINE_GET_CLASS(machine)->name); |
| 250 | exit(EXIT_FAILURE); |
| 251 | } |
| 252 | |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 253 | /* init CPU */ |
Igor Mammedov | 23ec69ec | 2017-10-09 21:50:57 +0200 | [diff] [blame] | 254 | cpu = POWERPC_CPU(cpu_create(machine->cpu_type)); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 255 | env = &cpu->env; |
| 256 | if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) { |
| 257 | error_report("only 6xx bus is supported on this machine"); |
| 258 | exit(1); |
| 259 | } |
| 260 | |
Cédric Le Goater | 005b69f | 2022-02-09 09:08:55 +0100 | [diff] [blame] | 261 | /* Set time-base frequency to 100 Mhz */ |
| 262 | cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 263 | qemu_register_reset(ppc_prep_reset, cpu); |
| 264 | |
| 265 | /* PCI host */ |
Markus Armbruster | 3e80f69 | 2020-06-10 07:31:58 +0200 | [diff] [blame] | 266 | dev = qdev_new("raven-pcihost"); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 267 | qdev_prop_set_string(dev, "bios-name", bios_name); |
| 268 | qdev_prop_set_uint32(dev, "elf-machine", PPC_ELF_MACHINE); |
| 269 | pcihost = SYS_BUS_DEVICE(dev); |
Markus Armbruster | d262312 | 2020-05-05 17:29:22 +0200 | [diff] [blame] | 270 | object_property_add_child(qdev_get_machine(), "raven", OBJECT(dev)); |
Markus Armbruster | 3c6ef47 | 2020-06-10 07:32:34 +0200 | [diff] [blame] | 271 | sysbus_realize_and_unref(pcihost, &error_fatal); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 272 | pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci.0")); |
| 273 | if (!pci_bus) { |
| 274 | error_report("could not create PCI host controller"); |
| 275 | exit(1); |
| 276 | } |
| 277 | |
| 278 | /* PCI -> ISA bridge */ |
Bernhard Beschow | 2237af5 | 2023-03-04 12:40:41 +0100 | [diff] [blame] | 279 | i82378_dev = DEVICE(pci_new(PCI_DEVFN(11, 0), "i82378")); |
Philippe Mathieu-Daudé | 59ae6bc | 2024-02-07 16:45:15 +0100 | [diff] [blame] | 280 | qdev_realize_and_unref(i82378_dev, BUS(pci_bus), &error_fatal); |
Mark Cave-Ayland | 0358687 | 2018-09-19 18:21:01 +0100 | [diff] [blame] | 281 | qdev_connect_gpio_out(i82378_dev, 0, |
Cédric Le Goater | 0f3e0c6 | 2022-07-05 16:58:12 +0200 | [diff] [blame] | 282 | qdev_get_gpio_in(DEVICE(cpu), PPC6xx_INPUT_INT)); |
Bernhard Beschow | 2237af5 | 2023-03-04 12:40:41 +0100 | [diff] [blame] | 283 | |
Mark Cave-Ayland | 0358687 | 2018-09-19 18:21:01 +0100 | [diff] [blame] | 284 | sysbus_connect_irq(pcihost, 0, qdev_get_gpio_in(i82378_dev, 15)); |
| 285 | isa_bus = ISA_BUS(qdev_get_child_bus(i82378_dev, "isa.0")); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 286 | |
| 287 | /* Memory controller */ |
Markus Armbruster | 96927c7 | 2020-06-10 07:32:08 +0200 | [diff] [blame] | 288 | isa_dev = isa_new("rs6000-mc"); |
| 289 | dev = DEVICE(isa_dev); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 290 | qdev_prop_set_uint32(dev, "ram-size", machine->ram_size); |
Markus Armbruster | 96927c7 | 2020-06-10 07:32:08 +0200 | [diff] [blame] | 291 | isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 292 | |
Philippe Mathieu-Daudé | 2e8f851 | 2019-05-05 17:28:38 +0200 | [diff] [blame] | 293 | /* RTC */ |
Markus Armbruster | 96927c7 | 2020-06-10 07:32:08 +0200 | [diff] [blame] | 294 | isa_dev = isa_new(TYPE_MC146818_RTC); |
| 295 | dev = DEVICE(isa_dev); |
Artyom Tarasenko | 1dbe3d1 | 2019-05-05 17:28:39 +0200 | [diff] [blame] | 296 | qdev_prop_set_int32(dev, "base_year", 1900); |
Markus Armbruster | 96927c7 | 2020-06-10 07:32:08 +0200 | [diff] [blame] | 297 | isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); |
Philippe Mathieu-Daudé | 2e8f851 | 2019-05-05 17:28:38 +0200 | [diff] [blame] | 298 | |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 299 | /* initialize CMOS checksums */ |
| 300 | cmos_checksum = 0x6aa9; |
| 301 | qbus_walk_children(BUS(isa_bus), prep_set_cmos_checksum, NULL, NULL, NULL, |
| 302 | &cmos_checksum); |
| 303 | |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 304 | /* add some more devices */ |
| 305 | if (defaults_enabled()) { |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 306 | m48t59 = NVRAM(isa_create_simple(isa_bus, "isa-m48t59")); |
| 307 | |
Markus Armbruster | 96927c7 | 2020-06-10 07:32:08 +0200 | [diff] [blame] | 308 | isa_dev = isa_new("cs4231a"); |
| 309 | dev = DEVICE(isa_dev); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 310 | qdev_prop_set_uint32(dev, "iobase", 0x830); |
| 311 | qdev_prop_set_uint32(dev, "irq", 10); |
Martin Kletzander | 2b16397 | 2022-04-25 10:21:55 +0200 | [diff] [blame] | 312 | |
| 313 | if (machine->audiodev) { |
| 314 | qdev_prop_set_string(dev, "audiodev", machine->audiodev); |
| 315 | } |
Markus Armbruster | 96927c7 | 2020-06-10 07:32:08 +0200 | [diff] [blame] | 316 | isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 317 | |
Markus Armbruster | 96927c7 | 2020-06-10 07:32:08 +0200 | [diff] [blame] | 318 | isa_dev = isa_new("pc87312"); |
| 319 | dev = DEVICE(isa_dev); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 320 | qdev_prop_set_uint32(dev, "config", 12); |
Markus Armbruster | 96927c7 | 2020-06-10 07:32:08 +0200 | [diff] [blame] | 321 | isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 322 | |
Markus Armbruster | 96927c7 | 2020-06-10 07:32:08 +0200 | [diff] [blame] | 323 | isa_dev = isa_new("prep-systemio"); |
| 324 | dev = DEVICE(isa_dev); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 325 | qdev_prop_set_uint32(dev, "ibm-planar-id", 0xfc); |
| 326 | qdev_prop_set_uint32(dev, "equipment", 0xc0); |
Markus Armbruster | 96927c7 | 2020-06-10 07:32:08 +0200 | [diff] [blame] | 327 | isa_realize_and_unref(isa_dev, isa_bus, &error_fatal); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 328 | |
Mark Cave-Ayland | 877eb21 | 2018-09-19 18:20:58 +0100 | [diff] [blame] | 329 | dev = DEVICE(pci_create_simple(pci_bus, PCI_DEVFN(1, 0), |
| 330 | "lsi53c810")); |
| 331 | lsi53c8xx_handle_legacy_cmdline(dev); |
Mark Cave-Ayland | 0358687 | 2018-09-19 18:21:01 +0100 | [diff] [blame] | 332 | qdev_connect_gpio_out(dev, 0, qdev_get_gpio_in(i82378_dev, 13)); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 333 | |
| 334 | /* XXX: s3-trio at PCI_DEVFN(2, 0) */ |
| 335 | pci_vga_init(pci_bus); |
| 336 | |
David Woodhouse | 4c71721 | 2023-10-23 09:37:14 +0100 | [diff] [blame] | 337 | /* First PCNET device at PCI_DEVFN(3, 0) */ |
| 338 | pci_init_nic_in_slot(pci_bus, mc->default_nic, NULL, "3"); |
| 339 | pci_init_nic_devices(pci_bus, mc->default_nic); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 340 | } |
| 341 | |
| 342 | /* Prepare firmware configuration for OpenBIOS */ |
Markus Armbruster | 3e80f69 | 2020-06-10 07:31:58 +0200 | [diff] [blame] | 343 | dev = qdev_new(TYPE_FW_CFG_MEM); |
Mark Cave-Ayland | 0f08085 | 2018-08-10 13:04:18 +0100 | [diff] [blame] | 344 | fw_cfg = FW_CFG(dev); |
| 345 | qdev_prop_set_uint32(dev, "data_width", 1); |
| 346 | qdev_prop_set_bit(dev, "dma_enabled", false); |
| 347 | object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG, |
Markus Armbruster | d262312 | 2020-05-05 17:29:22 +0200 | [diff] [blame] | 348 | OBJECT(fw_cfg)); |
Mark Cave-Ayland | 0f08085 | 2018-08-10 13:04:18 +0100 | [diff] [blame] | 349 | s = SYS_BUS_DEVICE(dev); |
Markus Armbruster | 3c6ef47 | 2020-06-10 07:32:34 +0200 | [diff] [blame] | 350 | sysbus_realize_and_unref(s, &error_fatal); |
Mark Cave-Ayland | 0f08085 | 2018-08-10 13:04:18 +0100 | [diff] [blame] | 351 | sysbus_mmio_map(s, 0, CFG_ADDR); |
| 352 | sysbus_mmio_map(s, 1, CFG_ADDR + 2); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 353 | |
| 354 | if (machine->kernel_filename) { |
| 355 | /* load kernel */ |
| 356 | kernel_base = KERNEL_LOAD_ADDR; |
| 357 | kernel_size = load_image_targphys(machine->kernel_filename, |
| 358 | kernel_base, |
| 359 | machine->ram_size - kernel_base); |
| 360 | if (kernel_size < 0) { |
| 361 | error_report("could not load kernel '%s'", |
| 362 | machine->kernel_filename); |
| 363 | exit(1); |
| 364 | } |
| 365 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base); |
| 366 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size); |
| 367 | /* load initrd */ |
| 368 | if (machine->initrd_filename) { |
| 369 | initrd_base = INITRD_LOAD_ADDR; |
| 370 | initrd_size = load_image_targphys(machine->initrd_filename, |
| 371 | initrd_base, |
| 372 | machine->ram_size - initrd_base); |
| 373 | if (initrd_size < 0) { |
| 374 | error_report("could not load initial ram disk '%s'", |
| 375 | machine->initrd_filename); |
| 376 | exit(1); |
| 377 | } |
| 378 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base); |
| 379 | fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size); |
| 380 | } |
| 381 | if (machine->kernel_cmdline && *machine->kernel_cmdline) { |
| 382 | fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, CMDLINE_ADDR); |
| 383 | pstrcpy_targphys("cmdline", CMDLINE_ADDR, TARGET_PAGE_SIZE, |
| 384 | machine->kernel_cmdline); |
| 385 | fw_cfg_add_string(fw_cfg, FW_CFG_CMDLINE_DATA, |
| 386 | machine->kernel_cmdline); |
| 387 | fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, |
| 388 | strlen(machine->kernel_cmdline) + 1); |
| 389 | } |
| 390 | boot_device = 'm'; |
| 391 | } else { |
Paolo Bonzini | 97ec4d2 | 2022-04-14 12:52:56 -0400 | [diff] [blame] | 392 | boot_device = machine->boot_config.order[0]; |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 393 | } |
| 394 | |
Like Xu | fe6b634 | 2019-05-19 04:54:22 +0800 | [diff] [blame] | 395 | fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 396 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)machine->ram_size); |
| 397 | fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_PREP); |
| 398 | |
| 399 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width); |
| 400 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height); |
| 401 | fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth); |
| 402 | |
Cédric Le Goater | 9df480d | 2023-06-20 07:59:06 +0200 | [diff] [blame] | 403 | fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, NANOSECONDS_PER_SECOND); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 404 | fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, boot_device); |
| 405 | qemu_register_boot_set(fw_cfg_boot_set, fw_cfg); |
| 406 | |
| 407 | /* Prepare firmware configuration for Open Hack'Ware */ |
| 408 | if (m48t59) { |
Paolo Bonzini | ead2b28 | 2020-10-28 06:17:31 -0400 | [diff] [blame] | 409 | PPC_NVRAM_set_params(m48t59, NVRAM_SIZE, "PREP", machine->ram_size, |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 410 | boot_device, |
| 411 | kernel_base, kernel_size, |
| 412 | machine->kernel_cmdline, |
| 413 | initrd_base, initrd_size, |
| 414 | /* XXX: need an option to load a NVRAM image */ |
| 415 | 0, |
| 416 | graphic_width, graphic_height, graphic_depth); |
| 417 | } |
| 418 | } |
| 419 | |
| 420 | static void ibm_40p_machine_init(MachineClass *mc) |
| 421 | { |
| 422 | mc->desc = "IBM RS/6000 7020 (40p)", |
| 423 | mc->init = ibm_40p_init; |
| 424 | mc->max_cpus = 1; |
Philippe Mathieu-Daudé | d23b6ca | 2018-06-25 09:41:57 -0300 | [diff] [blame] | 425 | mc->default_ram_size = 128 * MiB; |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 426 | mc->block_default_type = IF_SCSI; |
| 427 | mc->default_boot_order = "c"; |
Igor Mammedov | 23ec69ec | 2017-10-09 21:50:57 +0200 | [diff] [blame] | 428 | mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("604"); |
Mark Cave-Ayland | 4cb25fb | 2018-07-06 08:51:55 +0100 | [diff] [blame] | 429 | mc->default_display = "std"; |
Thomas Huth | 053b708 | 2023-05-12 14:40:20 +0200 | [diff] [blame] | 430 | mc->default_nic = "pcnet"; |
Martin Kletzander | 2b16397 | 2022-04-25 10:21:55 +0200 | [diff] [blame] | 431 | |
| 432 | machine_add_audiodev_property(mc); |
Hervé Poussineau | 34b9b55 | 2017-01-07 16:23:43 +0100 | [diff] [blame] | 433 | } |
| 434 | |
| 435 | DEFINE_MACHINE("40p", ibm_40p_machine_init) |