Stefano Garzarella | d0fb965 | 2021-05-17 17:16:58 +0200 | [diff] [blame] | 1 | # See docs/devel/tracing.rst for syntax documentation. |
Daniel P. Berrange | f0b9e35 | 2016-06-16 09:40:07 +0100 | [diff] [blame] | 2 | |
Markus Armbruster | 500016e | 2019-03-14 19:09:26 +0100 | [diff] [blame] | 3 | # sun4m.c |
Daniel P. Berrange | f0b9e35 | 2016-06-16 09:40:07 +0100 | [diff] [blame] | 4 | sun4m_cpu_set_irq_raise(int level) "Raise CPU IRQ %d" |
| 5 | sun4m_cpu_set_irq_lower(int level) "Lower CPU IRQ %d" |
| 6 | |
Markus Armbruster | 500016e | 2019-03-14 19:09:26 +0100 | [diff] [blame] | 7 | # sun4m_iommu.c |
Mark Cave-Ayland | ba51ef2 | 2018-01-08 18:16:34 +0000 | [diff] [blame] | 8 | sun4m_iommu_mem_readl(uint64_t addr, uint32_t ret) "read reg[0x%"PRIx64"] = 0x%x" |
| 9 | sun4m_iommu_mem_writel(uint64_t addr, uint32_t val) "write reg[0x%"PRIx64"] = 0x%x" |
| 10 | sun4m_iommu_mem_writel_ctrl(uint64_t iostart) "iostart = 0x%"PRIx64 |
| 11 | sun4m_iommu_mem_writel_tlbflush(uint32_t val) "tlb flush 0x%x" |
| 12 | sun4m_iommu_mem_writel_pgflush(uint32_t val) "page flush 0x%x" |
| 13 | sun4m_iommu_page_get_flags(uint64_t pa, uint64_t iopte, uint32_t ret) "get flags addr 0x%"PRIx64" => pte 0x%"PRIx64", *pte = 0x%x" |
| 14 | sun4m_iommu_translate_pa(uint64_t addr, uint64_t pa, uint32_t iopte) "xlate dva 0x%"PRIx64" => pa 0x%"PRIx64" iopte = 0x%x" |
| 15 | sun4m_iommu_bad_addr(uint64_t addr) "bad addr 0x%"PRIx64 |
| 16 | |
Markus Armbruster | 500016e | 2019-03-14 19:09:26 +0100 | [diff] [blame] | 17 | # leon3.c |
Daniel P. Berrange | f0b9e35 | 2016-06-16 09:40:07 +0100 | [diff] [blame] | 18 | leon3_set_irq(int intno) "Set CPU IRQ %d" |
| 19 | leon3_reset_irq(int intno) "Reset CPU IRQ %d" |
Philippe Mathieu-Daudé | 1284119 | 2021-04-28 16:16:51 +0200 | [diff] [blame] | 20 | int_helper_icache_freeze(void) "Instruction cache: freeze" |
| 21 | int_helper_dcache_freeze(void) "Data cache: freeze" |