Paul Brook | f7c7032 | 2009-11-19 16:45:21 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Cortex-A9MPCore internal peripheral emulation. |
| 3 | * |
| 4 | * Copyright (c) 2009 CodeSourcery. |
Peter Maydell | b12080c | 2011-12-01 21:16:34 +0000 | [diff] [blame] | 5 | * Copyright (c) 2011 Linaro Limited. |
| 6 | * Written by Paul Brook, Peter Maydell. |
Paul Brook | f7c7032 | 2009-11-19 16:45:21 +0000 | [diff] [blame] | 7 | * |
Matthew Fernandez | 8e31bf3 | 2011-06-26 12:21:35 +1000 | [diff] [blame] | 8 | * This code is licensed under the GPL. |
Paul Brook | f7c7032 | 2009-11-19 16:45:21 +0000 | [diff] [blame] | 9 | */ |
| 10 | |
Peter Maydell | 17b7f2d | 2016-01-26 18:17:28 +0000 | [diff] [blame] | 11 | #include "qemu/osdep.h" |
Markus Armbruster | da34e65 | 2016-03-14 09:01:28 +0100 | [diff] [blame] | 12 | #include "qapi/error.h" |
Andreas Färber | de4c2dc | 2013-06-30 20:44:23 +0200 | [diff] [blame] | 13 | #include "hw/cpu/a9mpcore.h" |
Paolo Bonzini | 7d0c99a | 2015-12-04 11:10:07 +0100 | [diff] [blame] | 14 | #include "qom/cpu.h" |
Peter Maydell | b12080c | 2011-12-01 21:16:34 +0000 | [diff] [blame] | 15 | |
Peter Maydell | ddd7616 | 2012-04-13 11:39:08 +0000 | [diff] [blame] | 16 | static void a9mp_priv_set_irq(void *opaque, int irq, int level) |
| 17 | { |
Peter Crosthwaite | 845769f | 2013-02-28 18:23:13 +0000 | [diff] [blame] | 18 | A9MPPrivState *s = (A9MPPrivState *)opaque; |
Andreas Färber | 9b5f952 | 2013-06-30 19:01:18 +0200 | [diff] [blame] | 19 | |
| 20 | qemu_set_irq(qdev_get_gpio_in(DEVICE(&s->gic), irq), level); |
Peter Maydell | ddd7616 | 2012-04-13 11:39:08 +0000 | [diff] [blame] | 21 | } |
| 22 | |
Andreas Färber | 753bc6e | 2013-06-30 19:52:31 +0200 | [diff] [blame] | 23 | static void a9mp_priv_initfn(Object *obj) |
| 24 | { |
| 25 | A9MPPrivState *s = A9MPCORE_PRIV(obj); |
| 26 | |
| 27 | memory_region_init(&s->container, obj, "a9mp-priv-container", 0x2000); |
| 28 | sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->container); |
Andreas Färber | 9b5f952 | 2013-06-30 19:01:18 +0200 | [diff] [blame] | 29 | |
Andreas Färber | fc719d7 | 2013-06-30 19:29:36 +0200 | [diff] [blame] | 30 | object_initialize(&s->scu, sizeof(s->scu), TYPE_A9_SCU); |
| 31 | qdev_set_parent_bus(DEVICE(&s->scu), sysbus_get_default()); |
Andreas Färber | eb110bd | 2013-06-30 20:30:27 +0200 | [diff] [blame] | 32 | |
Peter Crosthwaite | 4c25f36 | 2013-12-10 13:24:51 +0000 | [diff] [blame] | 33 | object_initialize(&s->gic, sizeof(s->gic), TYPE_ARM_GIC); |
| 34 | qdev_set_parent_bus(DEVICE(&s->gic), sysbus_get_default()); |
| 35 | |
François LEGAL | 57e72f2 | 2013-12-01 23:37:11 -0800 | [diff] [blame] | 36 | object_initialize(&s->gtimer, sizeof(s->gtimer), TYPE_A9_GTIMER); |
| 37 | qdev_set_parent_bus(DEVICE(&s->gtimer), sysbus_get_default()); |
| 38 | |
Andreas Färber | eb110bd | 2013-06-30 20:30:27 +0200 | [diff] [blame] | 39 | object_initialize(&s->mptimer, sizeof(s->mptimer), TYPE_ARM_MPTIMER); |
| 40 | qdev_set_parent_bus(DEVICE(&s->mptimer), sysbus_get_default()); |
| 41 | |
| 42 | object_initialize(&s->wdt, sizeof(s->wdt), TYPE_ARM_MPTIMER); |
| 43 | qdev_set_parent_bus(DEVICE(&s->wdt), sysbus_get_default()); |
Andreas Färber | 753bc6e | 2013-06-30 19:52:31 +0200 | [diff] [blame] | 44 | } |
| 45 | |
Andreas Färber | 837cf10 | 2013-06-30 20:36:15 +0200 | [diff] [blame] | 46 | static void a9mp_priv_realize(DeviceState *dev, Error **errp) |
Peter Maydell | b12080c | 2011-12-01 21:16:34 +0000 | [diff] [blame] | 47 | { |
Andreas Färber | 837cf10 | 2013-06-30 20:36:15 +0200 | [diff] [blame] | 48 | SysBusDevice *sbd = SYS_BUS_DEVICE(dev); |
Andreas Färber | 5126fec | 2013-06-30 19:07:29 +0200 | [diff] [blame] | 49 | A9MPPrivState *s = A9MPCORE_PRIV(dev); |
François LEGAL | 57e72f2 | 2013-12-01 23:37:11 -0800 | [diff] [blame] | 50 | DeviceState *scudev, *gicdev, *gtimerdev, *mptimerdev, *wdtdev; |
| 51 | SysBusDevice *scubusdev, *gicbusdev, *gtimerbusdev, *mptimerbusdev, |
| 52 | *wdtbusdev; |
Andreas Färber | 837cf10 | 2013-06-30 20:36:15 +0200 | [diff] [blame] | 53 | Error *err = NULL; |
Peter Maydell | b12080c | 2011-12-01 21:16:34 +0000 | [diff] [blame] | 54 | int i; |
Peter Maydell | 4182bbb | 2015-09-08 17:38:43 +0100 | [diff] [blame] | 55 | bool has_el3; |
| 56 | Object *cpuobj; |
Peter Maydell | b12080c | 2011-12-01 21:16:34 +0000 | [diff] [blame] | 57 | |
Peter Crosthwaite | 4c25f36 | 2013-12-10 13:24:51 +0000 | [diff] [blame] | 58 | scudev = DEVICE(&s->scu); |
| 59 | qdev_prop_set_uint32(scudev, "num-cpu", s->num_cpu); |
| 60 | object_property_set_bool(OBJECT(&s->scu), true, "realized", &err); |
| 61 | if (err != NULL) { |
| 62 | error_propagate(errp, err); |
| 63 | return; |
| 64 | } |
| 65 | scubusdev = SYS_BUS_DEVICE(&s->scu); |
| 66 | |
Andreas Färber | 9b5f952 | 2013-06-30 19:01:18 +0200 | [diff] [blame] | 67 | gicdev = DEVICE(&s->gic); |
| 68 | qdev_prop_set_uint32(gicdev, "num-cpu", s->num_cpu); |
| 69 | qdev_prop_set_uint32(gicdev, "num-irq", s->num_irq); |
Peter Maydell | 4182bbb | 2015-09-08 17:38:43 +0100 | [diff] [blame] | 70 | |
| 71 | /* Make the GIC's TZ support match the CPUs. We assume that |
| 72 | * either all the CPUs have TZ, or none do. |
| 73 | */ |
| 74 | cpuobj = OBJECT(qemu_get_cpu(0)); |
Edgar E. Iglesias | 6533a1f | 2015-09-14 14:39:49 +0100 | [diff] [blame] | 75 | has_el3 = object_property_find(cpuobj, "has_el3", NULL) && |
Peter Maydell | 4182bbb | 2015-09-08 17:38:43 +0100 | [diff] [blame] | 76 | object_property_get_bool(cpuobj, "has_el3", &error_abort); |
| 77 | qdev_prop_set_bit(gicdev, "has-security-extensions", has_el3); |
| 78 | |
Andreas Färber | 837cf10 | 2013-06-30 20:36:15 +0200 | [diff] [blame] | 79 | object_property_set_bool(OBJECT(&s->gic), true, "realized", &err); |
| 80 | if (err != NULL) { |
| 81 | error_propagate(errp, err); |
| 82 | return; |
| 83 | } |
Andreas Färber | 9b5f952 | 2013-06-30 19:01:18 +0200 | [diff] [blame] | 84 | gicbusdev = SYS_BUS_DEVICE(&s->gic); |
Peter Maydell | ddd7616 | 2012-04-13 11:39:08 +0000 | [diff] [blame] | 85 | |
| 86 | /* Pass through outbound IRQ lines from the GIC */ |
Andreas Färber | 837cf10 | 2013-06-30 20:36:15 +0200 | [diff] [blame] | 87 | sysbus_pass_irq(sbd, gicbusdev); |
Peter Maydell | ddd7616 | 2012-04-13 11:39:08 +0000 | [diff] [blame] | 88 | |
| 89 | /* Pass through inbound GPIO lines to the GIC */ |
Andreas Färber | 837cf10 | 2013-06-30 20:36:15 +0200 | [diff] [blame] | 90 | qdev_init_gpio_in(dev, a9mp_priv_set_irq, s->num_irq - 32); |
Peter Maydell | b12080c | 2011-12-01 21:16:34 +0000 | [diff] [blame] | 91 | |
François LEGAL | 57e72f2 | 2013-12-01 23:37:11 -0800 | [diff] [blame] | 92 | gtimerdev = DEVICE(&s->gtimer); |
| 93 | qdev_prop_set_uint32(gtimerdev, "num-cpu", s->num_cpu); |
| 94 | object_property_set_bool(OBJECT(&s->gtimer), true, "realized", &err); |
| 95 | if (err != NULL) { |
| 96 | error_propagate(errp, err); |
| 97 | return; |
| 98 | } |
| 99 | gtimerbusdev = SYS_BUS_DEVICE(&s->gtimer); |
| 100 | |
Andreas Färber | eb110bd | 2013-06-30 20:30:27 +0200 | [diff] [blame] | 101 | mptimerdev = DEVICE(&s->mptimer); |
| 102 | qdev_prop_set_uint32(mptimerdev, "num-cpu", s->num_cpu); |
Andreas Färber | 837cf10 | 2013-06-30 20:36:15 +0200 | [diff] [blame] | 103 | object_property_set_bool(OBJECT(&s->mptimer), true, "realized", &err); |
| 104 | if (err != NULL) { |
| 105 | error_propagate(errp, err); |
| 106 | return; |
| 107 | } |
Peter Crosthwaite | d3053e6 | 2013-12-10 13:24:51 +0000 | [diff] [blame] | 108 | mptimerbusdev = SYS_BUS_DEVICE(&s->mptimer); |
Peter Crosthwaite | cde4577 | 2013-02-28 18:23:13 +0000 | [diff] [blame] | 109 | |
Andreas Färber | eb110bd | 2013-06-30 20:30:27 +0200 | [diff] [blame] | 110 | wdtdev = DEVICE(&s->wdt); |
| 111 | qdev_prop_set_uint32(wdtdev, "num-cpu", s->num_cpu); |
Andreas Färber | 837cf10 | 2013-06-30 20:36:15 +0200 | [diff] [blame] | 112 | object_property_set_bool(OBJECT(&s->wdt), true, "realized", &err); |
| 113 | if (err != NULL) { |
| 114 | error_propagate(errp, err); |
| 115 | return; |
| 116 | } |
Andreas Färber | eb110bd | 2013-06-30 20:30:27 +0200 | [diff] [blame] | 117 | wdtbusdev = SYS_BUS_DEVICE(&s->wdt); |
Peter Maydell | b12080c | 2011-12-01 21:16:34 +0000 | [diff] [blame] | 118 | |
| 119 | /* Memory map (addresses are offsets from PERIPHBASE): |
| 120 | * 0x0000-0x00ff -- Snoop Control Unit |
| 121 | * 0x0100-0x01ff -- GIC CPU interface |
| 122 | * 0x0200-0x02ff -- Global Timer |
| 123 | * 0x0300-0x05ff -- nothing |
| 124 | * 0x0600-0x06ff -- private timers and watchdogs |
| 125 | * 0x0700-0x0fff -- nothing |
| 126 | * 0x1000-0x1fff -- GIC Distributor |
Peter Maydell | b12080c | 2011-12-01 21:16:34 +0000 | [diff] [blame] | 127 | */ |
Peter Crosthwaite | 353575f | 2013-02-28 18:23:14 +0000 | [diff] [blame] | 128 | memory_region_add_subregion(&s->container, 0, |
| 129 | sysbus_mmio_get_region(scubusdev, 0)); |
Peter Maydell | b12080c | 2011-12-01 21:16:34 +0000 | [diff] [blame] | 130 | /* GIC CPU interface */ |
Peter Maydell | ddd7616 | 2012-04-13 11:39:08 +0000 | [diff] [blame] | 131 | memory_region_add_subregion(&s->container, 0x100, |
| 132 | sysbus_mmio_get_region(gicbusdev, 1)); |
François LEGAL | 57e72f2 | 2013-12-01 23:37:11 -0800 | [diff] [blame] | 133 | memory_region_add_subregion(&s->container, 0x200, |
| 134 | sysbus_mmio_get_region(gtimerbusdev, 0)); |
Peter Maydell | b12080c | 2011-12-01 21:16:34 +0000 | [diff] [blame] | 135 | /* Note that the A9 exposes only the "timer/watchdog for this core" |
| 136 | * memory region, not the "timer/watchdog for core X" ones 11MPcore has. |
| 137 | */ |
| 138 | memory_region_add_subregion(&s->container, 0x600, |
Peter Crosthwaite | d3053e6 | 2013-12-10 13:24:51 +0000 | [diff] [blame] | 139 | sysbus_mmio_get_region(mptimerbusdev, 0)); |
Peter Maydell | b12080c | 2011-12-01 21:16:34 +0000 | [diff] [blame] | 140 | memory_region_add_subregion(&s->container, 0x620, |
Peter Crosthwaite | cde4577 | 2013-02-28 18:23:13 +0000 | [diff] [blame] | 141 | sysbus_mmio_get_region(wdtbusdev, 0)); |
Peter Maydell | ddd7616 | 2012-04-13 11:39:08 +0000 | [diff] [blame] | 142 | memory_region_add_subregion(&s->container, 0x1000, |
| 143 | sysbus_mmio_get_region(gicbusdev, 0)); |
Peter Maydell | b12080c | 2011-12-01 21:16:34 +0000 | [diff] [blame] | 144 | |
Peter Maydell | ddd7616 | 2012-04-13 11:39:08 +0000 | [diff] [blame] | 145 | /* Wire up the interrupt from each watchdog and timer. |
François LEGAL | 57e72f2 | 2013-12-01 23:37:11 -0800 | [diff] [blame] | 146 | * For each core the global timer is PPI 27, the private |
| 147 | * timer is PPI 29 and the watchdog PPI 30. |
Peter Maydell | ddd7616 | 2012-04-13 11:39:08 +0000 | [diff] [blame] | 148 | */ |
| 149 | for (i = 0; i < s->num_cpu; i++) { |
| 150 | int ppibase = (s->num_irq - 32) + i * 32; |
François LEGAL | 57e72f2 | 2013-12-01 23:37:11 -0800 | [diff] [blame] | 151 | sysbus_connect_irq(gtimerbusdev, i, |
| 152 | qdev_get_gpio_in(gicdev, ppibase + 27)); |
Peter Crosthwaite | d3053e6 | 2013-12-10 13:24:51 +0000 | [diff] [blame] | 153 | sysbus_connect_irq(mptimerbusdev, i, |
Andreas Färber | 9b5f952 | 2013-06-30 19:01:18 +0200 | [diff] [blame] | 154 | qdev_get_gpio_in(gicdev, ppibase + 29)); |
Peter Crosthwaite | cde4577 | 2013-02-28 18:23:13 +0000 | [diff] [blame] | 155 | sysbus_connect_irq(wdtbusdev, i, |
Andreas Färber | 9b5f952 | 2013-06-30 19:01:18 +0200 | [diff] [blame] | 156 | qdev_get_gpio_in(gicdev, ppibase + 30)); |
Peter Maydell | b12080c | 2011-12-01 21:16:34 +0000 | [diff] [blame] | 157 | } |
Peter Maydell | b12080c | 2011-12-01 21:16:34 +0000 | [diff] [blame] | 158 | } |
| 159 | |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 160 | static Property a9mp_priv_properties[] = { |
Peter Crosthwaite | 845769f | 2013-02-28 18:23:13 +0000 | [diff] [blame] | 161 | DEFINE_PROP_UINT32("num-cpu", A9MPPrivState, num_cpu, 1), |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 162 | /* The Cortex-A9MP may have anything from 0 to 224 external interrupt |
| 163 | * IRQ lines (with another 32 internal). We default to 64+32, which |
| 164 | * is the number provided by the Cortex-A9MP test chip in the |
| 165 | * Realview PBX-A9 and Versatile Express A9 development boards. |
| 166 | * Other boards may differ and should set this property appropriately. |
| 167 | */ |
Peter Crosthwaite | 845769f | 2013-02-28 18:23:13 +0000 | [diff] [blame] | 168 | DEFINE_PROP_UINT32("num-irq", A9MPPrivState, num_irq, 96), |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 169 | DEFINE_PROP_END_OF_LIST(), |
| 170 | }; |
| 171 | |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 172 | static void a9mp_priv_class_init(ObjectClass *klass, void *data) |
| 173 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 174 | DeviceClass *dc = DEVICE_CLASS(klass); |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 175 | |
Andreas Färber | 837cf10 | 2013-06-30 20:36:15 +0200 | [diff] [blame] | 176 | dc->realize = a9mp_priv_realize; |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 177 | dc->props = a9mp_priv_properties; |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 178 | } |
| 179 | |
Andreas Färber | 8c43a6f | 2013-01-10 16:19:07 +0100 | [diff] [blame] | 180 | static const TypeInfo a9mp_priv_info = { |
Andreas Färber | 5126fec | 2013-06-30 19:07:29 +0200 | [diff] [blame] | 181 | .name = TYPE_A9MPCORE_PRIV, |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 182 | .parent = TYPE_SYS_BUS_DEVICE, |
Peter Crosthwaite | 845769f | 2013-02-28 18:23:13 +0000 | [diff] [blame] | 183 | .instance_size = sizeof(A9MPPrivState), |
Andreas Färber | 753bc6e | 2013-06-30 19:52:31 +0200 | [diff] [blame] | 184 | .instance_init = a9mp_priv_initfn, |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 185 | .class_init = a9mp_priv_class_init, |
Paul Brook | f7c7032 | 2009-11-19 16:45:21 +0000 | [diff] [blame] | 186 | }; |
| 187 | |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 188 | static void a9mp_register_types(void) |
Paul Brook | f7c7032 | 2009-11-19 16:45:21 +0000 | [diff] [blame] | 189 | { |
Anthony Liguori | 39bffca | 2011-12-07 21:34:16 -0600 | [diff] [blame] | 190 | type_register_static(&a9mp_priv_info); |
Paul Brook | f7c7032 | 2009-11-19 16:45:21 +0000 | [diff] [blame] | 191 | } |
| 192 | |
Andreas Färber | 83f7d43 | 2012-02-09 15:20:55 +0100 | [diff] [blame] | 193 | type_init(a9mp_register_types) |