blob: 0f9fb4dd315004b82fc10700cefe4c1785d2f165 [file] [log] [blame]
Andreas Färber339894b2012-02-11 17:26:17 +01001/*
2 * QEMU SuperH CPU
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2.1 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see
18 * <http://www.gnu.org/licenses/lgpl-2.1.html>
19 */
20#ifndef QEMU_SUPERH_CPU_QOM_H
21#define QEMU_SUPERH_CPU_QOM_H
22
Paolo Bonzini14cccb62012-12-17 18:19:50 +010023#include "qom/cpu.h"
Andreas Färber339894b2012-02-11 17:26:17 +010024
25#define TYPE_SUPERH_CPU "superh-cpu"
26
Igor Mammedov974e58d2017-10-05 15:50:55 +020027#define TYPE_SH7750R_CPU SUPERH_CPU_TYPE_NAME("sh7750r")
28#define TYPE_SH7751R_CPU SUPERH_CPU_TYPE_NAME("sh7751r")
29#define TYPE_SH7785_CPU SUPERH_CPU_TYPE_NAME("sh7785")
Andreas Färberc1b382e2012-11-19 02:42:18 +010030
Andreas Färber339894b2012-02-11 17:26:17 +010031#define SUPERH_CPU_CLASS(klass) \
32 OBJECT_CLASS_CHECK(SuperHCPUClass, (klass), TYPE_SUPERH_CPU)
33#define SUPERH_CPU(obj) \
34 OBJECT_CHECK(SuperHCPU, (obj), TYPE_SUPERH_CPU)
35#define SUPERH_CPU_GET_CLASS(obj) \
36 OBJECT_GET_CLASS(SuperHCPUClass, (obj), TYPE_SUPERH_CPU)
37
38/**
39 * SuperHCPUClass:
Andreas Färber55acb582012-04-23 18:16:02 +020040 * @parent_realize: The parent class' realize handler.
Andreas Färber339894b2012-02-11 17:26:17 +010041 * @parent_reset: The parent class' reset handler.
Andreas Färberb350ab72012-11-20 16:15:47 +010042 * @pvr: Processor Version Register
43 * @prr: Processor Revision Register
44 * @cvr: Cache Version Register
Andreas Färber339894b2012-02-11 17:26:17 +010045 *
46 * A SuperH CPU model.
47 */
48typedef struct SuperHCPUClass {
49 /*< private >*/
50 CPUClass parent_class;
51 /*< public >*/
52
Andreas Färber55acb582012-04-23 18:16:02 +020053 DeviceRealize parent_realize;
Andreas Färber339894b2012-02-11 17:26:17 +010054 void (*parent_reset)(CPUState *cpu);
Andreas Färberc1b382e2012-11-19 02:42:18 +010055
Andreas Färberb350ab72012-11-20 16:15:47 +010056 uint32_t pvr;
57 uint32_t prr;
58 uint32_t cvr;
Andreas Färber339894b2012-02-11 17:26:17 +010059} SuperHCPUClass;
60
Paolo Bonzinie6005f62016-03-15 13:49:25 +010061typedef struct SuperHCPU SuperHCPU;
Andreas Färber97a8ea52013-02-02 10:57:51 +010062
Andreas Färber339894b2012-02-11 17:26:17 +010063#endif