Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 1 | /* |
| 2 | * APIC support - internal interfaces |
| 3 | * |
| 4 | * Copyright (c) 2004-2005 Fabrice Bellard |
| 5 | * Copyright (c) 2011 Jan Kiszka, Siemens AG |
| 6 | * |
| 7 | * This library is free software; you can redistribute it and/or |
| 8 | * modify it under the terms of the GNU Lesser General Public |
| 9 | * License as published by the Free Software Foundation; either |
| 10 | * version 2 of the License, or (at your option) any later version. |
| 11 | * |
| 12 | * This library is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 15 | * Lesser General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU Lesser General Public |
| 18 | * License along with this library; if not, see <http://www.gnu.org/licenses/> |
| 19 | */ |
Markus Armbruster | 175de52 | 2016-06-29 15:29:06 +0200 | [diff] [blame] | 20 | |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 21 | #ifndef QEMU_APIC_INTERNAL_H |
| 22 | #define QEMU_APIC_INTERNAL_H |
| 23 | |
Peter Maydell | 20fbcfd | 2015-08-19 16:20:20 +0100 | [diff] [blame] | 24 | #include "cpu.h" |
Paolo Bonzini | 022c62c | 2012-12-17 18:19:49 +0100 | [diff] [blame] | 25 | #include "exec/memory.h" |
Paolo Bonzini | 1de7afc | 2012-12-17 18:20:00 +0100 | [diff] [blame] | 26 | #include "qemu/timer.h" |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 27 | |
| 28 | /* APIC Local Vector Table */ |
| 29 | #define APIC_LVT_TIMER 0 |
| 30 | #define APIC_LVT_THERMAL 1 |
| 31 | #define APIC_LVT_PERFORM 2 |
| 32 | #define APIC_LVT_LINT0 3 |
| 33 | #define APIC_LVT_LINT1 4 |
| 34 | #define APIC_LVT_ERROR 5 |
| 35 | #define APIC_LVT_NB 6 |
| 36 | |
| 37 | /* APIC delivery modes */ |
| 38 | #define APIC_DM_FIXED 0 |
| 39 | #define APIC_DM_LOWPRI 1 |
| 40 | #define APIC_DM_SMI 2 |
| 41 | #define APIC_DM_NMI 4 |
| 42 | #define APIC_DM_INIT 5 |
| 43 | #define APIC_DM_SIPI 6 |
| 44 | #define APIC_DM_EXTINT 7 |
| 45 | |
| 46 | /* APIC destination mode */ |
| 47 | #define APIC_DESTMODE_FLAT 0xf |
| 48 | #define APIC_DESTMODE_CLUSTER 1 |
| 49 | |
| 50 | #define APIC_TRIGGER_EDGE 0 |
| 51 | #define APIC_TRIGGER_LEVEL 1 |
| 52 | |
Pavel Butsykin | 6519d18 | 2015-09-22 16:18:15 +0300 | [diff] [blame] | 53 | #define APIC_VECTOR_MASK 0xff |
| 54 | #define APIC_DCR_MASK 0xf |
| 55 | |
| 56 | #define APIC_LVT_TIMER_SHIFT 17 |
| 57 | #define APIC_LVT_MASKED_SHIFT 16 |
| 58 | #define APIC_LVT_LEVEL_TRIGGER_SHIFT 15 |
| 59 | #define APIC_LVT_REMOTE_IRR_SHIFT 14 |
| 60 | #define APIC_LVT_INT_POLARITY_SHIFT 13 |
| 61 | #define APIC_LVT_DELIV_STS_SHIFT 12 |
| 62 | #define APIC_LVT_DELIV_MOD_SHIFT 8 |
| 63 | |
| 64 | #define APIC_LVT_TIMER_TSCDEADLINE (2 << APIC_LVT_TIMER_SHIFT) |
Pavel Butsykin | b6cfc3c | 2015-09-22 16:18:16 +0300 | [diff] [blame] | 65 | #define APIC_LVT_TIMER_PERIODIC (1 << APIC_LVT_TIMER_SHIFT) |
| 66 | #define APIC_LVT_MASKED (1 << APIC_LVT_MASKED_SHIFT) |
| 67 | #define APIC_LVT_LEVEL_TRIGGER (1 << APIC_LVT_LEVEL_TRIGGER_SHIFT) |
| 68 | #define APIC_LVT_REMOTE_IRR (1 << APIC_LVT_REMOTE_IRR_SHIFT) |
Pavel Butsykin | 6519d18 | 2015-09-22 16:18:15 +0300 | [diff] [blame] | 69 | #define APIC_LVT_INT_POLARITY (1 << APIC_LVT_INT_POLARITY_SHIFT) |
| 70 | #define APIC_LVT_DELIV_STS (1 << APIC_LVT_DELIV_STS_SHIFT) |
| 71 | #define APIC_LVT_DELIV_MOD (7 << APIC_LVT_DELIV_MOD_SHIFT) |
| 72 | |
| 73 | #define APIC_ESR_ILL_ADDRESS_SHIFT 7 |
| 74 | #define APIC_ESR_RECV_ILL_VECT_SHIFT 6 |
| 75 | #define APIC_ESR_SEND_ILL_VECT_SHIFT 5 |
| 76 | #define APIC_ESR_RECV_ACCEPT_SHIFT 3 |
| 77 | #define APIC_ESR_SEND_ACCEPT_SHIFT 2 |
| 78 | #define APIC_ESR_RECV_CHECK_SUM_SHIFT 1 |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 79 | |
Pavel Butsykin | b6cfc3c | 2015-09-22 16:18:16 +0300 | [diff] [blame] | 80 | #define APIC_ESR_ILLEGAL_ADDRESS (1 << APIC_ESR_ILL_ADDRESS_SHIFT) |
Pavel Butsykin | 6519d18 | 2015-09-22 16:18:15 +0300 | [diff] [blame] | 81 | #define APIC_ESR_RECV_ILLEGAL_VECT (1 << APIC_ESR_RECV_ILL_VECT_SHIFT) |
| 82 | #define APIC_ESR_SEND_ILLEGAL_VECT (1 << APIC_ESR_SEND_ILL_VECT_SHIFT) |
| 83 | #define APIC_ESR_RECV_ACCEPT (1 << APIC_ESR_RECV_ACCEPT_SHIFT) |
| 84 | #define APIC_ESR_SEND_ACCEPT (1 << APIC_ESR_SEND_ACCEPT_SHIFT) |
| 85 | #define APIC_ESR_RECV_CHECK_SUM (1 << APIC_ESR_RECV_CHECK_SUM_SHIFT) |
| 86 | #define APIC_ESR_SEND_CHECK_SUM 1 |
| 87 | |
| 88 | #define APIC_ICR_DEST_SHIFT 24 |
| 89 | #define APIC_ICR_DEST_SHORT_SHIFT 18 |
| 90 | #define APIC_ICR_TRIGGER_MOD_SHIFT 15 |
| 91 | #define APIC_ICR_LEVEL_SHIFT 14 |
| 92 | #define APIC_ICR_DELIV_STS_SHIFT 12 |
| 93 | #define APIC_ICR_DEST_MOD_SHIFT 11 |
| 94 | #define APIC_ICR_DELIV_MOD_SHIFT 8 |
| 95 | |
| 96 | #define APIC_ICR_DEST_SHORT (3 << APIC_ICR_DEST_SHORT_SHIFT) |
| 97 | #define APIC_ICR_TRIGGER_MOD (1 << APIC_ICR_TRIGGER_MOD_SHIFT) |
| 98 | #define APIC_ICR_LEVEL (1 << APIC_ICR_LEVEL_SHIFT) |
| 99 | #define APIC_ICR_DELIV_STS (1 << APIC_ICR_DELIV_STS_SHIFT) |
| 100 | #define APIC_ICR_DEST_MOD (1 << APIC_ICR_DEST_MOD_SHIFT) |
| 101 | #define APIC_ICR_DELIV_MOD (7 << APIC_ICR_DELIV_MOD_SHIFT) |
| 102 | |
| 103 | #define APIC_PR_CLASS_SHIFT 4 |
| 104 | #define APIC_PR_SUB_CLASS 0xf |
| 105 | |
| 106 | #define APIC_LOGDEST_XAPIC_SHIFT 4 |
| 107 | #define APIC_LOGDEST_XAPIC_ID 0xf |
| 108 | |
| 109 | #define APIC_LOGDEST_X2APIC_SHIFT 16 |
| 110 | #define APIC_LOGDEST_X2APIC_ID 0xffff |
| 111 | |
| 112 | #define APIC_SPURIO_FOCUS_SHIFT 9 |
| 113 | #define APIC_SPURIO_ENABLED_SHIFT 8 |
| 114 | |
| 115 | #define APIC_SPURIO_FOCUS (1 << APIC_SPURIO_FOCUS_SHIFT) |
| 116 | #define APIC_SPURIO_ENABLED (1 << APIC_SPURIO_ENABLED_SHIFT) |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 117 | |
Pavel Butsykin | b6cfc3c | 2015-09-22 16:18:16 +0300 | [diff] [blame] | 118 | #define APIC_SV_DIRECTED_IO (1 << 12) |
| 119 | #define APIC_SV_ENABLE (1 << 8) |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 120 | |
Jan Kiszka | e5ad936 | 2012-02-17 18:31:19 +0100 | [diff] [blame] | 121 | #define VAPIC_ENABLE_BIT 0 |
| 122 | #define VAPIC_ENABLE_MASK (1 << VAPIC_ENABLE_BIT) |
| 123 | |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 124 | typedef struct APICCommonState APICCommonState; |
| 125 | |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 126 | #define TYPE_APIC_COMMON "apic-common" |
| 127 | #define APIC_COMMON(obj) \ |
| 128 | OBJECT_CHECK(APICCommonState, (obj), TYPE_APIC_COMMON) |
| 129 | #define APIC_COMMON_CLASS(klass) \ |
| 130 | OBJECT_CLASS_CHECK(APICCommonClass, (klass), TYPE_APIC_COMMON) |
| 131 | #define APIC_COMMON_GET_CLASS(obj) \ |
| 132 | OBJECT_GET_CLASS(APICCommonClass, (obj), TYPE_APIC_COMMON) |
| 133 | |
| 134 | typedef struct APICCommonClass |
| 135 | { |
Chen Fan | 46232aa | 2015-09-16 17:19:14 +0800 | [diff] [blame] | 136 | DeviceClass parent_class; |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 137 | |
xiaoqiang zhao | ff6986c | 2013-11-05 18:16:03 +0800 | [diff] [blame] | 138 | DeviceRealize realize; |
Igor Mammedov | 9c156f9 | 2016-06-23 17:30:14 +0200 | [diff] [blame] | 139 | DeviceUnrealize unrealize; |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 140 | void (*set_base)(APICCommonState *s, uint64_t val); |
| 141 | void (*set_tpr)(APICCommonState *s, uint8_t val); |
Jan Kiszka | e5ad936 | 2012-02-17 18:31:19 +0100 | [diff] [blame] | 142 | uint8_t (*get_tpr)(APICCommonState *s); |
| 143 | void (*enable_tpr_reporting)(APICCommonState *s, bool enable); |
| 144 | void (*vapic_base_update)(APICCommonState *s); |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 145 | void (*external_nmi)(APICCommonState *s); |
Jan Kiszka | e5ad936 | 2012-02-17 18:31:19 +0100 | [diff] [blame] | 146 | void (*pre_save)(APICCommonState *s); |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 147 | void (*post_load)(APICCommonState *s); |
Paolo Bonzini | 575a6f4 | 2014-12-10 16:56:46 +0100 | [diff] [blame] | 148 | void (*reset)(APICCommonState *s); |
Radim Krčmář | 267ee35 | 2016-10-10 17:28:43 +0200 | [diff] [blame] | 149 | /* send_msi emulates an APIC bus and its proper place would be in a new |
| 150 | * device, but it's convenient to have it here for now. |
| 151 | */ |
| 152 | void (*send_msi)(MSIMessage *msi); |
Anthony Liguori | 999e12b | 2012-01-24 13:12:29 -0600 | [diff] [blame] | 153 | } APICCommonClass; |
| 154 | |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 155 | struct APICCommonState { |
Chen Fan | 46232aa | 2015-09-16 17:19:14 +0800 | [diff] [blame] | 156 | /*< private >*/ |
| 157 | DeviceState parent_obj; |
| 158 | /*< public >*/ |
Andreas Färber | 60671e5 | 2012-10-10 14:10:07 +0200 | [diff] [blame] | 159 | |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 160 | MemoryRegion io_memory; |
Andreas Färber | 60671e5 | 2012-10-10 14:10:07 +0200 | [diff] [blame] | 161 | X86CPU *cpu; |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 162 | uint32_t apicbase; |
Igor Mammedov | 33d7a28 | 2016-10-19 14:05:35 +0200 | [diff] [blame] | 163 | uint8_t id; /* legacy APIC ID */ |
| 164 | uint32_t initial_apic_id; |
Gabriel L. Somlo | aa93200 | 2014-05-05 10:52:51 -0400 | [diff] [blame] | 165 | uint8_t version; |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 166 | uint8_t arb_id; |
| 167 | uint8_t tpr; |
| 168 | uint32_t spurious_vec; |
| 169 | uint8_t log_dest; |
| 170 | uint8_t dest_mode; |
| 171 | uint32_t isr[8]; /* in service register */ |
| 172 | uint32_t tmr[8]; /* trigger mode register */ |
| 173 | uint32_t irr[8]; /* interrupt request register */ |
| 174 | uint32_t lvt[APIC_LVT_NB]; |
| 175 | uint32_t esr; /* error register */ |
| 176 | uint32_t icr[2]; |
| 177 | |
| 178 | uint32_t divide_conf; |
| 179 | int count_shift; |
| 180 | uint32_t initial_count; |
| 181 | int64_t initial_count_load_time; |
| 182 | int64_t next_time; |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 183 | QEMUTimer *timer; |
Jan Kiszka | 7a380ca | 2011-10-16 12:19:12 +0200 | [diff] [blame] | 184 | int64_t timer_expiry; |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 185 | int sipi_vector; |
| 186 | int wait_for_sipi; |
Jan Kiszka | e5ad936 | 2012-02-17 18:31:19 +0100 | [diff] [blame] | 187 | |
| 188 | uint32_t vapic_control; |
| 189 | DeviceState *vapic; |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 190 | hwaddr vapic_paddr; /* note: persistence via kvmvapic */ |
Igor Mammedov | f6e9844 | 2016-07-01 17:53:56 +0200 | [diff] [blame] | 191 | bool legacy_instance_id; |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 192 | }; |
| 193 | |
Jan Kiszka | e5ad936 | 2012-02-17 18:31:19 +0100 | [diff] [blame] | 194 | typedef struct VAPICState { |
| 195 | uint8_t tpr; |
| 196 | uint8_t isr; |
| 197 | uint8_t zero; |
| 198 | uint8_t irr; |
| 199 | uint8_t enabled; |
| 200 | } QEMU_PACKED VAPICState; |
| 201 | |
| 202 | extern bool apic_report_tpr_access; |
| 203 | |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 204 | void apic_report_irq_delivered(int delivered); |
Jan Kiszka | 7a380ca | 2011-10-16 12:19:12 +0200 | [diff] [blame] | 205 | bool apic_next_timer(APICCommonState *s, int64_t current_time); |
Jan Kiszka | e5ad936 | 2012-02-17 18:31:19 +0100 | [diff] [blame] | 206 | void apic_enable_tpr_access_reporting(DeviceState *d, bool enable); |
Avi Kivity | a8170e5 | 2012-10-23 12:30:10 +0200 | [diff] [blame] | 207 | void apic_enable_vapic(DeviceState *d, hwaddr paddr); |
Jan Kiszka | e5ad936 | 2012-02-17 18:31:19 +0100 | [diff] [blame] | 208 | |
Andreas Färber | d77953b | 2013-01-16 19:29:31 +0100 | [diff] [blame] | 209 | void vapic_report_tpr_access(DeviceState *dev, CPUState *cpu, target_ulong ip, |
Jan Kiszka | e5ad936 | 2012-02-17 18:31:19 +0100 | [diff] [blame] | 210 | TPRAccess access); |
Jan Kiszka | dae0168 | 2011-10-16 11:16:36 +0200 | [diff] [blame] | 211 | |
Pavel Butsykin | 82a5e04 | 2015-09-22 16:18:13 +0300 | [diff] [blame] | 212 | int apic_get_ppr(APICCommonState *s); |
| 213 | |
| 214 | static inline void apic_set_bit(uint32_t *tab, int index) |
| 215 | { |
| 216 | int i, mask; |
| 217 | i = index >> 5; |
| 218 | mask = 1 << (index & 0x1f); |
| 219 | tab[i] |= mask; |
| 220 | } |
| 221 | |
| 222 | static inline int apic_get_bit(uint32_t *tab, int index) |
| 223 | { |
| 224 | int i, mask; |
| 225 | i = index >> 5; |
| 226 | mask = 1 << (index & 0x1f); |
| 227 | return !!(tab[i] & mask); |
| 228 | } |
| 229 | |
Radim Krčmář | 2f11431 | 2016-10-10 17:28:42 +0200 | [diff] [blame] | 230 | APICCommonClass *apic_get_class(void); |
| 231 | |
Markus Armbruster | 175de52 | 2016-06-29 15:29:06 +0200 | [diff] [blame] | 232 | #endif /* QEMU_APIC_INTERNAL_H */ |