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balrog997641a2008-12-15 02:05:00 +00001/* omap_sx1.c Support for the Siemens SX1 smartphone emulation.
2 *
3 * Copyright (C) 2008
4 * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
5 * Copyright (C) 2007 Vladimir Ananiev <vovan888@gmail.com>
6 *
7 * based on PalmOne's (TM) PDAs support (palm.c)
8 */
9
10/*
11 * PalmOne's (TM) PDAs.
12 *
13 * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License as
17 * published by the Free Software Foundation; either version 2 of
18 * the License, or (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
aurel32fad6cb12009-01-04 22:05:52 +000025 * You should have received a copy of the GNU General Public License along
Blue Swirl8167ee82009-07-16 20:47:01 +000026 * with this program; if not, see <http://www.gnu.org/licenses/>.
balrog997641a2008-12-15 02:05:00 +000027 */
28#include "hw.h"
balrog997641a2008-12-15 02:05:00 +000029#include "console.h"
30#include "omap.h"
31#include "boards.h"
32#include "arm-misc.h"
33#include "flash.h"
Blue Swirl24463332010-08-24 15:22:24 +000034#include "blockdev.h"
Avi Kivity4b3fedf2011-08-09 19:35:00 +030035#include "exec-memory.h"
balrog997641a2008-12-15 02:05:00 +000036
37/*****************************************************************************/
38/* Siemens SX1 Cellphone V1 */
39/* - ARM OMAP310 processor
40 * - SRAM 192 kB
41 * - SDRAM 32 MB at 0x10000000
42 * - Boot flash 16 MB at 0x00000000
43 * - Application flash 8 MB at 0x04000000
44 * - 3 serial ports
45 * - 1 SecureDigital
46 * - 1 LCD display
47 * - 1 RTC
48 */
49
50/*****************************************************************************/
51/* Siemens SX1 Cellphone V2 */
52/* - ARM OMAP310 processor
53 * - SRAM 192 kB
54 * - SDRAM 32 MB at 0x10000000
55 * - Boot flash 32 MB at 0x00000000
56 * - 3 serial ports
57 * - 1 SecureDigital
58 * - 1 LCD display
59 * - 1 RTC
60 */
61
Benoît Canetba158022011-11-28 13:53:34 +010062static uint64_t static_read(void *opaque, target_phys_addr_t offset,
63 unsigned size)
balrog997641a2008-12-15 02:05:00 +000064{
65 uint32_t *val = (uint32_t *) opaque;
Benoît Canetba158022011-11-28 13:53:34 +010066 uint32_t mask = (4 / size) - 1;
balrog997641a2008-12-15 02:05:00 +000067
Benoît Canetba158022011-11-28 13:53:34 +010068 return *val >> ((offset & mask) << 3);
balrog997641a2008-12-15 02:05:00 +000069}
70
Anthony Liguoric227f092009-10-01 16:12:16 -050071static void static_write(void *opaque, target_phys_addr_t offset,
Benoît Canetba158022011-11-28 13:53:34 +010072 uint64_t value, unsigned size)
balrog997641a2008-12-15 02:05:00 +000073{
74#ifdef SPY
Benoît Canetba158022011-11-28 13:53:34 +010075 printf("%s: value %" PRIx64 " %u bytes written at 0x%x\n",
76 __func__, value, size, (int)offset);
balrog997641a2008-12-15 02:05:00 +000077#endif
78}
79
Benoît Canetba158022011-11-28 13:53:34 +010080static const MemoryRegionOps static_ops = {
81 .read = static_read,
82 .write = static_write,
83 .endianness = DEVICE_NATIVE_ENDIAN,
balrog997641a2008-12-15 02:05:00 +000084};
85
86#define sdram_size 0x02000000
87#define sector_size (128 * 1024)
88#define flash0_size (16 * 1024 * 1024)
89#define flash1_size ( 8 * 1024 * 1024)
90#define flash2_size (32 * 1024 * 1024)
91#define total_ram_v1 (sdram_size + flash0_size + flash1_size + OMAP15XX_SRAM_SIZE)
92#define total_ram_v2 (sdram_size + flash2_size + OMAP15XX_SRAM_SIZE)
93
94static struct arm_boot_info sx1_binfo = {
95 .loader_start = OMAP_EMIFF_BASE,
96 .ram_size = sdram_size,
97 .board_id = 0x265,
98};
99
Anthony Liguoric227f092009-10-01 16:12:16 -0500100static void sx1_init(ram_addr_t ram_size,
aurel325f70aab2009-02-07 15:20:14 +0000101 const char *boot_device,
balrog997641a2008-12-15 02:05:00 +0000102 const char *kernel_filename, const char *kernel_cmdline,
103 const char *initrd_filename, const char *cpu_model,
104 const int version)
105{
106 struct omap_mpu_state_s *cpu;
Avi Kivity4b3fedf2011-08-09 19:35:00 +0300107 MemoryRegion *address_space = get_system_memory();
Benoît Canetba158022011-11-28 13:53:34 +0100108 MemoryRegion *flash = g_new(MemoryRegion, 1);
109 MemoryRegion *flash_1 = g_new(MemoryRegion, 1);
110 MemoryRegion *cs = g_new(MemoryRegion, 4);
balrog997641a2008-12-15 02:05:00 +0000111 static uint32_t cs0val = 0x00213090;
112 static uint32_t cs1val = 0x00215070;
113 static uint32_t cs2val = 0x00001139;
114 static uint32_t cs3val = 0x00001139;
Gerd Hoffmann751c6a12009-07-22 16:42:57 +0200115 DriveInfo *dinfo;
balrog997641a2008-12-15 02:05:00 +0000116 int fl_idx;
117 uint32_t flash_size = flash0_size;
Anthony Liguori01e04512011-08-25 14:39:18 -0500118 int be;
balrog997641a2008-12-15 02:05:00 +0000119
120 if (version == 2) {
121 flash_size = flash2_size;
122 }
123
Avi Kivity4b3fedf2011-08-09 19:35:00 +0300124 cpu = omap310_mpu_init(address_space, sx1_binfo.ram_size, cpu_model);
balrog997641a2008-12-15 02:05:00 +0000125
126 /* External Flash (EMIFS) */
Avi Kivityc5705a72011-12-20 15:59:12 +0200127 memory_region_init_ram(flash, "omap_sx1.flash0-0", flash_size);
128 vmstate_register_ram_global(flash);
Benoît Canetba158022011-11-28 13:53:34 +0100129 memory_region_set_readonly(flash, true);
130 memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash);
balrog997641a2008-12-15 02:05:00 +0000131
Benoît Canetba158022011-11-28 13:53:34 +0100132 memory_region_init_io(&cs[0], &static_ops, &cs0val,
133 "sx1.cs0", OMAP_CS0_SIZE - flash_size);
134 memory_region_add_subregion(address_space,
135 OMAP_CS0_BASE + flash_size, &cs[0]);
136
137
138 memory_region_init_io(&cs[2], &static_ops, &cs2val,
139 "sx1.cs2", OMAP_CS2_SIZE);
140 memory_region_add_subregion(address_space,
141 OMAP_CS2_BASE, &cs[2]);
142
143 memory_region_init_io(&cs[3], &static_ops, &cs3val,
144 "sx1.cs3", OMAP_CS3_SIZE);
145 memory_region_add_subregion(address_space,
146 OMAP_CS2_BASE, &cs[3]);
balrog997641a2008-12-15 02:05:00 +0000147
148 fl_idx = 0;
Blue Swirl3d08ff62010-03-29 19:23:56 +0000149#ifdef TARGET_WORDS_BIGENDIAN
Anthony Liguori01e04512011-08-25 14:39:18 -0500150 be = 1;
Blue Swirl3d08ff62010-03-29 19:23:56 +0000151#else
Anthony Liguori01e04512011-08-25 14:39:18 -0500152 be = 0;
Blue Swirl3d08ff62010-03-29 19:23:56 +0000153#endif
balrog997641a2008-12-15 02:05:00 +0000154
Gerd Hoffmann751c6a12009-07-22 16:42:57 +0200155 if ((dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
Avi Kivitycfe5f012011-08-04 15:55:30 +0300156 if (!pflash_cfi01_register(OMAP_CS0_BASE, NULL,
157 "omap_sx1.flash0-1", flash_size,
Blue Swirl3d08ff62010-03-29 19:23:56 +0000158 dinfo->bdrv, sector_size,
159 flash_size / sector_size,
Anthony Liguori01e04512011-08-25 14:39:18 -0500160 4, 0, 0, 0, 0, be)) {
balrog997641a2008-12-15 02:05:00 +0000161 fprintf(stderr, "qemu: Error registering flash memory %d.\n",
162 fl_idx);
163 }
164 fl_idx++;
165 }
166
167 if ((version == 1) &&
Gerd Hoffmann751c6a12009-07-22 16:42:57 +0200168 (dinfo = drive_get(IF_PFLASH, 0, fl_idx)) != NULL) {
Avi Kivityc5705a72011-12-20 15:59:12 +0200169 memory_region_init_ram(flash_1, "omap_sx1.flash1-0", flash1_size);
170 vmstate_register_ram_global(flash_1);
Benoît Canetba158022011-11-28 13:53:34 +0100171 memory_region_set_readonly(flash_1, true);
172 memory_region_add_subregion(address_space, OMAP_CS1_BASE, flash_1);
173
174 memory_region_init_io(&cs[1], &static_ops, &cs1val,
175 "sx1.cs1", OMAP_CS1_SIZE - flash1_size);
176 memory_region_add_subregion(address_space,
177 OMAP_CS1_BASE + flash1_size, &cs[1]);
balrog997641a2008-12-15 02:05:00 +0000178
Avi Kivitycfe5f012011-08-04 15:55:30 +0300179 if (!pflash_cfi01_register(OMAP_CS1_BASE, NULL,
180 "omap_sx1.flash1-1", flash1_size,
Blue Swirl3d08ff62010-03-29 19:23:56 +0000181 dinfo->bdrv, sector_size,
182 flash1_size / sector_size,
Anthony Liguori01e04512011-08-25 14:39:18 -0500183 4, 0, 0, 0, 0, be)) {
balrog997641a2008-12-15 02:05:00 +0000184 fprintf(stderr, "qemu: Error registering flash memory %d.\n",
185 fl_idx);
186 }
187 fl_idx++;
188 } else {
Benoît Canetba158022011-11-28 13:53:34 +0100189 memory_region_init_io(&cs[1], &static_ops, &cs1val,
190 "sx1.cs1", OMAP_CS1_SIZE);
191 memory_region_add_subregion(address_space,
192 OMAP_CS1_BASE, &cs[1]);
balrog997641a2008-12-15 02:05:00 +0000193 }
194
195 if (!kernel_filename && !fl_idx) {
196 fprintf(stderr, "Kernel or Flash image must be specified\n");
197 exit(1);
198 }
199
200 /* Load the kernel. */
201 if (kernel_filename) {
balrog997641a2008-12-15 02:05:00 +0000202 sx1_binfo.kernel_filename = kernel_filename;
203 sx1_binfo.kernel_cmdline = kernel_cmdline;
204 sx1_binfo.initrd_filename = initrd_filename;
Andreas Färber5f4ef082012-05-04 00:42:39 +0200205 arm_load_kernel(&cpu->cpu->env, &sx1_binfo);
balrog997641a2008-12-15 02:05:00 +0000206 }
207
aurel325f70aab2009-02-07 15:20:14 +0000208 /* TODO: fix next line */
209 //~ qemu_console_resize(ds, 640, 480);
balrog997641a2008-12-15 02:05:00 +0000210}
211
Anthony Liguoric227f092009-10-01 16:12:16 -0500212static void sx1_init_v1(ram_addr_t ram_size,
aurel325f70aab2009-02-07 15:20:14 +0000213 const char *boot_device,
balrog997641a2008-12-15 02:05:00 +0000214 const char *kernel_filename, const char *kernel_cmdline,
215 const char *initrd_filename, const char *cpu_model)
216{
Paul Brookfbe1b592009-05-13 17:56:25 +0100217 sx1_init(ram_size, boot_device, kernel_filename,
balrog997641a2008-12-15 02:05:00 +0000218 kernel_cmdline, initrd_filename, cpu_model, 1);
219}
220
Anthony Liguoric227f092009-10-01 16:12:16 -0500221static void sx1_init_v2(ram_addr_t ram_size,
aurel325f70aab2009-02-07 15:20:14 +0000222 const char *boot_device,
balrog997641a2008-12-15 02:05:00 +0000223 const char *kernel_filename, const char *kernel_cmdline,
224 const char *initrd_filename, const char *cpu_model)
225{
Paul Brookfbe1b592009-05-13 17:56:25 +0100226 sx1_init(ram_size, boot_device, kernel_filename,
balrog997641a2008-12-15 02:05:00 +0000227 kernel_cmdline, initrd_filename, cpu_model, 2);
228}
229
Anthony Liguorif80f9ec2009-05-20 18:38:09 -0500230static QEMUMachine sx1_machine_v2 = {
balrog997641a2008-12-15 02:05:00 +0000231 .name = "sx1",
232 .desc = "Siemens SX1 (OMAP310) V2",
233 .init = sx1_init_v2,
balrog997641a2008-12-15 02:05:00 +0000234};
235
Anthony Liguorif80f9ec2009-05-20 18:38:09 -0500236static QEMUMachine sx1_machine_v1 = {
balrog997641a2008-12-15 02:05:00 +0000237 .name = "sx1-v1",
238 .desc = "Siemens SX1 (OMAP310) V1",
239 .init = sx1_init_v1,
balrog997641a2008-12-15 02:05:00 +0000240};
Anthony Liguorif80f9ec2009-05-20 18:38:09 -0500241
242static void sx1_machine_init(void)
243{
244 qemu_register_machine(&sx1_machine_v2);
245 qemu_register_machine(&sx1_machine_v1);
246}
247
248machine_init(sx1_machine_init);