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qemu / qemu / 1521735c2a6df9396ae232fe077af9def85eef91 / . / target / s390x / insn-data.def
blob: 2bc77f08710204e8268606a668de357631d0e677 [file] [log] [blame]
Alexander Graf13f67dd2015-05-08 03:06:41 +0200[diff] [blame]1/*
2 * Arguments to the opcode prototypes
3 *
4 * C(OPC, NAME, FMT, FAC, I1, I2, P, W, OP, CC)
5 * D(OPC, NAME, FMT, FAC, I1, I2, P, W, OP, CC, DATA)
David Hildenbrand82d17932018-09-27 15:02:58 +0200[diff] [blame]6 * E(OPC, NAME, FMT, FAC, I1, I2, P, W, OP, CC, DATA, FLAGS)
7 * F(OPC, NAME, FMT, FAC, I1, I2, P, W, OP, CC, FLAGS)
Alexander Graf13f67dd2015-05-08 03:06:41 +0200[diff] [blame]8 *
9 * OPC = (op << 8) | op2 where op is the major, op2 the minor opcode
10 * NAME = name of the opcode, used internally
11 * FMT = format of the opcode (defined in insn-format.def)
12 * FAC = facility the opcode is available in (defined in DisasFacility)
13 * I1 = func in1_xx fills o->in1
14 * I2 = func in2_xx fills o->in2
15 * P = func prep_xx initializes o->*out*
16 * W = func wout_xx writes o->*out* somewhere
17 * OP = func op_xx does the bulk of the operation
18 * CC = func cout_xx defines how cc should get set
19 * DATA = immediate argument to op_xx function
David Hildenbrand82d17932018-09-27 15:02:58 +0200[diff] [blame]20 * FLAGS = categorize the type of instruction (e.g. for advanced checks)
Alexander Graf13f67dd2015-05-08 03:06:41 +0200[diff] [blame]21 *
22 * The helpers get called in order: I1, I2, P, OP, W, CC
23 */
24
Richard Hendersonad044d02012-08-15 17:16:22 -0700[diff] [blame]25/* ADD */
26 C(0x1a00, AR, RR_a, Z, r1, r2, new, r1_32, add, adds32)
27 C(0xb9f8, ARK, RRF_a, DO, r2, r3, new, r1_32, add, adds32)
28 C(0x5a00, A, RX_a, Z, r1, m2_32s, new, r1_32, add, adds32)
29 C(0xe35a, AY, RXY_a, LD, r1, m2_32s, new, r1_32, add, adds32)
30 C(0xb908, AGR, RRE, Z, r1, r2, r1, 0, add, adds64)
31 C(0xb918, AGFR, RRE, Z, r1, r2_32s, r1, 0, add, adds64)
32 C(0xb9e8, AGRK, RRF_a, DO, r2, r3, r1, 0, add, adds64)
33 C(0xe308, AG, RXY_a, Z, r1, m2_64, r1, 0, add, adds64)
34 C(0xe318, AGF, RXY_a, Z, r1, m2_32s, r1, 0, add, adds64)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]35 F(0xb30a, AEBR, RRE, Z, e1, e2, new, e1, aeb, f32, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]36 F(0xb31a, ADBR, RRE, Z, f1, f2, new, f1, adb, f64, IF_BFP)
37 F(0xb34a, AXBR, RRE, Z, x2h, x2l, x1, x1, axb, f128, IF_BFP)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]38 F(0xed0a, AEB, RXE, Z, e1, m2_32u, new, e1, aeb, f32, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]39 F(0xed1a, ADB, RXE, Z, f1, m2_64, new, f1, adb, f64, IF_BFP)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]40/* ADD HIGH */
41 C(0xb9c8, AHHHR, RRF_a, HW, r2_sr32, r3_sr32, new, r1_32h, add, adds32)
42 C(0xb9d8, AHHLR, RRF_a, HW, r2_sr32, r3, new, r1_32h, add, adds32)
Richard Hendersonad044d02012-08-15 17:16:22 -0700[diff] [blame]43/* ADD IMMEDIATE */
44 C(0xc209, AFI, RIL_a, EI, r1, i2, new, r1_32, add, adds32)
David Hildenbrand0e9383b2017-12-08 17:01:59 +0100[diff] [blame]45 D(0xeb6a, ASI, SIY, GIE, la1, i2, new, 0, asi, adds32, MO_TESL)
Richard Hendersonad044d02012-08-15 17:16:22 -0700[diff] [blame]46 C(0xecd8, AHIK, RIE_d, DO, r3, i2, new, r1_32, add, adds32)
47 C(0xc208, AGFI, RIL_a, EI, r1, i2, r1, 0, add, adds64)
David Hildenbrand0e9383b2017-12-08 17:01:59 +0100[diff] [blame]48 D(0xeb7a, AGSI, SIY, GIE, la1, i2, new, 0, asi, adds64, MO_TEQ)
Richard Hendersonad044d02012-08-15 17:16:22 -0700[diff] [blame]49 C(0xecd9, AGHIK, RIE_d, DO, r3, i2, r1, 0, add, adds64)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]50/* ADD IMMEDIATE HIGH */
51 C(0xcc08, AIH, RIL_a, HW, r1_sr32, i2, new, r1_32h, add, adds32)
Richard Hendersond82287d2012-08-16 14:09:45 -0700[diff] [blame]52/* ADD HALFWORD */
53 C(0x4a00, AH, RX_a, Z, r1, m2_16s, new, r1_32, add, adds32)
54 C(0xe37a, AHY, RXY_a, LD, r1, m2_16s, new, r1_32, add, adds32)
55/* ADD HALFWORD IMMEDIATE */
56 C(0xa70a, AHI, RI_a, Z, r1, i2, new, r1_32, add, adds32)
57 C(0xa70b, AGHI, RI_a, Z, r1, i2, r1, 0, add, adds64)
58
Richard Hendersonad044d02012-08-15 17:16:22 -0700[diff] [blame]59/* ADD LOGICAL */
60 C(0x1e00, ALR, RR_a, Z, r1, r2, new, r1_32, add, addu32)
61 C(0xb9fa, ALRK, RRF_a, DO, r2, r3, new, r1_32, add, addu32)
62 C(0x5e00, AL, RX_a, Z, r1, m2_32u, new, r1_32, add, addu32)
63 C(0xe35e, ALY, RXY_a, LD, r1, m2_32u, new, r1_32, add, addu32)
64 C(0xb90a, ALGR, RRE, Z, r1, r2, r1, 0, add, addu64)
65 C(0xb91a, ALGFR, RRE, Z, r1, r2_32u, r1, 0, add, addu64)
66 C(0xb9ea, ALGRK, RRF_a, DO, r2, r3, r1, 0, add, addu64)
67 C(0xe30a, ALG, RXY_a, Z, r1, m2_64, r1, 0, add, addu64)
68 C(0xe31a, ALGF, RXY_a, Z, r1, m2_32u, r1, 0, add, addu64)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]69/* ADD LOGICAL HIGH */
70 C(0xb9ca, ALHHHR, RRF_a, HW, r2_sr32, r3_sr32, new, r1_32h, add, addu32)
71 C(0xb9da, ALHHLR, RRF_a, HW, r2_sr32, r3, new, r1_32h, add, addu32)
Richard Hendersonad044d02012-08-15 17:16:22 -0700[diff] [blame]72/* ADD LOGICAL IMMEDIATE */
73 C(0xc20b, ALFI, RIL_a, EI, r1, i2_32u, new, r1_32, add, addu32)
74 C(0xc20a, ALGFI, RIL_a, EI, r1, i2_32u, r1, 0, add, addu64)
Richard Hendersone272b3a2012-08-16 14:42:49 -0700[diff] [blame]75/* ADD LOGICAL WITH SIGNED IMMEDIATE */
David Hildenbrand0e9383b2017-12-08 17:01:59 +0100[diff] [blame]76 D(0xeb6e, ALSI, SIY, GIE, la1, i2, new, 0, asi, addu32, MO_TEUL)
Richard Hendersone272b3a2012-08-16 14:42:49 -0700[diff] [blame]77 C(0xecda, ALHSIK, RIE_d, DO, r3, i2, new, r1_32, add, addu32)
David Hildenbrand0e9383b2017-12-08 17:01:59 +0100[diff] [blame]78 D(0xeb7e, ALGSI, SIY, GIE, la1, i2, new, 0, asi, addu64, MO_TEQ)
Richard Hendersone272b3a2012-08-16 14:42:49 -0700[diff] [blame]79 C(0xecdb, ALGHSIK, RIE_d, DO, r3, i2, r1, 0, add, addu64)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]80/* ADD LOGICAL WITH SIGNED IMMEDIATE HIGH */
81 C(0xcc0a, ALSIH, RIL_a, HW, r1_sr32, i2, new, r1_32h, add, addu32)
82 C(0xcc0b, ALSIHN, RIL_a, HW, r1_sr32, i2, new, r1_32h, add, 0)
Richard Henderson4e4bb432012-08-17 18:52:33 -0700[diff] [blame]83/* ADD LOGICAL WITH CARRY */
84 C(0xb998, ALCR, RRE, Z, r1, r2, new, r1_32, addc, addc32)
85 C(0xb988, ALCGR, RRE, Z, r1, r2, r1, 0, addc, addc64)
86 C(0xe398, ALC, RXY_a, Z, r1, m2_32u, new, r1_32, addc, addc32)
87 C(0xe388, ALCG, RXY_a, Z, r1, m2_64, r1, 0, addc, addc64)
Richard Hendersonad044d02012-08-15 17:16:22 -0700[diff] [blame]88
Richard Henderson3bbfbd12012-09-01 16:28:39 -0700[diff] [blame]89/* AND */
90 C(0x1400, NR, RR_a, Z, r1, r2, new, r1_32, and, nz32)
91 C(0xb9f4, NRK, RRF_a, DO, r2, r3, new, r1_32, and, nz32)
92 C(0x5400, N, RX_a, Z, r1, m2_32s, new, r1_32, and, nz32)
93 C(0xe354, NY, RXY_a, LD, r1, m2_32s, new, r1_32, and, nz32)
94 C(0xb980, NGR, RRE, Z, r1, r2, r1, 0, and, nz64)
95 C(0xb9e4, NGRK, RRF_a, DO, r2, r3, r1, 0, and, nz64)
96 C(0xe380, NG, RXY_a, Z, r1, m2_64, r1, 0, and, nz64)
Richard Henderson0a949032012-08-22 11:54:19 -0700[diff] [blame]97 C(0xd400, NC, SS_a, Z, la1, a2, 0, 0, nc, 0)
Richard Hendersonfacfc862012-08-17 15:01:36 -0700[diff] [blame]98/* AND IMMEDIATE */
99 D(0xc00a, NIHF, RIL_a, EI, r1_o, i2_32u, r1, 0, andi, 0, 0x2020)
100 D(0xc00b, NILF, RIL_a, EI, r1_o, i2_32u, r1, 0, andi, 0, 0x2000)
101 D(0xa504, NIHH, RI_a, Z, r1_o, i2_16u, r1, 0, andi, 0, 0x1030)
102 D(0xa505, NIHL, RI_a, Z, r1_o, i2_16u, r1, 0, andi, 0, 0x1020)
103 D(0xa506, NILH, RI_a, Z, r1_o, i2_16u, r1, 0, andi, 0, 0x1010)
104 D(0xa507, NILL, RI_a, Z, r1_o, i2_16u, r1, 0, andi, 0, 0x1000)
David Hildenbrandf400be12017-12-08 17:02:00 +0100[diff] [blame]105 D(0x9400, NI, SI, Z, la1, i2_8u, new, 0, ni, nz64, MO_UB)
106 D(0xeb54, NIY, SIY, LD, la1, i2_8u, new, 0, ni, nz64, MO_UB)
Richard Henderson3bbfbd12012-09-01 16:28:39 -0700[diff] [blame]107
Pavel Zbitskiye1db2912018-08-20 22:50:59 -0400[diff] [blame]108/* BRANCH AND LINK */
109 C(0x0500, BALR, RR_a, Z, 0, r2_nz, r1, 0, bal, 0)
110 C(0x4500, BAL, RX_a, Z, 0, a2, r1, 0, bal, 0)
Richard Henderson8ac33cd2012-08-18 11:38:19 -0700[diff] [blame]111/* BRANCH AND SAVE */
112 C(0x0d00, BASR, RR_a, Z, 0, r2_nz, r1, 0, bas, 0)
113 C(0x4d00, BAS, RX_a, Z, 0, a2, r1, 0, bas, 0)
114/* BRANCH RELATIVE AND SAVE */
115 C(0xa705, BRAS, RI_b, Z, 0, 0, r1, 0, basi, 0)
116 C(0xc005, BRASL, RIL_b, Z, 0, 0, r1, 0, basi, 0)
Richard Henderson7233f2e2012-08-20 08:28:02 -0700[diff] [blame]117/* BRANCH ON CONDITION */
118 C(0x0700, BCR, RR_b, Z, 0, r2_nz, 0, 0, bc, 0)
119 C(0x4700, BC, RX_b, Z, 0, a2, 0, 0, bc, 0)
120/* BRANCH RELATIVE ON CONDITION */
121 C(0xa704, BRC, RI_c, Z, 0, 0, 0, 0, bc, 0)
122 C(0xc004, BRCL, RIL_c, Z, 0, 0, 0, 0, bc, 0)
Richard Hendersonc61aad62012-08-20 14:22:58 -0700[diff] [blame]123/* BRANCH ON COUNT */
124 C(0x0600, BCTR, RR_a, Z, 0, r2_nz, 0, 0, bct32, 0)
125 C(0xb946, BCTGR, RRE, Z, 0, r2_nz, 0, 0, bct64, 0)
126 C(0x4600, BCT, RX_a, Z, 0, a2, 0, 0, bct32, 0)
127 C(0xe346, BCTG, RXY_a, Z, 0, a2, 0, 0, bct64, 0)
128/* BRANCH RELATIVE ON COUNT */
129 C(0xa706, BRCT, RI_b, Z, 0, 0, 0, 0, bct32, 0)
130 C(0xa707, BRCTG, RI_b, Z, 0, 0, 0, 0, bct64, 0)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]131/* BRANCH RELATIVE ON COUNT HIGH */
132 C(0xcc06, BRCTH, RIL_b, HW, 0, 0, 0, 0, bcth, 0)
Richard Henderson2cf5e352012-08-29 12:57:55 -0700[diff] [blame]133/* BRANCH ON INDEX */
134 D(0x8600, BXH, RS_a, Z, 0, a2, 0, 0, bx32, 0, 0)
135 D(0x8700, BXLE, RS_a, Z, 0, a2, 0, 0, bx32, 0, 1)
136 D(0xeb44, BXHG, RSY_a, Z, 0, a2, 0, 0, bx64, 0, 0)
137 D(0xeb45, BXLEG, RSY_a, Z, 0, a2, 0, 0, bx64, 0, 1)
138/* BRANCH RELATIVE ON INDEX */
139 D(0x8400, BRXH, RSI, Z, 0, 0, 0, 0, bx32, 0, 0)
140 D(0x8500, BRXLE, RSI, Z, 0, 0, 0, 0, bx32, 0, 1)
141 D(0xec44, BRXHG, RIE_e, Z, 0, 0, 0, 0, bx64, 0, 0)
142 D(0xec45, BRXHLE, RIE_e, Z, 0, 0, 0, 0, bx64, 0, 1)
Richard Henderson6a68acd2017-06-16 17:05:50 -0700[diff] [blame]143/* BRANCH PREDICTION PRELOAD */
144 /* ??? Format is SMI, but implemented as NOP, so we need no fields. */
145 C(0xc700, BPP, E, EH, 0, 0, 0, 0, 0, 0)
146/* BRANCH PREDICTION RELATIVE PRELOAD */
147 /* ??? Format is MII, but implemented as NOP, so we need no fields. */
148 C(0xc500, BPRP, E, EH, 0, 0, 0, 0, 0, 0)
149/* NEXT INSTRUCTION ACCESS INTENT */
150 /* ??? Format is IE, but implemented as NOP, so we need no fields. */
151 C(0xb2fa, NIAI, E, EH, 0, 0, 0, 0, 0, 0)
Richard Henderson8ac33cd2012-08-18 11:38:19 -0700[diff] [blame]152
Richard Henderson374724f2012-08-24 11:38:12 -0700[diff] [blame]153/* CHECKSUM */
154 C(0xb241, CKSM, RRE, Z, r1_o, ra2, new, r1_32, cksm, 0)
155
Richard Henderson2db014b2012-09-01 14:13:52 -0700[diff] [blame]156/* COPY SIGN */
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]157 F(0xb372, CPSDR, RRF_b, FPSSH, f3, f2, new, f1, cps, 0, IF_AFP1 | IF_AFP2 | IF_AFP3)
Richard Henderson2db014b2012-09-01 14:13:52 -0700[diff] [blame]158
Richard Hendersona7e836d2012-08-16 15:20:51 -0700[diff] [blame]159/* COMPARE */
160 C(0x1900, CR, RR_a, Z, r1_o, r2_o, 0, 0, 0, cmps32)
161 C(0x5900, C, RX_a, Z, r1_o, m2_32s, 0, 0, 0, cmps32)
162 C(0xe359, CY, RXY_a, LD, r1_o, m2_32s, 0, 0, 0, cmps32)
163 C(0xb920, CGR, RRE, Z, r1_o, r2_o, 0, 0, 0, cmps64)
164 C(0xb930, CGFR, RRE, Z, r1_o, r2_32s, 0, 0, 0, cmps64)
165 C(0xe320, CG, RXY_a, Z, r1_o, m2_64, 0, 0, 0, cmps64)
166 C(0xe330, CGF, RXY_a, Z, r1_o, m2_32s, 0, 0, 0, cmps64)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]167 F(0xb309, CEBR, RRE, Z, e1, e2, 0, 0, ceb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]168 F(0xb319, CDBR, RRE, Z, f1, f2, 0, 0, cdb, 0, IF_BFP)
169 F(0xb349, CXBR, RRE, Z, x2h, x2l, x1, 0, cxb, 0, IF_BFP)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]170 F(0xed09, CEB, RXE, Z, e1, m2_32u, 0, 0, ceb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]171 F(0xed19, CDB, RXE, Z, f1, m2_64, 0, 0, cdb, 0, IF_BFP)
Aurelien Jarno9c8be592017-06-01 00:01:08 +0200[diff] [blame]172/* COMPARE AND SIGNAL */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]173 F(0xb308, KEBR, RRE, Z, e1, e2, 0, 0, keb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]174 F(0xb318, KDBR, RRE, Z, f1, f2, 0, 0, kdb, 0, IF_BFP)
175 F(0xb348, KXBR, RRE, Z, x2h, x2l, x1, 0, kxb, 0, IF_BFP)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]176 F(0xed08, KEB, RXE, Z, e1, m2_32u, 0, 0, keb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]177 F(0xed18, KDB, RXE, Z, f1, m2_64, 0, 0, kdb, 0, IF_BFP)
Richard Hendersona7e836d2012-08-16 15:20:51 -0700[diff] [blame]178/* COMPARE IMMEDIATE */
179 C(0xc20d, CFI, RIL_a, EI, r1, i2, 0, 0, 0, cmps32)
180 C(0xc20c, CGFI, RIL_a, EI, r1, i2, 0, 0, 0, cmps64)
Richard Henderson403e2172012-09-05 10:54:00 -0700[diff] [blame]181/* COMPARE RELATIVE LONG */
182 C(0xc60d, CRL, RIL_b, GIE, r1, mri2_32s, 0, 0, 0, cmps32)
183 C(0xc608, CGRL, RIL_b, GIE, r1, mri2_64, 0, 0, 0, cmps64)
184 C(0xc60c, CGFRL, RIL_b, GIE, r1, mri2_32s, 0, 0, 0, cmps64)
Richard Hendersona7e836d2012-08-16 15:20:51 -0700[diff] [blame]185/* COMPARE HALFWORD */
186 C(0x4900, CH, RX_a, Z, r1_o, m2_16s, 0, 0, 0, cmps32)
187 C(0xe379, CHY, RXY_a, LD, r1_o, m2_16s, 0, 0, 0, cmps32)
188 C(0xe334, CGH, RXY_a, GIE, r1_o, m2_16s, 0, 0, 0, cmps64)
189/* COMPARE HALFWORD IMMEDIATE */
190 C(0xa70e, CHI, RI_a, Z, r1_o, i2, 0, 0, 0, cmps32)
191 C(0xa70f, CGHI, RI_a, Z, r1_o, i2, 0, 0, 0, cmps64)
192 C(0xe554, CHHSI, SIL, GIE, m1_16s, i2, 0, 0, 0, cmps64)
193 C(0xe55c, CHSI, SIL, GIE, m1_32s, i2, 0, 0, 0, cmps64)
194 C(0xe558, CGHSI, SIL, GIE, m1_64, i2, 0, 0, 0, cmps64)
195/* COMPARE HALFWORD RELATIVE LONG */
Aurelien Jarno74266b42015-06-03 23:09:43 +0200[diff] [blame]196 C(0xc605, CHRL, RIL_b, GIE, r1_o, mri2_32s, 0, 0, 0, cmps32)
197 C(0xc604, CGHRL, RIL_b, GIE, r1_o, mri2_64, 0, 0, 0, cmps64)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]198/* COMPARE HIGH */
199 C(0xb9cd, CHHR, RRE, HW, r1_sr32, r2_sr32, 0, 0, 0, cmps32)
200 C(0xb9dd, CHLR, RRE, HW, r1_sr32, r2_o, 0, 0, 0, cmps32)
201 C(0xe3cd, CHF, RXY_a, HW, r1_sr32, m2_32s, 0, 0, 0, cmps32)
202/* COMPARE IMMEDIATE HIGH */
203 C(0xcc0d, CIH, RIL_a, HW, r1_sr32, i2, 0, 0, 0, cmps32)
Richard Hendersona7e836d2012-08-16 15:20:51 -0700[diff] [blame]204
205/* COMPARE LOGICAL */
206 C(0x1500, CLR, RR_a, Z, r1, r2, 0, 0, 0, cmpu32)
207 C(0x5500, CL, RX_a, Z, r1, m2_32s, 0, 0, 0, cmpu32)
208 C(0xe355, CLY, RXY_a, LD, r1, m2_32s, 0, 0, 0, cmpu32)
209 C(0xb921, CLGR, RRE, Z, r1, r2, 0, 0, 0, cmpu64)
210 C(0xb931, CLGFR, RRE, Z, r1, r2_32u, 0, 0, 0, cmpu64)
211 C(0xe321, CLG, RXY_a, Z, r1, m2_64, 0, 0, 0, cmpu64)
212 C(0xe331, CLGF, RXY_a, Z, r1, m2_32u, 0, 0, 0, cmpu64)
Richard Henderson4f7403d2012-08-22 12:54:07 -0700[diff] [blame]213 C(0xd500, CLC, SS_a, Z, la1, a2, 0, 0, clc, 0)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]214/* COMPARE LOGICAL HIGH */
215 C(0xb9cf, CLHHR, RRE, HW, r1_sr32, r2_sr32, 0, 0, 0, cmpu32)
216 C(0xb9df, CLHLR, RRE, HW, r1_sr32, r2_o, 0, 0, 0, cmpu32)
217 C(0xe3cf, CLHF, RXY_a, HW, r1_sr32, m2_32s, 0, 0, 0, cmpu32)
Richard Hendersona7e836d2012-08-16 15:20:51 -0700[diff] [blame]218/* COMPARE LOGICAL IMMEDIATE */
219 C(0xc20f, CLFI, RIL_a, EI, r1, i2, 0, 0, 0, cmpu32)
220 C(0xc20e, CLGFI, RIL_a, EI, r1, i2_32u, 0, 0, 0, cmpu64)
221 C(0x9500, CLI, SI, Z, m1_8u, i2_8u, 0, 0, 0, cmpu64)
222 C(0xeb55, CLIY, SIY, LD, m1_8u, i2_8u, 0, 0, 0, cmpu64)
223 C(0xe555, CLHHSI, SIL, GIE, m1_16u, i2_16u, 0, 0, 0, cmpu64)
224 C(0xe55d, CLFHSI, SIL, GIE, m1_32u, i2_16u, 0, 0, 0, cmpu64)
225 C(0xe559, CLGHSI, SIL, GIE, m1_64, i2_16u, 0, 0, 0, cmpu64)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]226/* COMPARE LOGICAL IMMEDIATE HIGH */
227 C(0xcc0f, CLIH, RIL_a, HW, r1_sr32, i2, 0, 0, 0, cmpu32)
Richard Hendersona7e836d2012-08-16 15:20:51 -0700[diff] [blame]228/* COMPARE LOGICAL RELATIVE LONG */
229 C(0xc60f, CLRL, RIL_b, GIE, r1_o, mri2_32u, 0, 0, 0, cmpu32)
230 C(0xc60a, CLGRL, RIL_b, GIE, r1_o, mri2_64, 0, 0, 0, cmpu64)
231 C(0xc60e, CLGFRL, RIL_b, GIE, r1_o, mri2_32u, 0, 0, 0, cmpu64)
232 C(0xc607, CLHRL, RIL_b, GIE, r1_o, mri2_16u, 0, 0, 0, cmpu32)
233 C(0xc606, CLGHRL, RIL_b, GIE, r1_o, mri2_16u, 0, 0, 0, cmpu64)
Aurelien Jarno5c2b48a2017-06-01 00:01:17 +0200[diff] [blame]234/* COMPARE LOGICAL LONG */
235 C(0x0f00, CLCL, RR_a, Z, 0, 0, 0, 0, clcl, 0)
Richard Hendersoneb66e6a2012-08-22 11:24:25 -0700[diff] [blame]236/* COMPARE LOGICAL LONG EXTENDED */
237 C(0xa900, CLCLE, RS_a, Z, 0, a2, 0, 0, clcle, 0)
Aurelien Jarno31006af2017-06-01 00:01:20 +0200[diff] [blame]238/* COMPARE LOGICAL LONG UNICODE */
239 C(0xeb8f, CLCLU, RSY_a, E2, 0, a2, 0, 0, clclu, 0)
Richard Henderson32a44d52012-08-22 14:59:22 -0700[diff] [blame]240/* COMPARE LOGICAL CHARACTERS UNDER MASK */
241 C(0xbd00, CLM, RS_b, Z, r1_o, a2, 0, 0, clm, 0)
242 C(0xeb21, CLMY, RSY_b, LD, r1_o, a2, 0, 0, clm, 0)
243 C(0xeb20, CLMH, RSY_b, Z, r1_sr32, a2, 0, 0, clm, 0)
Richard Hendersonaa31bf62012-09-05 10:20:53 -0700[diff] [blame]244/* COMPARE LOGICAL STRING */
245 C(0xb25d, CLST, RRE, Z, r1_o, r2_o, 0, 0, clst, 0)
Richard Hendersona7e836d2012-08-16 15:20:51 -0700[diff] [blame]246
Richard Henderson55503592012-08-31 10:53:49 -0700[diff] [blame]247/* COMPARE AND BRANCH */
248 D(0xecf6, CRB, RRS, GIE, r1_32s, r2_32s, 0, 0, cj, 0, 0)
249 D(0xece4, CGRB, RRS, GIE, r1_o, r2_o, 0, 0, cj, 0, 0)
250 D(0xec76, CRJ, RIE_b, GIE, r1_32s, r2_32s, 0, 0, cj, 0, 0)
251 D(0xec64, CGRJ, RIE_b, GIE, r1_o, r2_o, 0, 0, cj, 0, 0)
252 D(0xecfe, CIB, RIS, GIE, r1_32s, i2, 0, 0, cj, 0, 0)
253 D(0xecfc, CGIB, RIS, GIE, r1_o, i2, 0, 0, cj, 0, 0)
254 D(0xec7e, CIJ, RIE_c, GIE, r1_32s, i2, 0, 0, cj, 0, 0)
255 D(0xec7c, CGIJ, RIE_c, GIE, r1_o, i2, 0, 0, cj, 0, 0)
256/* COMPARE LOGICAL AND BRANCH */
257 D(0xecf7, CLRB, RRS, GIE, r1_32u, r2_32u, 0, 0, cj, 0, 1)
258 D(0xece5, CLGRB, RRS, GIE, r1_o, r2_o, 0, 0, cj, 0, 1)
259 D(0xec77, CLRJ, RIE_b, GIE, r1_32u, r2_32u, 0, 0, cj, 0, 1)
260 D(0xec65, CLGRJ, RIE_b, GIE, r1_o, r2_o, 0, 0, cj, 0, 1)
261 D(0xecff, CLIB, RIS, GIE, r1_32u, i2_8u, 0, 0, cj, 0, 1)
262 D(0xecfd, CLGIB, RIS, GIE, r1_o, i2_8u, 0, 0, cj, 0, 1)
263 D(0xec7f, CLIJ, RIE_c, GIE, r1_32u, i2_8u, 0, 0, cj, 0, 1)
264 D(0xec7d, CLGIJ, RIE_c, GIE, r1_o, i2_8u, 0, 0, cj, 0, 1)
265
Richard Hendersonf3de39c2012-08-22 14:46:55 -0700[diff] [blame]266/* COMPARE AND SWAP */
Richard Henderson303a9ab2017-03-01 11:39:01 +1100[diff] [blame]267 D(0xba00, CS, RS_a, Z, r3_32u, r1_32u, new, r1_32, cs, 0, MO_TEUL)
268 D(0xeb14, CSY, RSY_a, LD, r3_32u, r1_32u, new, r1_32, cs, 0, MO_TEUL)
269 D(0xeb30, CSG, RSY_a, Z, r3_o, r1_o, new, r1, cs, 0, MO_TEQ)
Richard Hendersonf3de39c2012-08-22 14:46:55 -0700[diff] [blame]270/* COMPARE DOUBLE AND SWAP */
Richard Henderson303a9ab2017-03-01 11:39:01 +1100[diff] [blame]271 D(0xbb00, CDS, RS_a, Z, r3_D32, r1_D32, new, r1_D32, cs, 0, MO_TEQ)
272 D(0xeb31, CDSY, RSY_a, LD, r3_D32, r1_D32, new, r1_D32, cs, 0, MO_TEQ)
Richard Hendersonb7886de2012-09-20 17:09:35 -0700[diff] [blame]273 C(0xeb3e, CDSG, RSY_a, Z, 0, 0, 0, 0, cdsg, 0)
Richard Hendersonc67ba302017-06-15 12:38:10 -0700[diff] [blame]274/* COMPARE AND SWAP AND STORE */
275 C(0xc802, CSST, SSF, CASS, la1, a2, 0, 0, csst, 0)
Richard Hendersonf3de39c2012-08-22 14:46:55 -0700[diff] [blame]276
Richard Henderson1c268752012-09-05 17:32:54 -0700[diff] [blame]277/* COMPARE AND TRAP */
278 D(0xb972, CRT, RRF_c, GIE, r1_32s, r2_32s, 0, 0, ct, 0, 0)
279 D(0xb960, CGRT, RRF_c, GIE, r1_o, r2_o, 0, 0, ct, 0, 0)
280 D(0xec72, CIT, RIE_a, GIE, r1_32s, i2, 0, 0, ct, 0, 0)
281 D(0xec70, CGIT, RIE_a, GIE, r1_o, i2, 0, 0, ct, 0, 0)
282/* COMPARE LOGICAL AND TRAP */
283 D(0xb973, CLRT, RRF_c, GIE, r1_32u, r2_32u, 0, 0, ct, 0, 1)
284 D(0xb961, CLGRT, RRF_c, GIE, r1_o, r2_o, 0, 0, ct, 0, 1)
Aurelien Jarno375ee582015-06-03 23:09:50 +0200[diff] [blame]285 D(0xeb23, CLT, RSY_b, MIE, r1_32u, m2_32u, 0, 0, ct, 0, 1)
286 D(0xeb2b, CLGT, RSY_b, MIE, r1_o, m2_64, 0, 0, ct, 0, 1)
Richard Henderson1c268752012-09-05 17:32:54 -0700[diff] [blame]287 D(0xec73, CLFIT, RIE_a, GIE, r1_32u, i2_32u, 0, 0, ct, 0, 1)
Aurelien Jarno1dedb9b2015-06-03 23:09:42 +0200[diff] [blame]288 D(0xec71, CLGIT, RIE_a, GIE, r1_o, i2_32u, 0, 0, ct, 0, 1)
Richard Henderson1c268752012-09-05 17:32:54 -0700[diff] [blame]289
Richard Hendersonc49daa52012-08-21 14:05:11 -0700[diff] [blame]290/* CONVERT TO DECIMAL */
291 C(0x4e00, CVD, RX_a, Z, r1_o, a2, 0, 0, cvd, 0)
292 C(0xe326, CVDY, RXY_a, LD, r1_o, a2, 0, 0, cvd, 0)
Richard Henderson68c8bd92012-08-23 15:17:35 -0700[diff] [blame]293/* CONVERT TO FIXED */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]294 F(0xb398, CFEBR, RRF_e, Z, 0, e2, new, r1_32, cfeb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]295 F(0xb399, CFDBR, RRF_e, Z, 0, f2, new, r1_32, cfdb, 0, IF_BFP)
296 F(0xb39a, CFXBR, RRF_e, Z, x2h, x2l, new, r1_32, cfxb, 0, IF_BFP)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]297 F(0xb3a8, CGEBR, RRF_e, Z, 0, e2, r1, 0, cgeb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]298 F(0xb3a9, CGDBR, RRF_e, Z, 0, f2, r1, 0, cgdb, 0, IF_BFP)
299 F(0xb3aa, CGXBR, RRF_e, Z, x2h, x2l, r1, 0, cgxb, 0, IF_BFP)
Richard Henderson683bb9a2012-08-23 21:08:22 -0700[diff] [blame]300/* CONVERT FROM FIXED */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]301 F(0xb394, CEFBR, RRF_e, Z, 0, r2_32s, new, e1, cegb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]302 F(0xb395, CDFBR, RRF_e, Z, 0, r2_32s, new, f1, cdgb, 0, IF_BFP)
303 F(0xb396, CXFBR, RRF_e, Z, 0, r2_32s, new_P, x1, cxgb, 0, IF_BFP)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]304 F(0xb3a4, CEGBR, RRF_e, Z, 0, r2_o, new, e1, cegb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]305 F(0xb3a5, CDGBR, RRF_e, Z, 0, r2_o, new, f1, cdgb, 0, IF_BFP)
306 F(0xb3a6, CXGBR, RRF_e, Z, 0, r2_o, new_P, x1, cxgb, 0, IF_BFP)
Richard Henderson6ac1b452012-09-01 10:42:54 -0700[diff] [blame]307/* CONVERT TO LOGICAL */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]308 F(0xb39c, CLFEBR, RRF_e, FPE, 0, e2, new, r1_32, clfeb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]309 F(0xb39d, CLFDBR, RRF_e, FPE, 0, f2, new, r1_32, clfdb, 0, IF_BFP)
310 F(0xb39e, CLFXBR, RRF_e, FPE, x2h, x2l, new, r1_32, clfxb, 0, IF_BFP)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]311 F(0xb3ac, CLGEBR, RRF_e, FPE, 0, e2, r1, 0, clgeb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]312 F(0xb3ad, CLGDBR, RRF_e, FPE, 0, f2, r1, 0, clgdb, 0, IF_BFP)
313 F(0xb3ae, CLGXBR, RRF_e, FPE, x2h, x2l, r1, 0, clgxb, 0, IF_BFP)
Richard Henderson2112bf12012-09-01 11:08:17 -0700[diff] [blame]314/* CONVERT FROM LOGICAL */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]315 F(0xb390, CELFBR, RRF_e, FPE, 0, r2_32u, new, e1, celgb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]316 F(0xb391, CDLFBR, RRF_e, FPE, 0, r2_32u, new, f1, cdlgb, 0, IF_BFP)
317 F(0xb392, CXLFBR, RRF_e, FPE, 0, r2_32u, new_P, x1, cxlgb, 0, IF_BFP)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]318 F(0xb3a0, CELGBR, RRF_e, FPE, 0, r2_o, new, e1, celgb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]319 F(0xb3a1, CDLGBR, RRF_e, FPE, 0, r2_o, new, f1, cdlgb, 0, IF_BFP)
320 F(0xb3a2, CXLGBR, RRF_e, FPE, 0, r2_o, new_P, x1, cxlgb, 0, IF_BFP)
Richard Hendersonc49daa52012-08-21 14:05:11 -0700[diff] [blame]321
Richard Henderson941ef3d2017-06-16 19:13:16 -0700[diff] [blame]322/* CONVERT UTF-8 TO UTF-16 */
323 D(0xb2a7, CU12, RRF_c, Z, 0, 0, 0, 0, cuXX, 0, 12)
324/* CONVERT UTF-8 TO UTF-32 */
325 D(0xb9b0, CU14, RRF_c, ETF3, 0, 0, 0, 0, cuXX, 0, 14)
326/* CONVERT UTF-16 to UTF-8 */
327 D(0xb2a6, CU21, RRF_c, Z, 0, 0, 0, 0, cuXX, 0, 21)
328/* CONVERT UTF-16 to UTF-32 */
329 D(0xb9b1, CU24, RRF_c, ETF3, 0, 0, 0, 0, cuXX, 0, 24)
330/* CONVERT UTF-32 to UTF-8 */
331 D(0xb9b2, CU41, RRF_c, ETF3, 0, 0, 0, 0, cuXX, 0, 41)
332/* CONVERT UTF-32 to UTF-16 */
333 D(0xb9b3, CU42, RRF_c, ETF3, 0, 0, 0, 0, cuXX, 0, 42)
334
Richard Henderson891452e2012-08-20 14:02:02 -0700[diff] [blame]335/* DIVIDE */
336 C(0x1d00, DR, RR_a, Z, r1_D32, r2_32s, new_P, r1_P32, divs32, 0)
337 C(0x5d00, D, RX_a, Z, r1_D32, m2_32s, new_P, r1_P32, divs32, 0)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]338 F(0xb30d, DEBR, RRE, Z, e1, e2, new, e1, deb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]339 F(0xb31d, DDBR, RRE, Z, f1, f2, new, f1, ddb, 0, IF_BFP)
340 F(0xb34d, DXBR, RRE, Z, x2h, x2l, x1, x1, dxb, 0, IF_BFP)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]341 F(0xed0d, DEB, RXE, Z, e1, m2_32u, new, e1, deb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]342 F(0xed1d, DDB, RXE, Z, f1, m2_64, new, f1, ddb, 0, IF_BFP)
Richard Henderson891452e2012-08-20 14:02:02 -0700[diff] [blame]343/* DIVIDE LOGICAL */
344 C(0xb997, DLR, RRE, Z, r1_D32, r2_32u, new_P, r1_P32, divu32, 0)
345 C(0xe397, DL, RXY_a, Z, r1_D32, m2_32u, new_P, r1_P32, divu32, 0)
346 C(0xb987, DLGR, RRE, Z, 0, r2_o, r1_P, 0, divu64, 0)
347 C(0xe387, DLG, RXY_a, Z, 0, m2_64, r1_P, 0, divu64, 0)
348/* DIVIDE SINGLE */
349 C(0xb90d, DSGR, RRE, Z, r1p1, r2, r1_P, 0, divs64, 0)
350 C(0xb91d, DSGFR, RRE, Z, r1p1, r2_32s, r1_P, 0, divs64, 0)
351 C(0xe30d, DSG, RXY_a, Z, r1p1, m2_64, r1_P, 0, divs64, 0)
352 C(0xe31d, DSGF, RXY_a, Z, r1p1, m2_32s, r1_P, 0, divs64, 0)
353
Richard Henderson3bbfbd12012-09-01 16:28:39 -0700[diff] [blame]354/* EXCLUSIVE OR */
355 C(0x1700, XR, RR_a, Z, r1, r2, new, r1_32, xor, nz32)
356 C(0xb9f7, XRK, RRF_a, DO, r2, r3, new, r1_32, xor, nz32)
357 C(0x5700, X, RX_a, Z, r1, m2_32s, new, r1_32, xor, nz32)
358 C(0xe357, XY, RXY_a, LD, r1, m2_32s, new, r1_32, xor, nz32)
359 C(0xb982, XGR, RRE, Z, r1, r2, r1, 0, xor, nz64)
360 C(0xb9e7, XGRK, RRF_a, DO, r2, r3, r1, 0, xor, nz64)
361 C(0xe382, XG, RXY_a, Z, r1, m2_64, r1, 0, xor, nz64)
Richard Hendersond074ac62012-09-19 13:48:46 -0700[diff] [blame]362 C(0xd700, XC, SS_a, Z, 0, 0, 0, 0, xc, 0)
Richard Hendersonfacfc862012-08-17 15:01:36 -0700[diff] [blame]363/* EXCLUSIVE OR IMMEDIATE */
364 D(0xc006, XIHF, RIL_a, EI, r1_o, i2_32u, r1, 0, xori, 0, 0x2020)
365 D(0xc007, XILF, RIL_a, EI, r1_o, i2_32u, r1, 0, xori, 0, 0x2000)
David Hildenbrandf400be12017-12-08 17:02:00 +0100[diff] [blame]366 D(0x9700, XI, SI, Z, la1, i2_8u, new, 0, xi, nz64, MO_UB)
367 D(0xeb57, XIY, SIY, LD, la1, i2_8u, new, 0, xi, nz64, MO_UB)
Richard Hendersonfacfc862012-08-17 15:01:36 -0700[diff] [blame]368
Richard Henderson6e764e92012-08-21 13:48:38 -0700[diff] [blame]369/* EXECUTE */
Richard Hendersona72da8b2017-05-24 11:56:15 -0700[diff] [blame]370 C(0x4400, EX, RX_a, Z, 0, a2, 0, 0, ex, 0)
Richard Henderson6e764e92012-08-21 13:48:38 -0700[diff] [blame]371/* EXECUTE RELATIVE LONG */
Richard Hendersona72da8b2017-05-24 11:56:15 -0700[diff] [blame]372 C(0xc600, EXRL, RIL_b, EE, 0, ri2, 0, 0, ex, 0)
Richard Henderson6e764e92012-08-21 13:48:38 -0700[diff] [blame]373
Richard Hendersond62a4c92012-08-24 11:54:04 -0700[diff] [blame]374/* EXTRACT ACCESS */
375 C(0xb24f, EAR, RRE, Z, 0, 0, new, r1_32, ear, 0)
Richard Henderson07747102013-09-20 15:34:34 -0700[diff] [blame]376/* EXTRACT CPU ATTRIBUTE */
377 C(0xeb4c, ECAG, RSY_a, GIE, 0, a2, r1, 0, ecag, 0)
David Hildenbrand4bac52f2017-12-08 17:02:05 +0100[diff] [blame]378/* EXTRACT CPU TIME */
379 C(0xc801, ECTG, SSF, ECT, 0, 0, 0, 0, ectg, 0)
Richard Hendersonea204902012-08-22 14:09:05 -0700[diff] [blame]380/* EXTRACT FPC */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]381 F(0xb38c, EFPC, RRE, Z, 0, 0, new, r1_32, efpc, 0, IF_BFP)
Richard Hendersone30a9d32013-09-06 09:48:08 -0700[diff] [blame]382/* EXTRACT PSW */
383 C(0xb98d, EPSW, RRE, Z, 0, 0, 0, 0, epsw, 0)
Richard Hendersonea204902012-08-22 14:09:05 -0700[diff] [blame]384
Richard Henderson102bf2c2012-08-24 07:39:11 -0700[diff] [blame]385/* FIND LEFTMOST ONE */
386 C(0xb983, FLOGR, RRE, EI, 0, r2_o, r1_P, 0, flogr, 0)
387
Richard Hendersonafdc70b2012-08-21 07:12:29 -0700[diff] [blame]388/* INSERT CHARACTER */
389 C(0x4300, IC, RX_a, Z, 0, m2_8u, 0, r1_8, mov2, 0)
390 C(0xe373, ICY, RXY_a, LD, 0, m2_8u, 0, r1_8, mov2, 0)
Richard Henderson58a9e352012-08-21 13:13:09 -0700[diff] [blame]391/* INSERT CHARACTERS UNDER MASK */
392 D(0xbf00, ICM, RS_b, Z, 0, a2, r1, 0, icm, 0, 0)
393 D(0xeb81, ICMY, RSY_b, LD, 0, a2, r1, 0, icm, 0, 0)
394 D(0xeb80, ICMH, RSY_b, Z, 0, a2, r1, 0, icm, 0, 32)
Richard Hendersonfacfc862012-08-17 15:01:36 -0700[diff] [blame]395/* INSERT IMMEDIATE */
396 D(0xc008, IIHF, RIL_a, EI, r1_o, i2_32u, r1, 0, insi, 0, 0x2020)
397 D(0xc009, IILF, RIL_a, EI, r1_o, i2_32u, r1, 0, insi, 0, 0x2000)
398 D(0xa500, IIHH, RI_a, Z, r1_o, i2_16u, r1, 0, insi, 0, 0x1030)
399 D(0xa501, IIHL, RI_a, Z, r1_o, i2_16u, r1, 0, insi, 0, 0x1020)
400 D(0xa502, IILH, RI_a, Z, r1_o, i2_16u, r1, 0, insi, 0, 0x1010)
401 D(0xa503, IILL, RI_a, Z, r1_o, i2_16u, r1, 0, insi, 0, 0x1000)
Richard Henderson6e2704e2012-09-05 10:18:21 -0700[diff] [blame]402/* INSERT PROGRAM MASK */
403 C(0xb222, IPM, RRE, Z, 0, 0, r1, 0, ipm, 0)
Richard Henderson3bbfbd12012-09-01 16:28:39 -0700[diff] [blame]404
Richard Henderson22c37a02012-08-17 09:45:53 -0700[diff] [blame]405/* LOAD */
406 C(0x1800, LR, RR_a, Z, 0, r2_o, 0, cond_r1r2_32, mov2, 0)
407 C(0x5800, L, RX_a, Z, 0, a2, new, r1_32, ld32s, 0)
Aurelien Jarno92892332015-05-25 01:47:30 +0200[diff] [blame]408 C(0xe358, LY, RXY_a, LD, 0, a2, new, r1_32, ld32s, 0)
Richard Henderson22c37a02012-08-17 09:45:53 -0700[diff] [blame]409 C(0xb904, LGR, RRE, Z, 0, r2_o, 0, r1, mov2, 0)
410 C(0xb914, LGFR, RRE, Z, 0, r2_32s, 0, r1, mov2, 0)
411 C(0xe304, LG, RXY_a, Z, 0, a2, r1, 0, ld64, 0)
412 C(0xe314, LGF, RXY_a, Z, 0, a2, r1, 0, ld32s, 0)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]413 F(0x2800, LDR, RR_a, Z, 0, f2, 0, f1, mov2, 0, IF_AFP1 | IF_AFP2)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]414 F(0x6800, LD, RX_a, Z, 0, m2_64, 0, f1, mov2, 0, IF_AFP1)
415 F(0xed65, LDY, RXY_a, LD, 0, m2_64, 0, f1, mov2, 0, IF_AFP1)
416 F(0x3800, LER, RR_a, Z, 0, e2, 0, cond_e1e2, mov2, 0, IF_AFP1 | IF_AFP2)
417 F(0x7800, LE, RX_a, Z, 0, m2_32u, 0, e1, mov2, 0, IF_AFP1)
418 F(0xed64, LEY, RXY_a, LD, 0, m2_32u, 0, e1, mov2, 0, IF_AFP1)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]419 F(0xb365, LXR, RRE, Z, x2h, x2l, 0, x1, movx, 0, IF_AFP1)
Richard Henderson22c37a02012-08-17 09:45:53 -0700[diff] [blame]420/* LOAD IMMEDIATE */
421 C(0xc001, LGFI, RIL_a, EI, 0, i2, 0, r1, mov2, 0)
422/* LOAD RELATIVE LONG */
423 C(0xc40d, LRL, RIL_b, GIE, 0, ri2, new, r1_32, ld32s, 0)
424 C(0xc408, LGRL, RIL_b, GIE, 0, ri2, r1, 0, ld64, 0)
425 C(0xc40c, LGFRL, RIL_b, GIE, 0, ri2, r1, 0, ld32s, 0)
Richard Hendersonaedec192012-08-17 09:57:07 -0700[diff] [blame]426/* LOAD ADDRESS */
427 C(0x4100, LA, RX_a, Z, 0, a2, 0, r1, mov2, 0)
428 C(0xe371, LAY, RXY_a, LD, 0, a2, 0, r1, mov2, 0)
Aurelien Jarnoa1c76102015-05-25 01:47:31 +0200[diff] [blame]429/* LOAD ADDRESS EXTENDED */
430 C(0x5100, LAE, RX_a, Z, 0, a2, 0, r1, mov2e, 0)
431 C(0xe375, LAEY, RXY_a, GIE, 0, a2, 0, r1, mov2e, 0)
Richard Hendersonaedec192012-08-17 09:57:07 -0700[diff] [blame]432/* LOAD ADDRESS RELATIVE LONG */
433 C(0xc000, LARL, RIL_b, Z, 0, ri2, 0, r1, mov2, 0)
Alexander Graf57af7282015-05-08 03:07:53 +0200[diff] [blame]434/* LOAD AND ADD */
Richard Henderson4dba4d62017-03-02 12:28:54 +1100[diff] [blame]435 D(0xebf8, LAA, RSY_a, ILA, r3_32s, a2, new, in2_r1_32, laa, adds32, MO_TESL)
436 D(0xebe8, LAAG, RSY_a, ILA, r3, a2, new, in2_r1, laa, adds64, MO_TEQ)
Alexander Graf57af7282015-05-08 03:07:53 +0200[diff] [blame]437/* LOAD AND ADD LOGICAL */
Richard Henderson4dba4d62017-03-02 12:28:54 +1100[diff] [blame]438 D(0xebfa, LAAL, RSY_a, ILA, r3_32u, a2, new, in2_r1_32, laa, addu32, MO_TEUL)
439 D(0xebea, LAALG, RSY_a, ILA, r3, a2, new, in2_r1, laa, addu64, MO_TEQ)
Alexander Graf57af7282015-05-08 03:07:53 +0200[diff] [blame]440/* LOAD AND AND */
Richard Henderson4dba4d62017-03-02 12:28:54 +1100[diff] [blame]441 D(0xebf4, LAN, RSY_a, ILA, r3_32s, a2, new, in2_r1_32, lan, nz32, MO_TESL)
442 D(0xebe4, LANG, RSY_a, ILA, r3, a2, new, in2_r1, lan, nz64, MO_TEQ)
Alexander Graf57af7282015-05-08 03:07:53 +0200[diff] [blame]443/* LOAD AND EXCLUSIVE OR */
Richard Henderson4dba4d62017-03-02 12:28:54 +1100[diff] [blame]444 D(0xebf7, LAX, RSY_a, ILA, r3_32s, a2, new, in2_r1_32, lax, nz32, MO_TESL)
445 D(0xebe7, LAXG, RSY_a, ILA, r3, a2, new, in2_r1, lax, nz64, MO_TEQ)
Alexander Graf57af7282015-05-08 03:07:53 +0200[diff] [blame]446/* LOAD AND OR */
Richard Henderson4dba4d62017-03-02 12:28:54 +1100[diff] [blame]447 D(0xebf6, LAO, RSY_a, ILA, r3_32s, a2, new, in2_r1_32, lao, nz32, MO_TESL)
448 D(0xebe6, LAOG, RSY_a, ILA, r3, a2, new, in2_r1, lao, nz64, MO_TEQ)
Richard Henderson11bf2d72012-08-17 11:03:39 -0700[diff] [blame]449/* LOAD AND TEST */
450 C(0x1200, LTR, RR_a, Z, 0, r2_o, 0, cond_r1r2_32, mov2, s32)
451 C(0xb902, LTGR, RRE, Z, 0, r2_o, 0, r1, mov2, s64)
452 C(0xb912, LTGFR, RRE, Z, 0, r2_32s, 0, r1, mov2, s64)
453 C(0xe312, LT, RXY_a, EI, 0, a2, new, r1_32, ld32s, s64)
454 C(0xe302, LTG, RXY_a, EI, 0, a2, r1, 0, ld64, s64)
455 C(0xe332, LTGF, RXY_a, GIE, 0, a2, r1, 0, ld32s, s64)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]456 F(0xb302, LTEBR, RRE, Z, 0, e2, 0, cond_e1e2, mov2, f32, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]457 F(0xb312, LTDBR, RRE, Z, 0, f2, 0, f1, mov2, f64, IF_BFP)
458 F(0xb342, LTXBR, RRE, Z, x2h, x2l, 0, x1, movx, f128, IF_BFP)
Aurelien Jarno782a8472015-06-03 23:09:51 +0200[diff] [blame]459/* LOAD AND TRAP */
460 C(0xe39f, LAT, RXY_a, LAT, 0, m2_32u, r1, 0, lat, 0)
461 C(0xe385, LGAT, RXY_a, LAT, 0, a2, r1, 0, lgat, 0)
Richard Hendersonc2a5c1d2017-06-16 16:47:51 -0700[diff] [blame]462/* LOAD AND ZERO RIGHTMOST BYTE */
463 C(0xe3eb, LZRF, RXY_a, LZRB, 0, m2_32u, new, r1_32, lzrb, 0)
464 C(0xe32a, LZRG, RXY_a, LZRB, 0, m2_64, r1, 0, lzrb, 0)
465/* LOAD LOGICAL AND ZERO RIGHTMOST BYTE */
466 C(0xe33a, LLZRGF, RXY_a, LZRB, 0, m2_32u, r1, 0, lzrb, 0)
Richard Hendersonc698d872012-08-17 10:27:29 -0700[diff] [blame]467/* LOAD BYTE */
468 C(0xb926, LBR, RRE, EI, 0, r2_8s, 0, r1_32, mov2, 0)
469 C(0xb906, LGBR, RRE, EI, 0, r2_8s, 0, r1, mov2, 0)
470 C(0xe376, LB, RXY_a, LD, 0, a2, new, r1_32, ld8s, 0)
471 C(0xe377, LGB, RXY_a, LD, 0, a2, r1, 0, ld8s, 0)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]472/* LOAD BYTE HIGH */
473 C(0xe3c0, LBH, RXY_a, HW, 0, a2, new, r1_32h, ld8s, 0)
Richard Hendersonb9bca3e2012-08-17 11:38:37 -0700[diff] [blame]474/* LOAD COMPLEMENT */
475 C(0x1300, LCR, RR_a, Z, 0, r2, new, r1_32, neg, neg32)
476 C(0xb903, LCGR, RRE, Z, 0, r2, r1, 0, neg, neg64)
477 C(0xb913, LCGFR, RRE, Z, 0, r2_32s, r1, 0, neg, neg64)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]478 F(0xb303, LCEBR, RRE, Z, 0, e2, new, e1, negf32, f32, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]479 F(0xb313, LCDBR, RRE, Z, 0, f2, new, f1, negf64, f64, IF_BFP)
480 F(0xb343, LCXBR, RRE, Z, x2h, x2l, new_P, x1, negf128, f128, IF_BFP)
481 F(0xb373, LCDFR, RRE, FPSSH, 0, f2, new, f1, negf64, 0, IF_AFP1 | IF_AFP2)
David Hildenbrand6d930332019-02-25 21:03:18 +0100[diff] [blame]482/* LOAD COUNT TO BLOCK BOUNDARY */
483 C(0xe727, LCBB, RXE, V, la2, 0, r1, 0, lcbb, 0)
Richard Hendersonc698d872012-08-17 10:27:29 -0700[diff] [blame]484/* LOAD HALFWORD */
485 C(0xb927, LHR, RRE, EI, 0, r2_16s, 0, r1_32, mov2, 0)
486 C(0xb907, LGHR, RRE, EI, 0, r2_16s, 0, r1, mov2, 0)
487 C(0x4800, LH, RX_a, Z, 0, a2, new, r1_32, ld16s, 0)
488 C(0xe378, LHY, RXY_a, LD, 0, a2, new, r1_32, ld16s, 0)
489 C(0xe315, LGH, RXY_a, Z, 0, a2, r1, 0, ld16s, 0)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]490/* LOAD HALFWORD HIGH */
491 C(0xe3c4, LHH, RXY_a, HW, 0, a2, new, r1_32h, ld16s, 0)
Richard Hendersonc698d872012-08-17 10:27:29 -0700[diff] [blame]492/* LOAD HALFWORD IMMEDIATE */
493 C(0xa708, LHI, RI_a, Z, 0, i2, 0, r1_32, mov2, 0)
494 C(0xa709, LGHI, RI_a, Z, 0, i2, 0, r1, mov2, 0)
495/* LOAD HALFWORD RELATIVE LONG */
496 C(0xc405, LHRL, RIL_b, GIE, 0, ri2, new, r1_32, ld16s, 0)
497 C(0xc404, LGHRL, RIL_b, GIE, 0, ri2, r1, 0, ld16s, 0)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]498/* LOAD HIGH */
499 C(0xe3ca, LFH, RXY_a, HW, 0, a2, new, r1_32h, ld32u, 0)
Aurelien Jarno782a8472015-06-03 23:09:51 +0200[diff] [blame]500/* LOAG HIGH AND TRAP */
501 C(0xe3c8, LFHAT, RXY_a, LAT, 0, m2_32u, r1, 0, lfhat, 0)
Richard Henderson22c37a02012-08-17 09:45:53 -0700[diff] [blame]502/* LOAD LOGICAL */
503 C(0xb916, LLGFR, RRE, Z, 0, r2_32u, 0, r1, mov2, 0)
504 C(0xe316, LLGF, RXY_a, Z, 0, a2, r1, 0, ld32u, 0)
Aurelien Jarno782a8472015-06-03 23:09:51 +0200[diff] [blame]505/* LOAD LOGICAL AND TRAP */
506 C(0xe39d, LLGFAT, RXY_a, LAT, 0, a2, r1, 0, llgfat, 0)
Richard Henderson22c37a02012-08-17 09:45:53 -0700[diff] [blame]507/* LOAD LOGICAL RELATIVE LONG */
508 C(0xc40e, LLGFRL, RIL_b, GIE, 0, ri2, r1, 0, ld32u, 0)
Richard Hendersonc698d872012-08-17 10:27:29 -0700[diff] [blame]509/* LOAD LOGICAL CHARACTER */
510 C(0xb994, LLCR, RRE, EI, 0, r2_8u, 0, r1_32, mov2, 0)
511 C(0xb984, LLGCR, RRE, EI, 0, r2_8u, 0, r1, mov2, 0)
512 C(0xe394, LLC, RXY_a, EI, 0, a2, new, r1_32, ld8u, 0)
513 C(0xe390, LLGC, RXY_a, Z, 0, a2, r1, 0, ld8u, 0)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]514/* LOAD LOGICAL CHARACTER HIGH */
515 C(0xe3c2, LLCH, RXY_a, HW, 0, a2, new, r1_32h, ld8u, 0)
Richard Hendersonc698d872012-08-17 10:27:29 -0700[diff] [blame]516/* LOAD LOGICAL HALFWORD */
517 C(0xb995, LLHR, RRE, EI, 0, r2_16u, 0, r1_32, mov2, 0)
518 C(0xb985, LLGHR, RRE, EI, 0, r2_16u, 0, r1, mov2, 0)
519 C(0xe395, LLH, RXY_a, EI, 0, a2, new, r1_32, ld16u, 0)
520 C(0xe391, LLGH, RXY_a, Z, 0, a2, r1, 0, ld16u, 0)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]521/* LOAD LOGICAL HALFWORD HIGH */
522 C(0xe3c6, LLHH, RXY_a, HW, 0, a2, new, r1_32h, ld16u, 0)
Richard Hendersonc698d872012-08-17 10:27:29 -0700[diff] [blame]523/* LOAD LOGICAL HALFWORD RELATIVE LONG */
524 C(0xc402, LLHRL, RIL_b, GIE, 0, ri2, new, r1_32, ld16u, 0)
525 C(0xc406, LLGHRL, RIL_b, GIE, 0, ri2, r1, 0, ld16u, 0)
Richard Hendersonade9dea2012-08-17 11:20:33 -0700[diff] [blame]526/* LOAD LOGICAL IMMEDATE */
527 D(0xc00e, LLIHF, RIL_a, EI, 0, i2_32u_shl, 0, r1, mov2, 0, 32)
528 D(0xc00f, LLILF, RIL_a, EI, 0, i2_32u_shl, 0, r1, mov2, 0, 0)
529 D(0xa50c, LLIHH, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 48)
530 D(0xa50d, LLIHL, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 32)
531 D(0xa50e, LLILH, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 16)
532 D(0xa50f, LLILL, RI_a, Z, 0, i2_16u_shl, 0, r1, mov2, 0, 0)
Richard Henderson7691c232012-08-22 15:59:19 -0700[diff] [blame]533/* LOAD LOGICAL THIRTY ONE BITS */
534 C(0xb917, LLGTR, RRE, Z, 0, r2_o, r1, 0, llgt, 0)
535 C(0xe317, LLGT, RXY_a, Z, 0, m2_32u, r1, 0, llgt, 0)
Aurelien Jarno782a8472015-06-03 23:09:51 +0200[diff] [blame]536/* LOAD LOGICAL THIRTY ONE BITS AND TRAP */
537 C(0xe39c, LLGTAT, RXY_a, LAT, 0, m2_32u, r1, 0, llgtat, 0)
538
Richard Henderson143cbbc2012-09-05 10:52:08 -0700[diff] [blame]539/* LOAD FPR FROM GR */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]540 F(0xb3c1, LDGR, RRE, FPRGR, 0, r2_o, 0, f1, mov2, 0, IF_AFP1)
Richard Henderson143cbbc2012-09-05 10:52:08 -0700[diff] [blame]541/* LOAD GR FROM FPR */
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]542 F(0xb3cd, LGDR, RRE, FPRGR, 0, f2, 0, r1, mov2, 0, IF_AFP2)
Richard Hendersonb9bca3e2012-08-17 11:38:37 -0700[diff] [blame]543/* LOAD NEGATIVE */
544 C(0x1100, LNR, RR_a, Z, 0, r2_32s, new, r1_32, nabs, nabs32)
545 C(0xb901, LNGR, RRE, Z, 0, r2, r1, 0, nabs, nabs64)
546 C(0xb911, LNGFR, RRE, Z, 0, r2_32s, r1, 0, nabs, nabs64)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]547 F(0xb301, LNEBR, RRE, Z, 0, e2, new, e1, nabsf32, f32, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]548 F(0xb311, LNDBR, RRE, Z, 0, f2, new, f1, nabsf64, f64, IF_BFP)
549 F(0xb341, LNXBR, RRE, Z, x2h, x2l, new_P, x1, nabsf128, f128, IF_BFP)
550 F(0xb371, LNDFR, RRE, FPSSH, 0, f2, new, f1, nabsf64, 0, IF_AFP1 | IF_AFP2)
Richard Henderson632086d2012-09-05 10:55:00 -0700[diff] [blame]551/* LOAD ON CONDITION */
552 C(0xb9f2, LOCR, RRF_c, LOC, r1, r2, new, r1_32, loc, 0)
553 C(0xb9e2, LOCGR, RRF_c, LOC, r1, r2, r1, 0, loc, 0)
554 C(0xebf2, LOC, RSY_b, LOC, r1, m2_32u, new, r1_32, loc, 0)
555 C(0xebe2, LOCG, RSY_b, LOC, r1, m2_64, r1, 0, loc, 0)
Richard Henderson45aa9aa2017-06-16 16:35:34 -0700[diff] [blame]556/* LOAD HALFWORD IMMEDIATE ON CONDITION */
557 C(0xec42, LOCHI, RIE_g, LOC2, r1, i2, new, r1_32, loc, 0)
558 C(0xec46, LOCGHI, RIE_g, LOC2, r1, i2, r1, 0, loc, 0)
559 C(0xec4e, LOCHHI, RIE_g, LOC2, r1_sr32, i2, new, r1_32h, loc, 0)
560/* LOAD HIGH ON CONDITION */
561 C(0xb9e0, LOCFHR, RRF_c, LOC2, r1_sr32, r2, new, r1_32h, loc, 0)
562 C(0xebe0, LOCFH, RSY_b, LOC2, r1_sr32, m2_32u, new, r1_32h, loc, 0)
Eric Bischoff1807aaa2017-02-28 13:01:34 +0100[diff] [blame]563/* LOAD PAIR DISJOINT */
564 D(0xc804, LPD, SSF, ILA, 0, 0, new_P, r3_P32, lpd, 0, MO_TEUL)
565 D(0xc805, LPDG, SSF, ILA, 0, 0, new_P, r3_P64, lpd, 0, MO_TEQ)
Aurelien Jarnoe22dfdb2017-06-04 22:20:32 +0200[diff] [blame]566/* LOAD PAIR FROM QUADWORD */
567 C(0xe38f, LPQ, RXY_a, Z, 0, a2, r1_P, 0, lpq, 0)
Richard Hendersonb9bca3e2012-08-17 11:38:37 -0700[diff] [blame]568/* LOAD POSITIVE */
569 C(0x1000, LPR, RR_a, Z, 0, r2_32s, new, r1_32, abs, abs32)
570 C(0xb900, LPGR, RRE, Z, 0, r2, r1, 0, abs, abs64)
571 C(0xb910, LPGFR, RRE, Z, 0, r2_32s, r1, 0, abs, abs64)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]572 F(0xb300, LPEBR, RRE, Z, 0, e2, new, e1, absf32, f32, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]573 F(0xb310, LPDBR, RRE, Z, 0, f2, new, f1, absf64, f64, IF_BFP)
574 F(0xb340, LPXBR, RRE, Z, x2h, x2l, new_P, x1, absf128, f128, IF_BFP)
575 F(0xb370, LPDFR, RRE, FPSSH, 0, f2, new, f1, absf64, 0, IF_AFP1 | IF_AFP2)
Richard Hendersond54f5862012-08-22 15:35:40 -0700[diff] [blame]576/* LOAD REVERSED */
577 C(0xb91f, LRVR, RRE, Z, 0, r2_32u, new, r1_32, rev32, 0)
578 C(0xb90f, LRVGR, RRE, Z, 0, r2_o, r1, 0, rev64, 0)
579 C(0xe31f, LRVH, RXY_a, Z, 0, m2_16u, new, r1_16, rev16, 0)
580 C(0xe31e, LRV, RXY_a, Z, 0, m2_32u, new, r1_32, rev32, 0)
581 C(0xe30f, LRVG, RXY_a, Z, 0, m2_64, r1, 0, rev64, 0)
Richard Henderson24db8412012-09-05 10:14:24 -0700[diff] [blame]582/* LOAD ZERO */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]583 F(0xb374, LZER, RRE, Z, 0, 0, 0, e1, zero, 0, IF_AFP1)
584 F(0xb375, LZDR, RRE, Z, 0, 0, 0, f1, zero, 0, IF_AFP1)
585 F(0xb376, LZXR, RRE, Z, 0, 0, 0, x1, zero2, 0, IF_AFP1)
Richard Henderson22c37a02012-08-17 09:45:53 -0700[diff] [blame]586
Richard Henderson8379bfd2012-08-24 07:44:43 -0700[diff] [blame]587/* LOAD FPC */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]588 F(0xb29d, LFPC, S, Z, 0, m2_32u, 0, 0, sfpc, 0, IF_BFP)
Richard Henderson411edc22012-09-10 17:23:13 -0700[diff] [blame]589/* LOAD FPC AND SIGNAL */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]590 F(0xb2bd, LFAS, S, IEEEE_SIM, 0, m2_32u, 0, 0, sfas, 0, IF_DFP)
Aurelien Jarnoed0bcec2015-06-03 23:09:46 +0200[diff] [blame]591/* LOAD FP INTEGER */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]592 F(0xb357, FIEBR, RRF_e, Z, 0, e2, new, e1, fieb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]593 F(0xb35f, FIDBR, RRF_e, Z, 0, f2, new, f1, fidb, 0, IF_BFP)
594 F(0xb347, FIXBR, RRF_e, Z, x2h, x2l, new_P, x1, fixb, 0, IF_BFP)
Richard Henderson8379bfd2012-08-24 07:44:43 -0700[diff] [blame]595
Richard Henderson587626f2012-08-23 10:48:20 -0700[diff] [blame]596/* LOAD LENGTHENED */
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]597 F(0xb304, LDEBR, RRE, Z, 0, e2, new, f1, ldeb, 0, IF_BFP)
598 F(0xb305, LXDBR, RRE, Z, 0, f2, new_P, x1, lxdb, 0, IF_BFP)
599 F(0xb306, LXEBR, RRE, Z, 0, e2, new_P, x1, lxeb, 0, IF_BFP)
600 F(0xed04, LDEB, RXE, Z, 0, m2_32u, new, f1, ldeb, 0, IF_BFP)
601 F(0xed05, LXDB, RXE, Z, 0, m2_64, new_P, x1, lxdb, 0, IF_BFP)
602 F(0xed06, LXEB, RXE, Z, 0, m2_32u, new_P, x1, lxeb, 0, IF_BFP)
David Hildenbrand86b59622019-02-25 21:03:17 +0100[diff] [blame]603 F(0xb324, LDER, RXE, Z, 0, e2, new, f1, lde, 0, IF_AFP1)
604 F(0xed24, LDE, RXE, Z, 0, m2_32u, new, f1, lde, 0, IF_AFP1)
Richard Henderson587626f2012-08-23 10:48:20 -0700[diff] [blame]605/* LOAD ROUNDED */
David Hildenbrandbdcfcd42019-02-18 13:27:08 +0100[diff] [blame]606 F(0xb344, LEDBR, RRF_e, Z, 0, f2, new, e1, ledb, 0, IF_BFP)
607 F(0xb345, LDXBR, RRF_e, Z, x2h, x2l, new, f1, ldxb, 0, IF_BFP)
608 F(0xb346, LEXBR, RRF_e, Z, x2h, x2l, new, e1, lexb, 0, IF_BFP)
Richard Henderson587626f2012-08-23 10:48:20 -0700[diff] [blame]609
Richard Henderson77f8d6c2012-08-22 09:49:37 -0700[diff] [blame]610/* LOAD MULTIPLE */
611 C(0x9800, LM, RS_a, Z, 0, a2, 0, 0, lm32, 0)
612 C(0xeb98, LMY, RSY_a, LD, 0, a2, 0, 0, lm32, 0)
613 C(0xeb04, LMG, RSY_a, Z, 0, a2, 0, 0, lm64, 0)
614/* LOAD MULTIPLE HIGH */
615 C(0xeb96, LMH, RSY_a, Z, 0, a2, 0, 0, lmh, 0)
Richard Henderson7df3e932012-09-05 09:38:22 -0700[diff] [blame]616/* LOAD ACCESS MULTIPLE */
617 C(0x9a00, LAM, RS_a, Z, 0, a2, 0, 0, lam, 0)
618 C(0xeb9a, LAMY, RSY_a, LD, 0, a2, 0, 0, lam, 0)
Richard Henderson77f8d6c2012-08-22 09:49:37 -0700[diff] [blame]619
Richard Henderson6a04d762012-08-22 10:22:28 -0700[diff] [blame]620/* MOVE */
Richard Hendersonaf9e5a02012-08-22 11:43:06 -0700[diff] [blame]621 C(0xd200, MVC, SS_a, Z, la1, a2, 0, 0, mvc, 0)
Richard Henderson6a04d762012-08-22 10:22:28 -0700[diff] [blame]622 C(0xe544, MVHHI, SIL, GIE, la1, i2, 0, m1_16, mov2, 0)
623 C(0xe54c, MVHI, SIL, GIE, la1, i2, 0, m1_32, mov2, 0)
624 C(0xe548, MVGHI, SIL, GIE, la1, i2, 0, m1_64, mov2, 0)
625 C(0x9200, MVI, SI, Z, la1, i2, 0, m1_8, mov2, 0)
626 C(0xeb52, MVIY, SIY, LD, la1, i2, 0, m1_8, mov2, 0)
Aurelien Jarno6c9deca2017-06-01 00:01:09 +0200[diff] [blame]627/* MOVE INVERSE */
628 C(0xe800, MVCIN, SS_a, Z, la1, a2, 0, 0, mvcin, 0)
Richard Hendersone1eaada2012-08-20 16:46:49 -0700[diff] [blame]629/* MOVE LONG */
630 C(0x0e00, MVCL, RR_a, Z, 0, 0, 0, 0, mvcl, 0)
Richard Hendersoneb66e6a2012-08-22 11:24:25 -0700[diff] [blame]631/* MOVE LONG EXTENDED */
632 C(0xa800, MVCLE, RS_a, Z, 0, a2, 0, 0, mvcle, 0)
Aurelien Jarno16f2e4b2017-06-01 00:01:21 +0200[diff] [blame]633/* MOVE LONG UNICODE */
634 C(0xeb8e, MVCLU, RSY_a, E2, 0, a2, 0, 0, mvclu, 0)
Aurelien Jarno256dab62017-06-01 00:01:10 +0200[diff] [blame]635/* MOVE NUMERICS */
636 C(0xd100, MVN, SS_a, Z, la1, a2, 0, 0, mvn, 0)
Richard Hendersonee6c38d2012-09-05 10:19:44 -0700[diff] [blame]637/* MOVE PAGE */
638 C(0xb254, MVPG, RRE, Z, r1_o, r2_o, 0, 0, mvpg, 0)
Richard Hendersonaa31bf62012-09-05 10:20:53 -0700[diff] [blame]639/* MOVE STRING */
David Hildenbrand2bb525e2019-09-05 14:13:51 +0200[diff] [blame]640 C(0xb255, MVST, RRE, Z, 0, 0, 0, 0, mvst, 0)
David Hildenbrand3e7e5e02017-06-14 15:38:19 +0200[diff] [blame]641/* MOVE WITH OPTIONAL SPECIFICATION */
642 C(0xc800, MVCOS, SSF, MVCOS, la1, a2, 0, 0, mvcos, 0)
Aurelien Jarnofdc0a742017-06-01 00:01:11 +0200[diff] [blame]643/* MOVE WITH OFFSET */
644 /* Really format SS_b, but we pack both lengths into one argument
645 for the helper call, so we might as well leave one 8-bit field. */
646 C(0xf100, MVO, SS_a, Z, la1, a2, 0, 0, mvo, 0)
Aurelien Jarno01f8db82017-06-01 00:01:12 +0200[diff] [blame]647/* MOVE ZONES */
648 C(0xd300, MVZ, SS_a, Z, la1, a2, 0, 0, mvz, 0)
Richard Hendersone1eaada2012-08-20 16:46:49 -0700[diff] [blame]649
Richard Hendersond87aaf92012-09-25 15:17:59 -0700[diff] [blame]650/* MULTIPLY */
651 C(0x1c00, MR, RR_a, Z, r1p1_32s, r2_32s, new, r1_D32, mul, 0)
652 C(0x5c00, M, RX_a, Z, r1p1_32s, m2_32s, new, r1_D32, mul, 0)
653 C(0xe35c, MFY, RXY_a, GIE, r1p1_32s, m2_32s, new, r1_D32, mul, 0)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]654 F(0xb317, MEEBR, RRE, Z, e1, e2, new, e1, meeb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]655 F(0xb31c, MDBR, RRE, Z, f1, f2, new, f1, mdb, 0, IF_BFP)
656 F(0xb34c, MXBR, RRE, Z, x2h, x2l, x1, x1, mxb, 0, IF_BFP)
657 F(0xb30c, MDEBR, RRE, Z, f1, e2, new, f1, mdeb, 0, IF_BFP)
658 F(0xb307, MXDBR, RRE, Z, 0, f2, x1, x1, mxdb, 0, IF_BFP)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]659 F(0xed17, MEEB, RXE, Z, e1, m2_32u, new, e1, meeb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]660 F(0xed1c, MDB, RXE, Z, f1, m2_64, new, f1, mdb, 0, IF_BFP)
661 F(0xed0c, MDEB, RXE, Z, f1, m2_32u, new, f1, mdeb, 0, IF_BFP)
662 F(0xed07, MXDB, RXE, Z, 0, m2_64, x1, x1, mxdb, 0, IF_BFP)
Richard Hendersond1c04a22012-09-25 15:10:35 -0700[diff] [blame]663/* MULTIPLY HALFWORD */
664 C(0x4c00, MH, RX_a, Z, r1_o, m2_16s, new, r1_32, mul, 0)
665 C(0xe37c, MHY, RXY_a, GIE, r1_o, m2_16s, new, r1_32, mul, 0)
666/* MULTIPLY HALFWORD IMMEDIATE */
667 C(0xa70c, MHI, RI_a, Z, r1_o, i2, new, r1_32, mul, 0)
668 C(0xa70d, MGHI, RI_a, Z, r1_o, i2, r1, 0, mul, 0)
Richard Hendersond87aaf92012-09-25 15:17:59 -0700[diff] [blame]669/* MULTIPLY LOGICAL */
670 C(0xb996, MLR, RRE, Z, r1p1_32u, r2_32u, new, r1_D32, mul, 0)
671 C(0xe396, ML, RXY_a, Z, r1p1_32u, m2_32u, new, r1_D32, mul, 0)
Richard Henderson1ac58892012-09-25 15:26:59 -0700[diff] [blame]672 C(0xb986, MLGR, RRE, Z, r1p1, r2_o, r1_P, 0, mul128, 0)
673 C(0xe386, MLG, RXY_a, Z, r1p1, m2_64, r1_P, 0, mul128, 0)
Richard Hendersond1c04a22012-09-25 15:10:35 -0700[diff] [blame]674/* MULTIPLY SINGLE */
675 C(0xb252, MSR, RRE, Z, r1_o, r2_o, new, r1_32, mul, 0)
676 C(0x7100, MS, RX_a, Z, r1_o, m2_32s, new, r1_32, mul, 0)
677 C(0xe351, MSY, RXY_a, LD, r1_o, m2_32s, new, r1_32, mul, 0)
678 C(0xb90c, MSGR, RRE, Z, r1_o, r2_o, r1, 0, mul, 0)
679 C(0xb91c, MSGFR, RRE, Z, r1_o, r2_32s, r1, 0, mul, 0)
680 C(0xe30c, MSG, RXY_a, Z, r1_o, m2_64, r1, 0, mul, 0)
681 C(0xe31c, MSGF, RXY_a, Z, r1_o, m2_32s, r1, 0, mul, 0)
682/* MULTIPLY SINGLE IMMEDIATE */
683 C(0xc201, MSFI, RIL_a, GIE, r1_o, i2, new, r1_32, mul, 0)
684 C(0xc200, MSGFI, RIL_a, GIE, r1_o, i2, r1, 0, mul, 0)
685
Richard Henderson722bfec2012-08-23 12:30:12 -0700[diff] [blame]686/* MULTIPLY AND ADD */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]687 F(0xb30e, MAEBR, RRD, Z, e1, e2, new, e1, maeb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]688 F(0xb31e, MADBR, RRD, Z, f1, f2, new, f1, madb, 0, IF_BFP)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]689 F(0xed0e, MAEB, RXF, Z, e1, m2_32u, new, e1, maeb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]690 F(0xed1e, MADB, RXF, Z, f1, m2_64, new, f1, madb, 0, IF_BFP)
Richard Henderson722bfec2012-08-23 12:30:12 -0700[diff] [blame]691/* MULTIPLY AND SUBTRACT */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]692 F(0xb30f, MSEBR, RRD, Z, e1, e2, new, e1, mseb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]693 F(0xb31f, MSDBR, RRD, Z, f1, f2, new, f1, msdb, 0, IF_BFP)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]694 F(0xed0f, MSEB, RXF, Z, e1, m2_32u, new, e1, mseb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]695 F(0xed1f, MSDB, RXF, Z, f1, m2_64, new, f1, msdb, 0, IF_BFP)
Richard Henderson722bfec2012-08-23 12:30:12 -0700[diff] [blame]696
Richard Henderson3bbfbd12012-09-01 16:28:39 -0700[diff] [blame]697/* OR */
698 C(0x1600, OR, RR_a, Z, r1, r2, new, r1_32, or, nz32)
699 C(0xb9f6, ORK, RRF_a, DO, r2, r3, new, r1_32, or, nz32)
700 C(0x5600, O, RX_a, Z, r1, m2_32s, new, r1_32, or, nz32)
701 C(0xe356, OY, RXY_a, LD, r1, m2_32s, new, r1_32, or, nz32)
702 C(0xb981, OGR, RRE, Z, r1, r2, r1, 0, or, nz64)
703 C(0xb9e6, OGRK, RRF_a, DO, r2, r3, r1, 0, or, nz64)
704 C(0xe381, OG, RXY_a, Z, r1, m2_64, r1, 0, or, nz64)
Richard Henderson0a949032012-08-22 11:54:19 -0700[diff] [blame]705 C(0xd600, OC, SS_a, Z, la1, a2, 0, 0, oc, 0)
Richard Hendersonfacfc862012-08-17 15:01:36 -0700[diff] [blame]706/* OR IMMEDIATE */
707 D(0xc00c, OIHF, RIL_a, EI, r1_o, i2_32u, r1, 0, ori, 0, 0x2020)
708 D(0xc00d, OILF, RIL_a, EI, r1_o, i2_32u, r1, 0, ori, 0, 0x2000)
709 D(0xa508, OIHH, RI_a, Z, r1_o, i2_16u, r1, 0, ori, 0, 0x1030)
710 D(0xa509, OIHL, RI_a, Z, r1_o, i2_16u, r1, 0, ori, 0, 0x1020)
711 D(0xa50a, OILH, RI_a, Z, r1_o, i2_16u, r1, 0, ori, 0, 0x1010)
712 D(0xa50b, OILL, RI_a, Z, r1_o, i2_16u, r1, 0, ori, 0, 0x1000)
David Hildenbrandf400be12017-12-08 17:02:00 +0100[diff] [blame]713 D(0x9600, OI, SI, Z, la1, i2_8u, new, 0, oi, nz64, MO_UB)
714 D(0xeb56, OIY, SIY, LD, la1, i2_8u, new, 0, oi, nz64, MO_UB)
Richard Henderson3bbfbd12012-09-01 16:28:39 -0700[diff] [blame]715
Aurelien Jarno76c57492017-06-01 00:01:05 +0200[diff] [blame]716/* PACK */
717 /* Really format SS_b, but we pack both lengths into one argument
718 for the helper call, so we might as well leave one 8-bit field. */
719 C(0xf200, PACK, SS_a, Z, la1, a2, 0, 0, pack, 0)
Aurelien Jarno3bd3d6d2017-06-01 00:01:22 +0200[diff] [blame]720/* PACK ASCII */
721 C(0xe900, PKA, SS_f, E2, la1, a2, 0, 0, pka, 0)
Aurelien Jarno4e256be2017-06-01 00:01:23 +0200[diff] [blame]722/* PACK UNICODE */
723 C(0xe100, PKU, SS_f, E2, la1, a2, 0, 0, pku, 0)
Aurelien Jarno76c57492017-06-01 00:01:05 +0200[diff] [blame]724
Richard Hendersone0def902012-08-31 14:10:05 -0700[diff] [blame]725/* PREFETCH */
726 /* Implemented as nops of course. */
727 C(0xe336, PFD, RXY_b, GIE, 0, 0, 0, 0, 0, 0)
728 C(0xc602, PFDRL, RIL_c, GIE, 0, 0, 0, 0, 0, 0)
Richard Henderson632c61a2017-06-16 17:15:39 -0700[diff] [blame]729/* PERFORM PROCESSOR ASSIST */
730 /* Implemented as nop of course. */
731 C(0xb2e8, PPA, RRF_c, PPA, 0, 0, 0, 0, 0, 0)
Richard Hendersone0def902012-08-31 14:10:05 -0700[diff] [blame]732
Richard Henderson99b4f242012-09-01 11:14:04 -0700[diff] [blame]733/* POPULATION COUNT */
734 C(0xb9e1, POPCNT, RRE, PC, 0, r2_o, r1, 0, popcnt, nz64)
735
Richard Hendersoncbe24bf2012-08-22 09:15:19 -0700[diff] [blame]736/* ROTATE LEFT SINGLE LOGICAL */
737 C(0xeb1d, RLL, RSY_a, Z, r3_o, sh32, new, r1_32, rll32, 0)
738 C(0xeb1c, RLLG, RSY_a, Z, r3_o, sh64, r1, 0, rll64, 0)
739
Richard Henderson2d6a8692012-08-31 12:50:06 -0700[diff] [blame]740/* ROTATE THEN INSERT SELECTED BITS */
741 C(0xec55, RISBG, RIE_f, GIE, 0, r2, r1, 0, risbg, s64)
Aurelien Jarno375ee582015-06-03 23:09:50 +0200[diff] [blame]742 C(0xec59, RISBGN, RIE_f, MIE, 0, r2, r1, 0, risbg, 0)
Aurelien Jarno92892332015-05-25 01:47:30 +0200[diff] [blame]743 C(0xec5d, RISBHG, RIE_f, HW, 0, r2, r1, 0, risbg, 0)
744 C(0xec51, RISBLG, RIE_f, HW, 0, r2, r1, 0, risbg, 0)
Richard Hendersond6c63722012-08-31 13:54:13 -0700[diff] [blame]745/* ROTATE_THEN <OP> SELECTED BITS */
746 C(0xec54, RNSBG, RIE_f, GIE, 0, r2, r1, 0, rosbg, 0)
747 C(0xec56, ROSBG, RIE_f, GIE, 0, r2, r1, 0, rosbg, 0)
748 C(0xec57, RXSBG, RIE_f, GIE, 0, r2, r1, 0, rosbg, 0)
Richard Henderson2d6a8692012-08-31 12:50:06 -0700[diff] [blame]749
Richard Henderson4600c992012-08-24 14:27:42 -0700[diff] [blame]750/* SEARCH STRING */
Richard Henderson7591db72017-06-18 11:26:38 -0700[diff] [blame]751 C(0xb25e, SRST, RRE, Z, 0, 0, 0, 0, srst, 0)
Richard Hendersonbe7acb52017-06-18 11:31:24 -0700[diff] [blame]752/* SEARCH STRING UNICODE */
753 C(0xb9be, SRSTU, RRE, ETF3, 0, 0, 0, 0, srstu, 0)
Richard Henderson4600c992012-08-24 14:27:42 -0700[diff] [blame]754
Richard Hendersond62a4c92012-08-24 11:54:04 -0700[diff] [blame]755/* SET ACCESS */
756 C(0xb24e, SAR, RRE, Z, 0, r2_o, 0, 0, sar, 0)
Richard Henderson8612c932013-09-06 09:31:37 -0700[diff] [blame]757/* SET ADDRESSING MODE */
758 D(0x010c, SAM24, E, Z, 0, 0, 0, 0, sam, 0, 0)
759 D(0x010d, SAM31, E, Z, 0, 0, 0, 0, sam, 0, 1)
760 D(0x010e, SAM64, E, Z, 0, 0, 0, 0, sam, 0, 3)
Richard Henderson8379bfd2012-08-24 07:44:43 -0700[diff] [blame]761/* SET FPC */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]762 F(0xb384, SFPC, RRE, Z, 0, r1_o, 0, 0, sfpc, 0, IF_BFP)
Richard Henderson411edc22012-09-10 17:23:13 -0700[diff] [blame]763/* SET FPC AND SIGNAL */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]764 F(0xb385, SFASR, RRE, IEEEE_SIM, 0, r1_o, 0, 0, sfas, 0, IF_DFP)
Richard Hendersona12000b2012-09-10 16:26:35 -0700[diff] [blame]765/* SET BFP ROUNDING MODE */
David Hildenbrandb9c737f2019-02-18 13:27:04 +0100[diff] [blame]766 F(0xb299, SRNM, S, Z, la2, 0, 0, 0, srnm, 0, IF_BFP)
767 F(0xb2b8, SRNMB, S, FPE, la2, 0, 0, 0, srnmb, 0, IF_BFP)
Richard Hendersona12000b2012-09-10 16:26:35 -0700[diff] [blame]768/* SET DFP ROUNDING MODE */
David Hildenbrandb9c737f2019-02-18 13:27:04 +0100[diff] [blame]769 F(0xb2b9, SRNMT, S, DFPR, la2, 0, 0, 0, srnmt, 0, IF_DFP)
David Hildenbrand6b257352017-09-20 17:30:14 +0200[diff] [blame]770/* SET PROGRAM MASK */
771 C(0x0400, SPM, RR_a, Z, r1, 0, 0, 0, spm, 0)
Richard Henderson8379bfd2012-08-24 07:44:43 -0700[diff] [blame]772
Richard Hendersoncbe24bf2012-08-22 09:15:19 -0700[diff] [blame]773/* SHIFT LEFT SINGLE */
774 D(0x8b00, SLA, RS_a, Z, r1, sh32, new, r1_32, sla, 0, 31)
775 D(0xebdd, SLAK, RSY_a, DO, r3, sh32, new, r1_32, sla, 0, 31)
776 D(0xeb0b, SLAG, RSY_a, Z, r3, sh64, r1, 0, sla, 0, 63)
777/* SHIFT LEFT SINGLE LOGICAL */
778 C(0x8900, SLL, RS_a, Z, r1_o, sh32, new, r1_32, sll, 0)
779 C(0xebdf, SLLK, RSY_a, DO, r3_o, sh32, new, r1_32, sll, 0)
780 C(0xeb0d, SLLG, RSY_a, Z, r3_o, sh64, r1, 0, sll, 0)
781/* SHIFT RIGHT SINGLE */
782 C(0x8a00, SRA, RS_a, Z, r1_32s, sh32, new, r1_32, sra, s32)
783 C(0xebdc, SRAK, RSY_a, DO, r3_32s, sh32, new, r1_32, sra, s32)
784 C(0xeb0a, SRAG, RSY_a, Z, r3_o, sh64, r1, 0, sra, s64)
785/* SHIFT RIGHT SINGLE LOGICAL */
786 C(0x8800, SRL, RS_a, Z, r1_32u, sh32, new, r1_32, srl, 0)
787 C(0xebde, SRLK, RSY_a, DO, r3_32u, sh32, new, r1_32, srl, 0)
788 C(0xeb0c, SRLG, RSY_a, Z, r3_o, sh64, r1, 0, srl, 0)
Richard Hendersona79ba332012-08-22 09:22:23 -0700[diff] [blame]789/* SHIFT LEFT DOUBLE */
790 D(0x8f00, SLDA, RS_a, Z, r1_D32, sh64, new, r1_D32, sla, 0, 31)
791/* SHIFT LEFT DOUBLE LOGICAL */
792 C(0x8d00, SLDL, RS_a, Z, r1_D32, sh64, new, r1_D32, sll, 0)
793/* SHIFT RIGHT DOUBLE */
794 C(0x8e00, SRDA, RS_a, Z, r1_D32, sh64, new, r1_D32, sra, s64)
795/* SHIFT RIGHT DOUBLE LOGICAL */
796 C(0x8c00, SRDL, RS_a, Z, r1_D32, sh64, new, r1_D32, srl, 0)
Richard Hendersoncbe24bf2012-08-22 09:15:19 -0700[diff] [blame]797
Richard Henderson16d7b2a2012-08-23 14:33:03 -0700[diff] [blame]798/* SQUARE ROOT */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]799 F(0xb314, SQEBR, RRE, Z, 0, e2, new, e1, sqeb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]800 F(0xb315, SQDBR, RRE, Z, 0, f2, new, f1, sqdb, 0, IF_BFP)
801 F(0xb316, SQXBR, RRE, Z, x2h, x2l, new, x1, sqxb, 0, IF_BFP)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]802 F(0xed14, SQEB, RXE, Z, 0, m2_32u, new, e1, sqeb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]803 F(0xed15, SQDB, RXE, Z, 0, m2_64, new, f1, sqdb, 0, IF_BFP)
Richard Henderson16d7b2a2012-08-23 14:33:03 -0700[diff] [blame]804
Richard Henderson2b280b92012-08-17 16:00:08 -0700[diff] [blame]805/* STORE */
806 C(0x5000, ST, RX_a, Z, r1_o, a2, 0, 0, st32, 0)
807 C(0xe350, STY, RXY_a, LD, r1_o, a2, 0, 0, st32, 0)
808 C(0xe324, STG, RXY_a, Z, r1_o, a2, 0, 0, st64, 0)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]809 F(0x6000, STD, RX_a, Z, f1, a2, 0, 0, st64, 0, IF_AFP1)
810 F(0xed67, STDY, RXY_a, LD, f1, a2, 0, 0, st64, 0, IF_AFP1)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]811 F(0x7000, STE, RX_a, Z, e1, a2, 0, 0, st32, 0, IF_AFP1)
812 F(0xed66, STEY, RXY_a, LD, e1, a2, 0, 0, st32, 0, IF_AFP1)
Richard Henderson2b280b92012-08-17 16:00:08 -0700[diff] [blame]813/* STORE RELATIVE LONG */
814 C(0xc40f, STRL, RIL_b, GIE, r1_o, ri2, 0, 0, st32, 0)
815 C(0xc40b, STGRL, RIL_b, GIE, r1_o, ri2, 0, 0, st64, 0)
816/* STORE CHARACTER */
817 C(0x4200, STC, RX_a, Z, r1_o, a2, 0, 0, st8, 0)
818 C(0xe372, STCY, RXY_a, LD, r1_o, a2, 0, 0, st8, 0)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]819/* STORE CHARACTER HIGH */
820 C(0xe3c3, STCH, RXY_a, HW, r1_sr32, a2, 0, 0, st8, 0)
Richard Henderson2ae68052012-08-22 15:11:53 -0700[diff] [blame]821/* STORE CHARACTERS UNDER MASK */
822 D(0xbe00, STCM, RS_b, Z, r1_o, a2, 0, 0, stcm, 0, 0)
823 D(0xeb2d, STCMY, RSY_b, LD, r1_o, a2, 0, 0, stcm, 0, 0)
Aurelien Jarno92892332015-05-25 01:47:30 +0200[diff] [blame]824 D(0xeb2c, STCMH, RSY_b, Z, r1_o, a2, 0, 0, stcm, 0, 32)
Richard Henderson2b280b92012-08-17 16:00:08 -0700[diff] [blame]825/* STORE HALFWORD */
826 C(0x4000, STH, RX_a, Z, r1_o, a2, 0, 0, st16, 0)
827 C(0xe370, STHY, RXY_a, LD, r1_o, a2, 0, 0, st16, 0)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]828/* STORE HALFWORD HIGH */
829 C(0xe3c7, STHH, RXY_a, HW, r1_sr32, a2, 0, 0, st16, 0)
Richard Henderson2b280b92012-08-17 16:00:08 -0700[diff] [blame]830/* STORE HALFWORD RELATIVE LONG */
831 C(0xc407, STHRL, RIL_b, GIE, r1_o, ri2, 0, 0, st16, 0)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]832/* STORE HIGH */
833 C(0xe3cb, STFH, RXY_a, HW, r1_sr32, a2, 0, 0, st32, 0)
Richard Hendersonb92fa332012-09-01 09:45:20 -0700[diff] [blame]834/* STORE ON CONDITION */
835 D(0xebf3, STOC, RSY_b, LOC, 0, 0, 0, 0, soc, 0, 0)
836 D(0xebe3, STOCG, RSY_b, LOC, 0, 0, 0, 0, soc, 0, 1)
Richard Henderson45aa9aa2017-06-16 16:35:34 -0700[diff] [blame]837/* STORE HIGH ON CONDITION */
838 D(0xebe1, STOCFH, RSY_b, LOC2, 0, 0, 0, 0, soc, 0, 2)
Richard Hendersone025e522012-08-22 15:52:55 -0700[diff] [blame]839/* STORE REVERSED */
840 C(0xe33f, STRVH, RXY_a, Z, la2, r1_16u, new, m1_16, rev16, 0)
841 C(0xe33e, STRV, RXY_a, Z, la2, r1_32u, new, m1_32, rev32, 0)
842 C(0xe32f, STRVG, RXY_a, Z, la2, r1_o, new, m1_64, rev64, 0)
Richard Henderson2b280b92012-08-17 16:00:08 -0700[diff] [blame]843
Richard Henderson965018b2019-02-11 21:30:44 -0800[diff] [blame]844/* STORE CLOCK */
845 C(0xb205, STCK, S, Z, la2, 0, new, m1_64, stck, 0)
846 C(0xb27c, STCKF, S, SCF, la2, 0, new, m1_64, stck, 0)
847/* STORE CLOCK EXTENDED */
848 C(0xb278, STCKE, S, Z, 0, a2, 0, 0, stcke, 0)
849
Richard Henderson5bf83622013-03-25 15:10:06 -0700[diff] [blame]850/* STORE FACILITY LIST EXTENDED */
851 C(0xb2b0, STFLE, S, SFLE, 0, a2, 0, 0, stfle, 0)
Richard Hendersonea204902012-08-22 14:09:05 -0700[diff] [blame]852/* STORE FPC */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]853 F(0xb29c, STFPC, S, Z, 0, a2, new, m2_32, efpc, 0, IF_BFP)
Richard Hendersonea204902012-08-22 14:09:05 -0700[diff] [blame]854
Richard Henderson77f8d6c2012-08-22 09:49:37 -0700[diff] [blame]855/* STORE MULTIPLE */
856 D(0x9000, STM, RS_a, Z, 0, a2, 0, 0, stm, 0, 4)
857 D(0xeb90, STMY, RSY_a, LD, 0, a2, 0, 0, stm, 0, 4)
858 D(0xeb24, STMG, RSY_a, Z, 0, a2, 0, 0, stm, 0, 8)
859/* STORE MULTIPLE HIGH */
860 C(0xeb26, STMH, RSY_a, Z, 0, a2, 0, 0, stmh, 0)
Richard Henderson7df3e932012-09-05 09:38:22 -0700[diff] [blame]861/* STORE ACCESS MULTIPLE */
862 C(0x9b00, STAM, RS_a, Z, 0, a2, 0, 0, stam, 0)
863 C(0xeb9b, STAMY, RSY_a, LD, 0, a2, 0, 0, stam, 0)
Aurelien Jarnoc21b6102017-06-04 22:20:33 +0200[diff] [blame]864/* STORE PAIR TO QUADWORD */
865 C(0xe38e, STPQ, RXY_a, Z, 0, a2, r1_P, 0, stpq, 0)
Richard Henderson77f8d6c2012-08-22 09:49:37 -0700[diff] [blame]866
Richard Hendersonad044d02012-08-15 17:16:22 -0700[diff] [blame]867/* SUBTRACT */
868 C(0x1b00, SR, RR_a, Z, r1, r2, new, r1_32, sub, subs32)
869 C(0xb9f9, SRK, RRF_a, DO, r2, r3, new, r1_32, sub, subs32)
870 C(0x5b00, S, RX_a, Z, r1, m2_32s, new, r1_32, sub, subs32)
871 C(0xe35b, SY, RXY_a, LD, r1, m2_32s, new, r1_32, sub, subs32)
872 C(0xb909, SGR, RRE, Z, r1, r2, r1, 0, sub, subs64)
873 C(0xb919, SGFR, RRE, Z, r1, r2_32s, r1, 0, sub, subs64)
874 C(0xb9e9, SGRK, RRF_a, DO, r2, r3, r1, 0, sub, subs64)
875 C(0xe309, SG, RXY_a, Z, r1, m2_64, r1, 0, sub, subs64)
876 C(0xe319, SGF, RXY_a, Z, r1, m2_32s, r1, 0, sub, subs64)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]877 F(0xb30b, SEBR, RRE, Z, e1, e2, new, e1, seb, f32, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]878 F(0xb31b, SDBR, RRE, Z, f1, f2, new, f1, sdb, f64, IF_BFP)
879 F(0xb34b, SXBR, RRE, Z, x2h, x2l, x1, x1, sxb, f128, IF_BFP)
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]880 F(0xed0b, SEB, RXE, Z, e1, m2_32u, new, e1, seb, f32, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]881 F(0xed1b, SDB, RXE, Z, f1, m2_64, new, f1, sdb, f64, IF_BFP)
Richard Henderson3f4cb562012-08-27 14:46:42 -0700[diff] [blame]882/* SUBTRACT HALFWORD */
883 C(0x4b00, SH, RX_a, Z, r1, m2_16s, new, r1_32, sub, subs32)
884 C(0xe37b, SHY, RXY_a, LD, r1, m2_16s, new, r1_32, sub, subs32)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]885/* SUBTRACT HIGH */
886 C(0xb9c9, SHHHR, RRF_a, HW, r2_sr32, r3_sr32, new, r1_32h, sub, subs32)
887 C(0xb9d9, SHHLR, RRF_a, HW, r2_sr32, r3, new, r1_32h, sub, subs32)
Richard Hendersonad044d02012-08-15 17:16:22 -0700[diff] [blame]888/* SUBTRACT LOGICAL */
889 C(0x1f00, SLR, RR_a, Z, r1, r2, new, r1_32, sub, subu32)
890 C(0xb9fb, SLRK, RRF_a, DO, r2, r3, new, r1_32, sub, subu32)
891 C(0x5f00, SL, RX_a, Z, r1, m2_32u, new, r1_32, sub, subu32)
892 C(0xe35f, SLY, RXY_a, LD, r1, m2_32u, new, r1_32, sub, subu32)
893 C(0xb90b, SLGR, RRE, Z, r1, r2, r1, 0, sub, subu64)
894 C(0xb91b, SLGFR, RRE, Z, r1, r2_32u, r1, 0, sub, subu64)
895 C(0xb9eb, SLGRK, RRF_a, DO, r2, r3, r1, 0, sub, subu64)
896 C(0xe30b, SLG, RXY_a, Z, r1, m2_64, r1, 0, sub, subu64)
897 C(0xe31b, SLGF, RXY_a, Z, r1, m2_32u, r1, 0, sub, subu64)
Aurelien Jarnoa1f12d82015-06-03 23:09:52 +0200[diff] [blame]898/* SUBTRACT LOCICAL HIGH */
899 C(0xb9cb, SLHHHR, RRF_a, HW, r2_sr32, r3_sr32, new, r1_32h, sub, subu32)
900 C(0xb9db, SLHHLR, RRF_a, HW, r2_sr32, r3, new, r1_32h, sub, subu32)
Richard Hendersonad044d02012-08-15 17:16:22 -0700[diff] [blame]901/* SUBTRACT LOGICAL IMMEDIATE */
902 C(0xc205, SLFI, RIL_a, EI, r1, i2_32u, new, r1_32, sub, subu32)
903 C(0xc204, SLGFI, RIL_a, EI, r1, i2_32u, r1, 0, sub, subu64)
Richard Henderson4e4bb432012-08-17 18:52:33 -0700[diff] [blame]904/* SUBTRACT LOGICAL WITH BORROW */
905 C(0xb999, SLBR, RRE, Z, r1, r2, new, r1_32, subb, subb32)
906 C(0xb989, SLBGR, RRE, Z, r1, r2, r1, 0, subb, subb64)
907 C(0xe399, SLB, RXY_a, Z, r1, m2_32u, new, r1_32, subb, subb32)
908 C(0xe389, SLBG, RXY_a, Z, r1, m2_64, r1, 0, subb, subb64)
Richard Henderson00d2dc12012-08-20 16:20:58 -0700[diff] [blame]909
Richard Hendersonb9836c12012-08-20 16:41:05 -0700[diff] [blame]910/* SUPERVISOR CALL */
911 C(0x0a00, SVC, I, Z, 0, 0, 0, 0, svc, 0)
912
Aurelien Jarno0c0974d2017-06-01 00:01:04 +0200[diff] [blame]913/* TEST ADDRESSING MODE */
914 C(0x010b, TAM, E, Z, 0, 0, 0, 0, tam, 0)
915
Aurelien Jarno6699adf2017-06-01 00:01:03 +0200[diff] [blame]916/* TEST AND SET */
917 C(0x9300, TS, S, Z, 0, a2, 0, 0, ts, 0)
918
Richard Henderson31aa97d2012-08-23 12:40:09 -0700[diff] [blame]919/* TEST DATA CLASS */
David Hildenbrandca5f31a2018-09-27 15:02:59 +0200[diff] [blame]920 F(0xed10, TCEB, RXE, Z, e1, a2, 0, 0, tceb, 0, IF_BFP)
David Hildenbrand80a7b752019-02-04 16:44:06 +0100[diff] [blame]921 F(0xed11, TCDB, RXE, Z, f1, a2, 0, 0, tcdb, 0, IF_BFP)
922 F(0xed12, TCXB, RXE, Z, 0, a2, x1, 0, tcxb, 0, IF_BFP)
Richard Henderson31aa97d2012-08-23 12:40:09 -0700[diff] [blame]923
Aurelien Jarno5d4a6552017-06-01 00:01:26 +0200[diff] [blame]924/* TEST DECIMAL */
925 C(0xebc0, TP, RSL, E2, la1, 0, 0, 0, tp, 0)
926
Richard Henderson00d2dc12012-08-20 16:20:58 -0700[diff] [blame]927/* TEST UNDER MASK */
928 C(0x9100, TM, SI, Z, m1_8u, i2_8u, 0, 0, 0, tm32)
929 C(0xeb51, TMY, SIY, LD, m1_8u, i2_8u, 0, 0, 0, tm32)
930 D(0xa702, TMHH, RI_a, Z, r1_o, i2_16u_shl, 0, 0, 0, tm64, 48)
931 D(0xa703, TMHL, RI_a, Z, r1_o, i2_16u_shl, 0, 0, 0, tm64, 32)
932 D(0xa700, TMLH, RI_a, Z, r1_o, i2_16u_shl, 0, 0, 0, tm64, 16)
933 D(0xa701, TMLL, RI_a, Z, r1_o, i2_16u_shl, 0, 0, 0, tm64, 0)
Richard Hendersond9a39922012-08-20 16:28:56 -0700[diff] [blame]934
Richard Henderson0a949032012-08-22 11:54:19 -0700[diff] [blame]935/* TRANSLATE */
936 C(0xdc00, TR, SS_a, Z, la1, a2, 0, 0, tr, 0)
Aurelien Jarno54f00772015-06-03 23:09:47 +0200[diff] [blame]937/* TRANSLATE AND TEST */
938 C(0xdd00, TRT, SS_a, Z, la1, a2, 0, 0, trt, 0)
Richard Hendersonb213c9f2017-06-18 11:45:47 -0700[diff] [blame]939/* TRANSLATE AND TEST REVERSE */
940 C(0xd000, TRTR, SS_a, ETF3, la1, a2, 0, 0, trtr, 0)
Aurelien Jarno3f4de672015-06-03 23:09:48 +0200[diff] [blame]941/* TRANSLATE EXTENDED */
942 C(0xb2a5, TRE, RRE, Z, 0, r2, r1_P, 0, tre, 0)
Richard Henderson0a949032012-08-22 11:54:19 -0700[diff] [blame]943
Aurelien Jarno4065ae72017-06-01 00:01:27 +0200[diff] [blame]944/* TRANSLATE ONE TO ONE */
945 C(0xb993, TROO, RRF_c, E2, 0, 0, 0, 0, trXX, 0)
946/* TRANSLATE ONE TO TWO */
947 C(0xb992, TROT, RRF_c, E2, 0, 0, 0, 0, trXX, 0)
948/* TRANSLATE TWO TO ONE */
949 C(0xb991, TRTO, RRF_c, E2, 0, 0, 0, 0, trXX, 0)
950/* TRANSLATE TWO TO TWO */
951 C(0xb990, TRTT, RRF_c, E2, 0, 0, 0, 0, trXX, 0)
952
Richard Henderson0a949032012-08-22 11:54:19 -0700[diff] [blame]953/* UNPACK */
954 /* Really format SS_b, but we pack both lengths into one argument
955 for the helper call, so we might as well leave one 8-bit field. */
956 C(0xf300, UNPK, SS_a, Z, la1, a2, 0, 0, unpk, 0)
Aurelien Jarno1a35f082017-06-01 00:01:24 +0200[diff] [blame]957/* UNPACK ASCII */
958 C(0xea00, UNPKA, SS_a, E2, la1, a2, 0, 0, unpka, 0)
Aurelien Jarno15417782017-06-01 00:01:25 +0200[diff] [blame]959/* UNPACK UNICODE */
960 C(0xe200, UNPKU, SS_a, E2, la1, a2, 0, 0, unpku, 0)
Richard Henderson0a949032012-08-22 11:54:19 -0700[diff] [blame]961
David Hildenbrand7705c752017-09-20 17:30:16 +0200[diff] [blame]962/* MSA Instructions */
963 D(0xb91e, KMAC, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMAC)
964 D(0xb928, PCKMO, RRE, MSA3, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_PCKMO)
965 D(0xb92a, KMF, RRE, MSA4, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMF)
966 D(0xb92b, KMO, RRE, MSA4, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMO)
967 D(0xb92c, PCC, RRE, MSA4, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_PCC)
968 D(0xb92d, KMCTR, RRF_b, MSA4, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMCTR)
969 D(0xb92e, KM, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KM)
970 D(0xb92f, KMC, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KMC)
971 D(0xb93c, PPNO, RRE, MSA5, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_PPNO)
972 D(0xb93e, KIMD, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KIMD)
973 D(0xb93f, KLMD, RRE, MSA, 0, 0, 0, 0, msa, 0, S390_FEAT_TYPE_KLMD)
974
David Hildenbrand6d841662019-03-07 13:15:11 +0100[diff] [blame]975/* === Vector Support Instructions === */
976
977/* VECTOR GATHER ELEMENT */
978 E(0xe713, VGEF, VRV, V, la2, 0, 0, 0, vge, 0, ES_32, IF_VEC)
979 E(0xe712, VGEG, VRV, V, la2, 0, 0, 0, vge, 0, ES_64, IF_VEC)
David Hildenbrand64052062019-03-07 13:15:12 +0100[diff] [blame]980/* VECTOR GENERATE BYTE MASK */
981 F(0xe744, VGBM, VRI_a, V, 0, 0, 0, 0, vgbm, 0, IF_VEC)
David Hildenbrandeeb11a92019-03-07 13:15:13 +0100[diff] [blame]982/* VECTOR GENERATE MASK */
983 F(0xe746, VGM, VRI_b, V, 0, 0, 0, 0, vgm, 0, IF_VEC)
David Hildenbrandb4f5ae42019-03-07 13:15:14 +0100[diff] [blame]984/* VECTOR LOAD */
985 F(0xe706, VL, VRX, V, la2, 0, 0, 0, vl, 0, IF_VEC)
986 F(0xe756, VLR, VRR_a, V, 0, 0, 0, 0, vlr, 0, IF_VEC)
David Hildenbrand79c16202019-03-07 13:15:15 +0100[diff] [blame]987/* VECTOR LOAD AND REPLICATE */
988 F(0xe705, VLREP, VRX, V, la2, 0, 0, 0, vlrep, 0, IF_VEC)
David Hildenbrand4b664392019-03-07 13:15:16 +0100[diff] [blame]989/* VECTOR LOAD ELEMENT */
990 E(0xe700, VLEB, VRX, V, la2, 0, 0, 0, vle, 0, ES_8, IF_VEC)
991 E(0xe701, VLEH, VRX, V, la2, 0, 0, 0, vle, 0, ES_16, IF_VEC)
992 E(0xe703, VLEF, VRX, V, la2, 0, 0, 0, vle, 0, ES_32, IF_VEC)
993 E(0xe702, VLEG, VRX, V, la2, 0, 0, 0, vle, 0, ES_64, IF_VEC)
David Hildenbrande6790d32019-03-07 13:15:17 +0100[diff] [blame]994/* VECTOR LOAD ELEMENT IMMEDIATE */
995 E(0xe740, VLEIB, VRI_a, V, 0, 0, 0, 0, vlei, 0, ES_8, IF_VEC)
996 E(0xe741, VLEIH, VRI_a, V, 0, 0, 0, 0, vlei, 0, ES_16, IF_VEC)
997 E(0xe743, VLEIF, VRI_a, V, 0, 0, 0, 0, vlei, 0, ES_32, IF_VEC)
998 E(0xe742, VLEIG, VRI_a, V, 0, 0, 0, 0, vlei, 0, ES_64, IF_VEC)
David Hildenbrand5d203be2019-03-07 13:15:18 +0100[diff] [blame]999/* VECTOR LOAD GR FROM VR ELEMENT */
1000 F(0xe721, VLGV, VRS_c, V, la2, 0, r1, 0, vlgv, 0, IF_VEC)
David Hildenbrandf180da82019-03-07 13:15:19 +0100[diff] [blame]1001/* VECTOR LOAD LOGICAL ELEMENT AND ZERO */
1002 F(0xe704, VLLEZ, VRX, V, la2, 0, 0, 0, vllez, 0, IF_VEC)
David Hildenbrand0a85f822019-03-07 13:15:20 +0100[diff] [blame]1003/* VECTOR LOAD MULTIPLE */
1004 F(0xe736, VLM, VRS_a, V, la2, 0, 0, 0, vlm, 0, IF_VEC)
David Hildenbrand60e9e3f2019-03-07 13:15:21 +0100[diff] [blame]1005/* VECTOR LOAD TO BLOCK BOUNDARY */
1006 F(0xe707, VLBB, VRX, V, la2, 0, 0, 0, vlbb, 0, IF_VEC)
David Hildenbrand90e3af62019-03-07 13:15:22 +0100[diff] [blame]1007/* VECTOR LOAD VR ELEMENT FROM GR */
1008 F(0xe722, VLVG, VRS_b, V, la2, r3, 0, 0, vlvg, 0, IF_VEC)
David Hildenbrand76dbd282019-03-07 13:15:23 +0100[diff] [blame]1009/* VECTOR LOAD VR FROM GRS DISJOINT */
1010 F(0xe762, VLVGP, VRR_f, V, r2, r3, 0, 0, vlvgp, 0, IF_VEC)
David Hildenbrandf6c7ff62019-03-07 13:15:24 +0100[diff] [blame]1011/* VECTOR LOAD WITH LENGTH */
1012 F(0xe737, VLL, VRS_b, V, la2, r3_32u, 0, 0, vll, 0, IF_VEC)
David Hildenbrand2ff47e62019-03-07 13:15:25 +0100[diff] [blame]1013/* VECTOR MERGE HIGH */
1014 F(0xe761, VMRH, VRR_c, V, 0, 0, 0, 0, vmr, 0, IF_VEC)
1015/* VECTOR MERGE LOW */
1016 F(0xe760, VMRL, VRR_c, V, 0, 0, 0, 0, vmr, 0, IF_VEC)
David Hildenbrand73946f02019-03-07 13:15:26 +0100[diff] [blame]1017/* VECTOR PACK */
1018 F(0xe794, VPK, VRR_c, V, 0, 0, 0, 0, vpk, 0, IF_VEC)
1019/* VECTOR PACK SATURATE */
1020 F(0xe797, VPKS, VRR_b, V, 0, 0, 0, 0, vpk, 0, IF_VEC)
1021/* VECTOR PACK LOGICAL SATURATE */
1022 F(0xe795, VPKLS, VRR_b, V, 0, 0, 0, 0, vpk, 0, IF_VEC)
David Hildenbrand7aaf8442019-03-07 13:15:27 +0100[diff] [blame]1023 F(0xe78c, VPERM, VRR_e, V, 0, 0, 0, 0, vperm, 0, IF_VEC)
David Hildenbrand66bb3332019-03-07 13:15:28 +0100[diff] [blame]1024/* VECTOR PERMUTE DOUBLEWORD IMMEDIATE */
1025 F(0xe784, VPDI, VRR_c, V, 0, 0, 0, 0, vpdi, 0, IF_VEC)
David Hildenbrand28d08732019-03-07 13:15:29 +0100[diff] [blame]1026/* VECTOR REPLICATE */
1027 F(0xe74d, VREP, VRI_c, V, 0, 0, 0, 0, vrep, 0, IF_VEC)
David Hildenbrand3a338e22019-03-07 13:15:30 +0100[diff] [blame]1028/* VECTOR REPLICATE IMMEDIATE */
1029 F(0xe745, VREPI, VRI_a, V, 0, 0, 0, 0, vrepi, 0, IF_VEC)
David Hildenbrand7007ec22019-03-07 13:15:31 +0100[diff] [blame]1030/* VECTOR SCATTER ELEMENT */
1031 E(0xe71b, VSCEF, VRV, V, la2, 0, 0, 0, vsce, 0, ES_32, IF_VEC)
1032 E(0xe71a, VSCEG, VRV, V, la2, 0, 0, 0, vsce, 0, ES_64, IF_VEC)
David Hildenbranddb230702019-03-07 13:15:32 +0100[diff] [blame]1033/* VECTOR SELECT */
1034 F(0xe78d, VSEL, VRR_e, V, 0, 0, 0, 0, vsel, 0, IF_VEC)
David Hildenbranda2338cf2019-03-07 13:15:33 +0100[diff] [blame]1035/* VECTOR SIGN EXTEND TO DOUBLEWORD */
1036 F(0xe75f, VSEG, VRR_a, V, 0, 0, 0, 0, vseg, 0, IF_VEC)
David Hildenbrand15e12ad2019-03-07 13:15:35 +0100[diff] [blame]1037/* VECTOR STORE */
1038 F(0xe70e, VST, VRX, V, la2, 0, 0, 0, vst, 0, IF_VEC)
David Hildenbrand7b9a2362019-03-07 13:15:36 +0100[diff] [blame]1039/* VECTOR STORE ELEMENT */
1040 E(0xe708, VSTEB, VRX, V, la2, 0, 0, 0, vste, 0, ES_8, IF_VEC)
1041 E(0xe709, VSTEH, VRX, V, la2, 0, 0, 0, vste, 0, ES_16, IF_VEC)
1042 E(0xe70b, VSTEF, VRX, V, la2, 0, 0, 0, vste, 0, ES_32, IF_VEC)
1043 E(0xe70a, VSTEG, VRX, V, la2, 0, 0, 0, vste, 0, ES_64, IF_VEC)
David Hildenbrand29b8bcf2019-03-07 13:15:37 +0100[diff] [blame]1044/* VECTOR STORE MULTIPLE */
1045 F(0xe73e, VSTM, VRS_a, V, la2, 0, 0, 0, vstm, 0, IF_VEC)
David Hildenbrand0e0a5b42019-03-07 13:15:38 +0100[diff] [blame]1046/* VECTOR STORE WITH LENGTH */
1047 F(0xe73f, VSTL, VRS_b, V, la2, r3_32u, 0, 0, vstl, 0, IF_VEC)
David Hildenbrand2c7590c2019-03-07 13:15:39 +0100[diff] [blame]1048/* VECTOR UNPACK HIGH */
1049 F(0xe7d7, VUPH, VRR_a, V, 0, 0, 0, 0, vup, 0, IF_VEC)
1050/* VECTOR UNPACK LOGICAL HIGH */
1051 F(0xe7d5, VUPLH, VRR_a, V, 0, 0, 0, 0, vup, 0, IF_VEC)
1052/* VECTOR UNPACK LOW */
1053 F(0xe7d6, VUPL, VRR_a, V, 0, 0, 0, 0, vup, 0, IF_VEC)
1054/* VECTOR UNPACK LOGICAL LOW */
1055 F(0xe7d4, VUPLL, VRR_a, V, 0, 0, 0, 0, vup, 0, IF_VEC)
David Hildenbrand6d841662019-03-07 13:15:11 +0100[diff] [blame]1056
David Hildenbrandb1e67c82019-04-10 23:08:40 +0200[diff] [blame]1057/* === Vector Integer Instructions === */
1058
1059/* VECTOR ADD */
1060 F(0xe7f3, VA, VRR_c, V, 0, 0, 0, 0, va, 0, IF_VEC)
David Hildenbrandc563f282019-04-10 23:15:30 +0200[diff] [blame]1061/* VECTOR ADD COMPUTE CARRY */
1062 F(0xe7f1, VACC, VRR_c, V, 0, 0, 0, 0, vacc, 0, IF_VEC)
David Hildenbrand8d4eb4b2019-04-10 23:22:57 +0200[diff] [blame]1063/* VECTOR ADD WITH CARRY */
1064 F(0xe7bb, VAC, VRR_d, V, 0, 0, 0, 0, vac, 0, IF_VEC)
David Hildenbrand8a931bb2019-04-10 23:25:46 +0200[diff] [blame]1065/* VECTOR ADD WITH CARRY COMPUTE CARRY */
1066 F(0xe7b9, VACCC, VRR_d, V, 0, 0, 0, 0, vaccc, 0, IF_VEC)
David Hildenbrand4c1bd092019-03-18 00:04:51 +0100[diff] [blame]1067/* VECTOR AND */
1068 F(0xe768, VN, VRR_c, V, 0, 0, 0, 0, vn, 0, IF_VEC)
1069/* VECTOR AND WITH COMPLEMENT */
1070 F(0xe769, VNC, VRR_c, V, 0, 0, 0, 0, vnc, 0, IF_VEC)
David Hildenbrandc1a81d42019-04-11 09:31:04 +0200[diff] [blame]1071/* VECTOR AVERAGE */
1072 F(0xe7f2, VAVG, VRR_c, V, 0, 0, 0, 0, vavg, 0, IF_VEC)
David Hildenbrand801aa782019-04-11 09:41:29 +0200[diff] [blame]1073/* VECTOR AVERAGE LOGICAL */
1074 F(0xe7f0, VAVGL, VRR_c, V, 0, 0, 0, 0, vavgl, 0, IF_VEC)
David Hildenbrandb0160ec2019-03-20 23:18:59 +0100[diff] [blame]1075/* VECTOR CHECKSUM */
1076 F(0xe766, VCKSM, VRR_c, V, 0, 0, 0, 0, vcksm, 0, IF_VEC)
David Hildenbrand751a5642019-04-11 09:50:42 +0200[diff] [blame]1077/* VECTOR ELEMENT COMPARE */
1078 F(0xe7db, VEC, VRR_a, V, 0, 0, 0, 0, vec, cmps64, IF_VEC)
1079/* VECTOR ELEMENT COMPARE LOGICAL */
1080 F(0xe7d9, VECL, VRR_a, V, 0, 0, 0, 0, vec, cmpu64, IF_VEC)
David Hildenbrandff825c62019-04-11 10:00:25 +0200[diff] [blame]1081/* VECTOR COMPARE EQUAL */
1082 E(0xe7f8, VCEQ, VRR_b, V, 0, 0, 0, 0, vc, 0, TCG_COND_EQ, IF_VEC)
1083/* VECTOR COMPARE HIGH */
1084 E(0xe7fb, VCH, VRR_b, V, 0, 0, 0, 0, vc, 0, TCG_COND_GT, IF_VEC)
1085/* VECTOR COMPARE HIGH LOGICAL */
1086 E(0xe7f9, VCHL, VRR_b, V, 0, 0, 0, 0, vc, 0, TCG_COND_GTU, IF_VEC)
David Hildenbrand28863f12019-04-04 14:37:17 +0200[diff] [blame]1087/* VECTOR COUNT LEADING ZEROS */
1088 F(0xe753, VCLZ, VRR_a, V, 0, 0, 0, 0, vclz, 0, IF_VEC)
David Hildenbrand449a8ac2019-03-21 10:36:26 +0100[diff] [blame]1089/* VECTOR COUNT TRAILING ZEROS */
1090 F(0xe752, VCTZ, VRR_a, V, 0, 0, 0, 0, vctz, 0, IF_VEC)
David Hildenbrand44951e62019-04-11 10:07:35 +0200[diff] [blame]1091/* VECTOR EXCLUSIVE OR */
1092 F(0xe76d, VX, VRR_c, V, 0, 0, 0, 0, vx, 0, IF_VEC)
David Hildenbrand697a45d2019-04-11 11:54:53 +0200[diff] [blame]1093/* VECTOR GALOIS FIELD MULTIPLY SUM */
1094 F(0xe7b4, VGFM, VRR_c, V, 0, 0, 0, 0, vgfm, 0, IF_VEC)
1095/* VECTOR GALOIS FIELD MULTIPLY SUM AND ACCUMULATE */
1096 F(0xe7bc, VGFMA, VRR_d, V, 0, 0, 0, 0, vgfma, 0, IF_VEC)
David Hildenbrand53e0ca22019-04-11 10:41:48 +0200[diff] [blame]1097/* VECTOR LOAD COMPLEMENT */
1098 F(0xe7de, VLC, VRR_a, V, 0, 0, 0, 0, vlc, 0, IF_VEC)
David Hildenbrand35f0ba52019-04-11 10:43:39 +0200[diff] [blame]1099/* VECTOR LOAD POSITIVE */
1100 F(0xe7df, VLP, VRR_a, V, 0, 0, 0, 0, vlp, 0, IF_VEC)
David Hildenbrand86f521b2019-04-11 11:49:12 +0200[diff] [blame]1101/* VECTOR MAXIMUM */
1102 F(0xe7ff, VMX, VRR_c, V, 0, 0, 0, 0, vmx, 0, IF_VEC)
1103/* VECTOR MAXIMUM LOGICAL */
1104 F(0xe7fd, VMXL, VRR_c, V, 0, 0, 0, 0, vmx, 0, IF_VEC)
1105/* VECTOR MINIMUM */
1106 F(0xe7fe, VMN, VRR_c, V, 0, 0, 0, 0, vmx, 0, IF_VEC)
1107/* VECTOR MINIMUM LOGICAL */
1108 F(0xe7fc, VMNL, VRR_c, V, 0, 0, 0, 0, vmx, 0, IF_VEC)
David Hildenbrand1b430ae2019-04-11 11:56:49 +0200[diff] [blame]1109/* VECTOR MULTIPLY AND ADD LOW */
1110 F(0xe7aa, VMAL, VRR_d, V, 0, 0, 0, 0, vma, 0, IF_VEC)
1111/* VECTOR MULTIPLY AND ADD HIGH */
1112 F(0xe7ab, VMAH, VRR_d, V, 0, 0, 0, 0, vma, 0, IF_VEC)
1113/* VECTOR MULTIPLY AND ADD LOGICAL HIGH */
1114 F(0xe7a9, VMALH, VRR_d, V, 0, 0, 0, 0, vma, 0, IF_VEC)
1115/* VECTOR MULTIPLY AND ADD EVEN */
1116 F(0xe7ae, VMAE, VRR_d, V, 0, 0, 0, 0, vma, 0, IF_VEC)
1117/* VECTOR MULTIPLY AND ADD LOGICAL EVEN */
1118 F(0xe7ac, VMALE, VRR_d, V, 0, 0, 0, 0, vma, 0, IF_VEC)
1119/* VECTOR MULTIPLY AND ADD ODD */
1120 F(0xe7af, VMAO, VRR_d, V, 0, 0, 0, 0, vma, 0, IF_VEC)
1121/* VECTOR MULTIPLY AND ADD LOGICAL ODD */
1122 F(0xe7ad, VMALO, VRR_d, V, 0, 0, 0, 0, vma, 0, IF_VEC)
David Hildenbrand2bf3ee32019-04-11 11:58:46 +0200[diff] [blame]1123/* VECTOR MULTIPLY HIGH */
1124 F(0xe7a3, VMH, VRR_c, V, 0, 0, 0, 0, vm, 0, IF_VEC)
1125/* VECTOR MULTIPLY LOGICAL HIGH */
1126 F(0xe7a1, VMLH, VRR_c, V, 0, 0, 0, 0, vm, 0, IF_VEC)
1127/* VECTOR MULTIPLY LOW */
1128 F(0xe7a2, VML, VRR_c, V, 0, 0, 0, 0, vm, 0, IF_VEC)
1129/* VECTOR MULTIPLY EVEN */
1130 F(0xe7a6, VME, VRR_c, V, 0, 0, 0, 0, vm, 0, IF_VEC)
1131/* VECTOR MULTIPLY LOGICAL EVEN */
1132 F(0xe7a4, VMLE, VRR_c, V, 0, 0, 0, 0, vm, 0, IF_VEC)
1133/* VECTOR MULTIPLY ODD */
1134 F(0xe7a7, VMO, VRR_c, V, 0, 0, 0, 0, vm, 0, IF_VEC)
1135/* VECTOR MULTIPLY LOGICAL ODD */
1136 F(0xe7a5, VMLO, VRR_c, V, 0, 0, 0, 0, vm, 0, IF_VEC)
David Hildenbrand5bc4a202019-04-11 11:00:30 +0200[diff] [blame]1137/* VECTOR NAND */
1138 F(0xe76e, VNN, VRR_c, VE, 0, 0, 0, 0, vnn, 0, IF_VEC)
David Hildenbrand2a01d942019-04-05 15:52:09 +0200[diff] [blame]1139/* VECTOR NOR */
1140 F(0xe76b, VNO, VRR_c, V, 0, 0, 0, 0, vno, 0, IF_VEC)
David Hildenbrand90234342019-04-11 11:12:17 +0200[diff] [blame]1141/* VECTOR NOT EXCLUSIVE OR */
1142 F(0xe76c, VNX, VRR_c, VE, 0, 0, 0, 0, vnx, 0, IF_VEC)
David Hildenbrand2bbf4df2019-04-11 11:12:42 +0200[diff] [blame]1143/* VECTOR OR */
1144 F(0xe76a, VO, VRR_c, V, 0, 0, 0, 0, vo, 0, IF_VEC)
David Hildenbranda014bcc2019-04-11 11:14:29 +0200[diff] [blame]1145/* VECTOR OR WITH COMPLEMENT */
1146 F(0xe76f, VOC, VRR_c, VE, 0, 0, 0, 0, voc, 0, IF_VEC)
David Hildenbrandc3838aa2019-04-11 11:14:49 +0200[diff] [blame]1147/* VECTOR POPULATION COUNT */
1148 F(0xe750, VPOPCT, VRR_a, V, 0, 0, 0, 0, vpopct, 0, IF_VEC)
David Hildenbrand55236da2019-04-11 11:19:38 +0200[diff] [blame]1149/* VECTOR ELEMENT ROTATE LEFT LOGICAL */
1150 F(0xe773, VERLLV, VRR_c, V, 0, 0, 0, 0, verllv, 0, IF_VEC)
1151 F(0xe733, VERLL, VRS_a, V, la2, 0, 0, 0, verll, 0, IF_VEC)
David Hildenbrand5c4b0ab2019-04-11 11:27:29 +0200[diff] [blame]1152/* VECTOR ELEMENT ROTATE AND INSERT UNDER MASK */
1153 F(0xe772, VERIM, VRI_d, V, 0, 0, 0, 0, verim, 0, IF_VEC)
David Hildenbrand5f164902019-04-11 11:59:30 +0200[diff] [blame]1154/* VECTOR ELEMENT SHIFT LEFT */
1155 F(0xe770, VESLV, VRR_c, V, 0, 0, 0, 0, vesv, 0, IF_VEC)
1156 F(0xe730, VESL, VRS_a, V, la2, 0, 0, 0, ves, 0, IF_VEC)
1157/* VECTOR ELEMENT SHIFT RIGHT ARITHMETIC */
1158 F(0xe77a, VESRAV, VRR_c, V, 0, 0, 0, 0, vesv, 0, IF_VEC)
1159 F(0xe73a, VESRA, VRS_a, V, la2, 0, 0, 0, ves, 0, IF_VEC)
1160/* VECTOR ELEMENT SHIFT RIGHT LOGICAL */
1161 F(0xe778, VESRLV, VRR_c, V, 0, 0, 0, 0, vesv, 0, IF_VEC)
1162 F(0xe738, VESRL, VRS_a, V, la2, 0, 0, 0, ves, 0, IF_VEC)
David Hildenbranddea33fc2019-04-08 22:50:06 +0200[diff] [blame]1163/* VECTOR SHIFT LEFT */
1164 F(0xe774, VSL, VRR_c, V, 0, 0, 0, 0, vsl, 0, IF_VEC)
1165/* VECTOR SHIFT LEFT BY BYTE */
1166 F(0xe775, VSLB, VRR_c, V, 0, 0, 0, 0, vsl, 0, IF_VEC)
David Hildenbrand0abddd62019-04-11 11:39:23 +0200[diff] [blame]1167/* VECTOR SHIFT LEFT DOUBLE BY BYTE */
1168 F(0xe777, VSLDB, VRI_d, V, 0, 0, 0, 0, vsldb, 0, IF_VEC)
David Hildenbrand5f724882019-04-11 11:41:47 +0200[diff] [blame]1169/* VECTOR SHIFT RIGHT ARITHMETIC */
1170 F(0xe77e, VSRA, VRR_c, V, 0, 0, 0, 0, vsra, 0, IF_VEC)
1171/* VECTOR SHIFT RIGHT ARITHMETIC BY BYTE */
1172 F(0xe77f, VSRAB, VRR_c, V, 0, 0, 0, 0, vsra, 0, IF_VEC)
David Hildenbrand81122742019-04-11 11:42:34 +0200[diff] [blame]1173/* VECTOR SHIFT RIGHT LOGICAL */
1174 F(0xe77c, VSRL, VRR_c, V, 0, 0, 0, 0, vsrl, 0, IF_VEC)
1175/* VECTOR SHIFT RIGHT LOGICAL BY BYTE */
1176 F(0xe77d, VSRLB, VRR_c, V, 0, 0, 0, 0, vsrl, 0, IF_VEC)
David Hildenbrandea8d7842019-04-10 21:37:24 +0200[diff] [blame]1177/* VECTOR SUBTRACT */
1178 F(0xe7f7, VS, VRR_c, V, 0, 0, 0, 0, vs, 0, IF_VEC)
David Hildenbrand1ee2d7b2019-04-10 22:22:36 +0200[diff] [blame]1179/* VECTOR SUBTRACT COMPUTE BORROW INDICATION */
1180 F(0xe7f5, VSCBI, VRR_c, V, 0, 0, 0, 0, vscbi, 0, IF_VEC)
David Hildenbrand48390a72019-04-10 22:15:07 +0200[diff] [blame]1181/* VECTOR SUBTRACT WITH BORROW INDICATION */
1182 F(0xe7bf, VSBI, VRR_d, V, 0, 0, 0, 0, vsbi, 0, IF_VEC)
David Hildenbrandbc725e62019-04-09 23:26:47 +0200[diff] [blame]1183/* VECTOR SUBTRACT WITH BORROW COMPUTE BORROW INDICATION */
1184 F(0xe7bd, VSBCBI, VRR_d, V, 0, 0, 0, 0, vsbcbi, 0, IF_VEC)
David Hildenbrandfe2be362019-04-10 22:48:25 +0200[diff] [blame]1185/* VECTOR SUM ACROSS DOUBLEWORD */
1186 F(0xe765, VSUMG, VRR_c, V, 0, 0, 0, 0, vsumg, 0, IF_VEC)
David Hildenbrand8dc69a12019-04-10 22:40:01 +0200[diff] [blame]1187/* VECTOR SUM ACROSS QUADWORD */
1188 F(0xe767, VSUMQ, VRR_c, V, 0, 0, 0, 0, vsumq, 0, IF_VEC)
David Hildenbrande58de342019-04-10 22:45:35 +0200[diff] [blame]1189/* VECTOR SUM ACROSS WORD */
1190 F(0xe764, VSUM, VRR_c, V, 0, 0, 0, 0, vsum, 0, IF_VEC)
David Hildenbranddb156eb2019-04-10 22:55:16 +0200[diff] [blame]1191/* VECTOR TEST UNDER MASK */
1192 F(0xe7d8, VTM, VRR_a, V, 0, 0, 0, 0, vtm, 0, IF_VEC)
David Hildenbrandb1e67c82019-04-10 23:08:40 +0200[diff] [blame]1193
David Hildenbrand1fd28632019-05-23 15:09:49 +0200[diff] [blame]1194/* === Vector String Instructions === */
1195
1196/* VECTOR FIND ANY ELEMENT EQUAL */
1197 F(0xe782, VFAE, VRR_b, V, 0, 0, 0, 0, vfae, 0, IF_VEC)
David Hildenbrand8c0e1e52019-05-24 11:25:58 +0200[diff] [blame]1198/* VECTOR FIND ELEMENT EQUAL */
1199 F(0xe780, VFEE, VRR_b, V, 0, 0, 0, 0, vfee, 0, IF_VEC)
David Hildenbrand074e99b2019-05-24 11:26:45 +0200[diff] [blame]1200/* VECTOR FIND ELEMENT NOT EQUAL */
1201 F(0xe781, VFENE, VRR_b, V, 0, 0, 0, 0, vfene, 0, IF_VEC)
David Hildenbrandbe6324c2019-05-24 11:27:56 +0200[diff] [blame]1202/* VECTOR ISOLATE STRING */
1203 F(0xe75c, VISTR, VRR_a, V, 0, 0, 0, 0, vistr, 0, IF_VEC)
David Hildenbrand13b02282019-05-24 11:23:49 +0200[diff] [blame]1204/* VECTOR STRING RANGE COMPARE */
1205 F(0xe78a, VSTRC, VRR_d, V, 0, 0, 0, 0, vstrc, 0, IF_VEC)
David Hildenbrand1fd28632019-05-23 15:09:49 +0200[diff] [blame]1206
David Hildenbrand3a0eae82019-05-29 21:21:21 +0200[diff] [blame]1207/* === Vector Floating-Point Instructions */
1208
1209/* VECTOR FP ADD */
1210 F(0xe7e3, VFA, VRR_c, V, 0, 0, 0, 0, vfa, 0, IF_VEC)
David Hildenbrand5b89f0f2019-05-29 21:30:56 +0200[diff] [blame]1211/* VECTOR FP COMPARE SCALAR */
1212 F(0xe7cb, WFC, VRR_a, V, 0, 0, 0, 0, wfc, 0, IF_VEC)
1213/* VECTOR FP COMPARE AND SIGNAL SCALAR */
1214 F(0xe7ca, WFK, VRR_a, V, 0, 0, 0, 0, wfc, 0, IF_VEC)
David Hildenbrand2c806ab2019-05-29 21:35:08 +0200[diff] [blame]1215/* VECTOR FP COMPARE EQUAL */
1216 F(0xe7e8, VFCE, VRR_c, V, 0, 0, 0, 0, vfc, 0, IF_VEC)
1217/* VECTOR FP COMPARE HIGH */
1218 F(0xe7eb, VFCH, VRR_c, V, 0, 0, 0, 0, vfc, 0, IF_VEC)
1219/* VECTOR FP COMPARE HIGH OR EQUAL */
1220 F(0xe7ea, VFCHE, VRR_c, V, 0, 0, 0, 0, vfc, 0, IF_VEC)
David Hildenbrandbb03fd82019-05-29 21:42:05 +0200[diff] [blame]1221/* VECTOR FP CONVERT FROM FIXED 64-BIT */
1222 F(0xe7c3, VCDG, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC)
David Hildenbrand9b8d1a32019-05-29 21:47:20 +0200[diff] [blame]1223/* VECTOR FP CONVERT FROM LOGICAL 64-BIT */
1224 F(0xe7c1, VCDLG, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC)
David Hildenbrand35b3bb12019-05-29 21:49:52 +0200[diff] [blame]1225/* VECTOR FP CONVERT TO FIXED 64-BIT */
1226 F(0xe7c2, VCGD, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC)
David Hildenbrand09c04e42019-05-29 21:51:23 +0200[diff] [blame]1227/* VECTOR FP CONVERT TO LOGICAL 64-BIT */
1228 F(0xe7c0, VCLGD, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC)
David Hildenbrand817a1ce2019-05-29 21:54:33 +0200[diff] [blame]1229/* VECTOR FP DIVIDE */
1230 F(0xe7e5, VFD, VRR_c, V, 0, 0, 0, 0, vfa, 0, IF_VEC)
David Hildenbrand60d0ab22019-05-29 21:57:10 +0200[diff] [blame]1231/* VECTOR LOAD FP INTEGER */
1232 F(0xe7c7, VFI, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC)
David Hildenbrand1a76e592019-05-29 22:02:09 +0200[diff] [blame]1233/* VECTOR LOAD LENGTHENED */
1234 F(0xe7c4, VFLL, VRR_a, V, 0, 0, 0, 0, vfll, 0, IF_VEC)
David Hildenbrand4500ede2019-05-29 22:06:42 +0200[diff] [blame]1235/* VECTOR LOAD ROUNDED */
1236 F(0xe7c5, VFLR, VRR_a, V, 0, 0, 0, 0, vcdg, 0, IF_VEC)
David Hildenbrand8d47d4d2019-05-29 22:09:33 +0200[diff] [blame]1237/* VECTOR FP MULTIPLY */
1238 F(0xe7e7, VFM, VRR_c, V, 0, 0, 0, 0, vfa, 0, IF_VEC)
David Hildenbrandc64c5982019-05-29 22:17:09 +0200[diff] [blame]1239/* VECTOR FP MULTIPLY AND ADD */
1240 F(0xe78f, VFMA, VRR_e, V, 0, 0, 0, 0, vfma, 0, IF_VEC)
1241/* VECTOR FP MULTIPLY AND SUBTRACT */
1242 F(0xe78e, VFMS, VRR_e, V, 0, 0, 0, 0, vfma, 0, IF_VEC)
David Hildenbrand76e35cc2019-05-29 22:18:57 +0200[diff] [blame]1243/* VECTOR FP PERFORM SIGN OPERATION */
1244 F(0xe7cc, VFPSO, VRR_a, V, 0, 0, 0, 0, vfpso, 0, IF_VEC)
David Hildenbrand5938f202019-05-29 22:22:35 +0200[diff] [blame]1245/* VECTOR FP SQUARE ROOT */
1246 F(0xe7ce, VFSQ, VRR_a, V, 0, 0, 0, 0, vfsq, 0, IF_VEC)
David Hildenbrand658a3952019-05-29 22:25:34 +0200[diff] [blame]1247/* VECTOR FP SUBTRACT */
1248 F(0xe7e2, VFS, VRR_c, V, 0, 0, 0, 0, vfa, 0, IF_VEC)
David Hildenbrand83b955f2019-05-29 22:27:21 +0200[diff] [blame]1249/* VECTOR FP TEST DATA CLASS IMMEDIATE */
1250 F(0xe74a, VFTCI, VRI_e, V, 0, 0, 0, 0, vftci, 0, IF_VEC)
David Hildenbrand3a0eae82019-05-29 21:21:21 +0200[diff] [blame]1251
Richard Hendersond9a39922012-08-20 16:28:56 -0700[diff] [blame]1252#ifndef CONFIG_USER_ONLY
Richard Henderson3d596f42012-08-27 09:57:18 -0700[diff] [blame]1253/* COMPARE AND SWAP AND PURGE */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1254 E(0xb250, CSP, RRE, Z, r1_32u, ra2, r1_P, 0, csp, 0, MO_TEUL, IF_PRIV)
1255 E(0xb98a, CSPG, RRE, DAT_ENH, r1_o, ra2, r1_P, 0, csp, 0, MO_TEQ, IF_PRIV)
Richard Henderson972e35b2012-08-21 14:41:36 -0700[diff] [blame]1256/* DIAGNOSE (KVM hypercall) */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1257 F(0x8300, DIAG, RSI, Z, 0, 0, 0, 0, diag, 0, IF_PRIV)
Richard Henderson80264172012-08-27 09:13:38 -0700[diff] [blame]1258/* INSERT STORAGE KEY EXTENDED */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1259 F(0xb229, ISKE, RRE, Z, 0, r2_o, new, r1_8, iske, 0, IF_PRIV)
David Hildenbrandbe7f28d2017-06-22 11:41:51 +0200[diff] [blame]1260/* INVALIDATE DAT TABLE ENTRY */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1261 F(0xb98e, IPDE, RRF_b, Z, r1_o, r2_o, 0, 0, idte, 0, IF_PRIV)
Richard Hendersoncfef53e2012-08-24 16:25:28 -0700[diff] [blame]1262/* INVALIDATE PAGE TABLE ENTRY */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1263 F(0xb221, IPTE, RRF_a, Z, r1_o, r2_o, 0, 0, ipte, 0, IF_PRIV)
Richard Henderson504488b2012-08-22 14:17:58 -0700[diff] [blame]1264/* LOAD CONTROL */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1265 F(0xb700, LCTL, RS_a, Z, 0, a2, 0, 0, lctl, 0, IF_PRIV)
1266 F(0xeb2f, LCTLG, RSY_a, Z, 0, a2, 0, 0, lctlg, 0, IF_PRIV)
Miroslav Benes190b2422017-02-27 09:53:53 +0100[diff] [blame]1267/* LOAD PROGRAM PARAMETER */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1268 F(0xb280, LPP, S, LPP, 0, m2_64, 0, 0, lpp, 0, IF_PRIV)
Richard Henderson8b5ff572012-08-21 14:33:36 -0700[diff] [blame]1269/* LOAD PSW */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1270 F(0x8200, LPSW, S, Z, 0, a2, 0, 0, lpsw, 0, IF_PRIV)
Richard Henderson7ab938d2012-08-27 11:04:48 -0700[diff] [blame]1271/* LOAD PSW EXTENDED */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1272 F(0xb2b2, LPSWE, S, Z, 0, a2, 0, 0, lpswe, 0, IF_PRIV)
Richard Hendersond8fe4a92012-08-22 13:15:10 -0700[diff] [blame]1273/* LOAD REAL ADDRESS */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1274 F(0xb100, LRA, RX_a, Z, 0, a2, r1, 0, lra, 0, IF_PRIV)
1275 F(0xe313, LRAY, RXY_a, LD, 0, a2, r1, 0, lra, 0, IF_PRIV)
1276 F(0xe303, LRAG, RXY_a, Z, 0, a2, r1, 0, lra, 0, IF_PRIV)
Richard Henderson9c3fd852013-09-20 13:04:28 -0700[diff] [blame]1277/* LOAD USING REAL ADDRESS */
Richard Henderson5e34df72019-12-11 12:36:14 -0800[diff] [blame]1278 E(0xb24b, LURA, RRE, Z, 0, 0, new, r1_32, lura, 0, MO_TEUL, IF_PRIV)
1279 E(0xb905, LURAG, RRE, Z, 0, 0, r1, 0, lura, 0, MO_TEQ, IF_PRIV)
Richard Henderson97c3ab62012-08-22 13:00:27 -0700[diff] [blame]1280/* MOVE TO PRIMARY */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1281 F(0xda00, MVCP, SS_d, Z, la1, a2, 0, 0, mvcp, 0, IF_PRIV)
Richard Henderson97c3ab62012-08-22 13:00:27 -0700[diff] [blame]1282/* MOVE TO SECONDARY */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1283 F(0xdb00, MVCS, SS_d, Z, la1, a2, 0, 0, mvcs, 0, IF_PRIV)
Richard Henderson0568d8a2012-08-24 15:59:26 -0700[diff] [blame]1284/* PURGE TLB */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1285 F(0xb20d, PTLB, S, Z, 0, 0, 0, 0, ptlb, 0, IF_PRIV)
Richard Henderson5cc69c52012-08-27 09:22:13 -0700[diff] [blame]1286/* RESET REFERENCE BIT EXTENDED */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1287 F(0xb22a, RRBE, RRE, Z, 0, r2_o, 0, 0, rrbe, 0, IF_PRIV)
Richard Hendersondc458df2012-08-27 11:12:40 -0700[diff] [blame]1288/* SERVICE CALL LOGICAL PROCESSOR (PV hypercall) */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1289 F(0xb220, SERVC, RRE, Z, r1_o, r2_o, 0, 0, servc, 0, IF_PRIV)
Richard Henderson14244b22012-08-27 10:17:16 -0700[diff] [blame]1290/* SET ADDRESS SPACE CONTROL FAST */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1291 F(0xb279, SACF, S, Z, 0, a2, 0, 0, sacf, 0, IF_PRIV)
Richard Henderson35289792012-08-24 15:20:49 -0700[diff] [blame]1292/* SET CLOCK */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1293 F(0xb204, SCK, S, Z, la2, 0, 0, 0, sck, 0, IF_PRIV)
Richard Hendersondd3eb7b2012-08-24 15:36:58 -0700[diff] [blame]1294/* SET CLOCK COMPARATOR */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1295 F(0xb206, SCKC, S, Z, 0, m2_64a, 0, 0, sckc, 0, IF_PRIV)
David Hildenbrand257a1192017-12-08 17:01:56 +0100[diff] [blame]1296/* SET CLOCK PROGRAMMABLE FIELD */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1297 F(0x0107, SCKPF, E, Z, 0, 0, 0, 0, sckpf, 0, IF_PRIV)
Richard Hendersonc4f0a862012-08-24 15:47:26 -0700[diff] [blame]1298/* SET CPU TIMER */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1299 F(0xb208, SPT, S, Z, 0, m2_64a, 0, 0, spt, 0, IF_PRIV)
Richard Hendersone805a0d2012-08-24 16:11:32 -0700[diff] [blame]1300/* SET PREFIX */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1301 F(0xb210, SPX, S, Z, 0, m2_32ua, 0, 0, spx, 0, IF_PRIV)
Richard Henderson28d555562012-08-24 15:55:34 -0700[diff] [blame]1302/* SET PSW KEY FROM ADDRESS */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1303 F(0xb20a, SPKA, S, Z, 0, a2, 0, 0, spka, 0, IF_PRIV)
Richard Henderson2bbde272012-08-27 09:18:01 -0700[diff] [blame]1304/* SET STORAGE KEY EXTENDED */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1305 F(0xb22b, SSKE, RRF_c, Z, r1_o, r2_o, 0, 0, sske, 0, IF_PRIV)
Richard Henderson7d30bb72012-08-21 14:12:50 -0700[diff] [blame]1306/* SET SYSTEM MASK */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1307 F(0x8000, SSM, S, Z, 0, m2_8u, 0, 0, ssm, 0, IF_PRIV)
Richard Henderson0c240012012-08-22 13:52:23 -0700[diff] [blame]1308/* SIGNAL PROCESSOR */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1309 F(0xae00, SIGP, RS_a, Z, 0, a2, 0, 0, sigp, 0, IF_PRIV)
Richard Hendersondd3eb7b2012-08-24 15:36:58 -0700[diff] [blame]1310/* STORE CLOCK COMPARATOR */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1311 F(0xb207, STCKC, S, Z, la2, 0, new, m1_64a, stckc, 0, IF_PRIV)
Richard Henderson504488b2012-08-22 14:17:58 -0700[diff] [blame]1312/* STORE CONTROL */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1313 F(0xb600, STCTL, RS_a, Z, 0, a2, 0, 0, stctl, 0, IF_PRIV)
1314 F(0xeb25, STCTG, RSY_a, Z, 0, a2, 0, 0, stctg, 0, IF_PRIV)
Richard Henderson411fea32012-08-24 16:18:33 -0700[diff] [blame]1315/* STORE CPU ADDRESS */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1316 F(0xb212, STAP, S, Z, la2, 0, new, m1_16a, stap, 0, IF_PRIV)
Richard Henderson71bd6662012-09-05 10:21:47 -0700[diff] [blame]1317/* STORE CPU ID */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1318 F(0xb202, STIDP, S, Z, la2, 0, new, m1_64a, stidp, 0, IF_PRIV)
Richard Hendersonc4f0a862012-08-24 15:47:26 -0700[diff] [blame]1319/* STORE CPU TIMER */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1320 F(0xb209, STPT, S, Z, la2, 0, new, m1_64a, stpt, 0, IF_PRIV)
Richard Hendersonfc778b52012-08-27 10:58:59 -0700[diff] [blame]1321/* STORE FACILITY LIST */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1322 F(0xb2b1, STFL, S, Z, 0, 0, 0, 0, stfl, 0, IF_PRIV)
Richard Hendersone805a0d2012-08-24 16:11:32 -0700[diff] [blame]1323/* STORE PREFIX */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1324 F(0xb211, STPX, S, Z, la2, 0, new, m1_32a, stpx, 0, IF_PRIV)
Richard Hendersond14b3e02012-08-27 10:43:38 -0700[diff] [blame]1325/* STORE SYSTEM INFORMATION */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1326 F(0xb27d, STSI, S, Z, 0, a2, 0, 0, stsi, 0, IF_PRIV)
Richard Henderson145cdb42012-08-22 11:08:40 -0700[diff] [blame]1327/* STORE THEN AND SYSTEM MASK */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1328 F(0xac00, STNSM, SI, Z, la1, 0, 0, 0, stnosm, 0, IF_PRIV)
Richard Henderson145cdb42012-08-22 11:08:40 -0700[diff] [blame]1329/* STORE THEN OR SYSTEM MASK */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1330 F(0xad00, STOSM, SI, Z, la1, 0, 0, 0, stnosm, 0, IF_PRIV)
Richard Henderson204504e2012-08-27 09:45:38 -0700[diff] [blame]1331/* STORE USING REAL ADDRESS */
Richard Henderson5e34df72019-12-11 12:36:14 -0800[diff] [blame]1332 E(0xb246, STURA, RRE, Z, r1_o, 0, 0, 0, stura, 0, MO_TEUL, IF_PRIV)
1333 E(0xb925, STURG, RRE, Z, r1_o, 0, 0, 0, stura, 0, MO_TEQ, IF_PRIV)
Thomas Huthf79f1ca2017-05-18 19:26:40 +0200[diff] [blame]1334/* TEST BLOCK */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1335 F(0xb22c, TB, RRE, Z, 0, r2_o, 0, 0, testblock, 0, IF_PRIV)
Richard Henderson112bf072012-08-22 15:15:59 -0700[diff] [blame]1336/* TEST PROTECTION */
1337 C(0xe501, TPROT, SSE, Z, la1, a2, 0, 0, tprot, 0)
Richard Henderson2c423fc2012-08-27 09:36:20 -0700[diff] [blame]1338
Alexander Grafad8a4572015-06-15 17:57:09 +0200[diff] [blame]1339/* CCW I/O Instructions */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1340 F(0xb276, XSCH, S, Z, 0, 0, 0, 0, xsch, 0, IF_PRIV)
1341 F(0xb230, CSCH, S, Z, 0, 0, 0, 0, csch, 0, IF_PRIV)
1342 F(0xb231, HSCH, S, Z, 0, 0, 0, 0, hsch, 0, IF_PRIV)
1343 F(0xb232, MSCH, S, Z, 0, insn, 0, 0, msch, 0, IF_PRIV)
1344 F(0xb23b, RCHP, S, Z, 0, 0, 0, 0, rchp, 0, IF_PRIV)
1345 F(0xb238, RSCH, S, Z, 0, 0, 0, 0, rsch, 0, IF_PRIV)
1346 F(0xb237, SAL, S, Z, 0, 0, 0, 0, sal, 0, IF_PRIV)
1347 F(0xb23c, SCHM, S, Z, 0, insn, 0, 0, schm, 0, IF_PRIV)
1348 F(0xb274, SIGA, S, Z, 0, 0, 0, 0, siga, 0, IF_PRIV)
1349 F(0xb23a, STCPS, S, Z, 0, 0, 0, 0, stcps, 0, IF_PRIV)
1350 F(0xb233, SSCH, S, Z, 0, insn, 0, 0, ssch, 0, IF_PRIV)
1351 F(0xb239, STCRW, S, Z, 0, insn, 0, 0, stcrw, 0, IF_PRIV)
1352 F(0xb234, STSCH, S, Z, 0, insn, 0, 0, stsch, 0, IF_PRIV)
1353 F(0xb236, TPI , S, Z, la2, 0, 0, 0, tpi, 0, IF_PRIV)
1354 F(0xb235, TSCH, S, Z, 0, insn, 0, 0, tsch, 0, IF_PRIV)
Richard Henderson2c423fc2012-08-27 09:36:20 -0700[diff] [blame]1355 /* ??? Not listed in PoO ninth edition, but there's a linux driver that
1356 uses it: "A CHSC subchannel is usually present on LPAR only." */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1357 F(0xb25f, CHSC, RRE, Z, 0, insn, 0, 0, chsc, 0, IF_PRIV)
Cornelia Huckf6c232c2017-11-16 10:09:53 +0100[diff] [blame]1358
1359/* zPCI Instructions */
1360 /* None of these instructions are documented in the PoP, so this is all
1361 based upon target/s390x/kvm.c and Linux code and likely incomplete */
David Hildenbrandb51cc1d2018-09-27 15:03:01 +0200[diff] [blame]1362 F(0xebd0, PCISTB, RSY_a, PCI, la2, 0, 0, 0, pcistb, 0, IF_PRIV)
1363 F(0xebd1, SIC, RSY_a, AIS, r1, r3, 0, 0, sic, 0, IF_PRIV)
1364 F(0xb9a0, CLP, RRF_c, PCI, 0, 0, 0, 0, clp, 0, IF_PRIV)
1365 F(0xb9d0, PCISTG, RRE, PCI, 0, 0, 0, 0, pcistg, 0, IF_PRIV)
1366 F(0xb9d2, PCILG, RRE, PCI, 0, 0, 0, 0, pcilg, 0, IF_PRIV)
1367 F(0xb9d3, RPCIT, RRE, PCI, 0, 0, 0, 0, rpcit, 0, IF_PRIV)
1368 F(0xe3d0, MPCIFC, RXY_a, PCI, la2, 0, 0, 0, mpcifc, 0, IF_PRIV)
1369 F(0xe3d4, STPCIFC, RXY_a, PCI, la2, 0, 0, 0, stpcifc, 0, IF_PRIV)
Cornelia Huckf6c232c2017-11-16 10:09:53 +0100[diff] [blame]1370
Richard Hendersond9a39922012-08-20 16:28:56 -0700[diff] [blame]1371#endif /* CONFIG_USER_ONLY */