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balrogadb86c32007-05-23 22:04:23 +00001/*
2 * WM8750 audio CODEC.
3 *
4 * Copyright (c) 2006 Openedhand Ltd.
5 * Written by Andrzej Zaborowski <balrog@zabor.org>
6 *
7 * This file is licensed under GNU GPL.
8 */
9
Peter Maydell6086a562016-01-18 17:33:52 +000010#include "qemu/osdep.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010011#include "hw/i2c/i2c.h"
Philippe Mathieu-Daudé7ab14c52017-09-19 09:30:53 -030012#include "hw/audio/wm8750.h"
pbrook87ecb682007-11-17 17:14:51 +000013#include "audio/audio.h"
balrogadb86c32007-05-23 22:04:23 +000014
15#define IN_PORT_N 3
16#define OUT_PORT_N 3
17
18#define CODEC "wm8750"
19
Paul Brookbc24a222009-05-10 01:44:56 +010020typedef struct {
21 int adc;
22 int adc_hz;
23 int dac;
24 int dac_hz;
25} WMRate;
26
Andreas Färberbc229b02013-12-19 22:04:29 +010027#define WM8750(obj) OBJECT_CHECK(WM8750State, (obj), TYPE_WM8750)
28
29typedef struct WM8750State {
30 I2CSlave parent_obj;
31
balrogadb86c32007-05-23 22:04:23 +000032 uint8_t i2c_data[2];
33 int i2c_len;
34 QEMUSoundCard card;
35 SWVoiceIn *adc_voice[IN_PORT_N];
36 SWVoiceOut *dac_voice[OUT_PORT_N];
37 int enable;
38 void (*data_req)(void *, int, int);
39 void *opaque;
40 uint8_t data_in[4096];
41 uint8_t data_out[4096];
42 int idx_in, req_in;
43 int idx_out, req_out;
44
45 SWVoiceOut **out[2];
46 uint8_t outvol[7], outmute[2];
47 SWVoiceIn **in[2];
48 uint8_t invol[4], inmute[2];
49
50 uint8_t diff[2], pol, ds, monomix[2], alc, mute;
51 uint8_t path[4], mpath[2], power, format;
Paul Brookbc24a222009-05-10 01:44:56 +010052 const WMRate *rate;
Juan Quintelac1d803b2009-09-29 22:48:31 +020053 uint8_t rate_vmstate;
balrogaf83e092008-05-04 12:15:51 +000054 int adc_hz, dac_hz, ext_adc_hz, ext_dac_hz, master;
Paul Brookbc24a222009-05-10 01:44:56 +010055} WM8750State;
balrogadb86c32007-05-23 22:04:23 +000056
balrogdb502b62008-05-04 10:55:25 +000057/* pow(10.0, -i / 20.0) * 255, i = 0..42 */
balrog683efdc2008-05-04 10:21:03 +000058static const uint8_t wm8750_vol_db_table[] = {
59 255, 227, 203, 181, 161, 143, 128, 114, 102, 90, 81, 72, 64, 57, 51, 45,
60 40, 36, 32, 29, 26, 23, 20, 18, 16, 14, 13, 11, 10, 9, 8, 7, 6, 6, 5, 5,
61 4, 4, 3, 3, 3, 2, 2
62};
63
balrogdb502b62008-05-04 10:55:25 +000064#define WM8750_OUTVOL_TRANSFORM(x) wm8750_vol_db_table[(0x7f - x) / 3]
65#define WM8750_INVOL_TRANSFORM(x) (x << 2)
balrog683efdc2008-05-04 10:21:03 +000066
Paul Brookbc24a222009-05-10 01:44:56 +010067static inline void wm8750_in_load(WM8750State *s)
balrogadb86c32007-05-23 22:04:23 +000068{
balrogadb86c32007-05-23 22:04:23 +000069 if (s->idx_in + s->req_in <= sizeof(s->data_in))
70 return;
71 s->idx_in = audio_MAX(0, (int) sizeof(s->data_in) - s->req_in);
Blue Swirl22ed1d342010-04-25 19:31:06 +000072 AUD_read(*s->in[0], s->data_in + s->idx_in,
73 sizeof(s->data_in) - s->idx_in);
balrogadb86c32007-05-23 22:04:23 +000074}
75
Paul Brookbc24a222009-05-10 01:44:56 +010076static inline void wm8750_out_flush(WM8750State *s)
balrogadb86c32007-05-23 22:04:23 +000077{
balrog523111e2008-04-24 21:01:40 +000078 int sent = 0;
79 while (sent < s->idx_out)
80 sent += AUD_write(*s->out[0], s->data_out + sent, s->idx_out - sent)
81 ?: s->idx_out;
balrogadb86c32007-05-23 22:04:23 +000082 s->idx_out = 0;
83}
84
85static void wm8750_audio_in_cb(void *opaque, int avail_b)
86{
Paul Brookbc24a222009-05-10 01:44:56 +010087 WM8750State *s = (WM8750State *) opaque;
balrogadb86c32007-05-23 22:04:23 +000088 s->req_in = avail_b;
89 s->data_req(s->opaque, s->req_out >> 2, avail_b >> 2);
balrogadb86c32007-05-23 22:04:23 +000090}
91
92static void wm8750_audio_out_cb(void *opaque, int free_b)
93{
Paul Brookbc24a222009-05-10 01:44:56 +010094 WM8750State *s = (WM8750State *) opaque;
balrogadb86c32007-05-23 22:04:23 +000095
balrog523111e2008-04-24 21:01:40 +000096 if (s->idx_out >= free_b) {
97 s->idx_out = free_b;
98 s->req_out = 0;
99 wm8750_out_flush(s);
100 } else
101 s->req_out = free_b - s->idx_out;
102
103 s->data_req(s->opaque, s->req_out >> 2, s->req_in >> 2);
balrogadb86c32007-05-23 22:04:23 +0000104}
105
Paul Brookbc24a222009-05-10 01:44:56 +0100106static const WMRate wm_rate_table[] = {
balrogadb86c32007-05-23 22:04:23 +0000107 { 256, 48000, 256, 48000 }, /* SR: 00000 */
108 { 384, 48000, 384, 48000 }, /* SR: 00001 */
109 { 256, 48000, 1536, 8000 }, /* SR: 00010 */
110 { 384, 48000, 2304, 8000 }, /* SR: 00011 */
111 { 1536, 8000, 256, 48000 }, /* SR: 00100 */
112 { 2304, 8000, 384, 48000 }, /* SR: 00101 */
113 { 1536, 8000, 1536, 8000 }, /* SR: 00110 */
114 { 2304, 8000, 2304, 8000 }, /* SR: 00111 */
115 { 1024, 12000, 1024, 12000 }, /* SR: 01000 */
116 { 1526, 12000, 1536, 12000 }, /* SR: 01001 */
117 { 768, 16000, 768, 16000 }, /* SR: 01010 */
118 { 1152, 16000, 1152, 16000 }, /* SR: 01011 */
119 { 384, 32000, 384, 32000 }, /* SR: 01100 */
120 { 576, 32000, 576, 32000 }, /* SR: 01101 */
121 { 128, 96000, 128, 96000 }, /* SR: 01110 */
122 { 192, 96000, 192, 96000 }, /* SR: 01111 */
123 { 256, 44100, 256, 44100 }, /* SR: 10000 */
124 { 384, 44100, 384, 44100 }, /* SR: 10001 */
125 { 256, 44100, 1408, 8018 }, /* SR: 10010 */
126 { 384, 44100, 2112, 8018 }, /* SR: 10011 */
127 { 1408, 8018, 256, 44100 }, /* SR: 10100 */
128 { 2112, 8018, 384, 44100 }, /* SR: 10101 */
129 { 1408, 8018, 1408, 8018 }, /* SR: 10110 */
130 { 2112, 8018, 2112, 8018 }, /* SR: 10111 */
131 { 1024, 11025, 1024, 11025 }, /* SR: 11000 */
132 { 1536, 11025, 1536, 11025 }, /* SR: 11001 */
133 { 512, 22050, 512, 22050 }, /* SR: 11010 */
134 { 768, 22050, 768, 22050 }, /* SR: 11011 */
135 { 512, 24000, 512, 24000 }, /* SR: 11100 */
136 { 768, 24000, 768, 24000 }, /* SR: 11101 */
137 { 128, 88200, 128, 88200 }, /* SR: 11110 */
balrog523111e2008-04-24 21:01:40 +0000138 { 192, 88200, 192, 88200 }, /* SR: 11111 */
balrogadb86c32007-05-23 22:04:23 +0000139};
140
Paul Brookbc24a222009-05-10 01:44:56 +0100141static void wm8750_vol_update(WM8750State *s)
balrog683efdc2008-05-04 10:21:03 +0000142{
143 /* FIXME: multiply all volumes by s->invol[2], s->invol[3] */
144
balrogdb502b62008-05-04 10:55:25 +0000145 AUD_set_volume_in(s->adc_voice[0], s->mute,
146 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
147 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
148 AUD_set_volume_in(s->adc_voice[1], s->mute,
149 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
150 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
151 AUD_set_volume_in(s->adc_voice[2], s->mute,
152 s->inmute[0] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[0]),
153 s->inmute[1] ? 0 : WM8750_INVOL_TRANSFORM(s->invol[1]));
balrog683efdc2008-05-04 10:21:03 +0000154
155 /* FIXME: multiply all volumes by s->outvol[0], s->outvol[1] */
156
157 /* Speaker: LOUT2VOL ROUT2VOL */
158 AUD_set_volume_out(s->dac_voice[0], s->mute,
balrogdb502b62008-05-04 10:55:25 +0000159 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[4]),
160 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[5]));
balrog683efdc2008-05-04 10:21:03 +0000161
balrogdb502b62008-05-04 10:55:25 +0000162 /* Headphone: LOUT1VOL ROUT1VOL */
balrog683efdc2008-05-04 10:21:03 +0000163 AUD_set_volume_out(s->dac_voice[1], s->mute,
balrogdb502b62008-05-04 10:55:25 +0000164 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[2]),
165 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[3]));
balrog683efdc2008-05-04 10:21:03 +0000166
167 /* MONOOUT: MONOVOL MONOVOL */
168 AUD_set_volume_out(s->dac_voice[2], s->mute,
balrogdb502b62008-05-04 10:55:25 +0000169 s->outmute[0] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[6]),
170 s->outmute[1] ? 0 : WM8750_OUTVOL_TRANSFORM(s->outvol[6]));
balrog683efdc2008-05-04 10:21:03 +0000171}
172
Paul Brookbc24a222009-05-10 01:44:56 +0100173static void wm8750_set_format(WM8750State *s)
balrogadb86c32007-05-23 22:04:23 +0000174{
175 int i;
malc1ea879e2008-12-03 22:48:44 +0000176 struct audsettings in_fmt;
177 struct audsettings out_fmt;
balrogadb86c32007-05-23 22:04:23 +0000178
179 wm8750_out_flush(s);
180
181 if (s->in[0] && *s->in[0])
182 AUD_set_active_in(*s->in[0], 0);
183 if (s->out[0] && *s->out[0])
184 AUD_set_active_out(*s->out[0], 0);
185
186 for (i = 0; i < IN_PORT_N; i ++)
187 if (s->adc_voice[i]) {
188 AUD_close_in(&s->card, s->adc_voice[i]);
blueswir1511d2b12009-03-07 15:32:56 +0000189 s->adc_voice[i] = NULL;
balrogadb86c32007-05-23 22:04:23 +0000190 }
191 for (i = 0; i < OUT_PORT_N; i ++)
192 if (s->dac_voice[i]) {
193 AUD_close_out(&s->card, s->dac_voice[i]);
blueswir1511d2b12009-03-07 15:32:56 +0000194 s->dac_voice[i] = NULL;
balrogadb86c32007-05-23 22:04:23 +0000195 }
196
197 if (!s->enable)
198 return;
199
200 /* Setup input */
201 in_fmt.endianness = 0;
202 in_fmt.nchannels = 2;
balrogaf83e092008-05-04 12:15:51 +0000203 in_fmt.freq = s->adc_hz;
balrogadb86c32007-05-23 22:04:23 +0000204 in_fmt.fmt = AUD_FMT_S16;
205
206 s->adc_voice[0] = AUD_open_in(&s->card, s->adc_voice[0],
207 CODEC ".input1", s, wm8750_audio_in_cb, &in_fmt);
208 s->adc_voice[1] = AUD_open_in(&s->card, s->adc_voice[1],
209 CODEC ".input2", s, wm8750_audio_in_cb, &in_fmt);
210 s->adc_voice[2] = AUD_open_in(&s->card, s->adc_voice[2],
211 CODEC ".input3", s, wm8750_audio_in_cb, &in_fmt);
212
213 /* Setup output */
214 out_fmt.endianness = 0;
215 out_fmt.nchannels = 2;
balrogaf83e092008-05-04 12:15:51 +0000216 out_fmt.freq = s->dac_hz;
balrogadb86c32007-05-23 22:04:23 +0000217 out_fmt.fmt = AUD_FMT_S16;
balrogadb86c32007-05-23 22:04:23 +0000218
219 s->dac_voice[0] = AUD_open_out(&s->card, s->dac_voice[0],
220 CODEC ".speaker", s, wm8750_audio_out_cb, &out_fmt);
221 s->dac_voice[1] = AUD_open_out(&s->card, s->dac_voice[1],
222 CODEC ".headphone", s, wm8750_audio_out_cb, &out_fmt);
223 /* MONOMIX is also in stereo for simplicity */
224 s->dac_voice[2] = AUD_open_out(&s->card, s->dac_voice[2],
225 CODEC ".monomix", s, wm8750_audio_out_cb, &out_fmt);
226 /* no sense emulating OUT3 which is a mix of other outputs */
227
balrog683efdc2008-05-04 10:21:03 +0000228 wm8750_vol_update(s);
229
balrogadb86c32007-05-23 22:04:23 +0000230 /* We should connect the left and right channels to their
231 * respective inputs/outputs but we have completely no need
232 * for mixing or combining paths to different ports, so we
233 * connect both channels to where the left channel is routed. */
234 if (s->in[0] && *s->in[0])
235 AUD_set_active_in(*s->in[0], 1);
236 if (s->out[0] && *s->out[0])
237 AUD_set_active_out(*s->out[0], 1);
238}
239
Paul Brookbc24a222009-05-10 01:44:56 +0100240static void wm8750_clk_update(WM8750State *s, int ext)
balrogaf83e092008-05-04 12:15:51 +0000241{
242 if (s->master || !s->ext_dac_hz)
243 s->dac_hz = s->rate->dac_hz;
244 else
245 s->dac_hz = s->ext_dac_hz;
246
247 if (s->master || !s->ext_adc_hz)
248 s->adc_hz = s->rate->adc_hz;
249 else
250 s->adc_hz = s->ext_adc_hz;
251
252 if (s->master || (!s->ext_dac_hz && !s->ext_adc_hz)) {
253 if (!ext)
254 wm8750_set_format(s);
255 } else {
256 if (ext)
257 wm8750_set_format(s);
258 }
259}
260
Anthony Liguori9e07bdf2011-12-04 20:28:27 -0600261static void wm8750_reset(I2CSlave *i2c)
balrogadb86c32007-05-23 22:04:23 +0000262{
Andreas Färberbc229b02013-12-19 22:04:29 +0100263 WM8750State *s = WM8750(i2c);
264
balrogeb69b502008-04-20 03:40:20 +0000265 s->rate = &wm_rate_table[0];
balrogadb86c32007-05-23 22:04:23 +0000266 s->enable = 0;
balrogaf83e092008-05-04 12:15:51 +0000267 wm8750_clk_update(s, 1);
balrogadb86c32007-05-23 22:04:23 +0000268 s->diff[0] = 0;
269 s->diff[1] = 0;
270 s->ds = 0;
271 s->alc = 0;
272 s->in[0] = &s->adc_voice[0];
273 s->invol[0] = 0x17;
274 s->invol[1] = 0x17;
275 s->invol[2] = 0xc3;
276 s->invol[3] = 0xc3;
277 s->out[0] = &s->dac_voice[0];
278 s->outvol[0] = 0xff;
279 s->outvol[1] = 0xff;
280 s->outvol[2] = 0x79;
281 s->outvol[3] = 0x79;
282 s->outvol[4] = 0x79;
283 s->outvol[5] = 0x79;
balrogdb502b62008-05-04 10:55:25 +0000284 s->outvol[6] = 0x79;
balrogadb86c32007-05-23 22:04:23 +0000285 s->inmute[0] = 0;
286 s->inmute[1] = 0;
287 s->outmute[0] = 0;
288 s->outmute[1] = 0;
289 s->mute = 1;
290 s->path[0] = 0;
291 s->path[1] = 0;
292 s->path[2] = 0;
293 s->path[3] = 0;
294 s->mpath[0] = 0;
295 s->mpath[1] = 0;
296 s->format = 0x0a;
297 s->idx_in = sizeof(s->data_in);
298 s->req_in = 0;
299 s->idx_out = 0;
300 s->req_out = 0;
balrog683efdc2008-05-04 10:21:03 +0000301 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000302 s->i2c_len = 0;
303}
304
Corey Minyardd307c282017-01-09 11:40:20 +0000305static int wm8750_event(I2CSlave *i2c, enum i2c_event event)
balrogadb86c32007-05-23 22:04:23 +0000306{
Andreas Färberbc229b02013-12-19 22:04:29 +0100307 WM8750State *s = WM8750(i2c);
balrogadb86c32007-05-23 22:04:23 +0000308
309 switch (event) {
310 case I2C_START_SEND:
311 s->i2c_len = 0;
312 break;
313 case I2C_FINISH:
314#ifdef VERBOSE
315 if (s->i2c_len < 2)
316 printf("%s: message too short (%i bytes)\n",
Alistair Francisa89f3642017-11-08 14:56:31 -0800317 __func__, s->i2c_len);
balrogadb86c32007-05-23 22:04:23 +0000318#endif
319 break;
320 default:
321 break;
322 }
Corey Minyardd307c282017-01-09 11:40:20 +0000323
324 return 0;
balrogadb86c32007-05-23 22:04:23 +0000325}
326
327#define WM8750_LINVOL 0x00
328#define WM8750_RINVOL 0x01
329#define WM8750_LOUT1V 0x02
330#define WM8750_ROUT1V 0x03
331#define WM8750_ADCDAC 0x05
332#define WM8750_IFACE 0x07
333#define WM8750_SRATE 0x08
334#define WM8750_LDAC 0x0a
335#define WM8750_RDAC 0x0b
336#define WM8750_BASS 0x0c
337#define WM8750_TREBLE 0x0d
338#define WM8750_RESET 0x0f
339#define WM8750_3D 0x10
340#define WM8750_ALC1 0x11
341#define WM8750_ALC2 0x12
342#define WM8750_ALC3 0x13
343#define WM8750_NGATE 0x14
344#define WM8750_LADC 0x15
345#define WM8750_RADC 0x16
346#define WM8750_ADCTL1 0x17
347#define WM8750_ADCTL2 0x18
348#define WM8750_PWR1 0x19
349#define WM8750_PWR2 0x1a
350#define WM8750_ADCTL3 0x1b
351#define WM8750_ADCIN 0x1f
352#define WM8750_LADCIN 0x20
353#define WM8750_RADCIN 0x21
354#define WM8750_LOUTM1 0x22
355#define WM8750_LOUTM2 0x23
356#define WM8750_ROUTM1 0x24
357#define WM8750_ROUTM2 0x25
358#define WM8750_MOUTM1 0x26
359#define WM8750_MOUTM2 0x27
360#define WM8750_LOUT2V 0x28
361#define WM8750_ROUT2V 0x29
362#define WM8750_MOUTV 0x2a
363
Anthony Liguori9e07bdf2011-12-04 20:28:27 -0600364static int wm8750_tx(I2CSlave *i2c, uint8_t data)
balrogadb86c32007-05-23 22:04:23 +0000365{
Andreas Färberbc229b02013-12-19 22:04:29 +0100366 WM8750State *s = WM8750(i2c);
balrogadb86c32007-05-23 22:04:23 +0000367 uint8_t cmd;
368 uint16_t value;
369
370 if (s->i2c_len >= 2) {
balrogadb86c32007-05-23 22:04:23 +0000371#ifdef VERBOSE
Stefan Weil149eeb52012-09-03 22:56:00 +0200372 printf("%s: long message (%i bytes)\n", __func__, s->i2c_len);
balrogadb86c32007-05-23 22:04:23 +0000373#endif
Stefan Weil149eeb52012-09-03 22:56:00 +0200374 return 1;
balrogadb86c32007-05-23 22:04:23 +0000375 }
376 s->i2c_data[s->i2c_len ++] = data;
377 if (s->i2c_len != 2)
378 return 0;
379
380 cmd = s->i2c_data[0] >> 1;
381 value = ((s->i2c_data[0] << 8) | s->i2c_data[1]) & 0x1ff;
382
383 switch (cmd) {
384 case WM8750_LADCIN: /* ADC Signal Path Control (Left) */
385 s->diff[0] = (((value >> 6) & 3) == 3); /* LINSEL */
386 if (s->diff[0])
387 s->in[0] = &s->adc_voice[0 + s->ds * 1];
388 else
389 s->in[0] = &s->adc_voice[((value >> 6) & 3) * 1 + 0];
390 break;
391
392 case WM8750_RADCIN: /* ADC Signal Path Control (Right) */
393 s->diff[1] = (((value >> 6) & 3) == 3); /* RINSEL */
394 if (s->diff[1])
395 s->in[1] = &s->adc_voice[0 + s->ds * 1];
396 else
397 s->in[1] = &s->adc_voice[((value >> 6) & 3) * 1 + 0];
398 break;
399
400 case WM8750_ADCIN: /* ADC Input Mode */
401 s->ds = (value >> 8) & 1; /* DS */
402 if (s->diff[0])
403 s->in[0] = &s->adc_voice[0 + s->ds * 1];
404 if (s->diff[1])
405 s->in[1] = &s->adc_voice[0 + s->ds * 1];
406 s->monomix[0] = (value >> 6) & 3; /* MONOMIX */
407 break;
408
409 case WM8750_ADCTL1: /* Additional Control (1) */
410 s->monomix[1] = (value >> 1) & 1; /* DMONOMIX */
411 break;
412
413 case WM8750_PWR1: /* Power Management (1) */
414 s->enable = ((value >> 6) & 7) == 3; /* VMIDSEL, VREF */
415 wm8750_set_format(s);
416 break;
417
418 case WM8750_LINVOL: /* Left Channel PGA */
419 s->invol[0] = value & 0x3f; /* LINVOL */
420 s->inmute[0] = (value >> 7) & 1; /* LINMUTE */
balrog683efdc2008-05-04 10:21:03 +0000421 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000422 break;
423
424 case WM8750_RINVOL: /* Right Channel PGA */
425 s->invol[1] = value & 0x3f; /* RINVOL */
426 s->inmute[1] = (value >> 7) & 1; /* RINMUTE */
balrog683efdc2008-05-04 10:21:03 +0000427 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000428 break;
429
430 case WM8750_ADCDAC: /* ADC and DAC Control */
431 s->pol = (value >> 5) & 3; /* ADCPOL */
432 s->mute = (value >> 3) & 1; /* DACMU */
balrog683efdc2008-05-04 10:21:03 +0000433 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000434 break;
435
436 case WM8750_ADCTL3: /* Additional Control (3) */
437 break;
438
439 case WM8750_LADC: /* Left ADC Digital Volume */
440 s->invol[2] = value & 0xff; /* LADCVOL */
balrogdb502b62008-05-04 10:55:25 +0000441 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000442 break;
443
444 case WM8750_RADC: /* Right ADC Digital Volume */
445 s->invol[3] = value & 0xff; /* RADCVOL */
balrogdb502b62008-05-04 10:55:25 +0000446 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000447 break;
448
449 case WM8750_ALC1: /* ALC Control (1) */
450 s->alc = (value >> 7) & 3; /* ALCSEL */
451 break;
452
453 case WM8750_NGATE: /* Noise Gate Control */
454 case WM8750_3D: /* 3D enhance */
455 break;
456
457 case WM8750_LDAC: /* Left Channel Digital Volume */
458 s->outvol[0] = value & 0xff; /* LDACVOL */
balrogdb502b62008-05-04 10:55:25 +0000459 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000460 break;
461
462 case WM8750_RDAC: /* Right Channel Digital Volume */
463 s->outvol[1] = value & 0xff; /* RDACVOL */
balrogdb502b62008-05-04 10:55:25 +0000464 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000465 break;
466
467 case WM8750_BASS: /* Bass Control */
468 break;
469
470 case WM8750_LOUTM1: /* Left Mixer Control (1) */
471 s->path[0] = (value >> 8) & 1; /* LD2LO */
balrogdb502b62008-05-04 10:55:25 +0000472 /* TODO: mute/unmute respective paths */
473 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000474 break;
475
476 case WM8750_LOUTM2: /* Left Mixer Control (2) */
477 s->path[1] = (value >> 8) & 1; /* RD2LO */
balrogdb502b62008-05-04 10:55:25 +0000478 /* TODO: mute/unmute respective paths */
479 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000480 break;
481
482 case WM8750_ROUTM1: /* Right Mixer Control (1) */
483 s->path[2] = (value >> 8) & 1; /* LD2RO */
balrogdb502b62008-05-04 10:55:25 +0000484 /* TODO: mute/unmute respective paths */
485 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000486 break;
487
488 case WM8750_ROUTM2: /* Right Mixer Control (2) */
489 s->path[3] = (value >> 8) & 1; /* RD2RO */
balrogdb502b62008-05-04 10:55:25 +0000490 /* TODO: mute/unmute respective paths */
491 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000492 break;
493
494 case WM8750_MOUTM1: /* Mono Mixer Control (1) */
495 s->mpath[0] = (value >> 8) & 1; /* LD2MO */
balrogdb502b62008-05-04 10:55:25 +0000496 /* TODO: mute/unmute respective paths */
497 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000498 break;
499
500 case WM8750_MOUTM2: /* Mono Mixer Control (2) */
501 s->mpath[1] = (value >> 8) & 1; /* RD2MO */
balrogdb502b62008-05-04 10:55:25 +0000502 /* TODO: mute/unmute respective paths */
503 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000504 break;
505
506 case WM8750_LOUT1V: /* LOUT1 Volume */
balrog683efdc2008-05-04 10:21:03 +0000507 s->outvol[2] = value & 0x7f; /* LOUT1VOL */
balrogdb502b62008-05-04 10:55:25 +0000508 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000509 break;
510
511 case WM8750_LOUT2V: /* LOUT2 Volume */
512 s->outvol[4] = value & 0x7f; /* LOUT2VOL */
balrog683efdc2008-05-04 10:21:03 +0000513 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000514 break;
515
516 case WM8750_ROUT1V: /* ROUT1 Volume */
balrog683efdc2008-05-04 10:21:03 +0000517 s->outvol[3] = value & 0x7f; /* ROUT1VOL */
balrogdb502b62008-05-04 10:55:25 +0000518 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000519 break;
520
521 case WM8750_ROUT2V: /* ROUT2 Volume */
522 s->outvol[5] = value & 0x7f; /* ROUT2VOL */
balrog683efdc2008-05-04 10:21:03 +0000523 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000524 break;
525
526 case WM8750_MOUTV: /* MONOOUT Volume */
527 s->outvol[6] = value & 0x7f; /* MONOOUTVOL */
balrogdb502b62008-05-04 10:55:25 +0000528 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000529 break;
530
531 case WM8750_ADCTL2: /* Additional Control (2) */
532 break;
533
534 case WM8750_PWR2: /* Power Management (2) */
535 s->power = value & 0x7e;
balrogdb502b62008-05-04 10:55:25 +0000536 /* TODO: mute/unmute respective paths */
537 wm8750_vol_update(s);
balrogadb86c32007-05-23 22:04:23 +0000538 break;
539
540 case WM8750_IFACE: /* Digital Audio Interface Format */
balrogadb86c32007-05-23 22:04:23 +0000541 s->format = value;
balrogaf83e092008-05-04 12:15:51 +0000542 s->master = (value >> 6) & 1; /* MS */
543 wm8750_clk_update(s, s->master);
balrogadb86c32007-05-23 22:04:23 +0000544 break;
545
546 case WM8750_SRATE: /* Clocking and Sample Rate Control */
547 s->rate = &wm_rate_table[(value >> 1) & 0x1f];
balrogaf83e092008-05-04 12:15:51 +0000548 wm8750_clk_update(s, 0);
balrogadb86c32007-05-23 22:04:23 +0000549 break;
550
551 case WM8750_RESET: /* Reset */
Andreas Färberbc229b02013-12-19 22:04:29 +0100552 wm8750_reset(I2C_SLAVE(s));
balrogadb86c32007-05-23 22:04:23 +0000553 break;
554
555#ifdef VERBOSE
556 default:
Alistair Francisa89f3642017-11-08 14:56:31 -0800557 printf("%s: unknown register %02x\n", __func__, cmd);
balrogadb86c32007-05-23 22:04:23 +0000558#endif
559 }
560
561 return 0;
562}
563
Anthony Liguori9e07bdf2011-12-04 20:28:27 -0600564static int wm8750_rx(I2CSlave *i2c)
balrogadb86c32007-05-23 22:04:23 +0000565{
566 return 0x00;
567}
568
Dr. David Alan Gilbert44b1ff32017-09-25 12:29:12 +0100569static int wm8750_pre_save(void *opaque)
balrogaa941b92007-05-24 18:50:09 +0000570{
Juan Quintelac1d803b2009-09-29 22:48:31 +0200571 WM8750State *s = opaque;
balrogaa941b92007-05-24 18:50:09 +0000572
Stefan Weil9841aee2012-01-09 19:32:04 +0100573 s->rate_vmstate = s->rate - wm_rate_table;
Dr. David Alan Gilbert44b1ff32017-09-25 12:29:12 +0100574
575 return 0;
balrogaa941b92007-05-24 18:50:09 +0000576}
577
Juan Quintelac1d803b2009-09-29 22:48:31 +0200578static int wm8750_post_load(void *opaque, int version_id)
balrogaa941b92007-05-24 18:50:09 +0000579{
Juan Quintelac1d803b2009-09-29 22:48:31 +0200580 WM8750State *s = opaque;
balrogaa941b92007-05-24 18:50:09 +0000581
Juan Quintelac1d803b2009-09-29 22:48:31 +0200582 s->rate = &wm_rate_table[s->rate_vmstate & 0x1f];
balrogaa941b92007-05-24 18:50:09 +0000583 return 0;
584}
585
Juan Quintelac1d803b2009-09-29 22:48:31 +0200586static const VMStateDescription vmstate_wm8750 = {
587 .name = CODEC,
588 .version_id = 0,
589 .minimum_version_id = 0,
Juan Quintelac1d803b2009-09-29 22:48:31 +0200590 .pre_save = wm8750_pre_save,
591 .post_load = wm8750_post_load,
Juan Quintela8f1e8842014-05-13 16:09:35 +0100592 .fields = (VMStateField[]) {
Juan Quintelac1d803b2009-09-29 22:48:31 +0200593 VMSTATE_UINT8_ARRAY(i2c_data, WM8750State, 2),
594 VMSTATE_INT32(i2c_len, WM8750State),
595 VMSTATE_INT32(enable, WM8750State),
596 VMSTATE_INT32(idx_in, WM8750State),
597 VMSTATE_INT32(req_in, WM8750State),
598 VMSTATE_INT32(idx_out, WM8750State),
599 VMSTATE_INT32(req_out, WM8750State),
600 VMSTATE_UINT8_ARRAY(outvol, WM8750State, 7),
601 VMSTATE_UINT8_ARRAY(outmute, WM8750State, 2),
602 VMSTATE_UINT8_ARRAY(invol, WM8750State, 4),
603 VMSTATE_UINT8_ARRAY(inmute, WM8750State, 2),
604 VMSTATE_UINT8_ARRAY(diff, WM8750State, 2),
605 VMSTATE_UINT8(pol, WM8750State),
606 VMSTATE_UINT8(ds, WM8750State),
607 VMSTATE_UINT8_ARRAY(monomix, WM8750State, 2),
608 VMSTATE_UINT8(alc, WM8750State),
609 VMSTATE_UINT8(mute, WM8750State),
610 VMSTATE_UINT8_ARRAY(path, WM8750State, 4),
611 VMSTATE_UINT8_ARRAY(mpath, WM8750State, 2),
612 VMSTATE_UINT8(format, WM8750State),
613 VMSTATE_UINT8(power, WM8750State),
614 VMSTATE_UINT8(rate_vmstate, WM8750State),
Andreas Färberbc229b02013-12-19 22:04:29 +0100615 VMSTATE_I2C_SLAVE(parent_obj, WM8750State),
Juan Quintelac1d803b2009-09-29 22:48:31 +0200616 VMSTATE_END_OF_LIST()
617 }
618};
619
Anthony Liguori9e07bdf2011-12-04 20:28:27 -0600620static int wm8750_init(I2CSlave *i2c)
balrogadb86c32007-05-23 22:04:23 +0000621{
Andreas Färberbc229b02013-12-19 22:04:29 +0100622 WM8750State *s = WM8750(i2c);
balrogadb86c32007-05-23 22:04:23 +0000623
malc1a7dafc2009-05-14 03:11:35 +0400624 AUD_register_card(CODEC, &s->card);
Andreas Färberbc229b02013-12-19 22:04:29 +0100625 wm8750_reset(I2C_SLAVE(s));
balrogadb86c32007-05-23 22:04:23 +0000626
Gerd Hoffmann81a322d2009-08-14 10:36:05 +0200627 return 0;
balrogadb86c32007-05-23 22:04:23 +0000628}
629
balrog523111e2008-04-24 21:01:40 +0000630#if 0
Anthony Liguori9e07bdf2011-12-04 20:28:27 -0600631static void wm8750_fini(I2CSlave *i2c)
balrogadb86c32007-05-23 22:04:23 +0000632{
Andreas Färberbc229b02013-12-19 22:04:29 +0100633 WM8750State *s = WM8750(i2c);
634
635 wm8750_reset(I2C_SLAVE(s));
balrogadb86c32007-05-23 22:04:23 +0000636 AUD_remove_card(&s->card);
Anthony Liguori7267c092011-08-20 22:09:37 -0500637 g_free(s);
balrogadb86c32007-05-23 22:04:23 +0000638}
balrog523111e2008-04-24 21:01:40 +0000639#endif
balrogadb86c32007-05-23 22:04:23 +0000640
Philippe Mathieu-Daudé7ab14c52017-09-19 09:30:53 -0300641void wm8750_data_req_set(DeviceState *dev, data_req_cb *data_req, void *opaque)
balrogadb86c32007-05-23 22:04:23 +0000642{
Andreas Färberbc229b02013-12-19 22:04:29 +0100643 WM8750State *s = WM8750(dev);
644
balrogadb86c32007-05-23 22:04:23 +0000645 s->data_req = data_req;
646 s->opaque = opaque;
647}
648
649void wm8750_dac_dat(void *opaque, uint32_t sample)
650{
Paul Brookbc24a222009-05-10 01:44:56 +0100651 WM8750State *s = (WM8750State *) opaque;
balrogaf83e092008-05-04 12:15:51 +0000652
balrog683efdc2008-05-04 10:21:03 +0000653 *(uint32_t *) &s->data_out[s->idx_out] = sample;
balrogadb86c32007-05-23 22:04:23 +0000654 s->req_out -= 4;
655 s->idx_out += 4;
656 if (s->idx_out >= sizeof(s->data_out) || s->req_out <= 0)
657 wm8750_out_flush(s);
658}
659
balrog662caa62008-04-26 12:00:18 +0000660void *wm8750_dac_buffer(void *opaque, int samples)
661{
Paul Brookbc24a222009-05-10 01:44:56 +0100662 WM8750State *s = (WM8750State *) opaque;
balrog662caa62008-04-26 12:00:18 +0000663 /* XXX: Should check if there are <i>samples</i> free samples available */
664 void *ret = s->data_out + s->idx_out;
665
666 s->idx_out += samples << 2;
667 s->req_out -= samples << 2;
668 return ret;
669}
670
671void wm8750_dac_commit(void *opaque)
672{
Paul Brookbc24a222009-05-10 01:44:56 +0100673 WM8750State *s = (WM8750State *) opaque;
balrog662caa62008-04-26 12:00:18 +0000674
blueswir174425112009-04-07 18:22:35 +0000675 wm8750_out_flush(s);
balrog662caa62008-04-26 12:00:18 +0000676}
677
balrogadb86c32007-05-23 22:04:23 +0000678uint32_t wm8750_adc_dat(void *opaque)
679{
Paul Brookbc24a222009-05-10 01:44:56 +0100680 WM8750State *s = (WM8750State *) opaque;
balrogadb86c32007-05-23 22:04:23 +0000681 uint32_t *data;
balrogaf83e092008-05-04 12:15:51 +0000682
Gerd Hoffmann4bb38932017-09-01 15:14:09 +0200683 if (s->idx_in >= sizeof(s->data_in)) {
balrogadb86c32007-05-23 22:04:23 +0000684 wm8750_in_load(s);
Gerd Hoffmann4bb38932017-09-01 15:14:09 +0200685 if (s->idx_in >= sizeof(s->data_in)) {
686 return 0x80008000; /* silence in AUD_FMT_S16 sample format */
687 }
688 }
balrogaf83e092008-05-04 12:15:51 +0000689
balrogadb86c32007-05-23 22:04:23 +0000690 data = (uint32_t *) &s->data_in[s->idx_in];
691 s->req_in -= 4;
692 s->idx_in += 4;
balrog683efdc2008-05-04 10:21:03 +0000693 return *data;
balrogadb86c32007-05-23 22:04:23 +0000694}
balrogaf83e092008-05-04 12:15:51 +0000695
balrogb0f74c82008-11-12 17:36:08 +0000696void wm8750_set_bclk_in(void *opaque, int new_hz)
balrogaf83e092008-05-04 12:15:51 +0000697{
Paul Brookbc24a222009-05-10 01:44:56 +0100698 WM8750State *s = (WM8750State *) opaque;
balrogaf83e092008-05-04 12:15:51 +0000699
balrogb0f74c82008-11-12 17:36:08 +0000700 s->ext_adc_hz = new_hz;
701 s->ext_dac_hz = new_hz;
balrogaf83e092008-05-04 12:15:51 +0000702 wm8750_clk_update(s, 1);
703}
Paul Brookcdbe40c2009-05-14 22:35:08 +0100704
Anthony Liguorib5ea9322011-12-04 20:39:20 -0600705static void wm8750_class_init(ObjectClass *klass, void *data)
706{
Anthony Liguori39bffca2011-12-07 21:34:16 -0600707 DeviceClass *dc = DEVICE_CLASS(klass);
Anthony Liguorib5ea9322011-12-04 20:39:20 -0600708 I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
709
710 sc->init = wm8750_init;
711 sc->event = wm8750_event;
712 sc->recv = wm8750_rx;
713 sc->send = wm8750_tx;
Anthony Liguori39bffca2011-12-07 21:34:16 -0600714 dc->vmsd = &vmstate_wm8750;
Anthony Liguorib5ea9322011-12-04 20:39:20 -0600715}
716
Andreas Färber8c43a6f2013-01-10 16:19:07 +0100717static const TypeInfo wm8750_info = {
Andreas Färberbc229b02013-12-19 22:04:29 +0100718 .name = TYPE_WM8750,
Anthony Liguori39bffca2011-12-07 21:34:16 -0600719 .parent = TYPE_I2C_SLAVE,
720 .instance_size = sizeof(WM8750State),
721 .class_init = wm8750_class_init,
Paul Brookcdbe40c2009-05-14 22:35:08 +0100722};
723
Andreas Färber83f7d432012-02-09 15:20:55 +0100724static void wm8750_register_types(void)
Paul Brookcdbe40c2009-05-14 22:35:08 +0100725{
Anthony Liguori39bffca2011-12-07 21:34:16 -0600726 type_register_static(&wm8750_info);
Paul Brookcdbe40c2009-05-14 22:35:08 +0100727}
728
Andreas Färber83f7d432012-02-09 15:20:55 +0100729type_init(wm8750_register_types)