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aliguori05330442008-11-05 16:29:27 +00001/*
2 * QEMU KVM support
3 *
4 * Copyright (C) 2006-2008 Qumranet Technologies
5 * Copyright IBM, Corp. 2008
6 *
7 * Authors:
8 * Anthony Liguori <aliguori@us.ibm.com>
9 *
10 * This work is licensed under the terms of the GNU GPL, version 2 or later.
11 * See the COPYING file in the top-level directory.
12 *
13 */
14
15#include <sys/types.h>
16#include <sys/ioctl.h>
17#include <sys/mman.h>
Marcelo Tosatti25d2e362010-10-21 13:35:04 -020018#include <sys/utsname.h>
aliguori05330442008-11-05 16:29:27 +000019
20#include <linux/kvm.h>
Jan Kiszka5802e062011-06-08 16:10:58 +020021#include <linux/kvm_para.h>
aliguori05330442008-11-05 16:29:27 +000022
23#include "qemu-common.h"
Paolo Bonzini9c17d612012-12-17 18:20:04 +010024#include "sysemu/sysemu.h"
25#include "sysemu/kvm.h"
Peter Maydell1d31f662012-07-26 15:35:13 +010026#include "kvm_i386.h"
aliguori05330442008-11-05 16:29:27 +000027#include "cpu.h"
Paolo Bonzini022c62c2012-12-17 18:19:49 +010028#include "exec/gdbstub.h"
Paolo Bonzini1de7afc2012-12-17 18:20:00 +010029#include "qemu/host-utils.h"
30#include "qemu/config-file.h"
Paolo Bonzini0d09e412013-02-05 17:06:20 +010031#include "hw/i386/pc.h"
32#include "hw/i386/apic.h"
Paolo Bonzini022c62c2012-12-17 18:19:49 +010033#include "exec/ioport.h"
Igor Mammedov92067bf2013-06-05 15:18:40 +020034#include <asm/hyperv.h>
Michael S. Tsirkina2cb15b2012-12-12 14:24:50 +020035#include "hw/pci/pci.h"
aliguori05330442008-11-05 16:29:27 +000036
37//#define DEBUG_KVM
38
39#ifdef DEBUG_KVM
Blue Swirl8c0d5772010-04-18 14:22:14 +000040#define DPRINTF(fmt, ...) \
aliguori05330442008-11-05 16:29:27 +000041 do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0)
42#else
Blue Swirl8c0d5772010-04-18 14:22:14 +000043#define DPRINTF(fmt, ...) \
aliguori05330442008-11-05 16:29:27 +000044 do { } while (0)
45#endif
46
Glauber Costa1a036752009-10-22 10:26:56 -020047#define MSR_KVM_WALL_CLOCK 0x11
48#define MSR_KVM_SYSTEM_TIME 0x12
49
Marcelo Tosattic0532a72010-10-11 15:31:21 -030050#ifndef BUS_MCEERR_AR
51#define BUS_MCEERR_AR 4
52#endif
53#ifndef BUS_MCEERR_AO
54#define BUS_MCEERR_AO 5
55#endif
56
Jan Kiszka94a8d392011-01-21 21:48:17 +010057const KVMCapabilityInfo kvm_arch_required_capabilities[] = {
58 KVM_CAP_INFO(SET_TSS_ADDR),
59 KVM_CAP_INFO(EXT_CPUID),
60 KVM_CAP_INFO(MP_STATE),
61 KVM_CAP_LAST_INFO
62};
Marcelo Tosatti25d2e362010-10-21 13:35:04 -020063
Jan Kiszkac3a3a7d2011-01-21 21:48:13 +010064static bool has_msr_star;
65static bool has_msr_hsave_pa;
Will Auldf28558d2012-11-26 21:32:18 -080066static bool has_msr_tsc_adjust;
Liu, Jinsongaa82ba52011-10-05 16:52:32 -030067static bool has_msr_tsc_deadline;
Liu Jinsongdf676962013-08-19 09:33:30 +080068static bool has_msr_feature_control;
Jan Kiszkac5999bf2011-01-21 21:48:22 +010069static bool has_msr_async_pf_en;
Michael S. Tsirkinbc9a8392012-08-28 20:43:56 +030070static bool has_msr_pv_eoi_en;
Avi Kivity21e87c42011-10-04 16:26:35 +020071static bool has_msr_misc_enable;
Liu Jinsong79e9ebe2013-12-05 08:32:12 +080072static bool has_msr_bndcfgs;
Marcelo Tosatti917367a2013-02-19 23:27:20 -030073static bool has_msr_kvm_steal_time;
aliguori05330442008-11-05 16:29:27 +000074static int lm_capable_kernel;
Paolo Bonzini7bc3d712014-01-23 19:16:12 +010075static bool has_msr_hv_hypercall;
76static bool has_msr_hv_vapic;
Vadim Rozenfeld48a5f3b2014-01-24 00:40:49 +110077static bool has_msr_hv_tsc;
Avi Kivityb827df52009-05-03 17:04:01 +030078
Paolo Bonzini0d894362013-07-25 17:05:22 +020079static bool has_msr_architectural_pmu;
80static uint32_t num_architectural_pmu_counters;
81
Peter Maydell1d31f662012-07-26 15:35:13 +010082bool kvm_allows_irq0_override(void)
83{
84 return !kvm_irqchip_in_kernel() || kvm_has_gsi_routing();
85}
86
Avi Kivityb827df52009-05-03 17:04:01 +030087static struct kvm_cpuid2 *try_get_cpuid(KVMState *s, int max)
88{
89 struct kvm_cpuid2 *cpuid;
90 int r, size;
91
92 size = sizeof(*cpuid) + max * sizeof(*cpuid->entries);
Anthony Liguori7267c092011-08-20 22:09:37 -050093 cpuid = (struct kvm_cpuid2 *)g_malloc0(size);
Avi Kivityb827df52009-05-03 17:04:01 +030094 cpuid->nent = max;
95 r = kvm_ioctl(s, KVM_GET_SUPPORTED_CPUID, cpuid);
Mark McLoughlin76ae3172009-05-19 18:55:21 +010096 if (r == 0 && cpuid->nent >= max) {
97 r = -E2BIG;
98 }
Avi Kivityb827df52009-05-03 17:04:01 +030099 if (r < 0) {
100 if (r == -E2BIG) {
Anthony Liguori7267c092011-08-20 22:09:37 -0500101 g_free(cpuid);
Avi Kivityb827df52009-05-03 17:04:01 +0300102 return NULL;
103 } else {
104 fprintf(stderr, "KVM_GET_SUPPORTED_CPUID failed: %s\n",
105 strerror(-r));
106 exit(1);
107 }
108 }
109 return cpuid;
110}
111
Eduardo Habkostdd87f8a2012-10-04 17:48:58 -0300112/* Run KVM_GET_SUPPORTED_CPUID ioctl(), allocating a buffer large enough
113 * for all entries.
114 */
115static struct kvm_cpuid2 *get_supported_cpuid(KVMState *s)
116{
117 struct kvm_cpuid2 *cpuid;
118 int max = 1;
119 while ((cpuid = try_get_cpuid(s, max)) == NULL) {
120 max *= 2;
121 }
122 return cpuid;
123}
124
Stefan Weila443bc32014-03-16 15:03:41 +0100125static const struct kvm_para_features {
Glauber Costa0c31b742011-03-17 19:42:05 -0300126 int cap;
127 int feature;
128} para_features[] = {
129 { KVM_CAP_CLOCKSOURCE, KVM_FEATURE_CLOCKSOURCE },
130 { KVM_CAP_NOP_IO_DELAY, KVM_FEATURE_NOP_IO_DELAY },
131 { KVM_CAP_PV_MMU, KVM_FEATURE_MMU_OP },
Glauber Costa0c31b742011-03-17 19:42:05 -0300132 { KVM_CAP_ASYNC_PF, KVM_FEATURE_ASYNC_PF },
Glauber Costa0c31b742011-03-17 19:42:05 -0300133 { -1, -1 }
134};
135
Jan Kiszkaba9bc592011-06-08 16:11:05 +0200136static int get_para_features(KVMState *s)
Glauber Costa0c31b742011-03-17 19:42:05 -0300137{
138 int i, features = 0;
139
140 for (i = 0; i < ARRAY_SIZE(para_features) - 1; i++) {
Jan Kiszkaba9bc592011-06-08 16:11:05 +0200141 if (kvm_check_extension(s, para_features[i].cap)) {
Glauber Costa0c31b742011-03-17 19:42:05 -0300142 features |= (1 << para_features[i].feature);
143 }
144 }
145
146 return features;
147}
Glauber Costa0c31b742011-03-17 19:42:05 -0300148
149
Eduardo Habkost829ae2f2012-10-04 17:48:56 -0300150/* Returns the value for a specific register on the cpuid entry
151 */
152static uint32_t cpuid_entry_get_reg(struct kvm_cpuid_entry2 *entry, int reg)
153{
154 uint32_t ret = 0;
155 switch (reg) {
156 case R_EAX:
157 ret = entry->eax;
158 break;
159 case R_EBX:
160 ret = entry->ebx;
161 break;
162 case R_ECX:
163 ret = entry->ecx;
164 break;
165 case R_EDX:
166 ret = entry->edx;
167 break;
168 }
169 return ret;
170}
171
Eduardo Habkost4fb73f12012-10-04 17:48:57 -0300172/* Find matching entry for function/index on kvm_cpuid2 struct
173 */
174static struct kvm_cpuid_entry2 *cpuid_find_entry(struct kvm_cpuid2 *cpuid,
175 uint32_t function,
176 uint32_t index)
177{
178 int i;
179 for (i = 0; i < cpuid->nent; ++i) {
180 if (cpuid->entries[i].function == function &&
181 cpuid->entries[i].index == index) {
182 return &cpuid->entries[i];
183 }
184 }
185 /* not found: */
186 return NULL;
187}
188
Jan Kiszkaba9bc592011-06-08 16:11:05 +0200189uint32_t kvm_arch_get_supported_cpuid(KVMState *s, uint32_t function,
Sheng Yangc958a8b2010-06-17 15:18:13 +0800190 uint32_t index, int reg)
Avi Kivityb827df52009-05-03 17:04:01 +0300191{
192 struct kvm_cpuid2 *cpuid;
Avi Kivityb827df52009-05-03 17:04:01 +0300193 uint32_t ret = 0;
194 uint32_t cpuid_1_edx;
Eduardo Habkost8c723b72012-10-04 17:48:54 -0300195 bool found = false;
Avi Kivityb827df52009-05-03 17:04:01 +0300196
Eduardo Habkostdd87f8a2012-10-04 17:48:58 -0300197 cpuid = get_supported_cpuid(s);
Avi Kivityb827df52009-05-03 17:04:01 +0300198
Eduardo Habkost4fb73f12012-10-04 17:48:57 -0300199 struct kvm_cpuid_entry2 *entry = cpuid_find_entry(cpuid, function, index);
200 if (entry) {
201 found = true;
202 ret = cpuid_entry_get_reg(entry, reg);
Avi Kivityb827df52009-05-03 17:04:01 +0300203 }
204
Eduardo Habkost7b46e5c2012-10-04 17:48:53 -0300205 /* Fixups for the data returned by KVM, below */
206
Eduardo Habkostc2acb022012-10-04 17:48:59 -0300207 if (function == 1 && reg == R_EDX) {
208 /* KVM before 2.6.30 misreports the following features */
209 ret |= CPUID_MTRR | CPUID_PAT | CPUID_MCE | CPUID_MCA;
Eduardo Habkost84bd9452012-10-04 17:49:00 -0300210 } else if (function == 1 && reg == R_ECX) {
211 /* We can set the hypervisor flag, even if KVM does not return it on
212 * GET_SUPPORTED_CPUID
213 */
214 ret |= CPUID_EXT_HYPERVISOR;
Eduardo Habkostac67ee22012-10-04 17:49:01 -0300215 /* tsc-deadline flag is not returned by GET_SUPPORTED_CPUID, but it
216 * can be enabled if the kernel has KVM_CAP_TSC_DEADLINE_TIMER,
217 * and the irqchip is in the kernel.
218 */
219 if (kvm_irqchip_in_kernel() &&
220 kvm_check_extension(s, KVM_CAP_TSC_DEADLINE_TIMER)) {
221 ret |= CPUID_EXT_TSC_DEADLINE_TIMER;
Avi Kivityb827df52009-05-03 17:04:01 +0300222 }
Eduardo Habkost41e5e762012-10-04 17:49:02 -0300223
224 /* x2apic is reported by GET_SUPPORTED_CPUID, but it can't be enabled
225 * without the in-kernel irqchip
226 */
227 if (!kvm_irqchip_in_kernel()) {
228 ret &= ~CPUID_EXT_X2APIC;
229 }
Eduardo Habkostc2acb022012-10-04 17:48:59 -0300230 } else if (function == 0x80000001 && reg == R_EDX) {
231 /* On Intel, kvm returns cpuid according to the Intel spec,
232 * so add missing bits according to the AMD spec:
233 */
234 cpuid_1_edx = kvm_arch_get_supported_cpuid(s, 1, 0, R_EDX);
235 ret |= cpuid_1_edx & CPUID_EXT2_AMD_ALIASES;
Avi Kivityb827df52009-05-03 17:04:01 +0300236 }
237
Anthony Liguori7267c092011-08-20 22:09:37 -0500238 g_free(cpuid);
Avi Kivityb827df52009-05-03 17:04:01 +0300239
Glauber Costa0c31b742011-03-17 19:42:05 -0300240 /* fallback for older kernels */
Eduardo Habkost8c723b72012-10-04 17:48:54 -0300241 if ((function == KVM_CPUID_FEATURES) && !found) {
Jan Kiszkaba9bc592011-06-08 16:11:05 +0200242 ret = get_para_features(s);
Glauber Costa0c31b742011-03-17 19:42:05 -0300243 }
Glauber Costa0c31b742011-03-17 19:42:05 -0300244
Avi Kivityb827df52009-05-03 17:04:01 +0300245 return ret;
246}
247
Huang Ying3c85e742011-03-02 08:56:20 +0100248typedef struct HWPoisonPage {
249 ram_addr_t ram_addr;
250 QLIST_ENTRY(HWPoisonPage) list;
251} HWPoisonPage;
252
253static QLIST_HEAD(, HWPoisonPage) hwpoison_page_list =
254 QLIST_HEAD_INITIALIZER(hwpoison_page_list);
255
256static void kvm_unpoison_all(void *param)
257{
258 HWPoisonPage *page, *next_page;
259
260 QLIST_FOREACH_SAFE(page, &hwpoison_page_list, list, next_page) {
261 QLIST_REMOVE(page, list);
262 qemu_ram_remap(page->ram_addr, TARGET_PAGE_SIZE);
Anthony Liguori7267c092011-08-20 22:09:37 -0500263 g_free(page);
Huang Ying3c85e742011-03-02 08:56:20 +0100264 }
265}
266
Huang Ying3c85e742011-03-02 08:56:20 +0100267static void kvm_hwpoison_page_add(ram_addr_t ram_addr)
268{
269 HWPoisonPage *page;
270
271 QLIST_FOREACH(page, &hwpoison_page_list, list) {
272 if (page->ram_addr == ram_addr) {
273 return;
274 }
275 }
Anthony Liguori7267c092011-08-20 22:09:37 -0500276 page = g_malloc(sizeof(HWPoisonPage));
Huang Ying3c85e742011-03-02 08:56:20 +0100277 page->ram_addr = ram_addr;
278 QLIST_INSERT_HEAD(&hwpoison_page_list, page, list);
279}
280
Marcelo Tosattie7701822010-10-11 15:31:18 -0300281static int kvm_get_mce_cap_supported(KVMState *s, uint64_t *mce_cap,
282 int *max_banks)
283{
284 int r;
285
Lai Jiangshan14a09512010-12-10 15:52:36 +0800286 r = kvm_check_extension(s, KVM_CAP_MCE);
Marcelo Tosattie7701822010-10-11 15:31:18 -0300287 if (r > 0) {
288 *max_banks = r;
289 return kvm_ioctl(s, KVM_X86_GET_MCE_CAP_SUPPORTED, mce_cap);
290 }
291 return -ENOSYS;
292}
293
Andreas Färberbee615d2012-05-03 15:13:58 +0200294static void kvm_mce_inject(X86CPU *cpu, hwaddr paddr, int code)
Marcelo Tosattie7701822010-10-11 15:31:18 -0300295{
Andreas Färberbee615d2012-05-03 15:13:58 +0200296 CPUX86State *env = &cpu->env;
Jan Kiszkac34d4402011-03-02 08:56:16 +0100297 uint64_t status = MCI_STATUS_VAL | MCI_STATUS_UC | MCI_STATUS_EN |
298 MCI_STATUS_MISCV | MCI_STATUS_ADDRV | MCI_STATUS_S;
299 uint64_t mcg_status = MCG_STATUS_MCIP;
Marcelo Tosattie7701822010-10-11 15:31:18 -0300300
Jan Kiszkac34d4402011-03-02 08:56:16 +0100301 if (code == BUS_MCEERR_AR) {
302 status |= MCI_STATUS_AR | 0x134;
303 mcg_status |= MCG_STATUS_EIPV;
304 } else {
305 status |= 0xc0;
306 mcg_status |= MCG_STATUS_RIPV;
Marcelo Tosattic0532a72010-10-11 15:31:21 -0300307 }
Andreas Färber8c5cf3b2012-05-03 15:22:54 +0200308 cpu_x86_inject_mce(NULL, cpu, 9, status, mcg_status, paddr,
Jan Kiszkac34d4402011-03-02 08:56:16 +0100309 (MCM_ADDR_PHYS << 6) | 0xc,
310 cpu_x86_support_mca_broadcast(env) ?
311 MCE_INJECT_BROADCAST : 0);
Jan Kiszka419fb202011-03-02 08:56:12 +0100312}
Jan Kiszka419fb202011-03-02 08:56:12 +0100313
314static void hardware_memory_error(void)
315{
316 fprintf(stderr, "Hardware memory error!\n");
317 exit(1);
318}
319
Andreas Färber20d695a2012-10-31 06:57:49 +0100320int kvm_arch_on_sigbus_vcpu(CPUState *c, int code, void *addr)
Jan Kiszka419fb202011-03-02 08:56:12 +0100321{
Andreas Färber20d695a2012-10-31 06:57:49 +0100322 X86CPU *cpu = X86_CPU(c);
323 CPUX86State *env = &cpu->env;
Jan Kiszka419fb202011-03-02 08:56:12 +0100324 ram_addr_t ram_addr;
Avi Kivitya8170e52012-10-23 12:30:10 +0200325 hwaddr paddr;
Jan Kiszka419fb202011-03-02 08:56:12 +0100326
327 if ((env->mcg_cap & MCG_SER_P) && addr
Jan Kiszkac34d4402011-03-02 08:56:16 +0100328 && (code == BUS_MCEERR_AR || code == BUS_MCEERR_AO)) {
Paolo Bonzini1b5ec232013-05-06 14:36:15 +0200329 if (qemu_ram_addr_from_host(addr, &ram_addr) == NULL ||
Andreas Färbera60f24b2012-12-01 05:35:08 +0100330 !kvm_physical_memory_addr_from_host(c->kvm_state, addr, &paddr)) {
Jan Kiszka419fb202011-03-02 08:56:12 +0100331 fprintf(stderr, "Hardware memory error for memory used by "
332 "QEMU itself instead of guest system!\n");
333 /* Hope we are lucky for AO MCE */
334 if (code == BUS_MCEERR_AO) {
335 return 0;
336 } else {
337 hardware_memory_error();
338 }
339 }
Huang Ying3c85e742011-03-02 08:56:20 +0100340 kvm_hwpoison_page_add(ram_addr);
Andreas Färberbee615d2012-05-03 15:13:58 +0200341 kvm_mce_inject(cpu, paddr, code);
Jan Kiszkae56ff192011-06-08 16:11:02 +0200342 } else {
Jan Kiszka419fb202011-03-02 08:56:12 +0100343 if (code == BUS_MCEERR_AO) {
344 return 0;
345 } else if (code == BUS_MCEERR_AR) {
346 hardware_memory_error();
347 } else {
348 return 1;
349 }
350 }
351 return 0;
352}
353
354int kvm_arch_on_sigbus(int code, void *addr)
355{
Andreas Färber182735e2013-05-29 22:29:20 +0200356 X86CPU *cpu = X86_CPU(first_cpu);
357
358 if ((cpu->env.mcg_cap & MCG_SER_P) && addr && code == BUS_MCEERR_AO) {
Jan Kiszka419fb202011-03-02 08:56:12 +0100359 ram_addr_t ram_addr;
Avi Kivitya8170e52012-10-23 12:30:10 +0200360 hwaddr paddr;
Jan Kiszka419fb202011-03-02 08:56:12 +0100361
362 /* Hope we are lucky for AO MCE */
Paolo Bonzini1b5ec232013-05-06 14:36:15 +0200363 if (qemu_ram_addr_from_host(addr, &ram_addr) == NULL ||
Andreas Färber182735e2013-05-29 22:29:20 +0200364 !kvm_physical_memory_addr_from_host(first_cpu->kvm_state,
Andreas Färbera60f24b2012-12-01 05:35:08 +0100365 addr, &paddr)) {
Jan Kiszka419fb202011-03-02 08:56:12 +0100366 fprintf(stderr, "Hardware memory error for memory used by "
367 "QEMU itself instead of guest system!: %p\n", addr);
368 return 0;
369 }
Huang Ying3c85e742011-03-02 08:56:20 +0100370 kvm_hwpoison_page_add(ram_addr);
Andreas Färber182735e2013-05-29 22:29:20 +0200371 kvm_mce_inject(X86_CPU(first_cpu), paddr, code);
Jan Kiszkae56ff192011-06-08 16:11:02 +0200372 } else {
Jan Kiszka419fb202011-03-02 08:56:12 +0100373 if (code == BUS_MCEERR_AO) {
374 return 0;
375 } else if (code == BUS_MCEERR_AR) {
376 hardware_memory_error();
377 } else {
378 return 1;
379 }
380 }
381 return 0;
382}
Marcelo Tosattie7701822010-10-11 15:31:18 -0300383
Andreas Färber1bc22652012-10-31 06:06:49 +0100384static int kvm_inject_mce_oldstyle(X86CPU *cpu)
Jan Kiszkaab443472011-03-02 08:56:14 +0100385{
Andreas Färber1bc22652012-10-31 06:06:49 +0100386 CPUX86State *env = &cpu->env;
387
Jan Kiszkaab443472011-03-02 08:56:14 +0100388 if (!kvm_has_vcpu_events() && env->exception_injected == EXCP12_MCHK) {
389 unsigned int bank, bank_num = env->mcg_cap & 0xff;
390 struct kvm_x86_mce mce;
391
392 env->exception_injected = -1;
393
394 /*
395 * There must be at least one bank in use if an MCE is pending.
396 * Find it and use its values for the event injection.
397 */
398 for (bank = 0; bank < bank_num; bank++) {
399 if (env->mce_banks[bank * 4 + 1] & MCI_STATUS_VAL) {
400 break;
401 }
402 }
403 assert(bank < bank_num);
404
405 mce.bank = bank;
406 mce.status = env->mce_banks[bank * 4 + 1];
407 mce.mcg_status = env->mcg_status;
408 mce.addr = env->mce_banks[bank * 4 + 2];
409 mce.misc = env->mce_banks[bank * 4 + 3];
410
Andreas Färber1bc22652012-10-31 06:06:49 +0100411 return kvm_vcpu_ioctl(CPU(cpu), KVM_X86_SET_MCE, &mce);
Jan Kiszkaab443472011-03-02 08:56:14 +0100412 }
Jan Kiszkaab443472011-03-02 08:56:14 +0100413 return 0;
414}
415
Luiz Capitulino1dfb4dd2011-07-29 14:26:33 -0300416static void cpu_update_state(void *opaque, int running, RunState state)
Glauber Costab8cc45d2011-02-03 14:19:53 -0500417{
Andreas Färber317ac622012-03-14 01:38:21 +0100418 CPUX86State *env = opaque;
Glauber Costab8cc45d2011-02-03 14:19:53 -0500419
420 if (running) {
421 env->tsc_valid = false;
422 }
423}
424
Eduardo Habkost83b17af2013-01-22 18:25:02 -0200425unsigned long kvm_arch_vcpu_id(CPUState *cs)
Eduardo Habkostb164e482013-01-22 18:25:01 -0200426{
Eduardo Habkost83b17af2013-01-22 18:25:02 -0200427 X86CPU *cpu = X86_CPU(cs);
428 return cpu->env.cpuid_apic_id;
Eduardo Habkostb164e482013-01-22 18:25:01 -0200429}
430
Igor Mammedov92067bf2013-06-05 15:18:40 +0200431#ifndef KVM_CPUID_SIGNATURE_NEXT
432#define KVM_CPUID_SIGNATURE_NEXT 0x40000100
433#endif
434
435static bool hyperv_hypercall_available(X86CPU *cpu)
436{
437 return cpu->hyperv_vapic ||
438 (cpu->hyperv_spinlock_attempts != HYPERV_SPINLOCK_NEVER_RETRY);
439}
440
441static bool hyperv_enabled(X86CPU *cpu)
442{
Paolo Bonzini7bc3d712014-01-23 19:16:12 +0100443 CPUState *cs = CPU(cpu);
444 return kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV) > 0 &&
445 (hyperv_hypercall_available(cpu) ||
Vadim Rozenfeld48a5f3b2014-01-24 00:40:49 +1100446 cpu->hyperv_time ||
Paolo Bonzini7bc3d712014-01-23 19:16:12 +0100447 cpu->hyperv_relaxed_timing);
Igor Mammedov92067bf2013-06-05 15:18:40 +0200448}
449
Igor Mammedovf8bb0562013-01-28 12:49:26 +0100450#define KVM_MAX_CPUID_ENTRIES 100
Anthony Liguori0893d462013-01-29 16:57:41 -0600451
Andreas Färber20d695a2012-10-31 06:57:49 +0100452int kvm_arch_init_vcpu(CPUState *cs)
aliguori05330442008-11-05 16:29:27 +0000453{
454 struct {
aliguori486bd5a2009-02-09 15:50:31 +0000455 struct kvm_cpuid2 cpuid;
Igor Mammedovf8bb0562013-01-28 12:49:26 +0100456 struct kvm_cpuid_entry2 entries[KVM_MAX_CPUID_ENTRIES];
Stefan Weil541dc0d2011-08-31 12:38:01 +0200457 } QEMU_PACKED cpuid_data;
Andreas Färber20d695a2012-10-31 06:57:49 +0100458 X86CPU *cpu = X86_CPU(cs);
459 CPUX86State *env = &cpu->env;
aliguori486bd5a2009-02-09 15:50:31 +0000460 uint32_t limit, i, j, cpuid_i;
aliguoria33609c2009-04-17 20:50:54 +0000461 uint32_t unused;
Gleb Natapovbb0300d2010-01-13 15:25:06 +0200462 struct kvm_cpuid_entry2 *c;
Gleb Natapovbb0300d2010-01-13 15:25:06 +0200463 uint32_t signature[3];
Paolo Bonzini234cc642014-01-23 19:27:24 +0100464 int kvm_base = KVM_CPUID_SIGNATURE;
Joerg Roedele7429072011-07-07 16:13:13 +0200465 int r;
aliguori05330442008-11-05 16:29:27 +0000466
Stefan Weilef4cbe12013-11-06 22:35:27 +0100467 memset(&cpuid_data, 0, sizeof(cpuid_data));
468
aliguori05330442008-11-05 16:29:27 +0000469 cpuid_i = 0;
470
Gleb Natapovbb0300d2010-01-13 15:25:06 +0200471 /* Paravirtualization CPUIDs */
Paolo Bonzini234cc642014-01-23 19:27:24 +0100472 if (hyperv_enabled(cpu)) {
473 c = &cpuid_data.entries[cpuid_i++];
474 c->function = HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS;
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200475 memcpy(signature, "Microsoft Hv", 12);
476 c->eax = HYPERV_CPUID_MIN;
Paolo Bonzini234cc642014-01-23 19:27:24 +0100477 c->ebx = signature[0];
478 c->ecx = signature[1];
479 c->edx = signature[2];
Gleb Natapovbb0300d2010-01-13 15:25:06 +0200480
Paolo Bonzini234cc642014-01-23 19:27:24 +0100481 c = &cpuid_data.entries[cpuid_i++];
482 c->function = HYPERV_CPUID_INTERFACE;
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200483 memcpy(signature, "Hv#1\0\0\0\0\0\0\0\0", 12);
484 c->eax = signature[0];
Paolo Bonzini234cc642014-01-23 19:27:24 +0100485 c->ebx = 0;
486 c->ecx = 0;
487 c->edx = 0;
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200488
489 c = &cpuid_data.entries[cpuid_i++];
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200490 c->function = HYPERV_CPUID_VERSION;
491 c->eax = 0x00001bbc;
492 c->ebx = 0x00060001;
493
494 c = &cpuid_data.entries[cpuid_i++];
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200495 c->function = HYPERV_CPUID_FEATURES;
Igor Mammedov92067bf2013-06-05 15:18:40 +0200496 if (cpu->hyperv_relaxed_timing) {
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200497 c->eax |= HV_X64_MSR_HYPERCALL_AVAILABLE;
498 }
Igor Mammedov92067bf2013-06-05 15:18:40 +0200499 if (cpu->hyperv_vapic) {
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200500 c->eax |= HV_X64_MSR_HYPERCALL_AVAILABLE;
501 c->eax |= HV_X64_MSR_APIC_ACCESS_AVAILABLE;
Paolo Bonzini7bc3d712014-01-23 19:16:12 +0100502 has_msr_hv_vapic = true;
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200503 }
Vadim Rozenfeld48a5f3b2014-01-24 00:40:49 +1100504 if (cpu->hyperv_time &&
505 kvm_check_extension(cs->kvm_state, KVM_CAP_HYPERV_TIME) > 0) {
506 c->eax |= HV_X64_MSR_HYPERCALL_AVAILABLE;
507 c->eax |= HV_X64_MSR_TIME_REF_COUNT_AVAILABLE;
508 c->eax |= 0x200;
509 has_msr_hv_tsc = true;
510 }
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200511 c = &cpuid_data.entries[cpuid_i++];
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200512 c->function = HYPERV_CPUID_ENLIGHTMENT_INFO;
Igor Mammedov92067bf2013-06-05 15:18:40 +0200513 if (cpu->hyperv_relaxed_timing) {
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200514 c->eax |= HV_X64_RELAXED_TIMING_RECOMMENDED;
515 }
Paolo Bonzini7bc3d712014-01-23 19:16:12 +0100516 if (has_msr_hv_vapic) {
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200517 c->eax |= HV_X64_APIC_ACCESS_RECOMMENDED;
518 }
Igor Mammedov92067bf2013-06-05 15:18:40 +0200519 c->ebx = cpu->hyperv_spinlock_attempts;
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200520
521 c = &cpuid_data.entries[cpuid_i++];
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200522 c->function = HYPERV_CPUID_IMPLEMENT_LIMITS;
523 c->eax = 0x40;
524 c->ebx = 0x40;
525
Paolo Bonzini234cc642014-01-23 19:27:24 +0100526 kvm_base = KVM_CPUID_SIGNATURE_NEXT;
Paolo Bonzini7bc3d712014-01-23 19:16:12 +0100527 has_msr_hv_hypercall = true;
Vadim Rozenfeldeab70132011-12-18 22:48:14 +0200528 }
529
Paolo Bonzini234cc642014-01-23 19:27:24 +0100530 memcpy(signature, "KVMKVMKVM\0\0\0", 12);
531 c = &cpuid_data.entries[cpuid_i++];
532 c->function = KVM_CPUID_SIGNATURE | kvm_base;
533 c->eax = 0;
534 c->ebx = signature[0];
535 c->ecx = signature[1];
536 c->edx = signature[2];
537
538 c = &cpuid_data.entries[cpuid_i++];
539 c->function = KVM_CPUID_FEATURES | kvm_base;
540 c->eax = env->features[FEAT_KVM];
541
Glauber Costa0c31b742011-03-17 19:42:05 -0300542 has_msr_async_pf_en = c->eax & (1 << KVM_FEATURE_ASYNC_PF);
Glauber Costa0c31b742011-03-17 19:42:05 -0300543
Michael S. Tsirkinbc9a8392012-08-28 20:43:56 +0300544 has_msr_pv_eoi_en = c->eax & (1 << KVM_FEATURE_PV_EOI);
545
Marcelo Tosatti917367a2013-02-19 23:27:20 -0300546 has_msr_kvm_steal_time = c->eax & (1 << KVM_FEATURE_STEAL_TIME);
547
aliguoria33609c2009-04-17 20:50:54 +0000548 cpu_x86_cpuid(env, 0, 0, &limit, &unused, &unused, &unused);
aliguori05330442008-11-05 16:29:27 +0000549
550 for (i = 0; i <= limit; i++) {
Igor Mammedovf8bb0562013-01-28 12:49:26 +0100551 if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
552 fprintf(stderr, "unsupported level value: 0x%x\n", limit);
553 abort();
554 }
Gleb Natapovbb0300d2010-01-13 15:25:06 +0200555 c = &cpuid_data.entries[cpuid_i++];
aliguori05330442008-11-05 16:29:27 +0000556
aliguori486bd5a2009-02-09 15:50:31 +0000557 switch (i) {
aliguoria36b1022009-02-09 15:50:36 +0000558 case 2: {
559 /* Keep reading function 2 till all the input is received */
560 int times;
561
aliguoria36b1022009-02-09 15:50:36 +0000562 c->function = i;
aliguoria33609c2009-04-17 20:50:54 +0000563 c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC |
564 KVM_CPUID_FLAG_STATE_READ_NEXT;
565 cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
566 times = c->eax & 0xff;
aliguoria36b1022009-02-09 15:50:36 +0000567
568 for (j = 1; j < times; ++j) {
Igor Mammedovf8bb0562013-01-28 12:49:26 +0100569 if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
570 fprintf(stderr, "cpuid_data is full, no space for "
571 "cpuid(eax:2):eax & 0xf = 0x%x\n", times);
572 abort();
573 }
aliguoria33609c2009-04-17 20:50:54 +0000574 c = &cpuid_data.entries[cpuid_i++];
aliguoria36b1022009-02-09 15:50:36 +0000575 c->function = i;
aliguoria33609c2009-04-17 20:50:54 +0000576 c->flags = KVM_CPUID_FLAG_STATEFUL_FUNC;
577 cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
aliguoria36b1022009-02-09 15:50:36 +0000578 }
579 break;
580 }
aliguori486bd5a2009-02-09 15:50:31 +0000581 case 4:
582 case 0xb:
583 case 0xd:
584 for (j = 0; ; j++) {
Andre Przywara31e8c692011-06-10 15:56:28 +0200585 if (i == 0xd && j == 64) {
586 break;
587 }
aliguori486bd5a2009-02-09 15:50:31 +0000588 c->function = i;
589 c->flags = KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
590 c->index = j;
aliguoria33609c2009-04-17 20:50:54 +0000591 cpu_x86_cpuid(env, i, j, &c->eax, &c->ebx, &c->ecx, &c->edx);
aliguori486bd5a2009-02-09 15:50:31 +0000592
Jan Kiszkab9bec742010-12-27 16:19:29 +0100593 if (i == 4 && c->eax == 0) {
aliguori486bd5a2009-02-09 15:50:31 +0000594 break;
Jan Kiszkab9bec742010-12-27 16:19:29 +0100595 }
596 if (i == 0xb && !(c->ecx & 0xff00)) {
aliguori486bd5a2009-02-09 15:50:31 +0000597 break;
Jan Kiszkab9bec742010-12-27 16:19:29 +0100598 }
599 if (i == 0xd && c->eax == 0) {
Andre Przywara31e8c692011-06-10 15:56:28 +0200600 continue;
Jan Kiszkab9bec742010-12-27 16:19:29 +0100601 }
Igor Mammedovf8bb0562013-01-28 12:49:26 +0100602 if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
603 fprintf(stderr, "cpuid_data is full, no space for "
604 "cpuid(eax:0x%x,ecx:0x%x)\n", i, j);
605 abort();
606 }
aliguoria33609c2009-04-17 20:50:54 +0000607 c = &cpuid_data.entries[cpuid_i++];
aliguori486bd5a2009-02-09 15:50:31 +0000608 }
609 break;
610 default:
aliguori486bd5a2009-02-09 15:50:31 +0000611 c->function = i;
aliguoria33609c2009-04-17 20:50:54 +0000612 c->flags = 0;
613 cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
aliguori486bd5a2009-02-09 15:50:31 +0000614 break;
615 }
aliguori05330442008-11-05 16:29:27 +0000616 }
Paolo Bonzini0d894362013-07-25 17:05:22 +0200617
618 if (limit >= 0x0a) {
619 uint32_t ver;
620
621 cpu_x86_cpuid(env, 0x0a, 0, &ver, &unused, &unused, &unused);
622 if ((ver & 0xff) > 0) {
623 has_msr_architectural_pmu = true;
624 num_architectural_pmu_counters = (ver & 0xff00) >> 8;
625
626 /* Shouldn't be more than 32, since that's the number of bits
627 * available in EBX to tell us _which_ counters are available.
628 * Play it safe.
629 */
630 if (num_architectural_pmu_counters > MAX_GP_COUNTERS) {
631 num_architectural_pmu_counters = MAX_GP_COUNTERS;
632 }
633 }
634 }
635
aliguoria33609c2009-04-17 20:50:54 +0000636 cpu_x86_cpuid(env, 0x80000000, 0, &limit, &unused, &unused, &unused);
aliguori05330442008-11-05 16:29:27 +0000637
638 for (i = 0x80000000; i <= limit; i++) {
Igor Mammedovf8bb0562013-01-28 12:49:26 +0100639 if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
640 fprintf(stderr, "unsupported xlevel value: 0x%x\n", limit);
641 abort();
642 }
Gleb Natapovbb0300d2010-01-13 15:25:06 +0200643 c = &cpuid_data.entries[cpuid_i++];
aliguori05330442008-11-05 16:29:27 +0000644
aliguori05330442008-11-05 16:29:27 +0000645 c->function = i;
aliguoria33609c2009-04-17 20:50:54 +0000646 c->flags = 0;
647 cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
aliguori05330442008-11-05 16:29:27 +0000648 }
649
brillywu@viatech.com.cnb3baa152011-06-01 09:59:52 +0800650 /* Call Centaur's CPUID instructions they are supported. */
651 if (env->cpuid_xlevel2 > 0) {
brillywu@viatech.com.cnb3baa152011-06-01 09:59:52 +0800652 cpu_x86_cpuid(env, 0xC0000000, 0, &limit, &unused, &unused, &unused);
653
654 for (i = 0xC0000000; i <= limit; i++) {
Igor Mammedovf8bb0562013-01-28 12:49:26 +0100655 if (cpuid_i == KVM_MAX_CPUID_ENTRIES) {
656 fprintf(stderr, "unsupported xlevel2 value: 0x%x\n", limit);
657 abort();
658 }
brillywu@viatech.com.cnb3baa152011-06-01 09:59:52 +0800659 c = &cpuid_data.entries[cpuid_i++];
660
661 c->function = i;
662 c->flags = 0;
663 cpu_x86_cpuid(env, i, 0, &c->eax, &c->ebx, &c->ecx, &c->edx);
664 }
665 }
666
aliguori05330442008-11-05 16:29:27 +0000667 cpuid_data.cpuid.nent = cpuid_i;
668
Marcelo Tosattie7701822010-10-11 15:31:18 -0300669 if (((env->cpuid_version >> 8)&0xF) >= 6
Eduardo Habkost0514ef22013-04-22 16:00:15 -0300670 && (env->features[FEAT_1_EDX] & (CPUID_MCE | CPUID_MCA)) ==
Eduardo Habkostfc7a5042013-04-22 16:00:13 -0300671 (CPUID_MCE | CPUID_MCA)
Andreas Färbera60f24b2012-12-01 05:35:08 +0100672 && kvm_check_extension(cs->kvm_state, KVM_CAP_MCE) > 0) {
Marcelo Tosattie7701822010-10-11 15:31:18 -0300673 uint64_t mcg_cap;
674 int banks;
Jan Kiszka32a42022011-03-02 08:56:17 +0100675 int ret;
Marcelo Tosattie7701822010-10-11 15:31:18 -0300676
Andreas Färbera60f24b2012-12-01 05:35:08 +0100677 ret = kvm_get_mce_cap_supported(cs->kvm_state, &mcg_cap, &banks);
Jan Kiszka75d49492011-03-02 08:56:18 +0100678 if (ret < 0) {
679 fprintf(stderr, "kvm_get_mce_cap_supported: %s", strerror(-ret));
680 return ret;
Marcelo Tosattie7701822010-10-11 15:31:18 -0300681 }
Jan Kiszka75d49492011-03-02 08:56:18 +0100682
683 if (banks > MCE_BANKS_DEF) {
684 banks = MCE_BANKS_DEF;
685 }
686 mcg_cap &= MCE_CAP_DEF;
687 mcg_cap |= banks;
Andreas Färber1bc22652012-10-31 06:06:49 +0100688 ret = kvm_vcpu_ioctl(cs, KVM_X86_SETUP_MCE, &mcg_cap);
Jan Kiszka75d49492011-03-02 08:56:18 +0100689 if (ret < 0) {
690 fprintf(stderr, "KVM_X86_SETUP_MCE: %s", strerror(-ret));
691 return ret;
692 }
693
694 env->mcg_cap = mcg_cap;
Marcelo Tosattie7701822010-10-11 15:31:18 -0300695 }
Marcelo Tosattie7701822010-10-11 15:31:18 -0300696
Glauber Costab8cc45d2011-02-03 14:19:53 -0500697 qemu_add_vm_change_state_handler(cpu_update_state, env);
698
Liu Jinsongdf676962013-08-19 09:33:30 +0800699 c = cpuid_find_entry(&cpuid_data.cpuid, 1, 0);
700 if (c) {
701 has_msr_feature_control = !!(c->ecx & CPUID_EXT_VMX) ||
702 !!(c->ecx & CPUID_EXT_SMX);
703 }
704
Michael S. Tsirkin7e680752012-02-29 17:54:29 +0200705 cpuid_data.cpuid.padding = 0;
Andreas Färber1bc22652012-10-31 06:06:49 +0100706 r = kvm_vcpu_ioctl(cs, KVM_SET_CPUID2, &cpuid_data);
Jan Kiszkafdc9c412011-08-15 16:24:48 -0700707 if (r) {
708 return r;
709 }
Joerg Roedele7429072011-07-07 16:13:13 +0200710
Andreas Färbera60f24b2012-12-01 05:35:08 +0100711 r = kvm_check_extension(cs->kvm_state, KVM_CAP_TSC_CONTROL);
Joerg Roedele7429072011-07-07 16:13:13 +0200712 if (r && env->tsc_khz) {
Andreas Färber1bc22652012-10-31 06:06:49 +0100713 r = kvm_vcpu_ioctl(cs, KVM_SET_TSC_KHZ, env->tsc_khz);
Joerg Roedele7429072011-07-07 16:13:13 +0200714 if (r < 0) {
715 fprintf(stderr, "KVM_SET_TSC_KHZ failed\n");
716 return r;
717 }
718 }
Joerg Roedele7429072011-07-07 16:13:13 +0200719
Jan Kiszkafabacc02011-10-27 19:25:58 +0200720 if (kvm_has_xsave()) {
721 env->kvm_xsave_buf = qemu_memalign(4096, sizeof(struct kvm_xsave));
722 }
723
Joerg Roedele7429072011-07-07 16:13:13 +0200724 return 0;
aliguori05330442008-11-05 16:29:27 +0000725}
726
Andreas Färber20d695a2012-10-31 06:57:49 +0100727void kvm_arch_reset_vcpu(CPUState *cs)
Jan Kiszkacaa5af02009-11-06 19:39:24 +0100728{
Andreas Färber20d695a2012-10-31 06:57:49 +0100729 X86CPU *cpu = X86_CPU(cs);
730 CPUX86State *env = &cpu->env;
Igor Mammedovdd673282012-07-23 15:22:27 +0200731
Gleb Natapove73223a2010-01-06 16:30:10 +0200732 env->exception_injected = -1;
Jan Kiszka0e607a82009-11-06 19:39:24 +0100733 env->interrupt_injected = -1;
Jan Kiszka1a5e9d22011-01-21 21:48:12 +0100734 env->xcr0 = 1;
Marcelo Tosattiddced192010-03-23 13:37:14 -0300735 if (kvm_irqchip_in_kernel()) {
Igor Mammedovdd673282012-07-23 15:22:27 +0200736 env->mp_state = cpu_is_bsp(cpu) ? KVM_MP_STATE_RUNNABLE :
Marcelo Tosattiddced192010-03-23 13:37:14 -0300737 KVM_MP_STATE_UNINITIALIZED;
738 } else {
739 env->mp_state = KVM_MP_STATE_RUNNABLE;
740 }
Jan Kiszkacaa5af02009-11-06 19:39:24 +0100741}
742
Jan Kiszkac3a3a7d2011-01-21 21:48:13 +0100743static int kvm_get_supported_msrs(KVMState *s)
aliguori05330442008-11-05 16:29:27 +0000744{
Marcelo Tosatti75b10c42010-10-21 13:35:02 -0200745 static int kvm_supported_msrs;
Jan Kiszkac3a3a7d2011-01-21 21:48:13 +0100746 int ret = 0;
aliguori05330442008-11-05 16:29:27 +0000747
748 /* first time */
Marcelo Tosatti75b10c42010-10-21 13:35:02 -0200749 if (kvm_supported_msrs == 0) {
aliguori05330442008-11-05 16:29:27 +0000750 struct kvm_msr_list msr_list, *kvm_msr_list;
751
Marcelo Tosatti75b10c42010-10-21 13:35:02 -0200752 kvm_supported_msrs = -1;
aliguori05330442008-11-05 16:29:27 +0000753
754 /* Obtain MSR list from KVM. These are the MSRs that we must
755 * save/restore */
aliguori4c9f7372008-12-13 20:41:58 +0000756 msr_list.nmsrs = 0;
Jan Kiszkac3a3a7d2011-01-21 21:48:13 +0100757 ret = kvm_ioctl(s, KVM_GET_MSR_INDEX_LIST, &msr_list);
Jan Kiszka6fb6d242009-12-06 15:51:24 +0100758 if (ret < 0 && ret != -E2BIG) {
Jan Kiszkac3a3a7d2011-01-21 21:48:13 +0100759 return ret;
Jan Kiszka6fb6d242009-12-06 15:51:24 +0100760 }
Jan Kiszkad9db8892009-07-02 22:04:48 +0200761 /* Old kernel modules had a bug and could write beyond the provided
762 memory. Allocate at least a safe amount of 1K. */
Anthony Liguori7267c092011-08-20 22:09:37 -0500763 kvm_msr_list = g_malloc0(MAX(1024, sizeof(msr_list) +
Jan Kiszkad9db8892009-07-02 22:04:48 +0200764 msr_list.nmsrs *
765 sizeof(msr_list.indices[0])));
aliguori05330442008-11-05 16:29:27 +0000766
aliguori55308452008-12-13 20:49:31 +0000767 kvm_msr_list->nmsrs = msr_list.nmsrs;
Jan Kiszkac3a3a7d2011-01-21 21:48:13 +0100768 ret = kvm_ioctl(s, KVM_GET_MSR_INDEX_LIST, kvm_msr_list);
aliguori05330442008-11-05 16:29:27 +0000769 if (ret >= 0) {
770 int i;
771
772 for (i = 0; i < kvm_msr_list->nmsrs; i++) {
773 if (kvm_msr_list->indices[i] == MSR_STAR) {
Jan Kiszkac3a3a7d2011-01-21 21:48:13 +0100774 has_msr_star = true;
Marcelo Tosatti75b10c42010-10-21 13:35:02 -0200775 continue;
776 }
777 if (kvm_msr_list->indices[i] == MSR_VM_HSAVE_PA) {
Jan Kiszkac3a3a7d2011-01-21 21:48:13 +0100778 has_msr_hsave_pa = true;
Marcelo Tosatti75b10c42010-10-21 13:35:02 -0200779 continue;
aliguori05330442008-11-05 16:29:27 +0000780 }
Will Auldf28558d2012-11-26 21:32:18 -0800781 if (kvm_msr_list->indices[i] == MSR_TSC_ADJUST) {
782 has_msr_tsc_adjust = true;
783 continue;
784 }
Liu, Jinsongaa82ba52011-10-05 16:52:32 -0300785 if (kvm_msr_list->indices[i] == MSR_IA32_TSCDEADLINE) {
786 has_msr_tsc_deadline = true;
787 continue;
788 }
Avi Kivity21e87c42011-10-04 16:26:35 +0200789 if (kvm_msr_list->indices[i] == MSR_IA32_MISC_ENABLE) {
790 has_msr_misc_enable = true;
791 continue;
792 }
Liu Jinsong79e9ebe2013-12-05 08:32:12 +0800793 if (kvm_msr_list->indices[i] == MSR_IA32_BNDCFGS) {
794 has_msr_bndcfgs = true;
795 continue;
796 }
aliguori05330442008-11-05 16:29:27 +0000797 }
798 }
799
Anthony Liguori7267c092011-08-20 22:09:37 -0500800 g_free(kvm_msr_list);
aliguori05330442008-11-05 16:29:27 +0000801 }
802
Jan Kiszkac3a3a7d2011-01-21 21:48:13 +0100803 return ret;
Marcelo Tosatti75b10c42010-10-21 13:35:02 -0200804}
805
Jan Kiszkacad1e282011-01-21 21:48:16 +0100806int kvm_arch_init(KVMState *s)
Marcelo Tosatti75b10c42010-10-21 13:35:02 -0200807{
Jan Kiszka110761982011-01-21 21:48:18 +0100808 uint64_t identity_base = 0xfffbc000;
Jan Kiszka39d69602012-01-25 18:14:15 +0100809 uint64_t shadow_mem;
Sheng Yang20420432010-03-23 13:37:12 -0300810 int ret;
Marcelo Tosatti25d2e362010-10-21 13:35:04 -0200811 struct utsname utsname;
Sheng Yang20420432010-03-23 13:37:12 -0300812
Jan Kiszkac3a3a7d2011-01-21 21:48:13 +0100813 ret = kvm_get_supported_msrs(s);
Sheng Yang20420432010-03-23 13:37:12 -0300814 if (ret < 0) {
Sheng Yang20420432010-03-23 13:37:12 -0300815 return ret;
816 }
Marcelo Tosatti25d2e362010-10-21 13:35:04 -0200817
818 uname(&utsname);
819 lm_capable_kernel = strcmp(utsname.machine, "x86_64") == 0;
820
Jes Sorensen4c5b10b2010-02-15 18:33:46 +0100821 /*
Jan Kiszka110761982011-01-21 21:48:18 +0100822 * On older Intel CPUs, KVM uses vm86 mode to emulate 16-bit code directly.
823 * In order to use vm86 mode, an EPT identity map and a TSS are needed.
824 * Since these must be part of guest physical memory, we need to allocate
825 * them, both by setting their start addresses in the kernel and by
826 * creating a corresponding e820 entry. We need 4 pages before the BIOS.
827 *
828 * Older KVM versions may not support setting the identity map base. In
829 * that case we need to stick with the default, i.e. a 256K maximum BIOS
830 * size.
Jes Sorensen4c5b10b2010-02-15 18:33:46 +0100831 */
Jan Kiszka110761982011-01-21 21:48:18 +0100832 if (kvm_check_extension(s, KVM_CAP_SET_IDENTITY_MAP_ADDR)) {
833 /* Allows up to 16M BIOSes. */
834 identity_base = 0xfeffc000;
835
836 ret = kvm_vm_ioctl(s, KVM_SET_IDENTITY_MAP_ADDR, &identity_base);
837 if (ret < 0) {
838 return ret;
839 }
Jes Sorensen4c5b10b2010-02-15 18:33:46 +0100840 }
Jan Kiszkae56ff192011-06-08 16:11:02 +0200841
Jan Kiszka110761982011-01-21 21:48:18 +0100842 /* Set TSS base one page after EPT identity map. */
843 ret = kvm_vm_ioctl(s, KVM_SET_TSS_ADDR, identity_base + 0x1000);
Sheng Yang20420432010-03-23 13:37:12 -0300844 if (ret < 0) {
845 return ret;
846 }
847
Jan Kiszka110761982011-01-21 21:48:18 +0100848 /* Tell fw_cfg to notify the BIOS to reserve the range. */
849 ret = e820_add_entry(identity_base, 0x4000, E820_RESERVED);
850 if (ret < 0) {
851 fprintf(stderr, "e820_add_entry() table is full\n");
852 return ret;
853 }
Huang Ying3c85e742011-03-02 08:56:20 +0100854 qemu_register_reset(kvm_unpoison_all, NULL);
Jan Kiszka110761982011-01-21 21:48:18 +0100855
Markus Armbruster36ad0e92013-07-04 15:09:20 +0200856 shadow_mem = qemu_opt_get_size(qemu_get_machine_opts(),
857 "kvm_shadow_mem", -1);
858 if (shadow_mem != -1) {
859 shadow_mem /= 4096;
860 ret = kvm_vm_ioctl(s, KVM_SET_NR_MMU_PAGES, shadow_mem);
861 if (ret < 0) {
862 return ret;
Jan Kiszka39d69602012-01-25 18:14:15 +0100863 }
864 }
Jan Kiszka110761982011-01-21 21:48:18 +0100865 return 0;
aliguori05330442008-11-05 16:29:27 +0000866}
Jan Kiszkab9bec742010-12-27 16:19:29 +0100867
aliguori05330442008-11-05 16:29:27 +0000868static void set_v8086_seg(struct kvm_segment *lhs, const SegmentCache *rhs)
869{
870 lhs->selector = rhs->selector;
871 lhs->base = rhs->base;
872 lhs->limit = rhs->limit;
873 lhs->type = 3;
874 lhs->present = 1;
875 lhs->dpl = 3;
876 lhs->db = 0;
877 lhs->s = 1;
878 lhs->l = 0;
879 lhs->g = 0;
880 lhs->avl = 0;
881 lhs->unusable = 0;
882}
883
884static void set_seg(struct kvm_segment *lhs, const SegmentCache *rhs)
885{
886 unsigned flags = rhs->flags;
887 lhs->selector = rhs->selector;
888 lhs->base = rhs->base;
889 lhs->limit = rhs->limit;
890 lhs->type = (flags >> DESC_TYPE_SHIFT) & 15;
891 lhs->present = (flags & DESC_P_MASK) != 0;
Jan Kiszkaacaa7552010-12-27 15:56:44 +0100892 lhs->dpl = (flags >> DESC_DPL_SHIFT) & 3;
aliguori05330442008-11-05 16:29:27 +0000893 lhs->db = (flags >> DESC_B_SHIFT) & 1;
894 lhs->s = (flags & DESC_S_MASK) != 0;
895 lhs->l = (flags >> DESC_L_SHIFT) & 1;
896 lhs->g = (flags & DESC_G_MASK) != 0;
897 lhs->avl = (flags & DESC_AVL_MASK) != 0;
898 lhs->unusable = 0;
Michael S. Tsirkin7e680752012-02-29 17:54:29 +0200899 lhs->padding = 0;
aliguori05330442008-11-05 16:29:27 +0000900}
901
902static void get_seg(SegmentCache *lhs, const struct kvm_segment *rhs)
903{
904 lhs->selector = rhs->selector;
905 lhs->base = rhs->base;
906 lhs->limit = rhs->limit;
Jan Kiszkab9bec742010-12-27 16:19:29 +0100907 lhs->flags = (rhs->type << DESC_TYPE_SHIFT) |
908 (rhs->present * DESC_P_MASK) |
909 (rhs->dpl << DESC_DPL_SHIFT) |
910 (rhs->db << DESC_B_SHIFT) |
911 (rhs->s * DESC_S_MASK) |
912 (rhs->l << DESC_L_SHIFT) |
913 (rhs->g * DESC_G_MASK) |
914 (rhs->avl * DESC_AVL_MASK);
aliguori05330442008-11-05 16:29:27 +0000915}
916
917static void kvm_getput_reg(__u64 *kvm_reg, target_ulong *qemu_reg, int set)
918{
Jan Kiszkab9bec742010-12-27 16:19:29 +0100919 if (set) {
aliguori05330442008-11-05 16:29:27 +0000920 *kvm_reg = *qemu_reg;
Jan Kiszkab9bec742010-12-27 16:19:29 +0100921 } else {
aliguori05330442008-11-05 16:29:27 +0000922 *qemu_reg = *kvm_reg;
Jan Kiszkab9bec742010-12-27 16:19:29 +0100923 }
aliguori05330442008-11-05 16:29:27 +0000924}
925
Andreas Färber1bc22652012-10-31 06:06:49 +0100926static int kvm_getput_regs(X86CPU *cpu, int set)
aliguori05330442008-11-05 16:29:27 +0000927{
Andreas Färber1bc22652012-10-31 06:06:49 +0100928 CPUX86State *env = &cpu->env;
aliguori05330442008-11-05 16:29:27 +0000929 struct kvm_regs regs;
930 int ret = 0;
931
932 if (!set) {
Andreas Färber1bc22652012-10-31 06:06:49 +0100933 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_REGS, &regs);
Jan Kiszkab9bec742010-12-27 16:19:29 +0100934 if (ret < 0) {
aliguori05330442008-11-05 16:29:27 +0000935 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +0100936 }
aliguori05330442008-11-05 16:29:27 +0000937 }
938
939 kvm_getput_reg(&regs.rax, &env->regs[R_EAX], set);
940 kvm_getput_reg(&regs.rbx, &env->regs[R_EBX], set);
941 kvm_getput_reg(&regs.rcx, &env->regs[R_ECX], set);
942 kvm_getput_reg(&regs.rdx, &env->regs[R_EDX], set);
943 kvm_getput_reg(&regs.rsi, &env->regs[R_ESI], set);
944 kvm_getput_reg(&regs.rdi, &env->regs[R_EDI], set);
945 kvm_getput_reg(&regs.rsp, &env->regs[R_ESP], set);
946 kvm_getput_reg(&regs.rbp, &env->regs[R_EBP], set);
947#ifdef TARGET_X86_64
948 kvm_getput_reg(&regs.r8, &env->regs[8], set);
949 kvm_getput_reg(&regs.r9, &env->regs[9], set);
950 kvm_getput_reg(&regs.r10, &env->regs[10], set);
951 kvm_getput_reg(&regs.r11, &env->regs[11], set);
952 kvm_getput_reg(&regs.r12, &env->regs[12], set);
953 kvm_getput_reg(&regs.r13, &env->regs[13], set);
954 kvm_getput_reg(&regs.r14, &env->regs[14], set);
955 kvm_getput_reg(&regs.r15, &env->regs[15], set);
956#endif
957
958 kvm_getput_reg(&regs.rflags, &env->eflags, set);
959 kvm_getput_reg(&regs.rip, &env->eip, set);
960
Jan Kiszkab9bec742010-12-27 16:19:29 +0100961 if (set) {
Andreas Färber1bc22652012-10-31 06:06:49 +0100962 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_REGS, &regs);
Jan Kiszkab9bec742010-12-27 16:19:29 +0100963 }
aliguori05330442008-11-05 16:29:27 +0000964
965 return ret;
966}
967
Andreas Färber1bc22652012-10-31 06:06:49 +0100968static int kvm_put_fpu(X86CPU *cpu)
aliguori05330442008-11-05 16:29:27 +0000969{
Andreas Färber1bc22652012-10-31 06:06:49 +0100970 CPUX86State *env = &cpu->env;
aliguori05330442008-11-05 16:29:27 +0000971 struct kvm_fpu fpu;
972 int i;
973
974 memset(&fpu, 0, sizeof fpu);
975 fpu.fsw = env->fpus & ~(7 << 11);
976 fpu.fsw |= (env->fpstt & 7) << 11;
977 fpu.fcw = env->fpuc;
Jan Kiszka42cc8fa2011-06-15 15:17:26 +0200978 fpu.last_opcode = env->fpop;
979 fpu.last_ip = env->fpip;
980 fpu.last_dp = env->fpdp;
Jan Kiszkab9bec742010-12-27 16:19:29 +0100981 for (i = 0; i < 8; ++i) {
982 fpu.ftwx |= (!env->fptags[i]) << i;
983 }
aliguori05330442008-11-05 16:29:27 +0000984 memcpy(fpu.fpr, env->fpregs, sizeof env->fpregs);
985 memcpy(fpu.xmm, env->xmm_regs, sizeof env->xmm_regs);
986 fpu.mxcsr = env->mxcsr;
987
Andreas Färber1bc22652012-10-31 06:06:49 +0100988 return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_FPU, &fpu);
aliguori05330442008-11-05 16:29:27 +0000989}
990
Jan Kiszka6b424942011-10-27 19:26:02 +0200991#define XSAVE_FCW_FSW 0
992#define XSAVE_FTW_FOP 1
Sheng Yangf1665b22010-06-17 17:53:07 +0800993#define XSAVE_CWD_RIP 2
994#define XSAVE_CWD_RDP 4
995#define XSAVE_MXCSR 6
996#define XSAVE_ST_SPACE 8
997#define XSAVE_XMM_SPACE 40
998#define XSAVE_XSTATE_BV 128
999#define XSAVE_YMMH_SPACE 144
Liu Jinsong79e9ebe2013-12-05 08:32:12 +08001000#define XSAVE_BNDREGS 240
1001#define XSAVE_BNDCSR 256
Sheng Yangf1665b22010-06-17 17:53:07 +08001002
Andreas Färber1bc22652012-10-31 06:06:49 +01001003static int kvm_put_xsave(X86CPU *cpu)
Sheng Yangf1665b22010-06-17 17:53:07 +08001004{
Andreas Färber1bc22652012-10-31 06:06:49 +01001005 CPUX86State *env = &cpu->env;
Jan Kiszkafabacc02011-10-27 19:25:58 +02001006 struct kvm_xsave* xsave = env->kvm_xsave_buf;
Jan Kiszka42cc8fa2011-06-15 15:17:26 +02001007 uint16_t cwd, swd, twd;
Jan Kiszkafabacc02011-10-27 19:25:58 +02001008 int i, r;
Sheng Yangf1665b22010-06-17 17:53:07 +08001009
Jan Kiszkab9bec742010-12-27 16:19:29 +01001010 if (!kvm_has_xsave()) {
Andreas Färber1bc22652012-10-31 06:06:49 +01001011 return kvm_put_fpu(cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001012 }
Sheng Yangf1665b22010-06-17 17:53:07 +08001013
Sheng Yangf1665b22010-06-17 17:53:07 +08001014 memset(xsave, 0, sizeof(struct kvm_xsave));
Blue Swirl6115c0a2011-09-04 11:03:52 +00001015 twd = 0;
Sheng Yangf1665b22010-06-17 17:53:07 +08001016 swd = env->fpus & ~(7 << 11);
1017 swd |= (env->fpstt & 7) << 11;
1018 cwd = env->fpuc;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001019 for (i = 0; i < 8; ++i) {
Sheng Yangf1665b22010-06-17 17:53:07 +08001020 twd |= (!env->fptags[i]) << i;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001021 }
Jan Kiszka6b424942011-10-27 19:26:02 +02001022 xsave->region[XSAVE_FCW_FSW] = (uint32_t)(swd << 16) + cwd;
1023 xsave->region[XSAVE_FTW_FOP] = (uint32_t)(env->fpop << 16) + twd;
Jan Kiszka42cc8fa2011-06-15 15:17:26 +02001024 memcpy(&xsave->region[XSAVE_CWD_RIP], &env->fpip, sizeof(env->fpip));
1025 memcpy(&xsave->region[XSAVE_CWD_RDP], &env->fpdp, sizeof(env->fpdp));
Sheng Yangf1665b22010-06-17 17:53:07 +08001026 memcpy(&xsave->region[XSAVE_ST_SPACE], env->fpregs,
1027 sizeof env->fpregs);
1028 memcpy(&xsave->region[XSAVE_XMM_SPACE], env->xmm_regs,
1029 sizeof env->xmm_regs);
1030 xsave->region[XSAVE_MXCSR] = env->mxcsr;
1031 *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV] = env->xstate_bv;
1032 memcpy(&xsave->region[XSAVE_YMMH_SPACE], env->ymmh_regs,
1033 sizeof env->ymmh_regs);
Liu Jinsong79e9ebe2013-12-05 08:32:12 +08001034 memcpy(&xsave->region[XSAVE_BNDREGS], env->bnd_regs,
1035 sizeof env->bnd_regs);
1036 memcpy(&xsave->region[XSAVE_BNDCSR], &env->bndcs_regs,
1037 sizeof(env->bndcs_regs));
Andreas Färber1bc22652012-10-31 06:06:49 +01001038 r = kvm_vcpu_ioctl(CPU(cpu), KVM_SET_XSAVE, xsave);
Marcelo Tosatti0f539942010-10-19 09:00:34 -02001039 return r;
Sheng Yangf1665b22010-06-17 17:53:07 +08001040}
1041
Andreas Färber1bc22652012-10-31 06:06:49 +01001042static int kvm_put_xcrs(X86CPU *cpu)
Sheng Yangf1665b22010-06-17 17:53:07 +08001043{
Andreas Färber1bc22652012-10-31 06:06:49 +01001044 CPUX86State *env = &cpu->env;
Sheng Yangf1665b22010-06-17 17:53:07 +08001045 struct kvm_xcrs xcrs;
1046
Jan Kiszkab9bec742010-12-27 16:19:29 +01001047 if (!kvm_has_xcrs()) {
Sheng Yangf1665b22010-06-17 17:53:07 +08001048 return 0;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001049 }
Sheng Yangf1665b22010-06-17 17:53:07 +08001050
1051 xcrs.nr_xcrs = 1;
1052 xcrs.flags = 0;
1053 xcrs.xcrs[0].xcr = 0;
1054 xcrs.xcrs[0].value = env->xcr0;
Andreas Färber1bc22652012-10-31 06:06:49 +01001055 return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_XCRS, &xcrs);
Sheng Yangf1665b22010-06-17 17:53:07 +08001056}
1057
Andreas Färber1bc22652012-10-31 06:06:49 +01001058static int kvm_put_sregs(X86CPU *cpu)
aliguori05330442008-11-05 16:29:27 +00001059{
Andreas Färber1bc22652012-10-31 06:06:49 +01001060 CPUX86State *env = &cpu->env;
aliguori05330442008-11-05 16:29:27 +00001061 struct kvm_sregs sregs;
1062
Jan Kiszka0e607a82009-11-06 19:39:24 +01001063 memset(sregs.interrupt_bitmap, 0, sizeof(sregs.interrupt_bitmap));
1064 if (env->interrupt_injected >= 0) {
1065 sregs.interrupt_bitmap[env->interrupt_injected / 64] |=
1066 (uint64_t)1 << (env->interrupt_injected % 64);
1067 }
aliguori05330442008-11-05 16:29:27 +00001068
1069 if ((env->eflags & VM_MASK)) {
Jan Kiszkab9bec742010-12-27 16:19:29 +01001070 set_v8086_seg(&sregs.cs, &env->segs[R_CS]);
1071 set_v8086_seg(&sregs.ds, &env->segs[R_DS]);
1072 set_v8086_seg(&sregs.es, &env->segs[R_ES]);
1073 set_v8086_seg(&sregs.fs, &env->segs[R_FS]);
1074 set_v8086_seg(&sregs.gs, &env->segs[R_GS]);
1075 set_v8086_seg(&sregs.ss, &env->segs[R_SS]);
aliguori05330442008-11-05 16:29:27 +00001076 } else {
Jan Kiszkab9bec742010-12-27 16:19:29 +01001077 set_seg(&sregs.cs, &env->segs[R_CS]);
1078 set_seg(&sregs.ds, &env->segs[R_DS]);
1079 set_seg(&sregs.es, &env->segs[R_ES]);
1080 set_seg(&sregs.fs, &env->segs[R_FS]);
1081 set_seg(&sregs.gs, &env->segs[R_GS]);
1082 set_seg(&sregs.ss, &env->segs[R_SS]);
aliguori05330442008-11-05 16:29:27 +00001083 }
1084
1085 set_seg(&sregs.tr, &env->tr);
1086 set_seg(&sregs.ldt, &env->ldt);
1087
1088 sregs.idt.limit = env->idt.limit;
1089 sregs.idt.base = env->idt.base;
Michael S. Tsirkin7e680752012-02-29 17:54:29 +02001090 memset(sregs.idt.padding, 0, sizeof sregs.idt.padding);
aliguori05330442008-11-05 16:29:27 +00001091 sregs.gdt.limit = env->gdt.limit;
1092 sregs.gdt.base = env->gdt.base;
Michael S. Tsirkin7e680752012-02-29 17:54:29 +02001093 memset(sregs.gdt.padding, 0, sizeof sregs.gdt.padding);
aliguori05330442008-11-05 16:29:27 +00001094
1095 sregs.cr0 = env->cr[0];
1096 sregs.cr2 = env->cr[2];
1097 sregs.cr3 = env->cr[3];
1098 sregs.cr4 = env->cr[4];
1099
Chen Fan02e51482013-12-23 17:04:02 +08001100 sregs.cr8 = cpu_get_apic_tpr(cpu->apic_state);
1101 sregs.apic_base = cpu_get_apic_base(cpu->apic_state);
aliguori05330442008-11-05 16:29:27 +00001102
1103 sregs.efer = env->efer;
1104
Andreas Färber1bc22652012-10-31 06:06:49 +01001105 return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_SREGS, &sregs);
aliguori05330442008-11-05 16:29:27 +00001106}
1107
1108static void kvm_msr_entry_set(struct kvm_msr_entry *entry,
1109 uint32_t index, uint64_t value)
1110{
1111 entry->index = index;
1112 entry->data = value;
1113}
1114
Marcelo Tosatti7477cd32013-08-19 14:13:42 -03001115static int kvm_put_tscdeadline_msr(X86CPU *cpu)
1116{
1117 CPUX86State *env = &cpu->env;
1118 struct {
1119 struct kvm_msrs info;
1120 struct kvm_msr_entry entries[1];
1121 } msr_data;
1122 struct kvm_msr_entry *msrs = msr_data.entries;
1123
1124 if (!has_msr_tsc_deadline) {
1125 return 0;
1126 }
1127
1128 kvm_msr_entry_set(&msrs[0], MSR_IA32_TSCDEADLINE, env->tsc_deadline);
1129
1130 msr_data.info.nmsrs = 1;
1131
1132 return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MSRS, &msr_data);
1133}
1134
Jan Kiszka6bdf8632013-12-17 20:05:13 +01001135/*
1136 * Provide a separate write service for the feature control MSR in order to
1137 * kick the VCPU out of VMXON or even guest mode on reset. This has to be done
1138 * before writing any other state because forcibly leaving nested mode
1139 * invalidates the VCPU state.
1140 */
1141static int kvm_put_msr_feature_control(X86CPU *cpu)
1142{
1143 struct {
1144 struct kvm_msrs info;
1145 struct kvm_msr_entry entry;
1146 } msr_data;
1147
1148 kvm_msr_entry_set(&msr_data.entry, MSR_IA32_FEATURE_CONTROL,
1149 cpu->env.msr_ia32_feature_control);
1150 msr_data.info.nmsrs = 1;
1151 return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MSRS, &msr_data);
1152}
1153
Andreas Färber1bc22652012-10-31 06:06:49 +01001154static int kvm_put_msrs(X86CPU *cpu, int level)
aliguori05330442008-11-05 16:29:27 +00001155{
Andreas Färber1bc22652012-10-31 06:06:49 +01001156 CPUX86State *env = &cpu->env;
aliguori05330442008-11-05 16:29:27 +00001157 struct {
1158 struct kvm_msrs info;
1159 struct kvm_msr_entry entries[100];
1160 } msr_data;
1161 struct kvm_msr_entry *msrs = msr_data.entries;
Paolo Bonzini0d894362013-07-25 17:05:22 +02001162 int n = 0, i;
aliguori05330442008-11-05 16:29:27 +00001163
1164 kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_CS, env->sysenter_cs);
1165 kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_ESP, env->sysenter_esp);
1166 kvm_msr_entry_set(&msrs[n++], MSR_IA32_SYSENTER_EIP, env->sysenter_eip);
Jan Kiszka0c032662011-03-15 12:26:23 +01001167 kvm_msr_entry_set(&msrs[n++], MSR_PAT, env->pat);
Jan Kiszkac3a3a7d2011-01-21 21:48:13 +01001168 if (has_msr_star) {
Jan Kiszkab9bec742010-12-27 16:19:29 +01001169 kvm_msr_entry_set(&msrs[n++], MSR_STAR, env->star);
1170 }
Jan Kiszkac3a3a7d2011-01-21 21:48:13 +01001171 if (has_msr_hsave_pa) {
Marcelo Tosatti75b10c42010-10-21 13:35:02 -02001172 kvm_msr_entry_set(&msrs[n++], MSR_VM_HSAVE_PA, env->vm_hsave);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001173 }
Will Auldf28558d2012-11-26 21:32:18 -08001174 if (has_msr_tsc_adjust) {
1175 kvm_msr_entry_set(&msrs[n++], MSR_TSC_ADJUST, env->tsc_adjust);
1176 }
Avi Kivity21e87c42011-10-04 16:26:35 +02001177 if (has_msr_misc_enable) {
1178 kvm_msr_entry_set(&msrs[n++], MSR_IA32_MISC_ENABLE,
1179 env->msr_ia32_misc_enable);
1180 }
Paolo Bonzini439d19f2014-01-20 14:22:25 +01001181 if (has_msr_bndcfgs) {
1182 kvm_msr_entry_set(&msrs[n++], MSR_IA32_BNDCFGS, env->msr_bndcfgs);
1183 }
aliguori05330442008-11-05 16:29:27 +00001184#ifdef TARGET_X86_64
Marcelo Tosatti25d2e362010-10-21 13:35:04 -02001185 if (lm_capable_kernel) {
1186 kvm_msr_entry_set(&msrs[n++], MSR_CSTAR, env->cstar);
1187 kvm_msr_entry_set(&msrs[n++], MSR_KERNELGSBASE, env->kernelgsbase);
1188 kvm_msr_entry_set(&msrs[n++], MSR_FMASK, env->fmask);
1189 kvm_msr_entry_set(&msrs[n++], MSR_LSTAR, env->lstar);
1190 }
aliguori05330442008-11-05 16:29:27 +00001191#endif
Jan Kiszkaff5c1862011-01-21 21:48:14 +01001192 /*
Paolo Bonzini0d894362013-07-25 17:05:22 +02001193 * The following MSRs have side effects on the guest or are too heavy
1194 * for normal writeback. Limit them to reset or full state updates.
Jan Kiszkaff5c1862011-01-21 21:48:14 +01001195 */
1196 if (level >= KVM_PUT_RESET_STATE) {
Fernando Luis Vázquez Cao05226042013-12-06 17:33:01 +09001197 kvm_msr_entry_set(&msrs[n++], MSR_IA32_TSC, env->tsc);
Jan Kiszkaea643052010-03-01 19:10:31 +01001198 kvm_msr_entry_set(&msrs[n++], MSR_KVM_SYSTEM_TIME,
1199 env->system_time_msr);
1200 kvm_msr_entry_set(&msrs[n++], MSR_KVM_WALL_CLOCK, env->wall_clock_msr);
Jan Kiszkac5999bf2011-01-21 21:48:22 +01001201 if (has_msr_async_pf_en) {
1202 kvm_msr_entry_set(&msrs[n++], MSR_KVM_ASYNC_PF_EN,
1203 env->async_pf_en_msr);
1204 }
Michael S. Tsirkinbc9a8392012-08-28 20:43:56 +03001205 if (has_msr_pv_eoi_en) {
1206 kvm_msr_entry_set(&msrs[n++], MSR_KVM_PV_EOI_EN,
1207 env->pv_eoi_en_msr);
1208 }
Marcelo Tosatti917367a2013-02-19 23:27:20 -03001209 if (has_msr_kvm_steal_time) {
1210 kvm_msr_entry_set(&msrs[n++], MSR_KVM_STEAL_TIME,
1211 env->steal_time_msr);
1212 }
Paolo Bonzini0d894362013-07-25 17:05:22 +02001213 if (has_msr_architectural_pmu) {
1214 /* Stop the counter. */
1215 kvm_msr_entry_set(&msrs[n++], MSR_CORE_PERF_FIXED_CTR_CTRL, 0);
1216 kvm_msr_entry_set(&msrs[n++], MSR_CORE_PERF_GLOBAL_CTRL, 0);
1217
1218 /* Set the counter values. */
1219 for (i = 0; i < MAX_FIXED_COUNTERS; i++) {
1220 kvm_msr_entry_set(&msrs[n++], MSR_CORE_PERF_FIXED_CTR0 + i,
1221 env->msr_fixed_counters[i]);
1222 }
1223 for (i = 0; i < num_architectural_pmu_counters; i++) {
1224 kvm_msr_entry_set(&msrs[n++], MSR_P6_PERFCTR0 + i,
1225 env->msr_gp_counters[i]);
1226 kvm_msr_entry_set(&msrs[n++], MSR_P6_EVNTSEL0 + i,
1227 env->msr_gp_evtsel[i]);
1228 }
1229 kvm_msr_entry_set(&msrs[n++], MSR_CORE_PERF_GLOBAL_STATUS,
1230 env->msr_global_status);
1231 kvm_msr_entry_set(&msrs[n++], MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1232 env->msr_global_ovf_ctrl);
1233
1234 /* Now start the PMU. */
1235 kvm_msr_entry_set(&msrs[n++], MSR_CORE_PERF_FIXED_CTR_CTRL,
1236 env->msr_fixed_ctr_ctrl);
1237 kvm_msr_entry_set(&msrs[n++], MSR_CORE_PERF_GLOBAL_CTRL,
1238 env->msr_global_ctrl);
1239 }
Paolo Bonzini7bc3d712014-01-23 19:16:12 +01001240 if (has_msr_hv_hypercall) {
Vadim Rozenfeld1c90ef22014-01-24 00:40:47 +11001241 kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_GUEST_OS_ID,
1242 env->msr_hv_guest_os_id);
1243 kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_HYPERCALL,
1244 env->msr_hv_hypercall);
Vadim Rozenfeldeab70132011-12-18 22:48:14 +02001245 }
Paolo Bonzini7bc3d712014-01-23 19:16:12 +01001246 if (has_msr_hv_vapic) {
Vadim Rozenfeld5ef68982014-01-24 00:40:48 +11001247 kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_APIC_ASSIST_PAGE,
1248 env->msr_hv_vapic);
Vadim Rozenfeldeab70132011-12-18 22:48:14 +02001249 }
Vadim Rozenfeld48a5f3b2014-01-24 00:40:49 +11001250 if (has_msr_hv_tsc) {
1251 kvm_msr_entry_set(&msrs[n++], HV_X64_MSR_REFERENCE_TSC,
1252 env->msr_hv_tsc);
1253 }
Jan Kiszka6bdf8632013-12-17 20:05:13 +01001254
1255 /* Note: MSR_IA32_FEATURE_CONTROL is written separately, see
1256 * kvm_put_msr_feature_control. */
Jan Kiszkaea643052010-03-01 19:10:31 +01001257 }
Marcelo Tosatti57780492010-10-11 15:31:22 -03001258 if (env->mcg_cap) {
Hidetoshi Setod8da8572010-10-21 17:23:14 +09001259 int i;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001260
Jan Kiszkac34d4402011-03-02 08:56:16 +01001261 kvm_msr_entry_set(&msrs[n++], MSR_MCG_STATUS, env->mcg_status);
1262 kvm_msr_entry_set(&msrs[n++], MSR_MCG_CTL, env->mcg_ctl);
1263 for (i = 0; i < (env->mcg_cap & 0xff) * 4; i++) {
1264 kvm_msr_entry_set(&msrs[n++], MSR_MC0_CTL + i, env->mce_banks[i]);
Marcelo Tosatti57780492010-10-11 15:31:22 -03001265 }
1266 }
Glauber Costa1a036752009-10-22 10:26:56 -02001267
aliguori05330442008-11-05 16:29:27 +00001268 msr_data.info.nmsrs = n;
1269
Andreas Färber1bc22652012-10-31 06:06:49 +01001270 return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MSRS, &msr_data);
aliguori05330442008-11-05 16:29:27 +00001271
1272}
1273
1274
Andreas Färber1bc22652012-10-31 06:06:49 +01001275static int kvm_get_fpu(X86CPU *cpu)
aliguori05330442008-11-05 16:29:27 +00001276{
Andreas Färber1bc22652012-10-31 06:06:49 +01001277 CPUX86State *env = &cpu->env;
aliguori05330442008-11-05 16:29:27 +00001278 struct kvm_fpu fpu;
1279 int i, ret;
1280
Andreas Färber1bc22652012-10-31 06:06:49 +01001281 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_FPU, &fpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001282 if (ret < 0) {
aliguori05330442008-11-05 16:29:27 +00001283 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001284 }
aliguori05330442008-11-05 16:29:27 +00001285
1286 env->fpstt = (fpu.fsw >> 11) & 7;
1287 env->fpus = fpu.fsw;
1288 env->fpuc = fpu.fcw;
Jan Kiszka42cc8fa2011-06-15 15:17:26 +02001289 env->fpop = fpu.last_opcode;
1290 env->fpip = fpu.last_ip;
1291 env->fpdp = fpu.last_dp;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001292 for (i = 0; i < 8; ++i) {
1293 env->fptags[i] = !((fpu.ftwx >> i) & 1);
1294 }
aliguori05330442008-11-05 16:29:27 +00001295 memcpy(env->fpregs, fpu.fpr, sizeof env->fpregs);
1296 memcpy(env->xmm_regs, fpu.xmm, sizeof env->xmm_regs);
1297 env->mxcsr = fpu.mxcsr;
1298
1299 return 0;
1300}
1301
Andreas Färber1bc22652012-10-31 06:06:49 +01001302static int kvm_get_xsave(X86CPU *cpu)
Sheng Yangf1665b22010-06-17 17:53:07 +08001303{
Andreas Färber1bc22652012-10-31 06:06:49 +01001304 CPUX86State *env = &cpu->env;
Jan Kiszkafabacc02011-10-27 19:25:58 +02001305 struct kvm_xsave* xsave = env->kvm_xsave_buf;
Sheng Yangf1665b22010-06-17 17:53:07 +08001306 int ret, i;
Jan Kiszka42cc8fa2011-06-15 15:17:26 +02001307 uint16_t cwd, swd, twd;
Sheng Yangf1665b22010-06-17 17:53:07 +08001308
Jan Kiszkab9bec742010-12-27 16:19:29 +01001309 if (!kvm_has_xsave()) {
Andreas Färber1bc22652012-10-31 06:06:49 +01001310 return kvm_get_fpu(cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001311 }
Sheng Yangf1665b22010-06-17 17:53:07 +08001312
Andreas Färber1bc22652012-10-31 06:06:49 +01001313 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_XSAVE, xsave);
Marcelo Tosatti0f539942010-10-19 09:00:34 -02001314 if (ret < 0) {
Sheng Yangf1665b22010-06-17 17:53:07 +08001315 return ret;
Marcelo Tosatti0f539942010-10-19 09:00:34 -02001316 }
Sheng Yangf1665b22010-06-17 17:53:07 +08001317
Jan Kiszka6b424942011-10-27 19:26:02 +02001318 cwd = (uint16_t)xsave->region[XSAVE_FCW_FSW];
1319 swd = (uint16_t)(xsave->region[XSAVE_FCW_FSW] >> 16);
1320 twd = (uint16_t)xsave->region[XSAVE_FTW_FOP];
1321 env->fpop = (uint16_t)(xsave->region[XSAVE_FTW_FOP] >> 16);
Sheng Yangf1665b22010-06-17 17:53:07 +08001322 env->fpstt = (swd >> 11) & 7;
1323 env->fpus = swd;
1324 env->fpuc = cwd;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001325 for (i = 0; i < 8; ++i) {
Sheng Yangf1665b22010-06-17 17:53:07 +08001326 env->fptags[i] = !((twd >> i) & 1);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001327 }
Jan Kiszka42cc8fa2011-06-15 15:17:26 +02001328 memcpy(&env->fpip, &xsave->region[XSAVE_CWD_RIP], sizeof(env->fpip));
1329 memcpy(&env->fpdp, &xsave->region[XSAVE_CWD_RDP], sizeof(env->fpdp));
Sheng Yangf1665b22010-06-17 17:53:07 +08001330 env->mxcsr = xsave->region[XSAVE_MXCSR];
1331 memcpy(env->fpregs, &xsave->region[XSAVE_ST_SPACE],
1332 sizeof env->fpregs);
1333 memcpy(env->xmm_regs, &xsave->region[XSAVE_XMM_SPACE],
1334 sizeof env->xmm_regs);
1335 env->xstate_bv = *(uint64_t *)&xsave->region[XSAVE_XSTATE_BV];
1336 memcpy(env->ymmh_regs, &xsave->region[XSAVE_YMMH_SPACE],
1337 sizeof env->ymmh_regs);
Liu Jinsong79e9ebe2013-12-05 08:32:12 +08001338 memcpy(env->bnd_regs, &xsave->region[XSAVE_BNDREGS],
1339 sizeof env->bnd_regs);
1340 memcpy(&env->bndcs_regs, &xsave->region[XSAVE_BNDCSR],
1341 sizeof(env->bndcs_regs));
Sheng Yangf1665b22010-06-17 17:53:07 +08001342 return 0;
Sheng Yangf1665b22010-06-17 17:53:07 +08001343}
1344
Andreas Färber1bc22652012-10-31 06:06:49 +01001345static int kvm_get_xcrs(X86CPU *cpu)
Sheng Yangf1665b22010-06-17 17:53:07 +08001346{
Andreas Färber1bc22652012-10-31 06:06:49 +01001347 CPUX86State *env = &cpu->env;
Sheng Yangf1665b22010-06-17 17:53:07 +08001348 int i, ret;
1349 struct kvm_xcrs xcrs;
1350
Jan Kiszkab9bec742010-12-27 16:19:29 +01001351 if (!kvm_has_xcrs()) {
Sheng Yangf1665b22010-06-17 17:53:07 +08001352 return 0;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001353 }
Sheng Yangf1665b22010-06-17 17:53:07 +08001354
Andreas Färber1bc22652012-10-31 06:06:49 +01001355 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_XCRS, &xcrs);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001356 if (ret < 0) {
Sheng Yangf1665b22010-06-17 17:53:07 +08001357 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001358 }
Sheng Yangf1665b22010-06-17 17:53:07 +08001359
Jan Kiszkab9bec742010-12-27 16:19:29 +01001360 for (i = 0; i < xcrs.nr_xcrs; i++) {
Sheng Yangf1665b22010-06-17 17:53:07 +08001361 /* Only support xcr0 now */
Paolo Bonzini0fd53fe2013-10-17 16:47:52 +02001362 if (xcrs.xcrs[i].xcr == 0) {
1363 env->xcr0 = xcrs.xcrs[i].value;
Sheng Yangf1665b22010-06-17 17:53:07 +08001364 break;
1365 }
Jan Kiszkab9bec742010-12-27 16:19:29 +01001366 }
Sheng Yangf1665b22010-06-17 17:53:07 +08001367 return 0;
Sheng Yangf1665b22010-06-17 17:53:07 +08001368}
1369
Andreas Färber1bc22652012-10-31 06:06:49 +01001370static int kvm_get_sregs(X86CPU *cpu)
aliguori05330442008-11-05 16:29:27 +00001371{
Andreas Färber1bc22652012-10-31 06:06:49 +01001372 CPUX86State *env = &cpu->env;
aliguori05330442008-11-05 16:29:27 +00001373 struct kvm_sregs sregs;
1374 uint32_t hflags;
Jan Kiszka0e607a82009-11-06 19:39:24 +01001375 int bit, i, ret;
aliguori05330442008-11-05 16:29:27 +00001376
Andreas Färber1bc22652012-10-31 06:06:49 +01001377 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_SREGS, &sregs);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001378 if (ret < 0) {
aliguori05330442008-11-05 16:29:27 +00001379 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001380 }
aliguori05330442008-11-05 16:29:27 +00001381
Jan Kiszka0e607a82009-11-06 19:39:24 +01001382 /* There can only be one pending IRQ set in the bitmap at a time, so try
1383 to find it and save its number instead (-1 for none). */
1384 env->interrupt_injected = -1;
1385 for (i = 0; i < ARRAY_SIZE(sregs.interrupt_bitmap); i++) {
1386 if (sregs.interrupt_bitmap[i]) {
1387 bit = ctz64(sregs.interrupt_bitmap[i]);
1388 env->interrupt_injected = i * 64 + bit;
1389 break;
1390 }
1391 }
aliguori05330442008-11-05 16:29:27 +00001392
1393 get_seg(&env->segs[R_CS], &sregs.cs);
1394 get_seg(&env->segs[R_DS], &sregs.ds);
1395 get_seg(&env->segs[R_ES], &sregs.es);
1396 get_seg(&env->segs[R_FS], &sregs.fs);
1397 get_seg(&env->segs[R_GS], &sregs.gs);
1398 get_seg(&env->segs[R_SS], &sregs.ss);
1399
1400 get_seg(&env->tr, &sregs.tr);
1401 get_seg(&env->ldt, &sregs.ldt);
1402
1403 env->idt.limit = sregs.idt.limit;
1404 env->idt.base = sregs.idt.base;
1405 env->gdt.limit = sregs.gdt.limit;
1406 env->gdt.base = sregs.gdt.base;
1407
1408 env->cr[0] = sregs.cr0;
1409 env->cr[2] = sregs.cr2;
1410 env->cr[3] = sregs.cr3;
1411 env->cr[4] = sregs.cr4;
1412
aliguori05330442008-11-05 16:29:27 +00001413 env->efer = sregs.efer;
Jan Kiszkacce47512011-10-26 13:09:45 +02001414
1415 /* changes to apic base and cr8/tpr are read back via kvm_arch_post_run */
aliguori05330442008-11-05 16:29:27 +00001416
Jan Kiszkab9bec742010-12-27 16:19:29 +01001417#define HFLAG_COPY_MASK \
1418 ~( HF_CPL_MASK | HF_PE_MASK | HF_MP_MASK | HF_EM_MASK | \
1419 HF_TS_MASK | HF_TF_MASK | HF_VM_MASK | HF_IOPL_MASK | \
1420 HF_OSFXSR_MASK | HF_LMA_MASK | HF_CS32_MASK | \
1421 HF_SS32_MASK | HF_CS64_MASK | HF_ADDSEG_MASK)
aliguori05330442008-11-05 16:29:27 +00001422
1423 hflags = (env->segs[R_CS].flags >> DESC_DPL_SHIFT) & HF_CPL_MASK;
1424 hflags |= (env->cr[0] & CR0_PE_MASK) << (HF_PE_SHIFT - CR0_PE_SHIFT);
1425 hflags |= (env->cr[0] << (HF_MP_SHIFT - CR0_MP_SHIFT)) &
Jan Kiszkab9bec742010-12-27 16:19:29 +01001426 (HF_MP_MASK | HF_EM_MASK | HF_TS_MASK);
aliguori05330442008-11-05 16:29:27 +00001427 hflags |= (env->eflags & (HF_TF_MASK | HF_VM_MASK | HF_IOPL_MASK));
1428 hflags |= (env->cr[4] & CR4_OSFXSR_MASK) <<
Jan Kiszkab9bec742010-12-27 16:19:29 +01001429 (HF_OSFXSR_SHIFT - CR4_OSFXSR_SHIFT);
aliguori05330442008-11-05 16:29:27 +00001430
1431 if (env->efer & MSR_EFER_LMA) {
1432 hflags |= HF_LMA_MASK;
1433 }
1434
1435 if ((hflags & HF_LMA_MASK) && (env->segs[R_CS].flags & DESC_L_MASK)) {
1436 hflags |= HF_CS32_MASK | HF_SS32_MASK | HF_CS64_MASK;
1437 } else {
1438 hflags |= (env->segs[R_CS].flags & DESC_B_MASK) >>
Jan Kiszkab9bec742010-12-27 16:19:29 +01001439 (DESC_B_SHIFT - HF_CS32_SHIFT);
aliguori05330442008-11-05 16:29:27 +00001440 hflags |= (env->segs[R_SS].flags & DESC_B_MASK) >>
Jan Kiszkab9bec742010-12-27 16:19:29 +01001441 (DESC_B_SHIFT - HF_SS32_SHIFT);
1442 if (!(env->cr[0] & CR0_PE_MASK) || (env->eflags & VM_MASK) ||
1443 !(hflags & HF_CS32_MASK)) {
1444 hflags |= HF_ADDSEG_MASK;
1445 } else {
1446 hflags |= ((env->segs[R_DS].base | env->segs[R_ES].base |
1447 env->segs[R_SS].base) != 0) << HF_ADDSEG_SHIFT;
1448 }
aliguori05330442008-11-05 16:29:27 +00001449 }
1450 env->hflags = (env->hflags & HFLAG_COPY_MASK) | hflags;
aliguori05330442008-11-05 16:29:27 +00001451
1452 return 0;
1453}
1454
Andreas Färber1bc22652012-10-31 06:06:49 +01001455static int kvm_get_msrs(X86CPU *cpu)
aliguori05330442008-11-05 16:29:27 +00001456{
Andreas Färber1bc22652012-10-31 06:06:49 +01001457 CPUX86State *env = &cpu->env;
aliguori05330442008-11-05 16:29:27 +00001458 struct {
1459 struct kvm_msrs info;
1460 struct kvm_msr_entry entries[100];
1461 } msr_data;
1462 struct kvm_msr_entry *msrs = msr_data.entries;
1463 int ret, i, n;
1464
1465 n = 0;
1466 msrs[n++].index = MSR_IA32_SYSENTER_CS;
1467 msrs[n++].index = MSR_IA32_SYSENTER_ESP;
1468 msrs[n++].index = MSR_IA32_SYSENTER_EIP;
Jan Kiszka0c032662011-03-15 12:26:23 +01001469 msrs[n++].index = MSR_PAT;
Jan Kiszkac3a3a7d2011-01-21 21:48:13 +01001470 if (has_msr_star) {
Jan Kiszkab9bec742010-12-27 16:19:29 +01001471 msrs[n++].index = MSR_STAR;
1472 }
Jan Kiszkac3a3a7d2011-01-21 21:48:13 +01001473 if (has_msr_hsave_pa) {
Marcelo Tosatti75b10c42010-10-21 13:35:02 -02001474 msrs[n++].index = MSR_VM_HSAVE_PA;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001475 }
Will Auldf28558d2012-11-26 21:32:18 -08001476 if (has_msr_tsc_adjust) {
1477 msrs[n++].index = MSR_TSC_ADJUST;
1478 }
Liu, Jinsongaa82ba52011-10-05 16:52:32 -03001479 if (has_msr_tsc_deadline) {
1480 msrs[n++].index = MSR_IA32_TSCDEADLINE;
1481 }
Avi Kivity21e87c42011-10-04 16:26:35 +02001482 if (has_msr_misc_enable) {
1483 msrs[n++].index = MSR_IA32_MISC_ENABLE;
1484 }
Liu Jinsongdf676962013-08-19 09:33:30 +08001485 if (has_msr_feature_control) {
1486 msrs[n++].index = MSR_IA32_FEATURE_CONTROL;
1487 }
Liu Jinsong79e9ebe2013-12-05 08:32:12 +08001488 if (has_msr_bndcfgs) {
1489 msrs[n++].index = MSR_IA32_BNDCFGS;
1490 }
Glauber Costab8cc45d2011-02-03 14:19:53 -05001491
1492 if (!env->tsc_valid) {
1493 msrs[n++].index = MSR_IA32_TSC;
Luiz Capitulino13548692011-07-29 15:36:43 -03001494 env->tsc_valid = !runstate_is_running();
Glauber Costab8cc45d2011-02-03 14:19:53 -05001495 }
1496
aliguori05330442008-11-05 16:29:27 +00001497#ifdef TARGET_X86_64
Marcelo Tosatti25d2e362010-10-21 13:35:04 -02001498 if (lm_capable_kernel) {
1499 msrs[n++].index = MSR_CSTAR;
1500 msrs[n++].index = MSR_KERNELGSBASE;
1501 msrs[n++].index = MSR_FMASK;
1502 msrs[n++].index = MSR_LSTAR;
1503 }
aliguori05330442008-11-05 16:29:27 +00001504#endif
Glauber Costa1a036752009-10-22 10:26:56 -02001505 msrs[n++].index = MSR_KVM_SYSTEM_TIME;
1506 msrs[n++].index = MSR_KVM_WALL_CLOCK;
Jan Kiszkac5999bf2011-01-21 21:48:22 +01001507 if (has_msr_async_pf_en) {
1508 msrs[n++].index = MSR_KVM_ASYNC_PF_EN;
1509 }
Michael S. Tsirkinbc9a8392012-08-28 20:43:56 +03001510 if (has_msr_pv_eoi_en) {
1511 msrs[n++].index = MSR_KVM_PV_EOI_EN;
1512 }
Marcelo Tosatti917367a2013-02-19 23:27:20 -03001513 if (has_msr_kvm_steal_time) {
1514 msrs[n++].index = MSR_KVM_STEAL_TIME;
1515 }
Paolo Bonzini0d894362013-07-25 17:05:22 +02001516 if (has_msr_architectural_pmu) {
1517 msrs[n++].index = MSR_CORE_PERF_FIXED_CTR_CTRL;
1518 msrs[n++].index = MSR_CORE_PERF_GLOBAL_CTRL;
1519 msrs[n++].index = MSR_CORE_PERF_GLOBAL_STATUS;
1520 msrs[n++].index = MSR_CORE_PERF_GLOBAL_OVF_CTRL;
1521 for (i = 0; i < MAX_FIXED_COUNTERS; i++) {
1522 msrs[n++].index = MSR_CORE_PERF_FIXED_CTR0 + i;
1523 }
1524 for (i = 0; i < num_architectural_pmu_counters; i++) {
1525 msrs[n++].index = MSR_P6_PERFCTR0 + i;
1526 msrs[n++].index = MSR_P6_EVNTSEL0 + i;
1527 }
1528 }
Glauber Costa1a036752009-10-22 10:26:56 -02001529
Marcelo Tosatti57780492010-10-11 15:31:22 -03001530 if (env->mcg_cap) {
1531 msrs[n++].index = MSR_MCG_STATUS;
1532 msrs[n++].index = MSR_MCG_CTL;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001533 for (i = 0; i < (env->mcg_cap & 0xff) * 4; i++) {
Marcelo Tosatti57780492010-10-11 15:31:22 -03001534 msrs[n++].index = MSR_MC0_CTL + i;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001535 }
Marcelo Tosatti57780492010-10-11 15:31:22 -03001536 }
Marcelo Tosatti57780492010-10-11 15:31:22 -03001537
Vadim Rozenfeld1c90ef22014-01-24 00:40:47 +11001538 if (has_msr_hv_hypercall) {
1539 msrs[n++].index = HV_X64_MSR_HYPERCALL;
1540 msrs[n++].index = HV_X64_MSR_GUEST_OS_ID;
1541 }
Vadim Rozenfeld5ef68982014-01-24 00:40:48 +11001542 if (has_msr_hv_vapic) {
1543 msrs[n++].index = HV_X64_MSR_APIC_ASSIST_PAGE;
1544 }
Vadim Rozenfeld48a5f3b2014-01-24 00:40:49 +11001545 if (has_msr_hv_tsc) {
1546 msrs[n++].index = HV_X64_MSR_REFERENCE_TSC;
1547 }
Vadim Rozenfeld5ef68982014-01-24 00:40:48 +11001548
aliguori05330442008-11-05 16:29:27 +00001549 msr_data.info.nmsrs = n;
Andreas Färber1bc22652012-10-31 06:06:49 +01001550 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_MSRS, &msr_data);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001551 if (ret < 0) {
aliguori05330442008-11-05 16:29:27 +00001552 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001553 }
aliguori05330442008-11-05 16:29:27 +00001554
1555 for (i = 0; i < ret; i++) {
Paolo Bonzini0d894362013-07-25 17:05:22 +02001556 uint32_t index = msrs[i].index;
1557 switch (index) {
aliguori05330442008-11-05 16:29:27 +00001558 case MSR_IA32_SYSENTER_CS:
1559 env->sysenter_cs = msrs[i].data;
1560 break;
1561 case MSR_IA32_SYSENTER_ESP:
1562 env->sysenter_esp = msrs[i].data;
1563 break;
1564 case MSR_IA32_SYSENTER_EIP:
1565 env->sysenter_eip = msrs[i].data;
1566 break;
Jan Kiszka0c032662011-03-15 12:26:23 +01001567 case MSR_PAT:
1568 env->pat = msrs[i].data;
1569 break;
aliguori05330442008-11-05 16:29:27 +00001570 case MSR_STAR:
1571 env->star = msrs[i].data;
1572 break;
1573#ifdef TARGET_X86_64
1574 case MSR_CSTAR:
1575 env->cstar = msrs[i].data;
1576 break;
1577 case MSR_KERNELGSBASE:
1578 env->kernelgsbase = msrs[i].data;
1579 break;
1580 case MSR_FMASK:
1581 env->fmask = msrs[i].data;
1582 break;
1583 case MSR_LSTAR:
1584 env->lstar = msrs[i].data;
1585 break;
1586#endif
1587 case MSR_IA32_TSC:
1588 env->tsc = msrs[i].data;
1589 break;
Will Auldf28558d2012-11-26 21:32:18 -08001590 case MSR_TSC_ADJUST:
1591 env->tsc_adjust = msrs[i].data;
1592 break;
Liu, Jinsongaa82ba52011-10-05 16:52:32 -03001593 case MSR_IA32_TSCDEADLINE:
1594 env->tsc_deadline = msrs[i].data;
1595 break;
Marcelo Tosattiaa851e32010-10-21 13:35:01 -02001596 case MSR_VM_HSAVE_PA:
1597 env->vm_hsave = msrs[i].data;
1598 break;
Glauber Costa1a036752009-10-22 10:26:56 -02001599 case MSR_KVM_SYSTEM_TIME:
1600 env->system_time_msr = msrs[i].data;
1601 break;
1602 case MSR_KVM_WALL_CLOCK:
1603 env->wall_clock_msr = msrs[i].data;
1604 break;
Marcelo Tosatti57780492010-10-11 15:31:22 -03001605 case MSR_MCG_STATUS:
1606 env->mcg_status = msrs[i].data;
1607 break;
1608 case MSR_MCG_CTL:
1609 env->mcg_ctl = msrs[i].data;
1610 break;
Avi Kivity21e87c42011-10-04 16:26:35 +02001611 case MSR_IA32_MISC_ENABLE:
1612 env->msr_ia32_misc_enable = msrs[i].data;
1613 break;
Arthur Chunqi Li0779cae2013-07-07 23:13:37 +08001614 case MSR_IA32_FEATURE_CONTROL:
1615 env->msr_ia32_feature_control = msrs[i].data;
Liu Jinsongdf676962013-08-19 09:33:30 +08001616 break;
Liu Jinsong79e9ebe2013-12-05 08:32:12 +08001617 case MSR_IA32_BNDCFGS:
1618 env->msr_bndcfgs = msrs[i].data;
1619 break;
Marcelo Tosatti57780492010-10-11 15:31:22 -03001620 default:
Marcelo Tosatti57780492010-10-11 15:31:22 -03001621 if (msrs[i].index >= MSR_MC0_CTL &&
1622 msrs[i].index < MSR_MC0_CTL + (env->mcg_cap & 0xff) * 4) {
1623 env->mce_banks[msrs[i].index - MSR_MC0_CTL] = msrs[i].data;
Marcelo Tosatti57780492010-10-11 15:31:22 -03001624 }
Hidetoshi Setod8da8572010-10-21 17:23:14 +09001625 break;
Gleb Natapovf6584ee2010-10-24 14:27:55 +02001626 case MSR_KVM_ASYNC_PF_EN:
1627 env->async_pf_en_msr = msrs[i].data;
1628 break;
Michael S. Tsirkinbc9a8392012-08-28 20:43:56 +03001629 case MSR_KVM_PV_EOI_EN:
1630 env->pv_eoi_en_msr = msrs[i].data;
1631 break;
Marcelo Tosatti917367a2013-02-19 23:27:20 -03001632 case MSR_KVM_STEAL_TIME:
1633 env->steal_time_msr = msrs[i].data;
1634 break;
Paolo Bonzini0d894362013-07-25 17:05:22 +02001635 case MSR_CORE_PERF_FIXED_CTR_CTRL:
1636 env->msr_fixed_ctr_ctrl = msrs[i].data;
1637 break;
1638 case MSR_CORE_PERF_GLOBAL_CTRL:
1639 env->msr_global_ctrl = msrs[i].data;
1640 break;
1641 case MSR_CORE_PERF_GLOBAL_STATUS:
1642 env->msr_global_status = msrs[i].data;
1643 break;
1644 case MSR_CORE_PERF_GLOBAL_OVF_CTRL:
1645 env->msr_global_ovf_ctrl = msrs[i].data;
1646 break;
1647 case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR0 + MAX_FIXED_COUNTERS - 1:
1648 env->msr_fixed_counters[index - MSR_CORE_PERF_FIXED_CTR0] = msrs[i].data;
1649 break;
1650 case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR0 + MAX_GP_COUNTERS - 1:
1651 env->msr_gp_counters[index - MSR_P6_PERFCTR0] = msrs[i].data;
1652 break;
1653 case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL0 + MAX_GP_COUNTERS - 1:
1654 env->msr_gp_evtsel[index - MSR_P6_EVNTSEL0] = msrs[i].data;
1655 break;
Vadim Rozenfeld1c90ef22014-01-24 00:40:47 +11001656 case HV_X64_MSR_HYPERCALL:
1657 env->msr_hv_hypercall = msrs[i].data;
1658 break;
1659 case HV_X64_MSR_GUEST_OS_ID:
1660 env->msr_hv_guest_os_id = msrs[i].data;
1661 break;
Vadim Rozenfeld5ef68982014-01-24 00:40:48 +11001662 case HV_X64_MSR_APIC_ASSIST_PAGE:
1663 env->msr_hv_vapic = msrs[i].data;
1664 break;
Vadim Rozenfeld48a5f3b2014-01-24 00:40:49 +11001665 case HV_X64_MSR_REFERENCE_TSC:
1666 env->msr_hv_tsc = msrs[i].data;
1667 break;
aliguori05330442008-11-05 16:29:27 +00001668 }
1669 }
1670
1671 return 0;
1672}
1673
Andreas Färber1bc22652012-10-31 06:06:49 +01001674static int kvm_put_mp_state(X86CPU *cpu)
Hollis Blanchard9bdbe552009-11-09 21:05:37 +00001675{
Andreas Färber1bc22652012-10-31 06:06:49 +01001676 struct kvm_mp_state mp_state = { .mp_state = cpu->env.mp_state };
Hollis Blanchard9bdbe552009-11-09 21:05:37 +00001677
Andreas Färber1bc22652012-10-31 06:06:49 +01001678 return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_MP_STATE, &mp_state);
Hollis Blanchard9bdbe552009-11-09 21:05:37 +00001679}
1680
Andreas Färber23d02d92012-05-03 16:56:46 +02001681static int kvm_get_mp_state(X86CPU *cpu)
Hollis Blanchard9bdbe552009-11-09 21:05:37 +00001682{
Andreas Färber259186a2013-01-17 18:51:17 +01001683 CPUState *cs = CPU(cpu);
Andreas Färber23d02d92012-05-03 16:56:46 +02001684 CPUX86State *env = &cpu->env;
Hollis Blanchard9bdbe552009-11-09 21:05:37 +00001685 struct kvm_mp_state mp_state;
1686 int ret;
1687
Andreas Färber259186a2013-01-17 18:51:17 +01001688 ret = kvm_vcpu_ioctl(cs, KVM_GET_MP_STATE, &mp_state);
Hollis Blanchard9bdbe552009-11-09 21:05:37 +00001689 if (ret < 0) {
1690 return ret;
1691 }
1692 env->mp_state = mp_state.mp_state;
Jan Kiszkac14750e2011-01-21 21:48:10 +01001693 if (kvm_irqchip_in_kernel()) {
Andreas Färber259186a2013-01-17 18:51:17 +01001694 cs->halted = (mp_state.mp_state == KVM_MP_STATE_HALTED);
Jan Kiszkac14750e2011-01-21 21:48:10 +01001695 }
Hollis Blanchard9bdbe552009-11-09 21:05:37 +00001696 return 0;
1697}
1698
Andreas Färber1bc22652012-10-31 06:06:49 +01001699static int kvm_get_apic(X86CPU *cpu)
Jan Kiszka680c1c62011-10-16 13:23:26 +02001700{
Chen Fan02e51482013-12-23 17:04:02 +08001701 DeviceState *apic = cpu->apic_state;
Jan Kiszka680c1c62011-10-16 13:23:26 +02001702 struct kvm_lapic_state kapic;
1703 int ret;
1704
Jan Kiszka3d4b2642012-01-31 19:17:52 +01001705 if (apic && kvm_irqchip_in_kernel()) {
Andreas Färber1bc22652012-10-31 06:06:49 +01001706 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_LAPIC, &kapic);
Jan Kiszka680c1c62011-10-16 13:23:26 +02001707 if (ret < 0) {
1708 return ret;
1709 }
1710
1711 kvm_get_apic_state(apic, &kapic);
1712 }
1713 return 0;
1714}
1715
Andreas Färber1bc22652012-10-31 06:06:49 +01001716static int kvm_put_apic(X86CPU *cpu)
Jan Kiszka680c1c62011-10-16 13:23:26 +02001717{
Chen Fan02e51482013-12-23 17:04:02 +08001718 DeviceState *apic = cpu->apic_state;
Jan Kiszka680c1c62011-10-16 13:23:26 +02001719 struct kvm_lapic_state kapic;
1720
Jan Kiszka3d4b2642012-01-31 19:17:52 +01001721 if (apic && kvm_irqchip_in_kernel()) {
Jan Kiszka680c1c62011-10-16 13:23:26 +02001722 kvm_put_apic_state(apic, &kapic);
1723
Andreas Färber1bc22652012-10-31 06:06:49 +01001724 return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_LAPIC, &kapic);
Jan Kiszka680c1c62011-10-16 13:23:26 +02001725 }
1726 return 0;
1727}
1728
Andreas Färber1bc22652012-10-31 06:06:49 +01001729static int kvm_put_vcpu_events(X86CPU *cpu, int level)
Jan Kiszkaa0fb0022009-11-25 00:33:03 +01001730{
Andreas Färber1bc22652012-10-31 06:06:49 +01001731 CPUX86State *env = &cpu->env;
Jan Kiszkaa0fb0022009-11-25 00:33:03 +01001732 struct kvm_vcpu_events events;
1733
1734 if (!kvm_has_vcpu_events()) {
1735 return 0;
1736 }
1737
Jan Kiszka31827372009-12-14 12:26:17 +01001738 events.exception.injected = (env->exception_injected >= 0);
1739 events.exception.nr = env->exception_injected;
Jan Kiszkaa0fb0022009-11-25 00:33:03 +01001740 events.exception.has_error_code = env->has_error_code;
1741 events.exception.error_code = env->error_code;
Michael S. Tsirkin7e680752012-02-29 17:54:29 +02001742 events.exception.pad = 0;
Jan Kiszkaa0fb0022009-11-25 00:33:03 +01001743
1744 events.interrupt.injected = (env->interrupt_injected >= 0);
1745 events.interrupt.nr = env->interrupt_injected;
1746 events.interrupt.soft = env->soft_interrupt;
1747
1748 events.nmi.injected = env->nmi_injected;
1749 events.nmi.pending = env->nmi_pending;
1750 events.nmi.masked = !!(env->hflags2 & HF2_NMI_MASK);
Michael S. Tsirkin7e680752012-02-29 17:54:29 +02001751 events.nmi.pad = 0;
Jan Kiszkaa0fb0022009-11-25 00:33:03 +01001752
1753 events.sipi_vector = env->sipi_vector;
1754
Jan Kiszkaea643052010-03-01 19:10:31 +01001755 events.flags = 0;
1756 if (level >= KVM_PUT_RESET_STATE) {
1757 events.flags |=
1758 KVM_VCPUEVENT_VALID_NMI_PENDING | KVM_VCPUEVENT_VALID_SIPI_VECTOR;
1759 }
Jan Kiszkaaee028b2010-01-28 09:30:51 +01001760
Andreas Färber1bc22652012-10-31 06:06:49 +01001761 return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_VCPU_EVENTS, &events);
Jan Kiszkaa0fb0022009-11-25 00:33:03 +01001762}
1763
Andreas Färber1bc22652012-10-31 06:06:49 +01001764static int kvm_get_vcpu_events(X86CPU *cpu)
Jan Kiszkaa0fb0022009-11-25 00:33:03 +01001765{
Andreas Färber1bc22652012-10-31 06:06:49 +01001766 CPUX86State *env = &cpu->env;
Jan Kiszkaa0fb0022009-11-25 00:33:03 +01001767 struct kvm_vcpu_events events;
1768 int ret;
1769
1770 if (!kvm_has_vcpu_events()) {
1771 return 0;
1772 }
1773
Andreas Färber1bc22652012-10-31 06:06:49 +01001774 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_VCPU_EVENTS, &events);
Jan Kiszkaa0fb0022009-11-25 00:33:03 +01001775 if (ret < 0) {
1776 return ret;
1777 }
Jan Kiszka31827372009-12-14 12:26:17 +01001778 env->exception_injected =
Jan Kiszkaa0fb0022009-11-25 00:33:03 +01001779 events.exception.injected ? events.exception.nr : -1;
1780 env->has_error_code = events.exception.has_error_code;
1781 env->error_code = events.exception.error_code;
1782
1783 env->interrupt_injected =
1784 events.interrupt.injected ? events.interrupt.nr : -1;
1785 env->soft_interrupt = events.interrupt.soft;
1786
1787 env->nmi_injected = events.nmi.injected;
1788 env->nmi_pending = events.nmi.pending;
1789 if (events.nmi.masked) {
1790 env->hflags2 |= HF2_NMI_MASK;
1791 } else {
1792 env->hflags2 &= ~HF2_NMI_MASK;
1793 }
1794
1795 env->sipi_vector = events.sipi_vector;
Jan Kiszkaa0fb0022009-11-25 00:33:03 +01001796
1797 return 0;
1798}
1799
Andreas Färber1bc22652012-10-31 06:06:49 +01001800static int kvm_guest_debug_workarounds(X86CPU *cpu)
Jan Kiszkab0b1d692010-03-01 19:10:29 +01001801{
Andreas Färbered2803d2013-06-21 20:20:45 +02001802 CPUState *cs = CPU(cpu);
Andreas Färber1bc22652012-10-31 06:06:49 +01001803 CPUX86State *env = &cpu->env;
Jan Kiszkab0b1d692010-03-01 19:10:29 +01001804 int ret = 0;
Jan Kiszkab0b1d692010-03-01 19:10:29 +01001805 unsigned long reinject_trap = 0;
1806
1807 if (!kvm_has_vcpu_events()) {
1808 if (env->exception_injected == 1) {
1809 reinject_trap = KVM_GUESTDBG_INJECT_DB;
1810 } else if (env->exception_injected == 3) {
1811 reinject_trap = KVM_GUESTDBG_INJECT_BP;
1812 }
1813 env->exception_injected = -1;
1814 }
1815
1816 /*
1817 * Kernels before KVM_CAP_X86_ROBUST_SINGLESTEP overwrote flags.TF
1818 * injected via SET_GUEST_DEBUG while updating GP regs. Work around this
1819 * by updating the debug state once again if single-stepping is on.
1820 * Another reason to call kvm_update_guest_debug here is a pending debug
1821 * trap raise by the guest. On kernels without SET_VCPU_EVENTS we have to
1822 * reinject them via SET_GUEST_DEBUG.
1823 */
1824 if (reinject_trap ||
Andreas Färbered2803d2013-06-21 20:20:45 +02001825 (!kvm_has_robust_singlestep() && cs->singlestep_enabled)) {
Stefan Weil38e478e2013-07-25 20:50:21 +02001826 ret = kvm_update_guest_debug(cs, reinject_trap);
Jan Kiszkab0b1d692010-03-01 19:10:29 +01001827 }
Jan Kiszkab0b1d692010-03-01 19:10:29 +01001828 return ret;
1829}
1830
Andreas Färber1bc22652012-10-31 06:06:49 +01001831static int kvm_put_debugregs(X86CPU *cpu)
Jan Kiszkaff44f1a2010-03-12 15:20:49 +01001832{
Andreas Färber1bc22652012-10-31 06:06:49 +01001833 CPUX86State *env = &cpu->env;
Jan Kiszkaff44f1a2010-03-12 15:20:49 +01001834 struct kvm_debugregs dbgregs;
1835 int i;
1836
1837 if (!kvm_has_debugregs()) {
1838 return 0;
1839 }
1840
1841 for (i = 0; i < 4; i++) {
1842 dbgregs.db[i] = env->dr[i];
1843 }
1844 dbgregs.dr6 = env->dr[6];
1845 dbgregs.dr7 = env->dr[7];
1846 dbgregs.flags = 0;
1847
Andreas Färber1bc22652012-10-31 06:06:49 +01001848 return kvm_vcpu_ioctl(CPU(cpu), KVM_SET_DEBUGREGS, &dbgregs);
Jan Kiszkaff44f1a2010-03-12 15:20:49 +01001849}
1850
Andreas Färber1bc22652012-10-31 06:06:49 +01001851static int kvm_get_debugregs(X86CPU *cpu)
Jan Kiszkaff44f1a2010-03-12 15:20:49 +01001852{
Andreas Färber1bc22652012-10-31 06:06:49 +01001853 CPUX86State *env = &cpu->env;
Jan Kiszkaff44f1a2010-03-12 15:20:49 +01001854 struct kvm_debugregs dbgregs;
1855 int i, ret;
1856
1857 if (!kvm_has_debugregs()) {
1858 return 0;
1859 }
1860
Andreas Färber1bc22652012-10-31 06:06:49 +01001861 ret = kvm_vcpu_ioctl(CPU(cpu), KVM_GET_DEBUGREGS, &dbgregs);
Jan Kiszkaff44f1a2010-03-12 15:20:49 +01001862 if (ret < 0) {
Jan Kiszkab9bec742010-12-27 16:19:29 +01001863 return ret;
Jan Kiszkaff44f1a2010-03-12 15:20:49 +01001864 }
1865 for (i = 0; i < 4; i++) {
1866 env->dr[i] = dbgregs.db[i];
1867 }
1868 env->dr[4] = env->dr[6] = dbgregs.dr6;
1869 env->dr[5] = env->dr[7] = dbgregs.dr7;
Jan Kiszkaff44f1a2010-03-12 15:20:49 +01001870
1871 return 0;
1872}
1873
Andreas Färber20d695a2012-10-31 06:57:49 +01001874int kvm_arch_put_registers(CPUState *cpu, int level)
aliguori05330442008-11-05 16:29:27 +00001875{
Andreas Färber20d695a2012-10-31 06:57:49 +01001876 X86CPU *x86_cpu = X86_CPU(cpu);
aliguori05330442008-11-05 16:29:27 +00001877 int ret;
1878
Andreas Färber2fa45342012-05-02 23:38:39 +02001879 assert(cpu_is_stopped(cpu) || qemu_cpu_is_self(cpu));
Jan Kiszkadbaa07c2010-05-04 09:45:26 -03001880
Jan Kiszka6bdf8632013-12-17 20:05:13 +01001881 if (level >= KVM_PUT_RESET_STATE && has_msr_feature_control) {
1882 ret = kvm_put_msr_feature_control(x86_cpu);
1883 if (ret < 0) {
1884 return ret;
1885 }
1886 }
1887
Andreas Färber1bc22652012-10-31 06:06:49 +01001888 ret = kvm_getput_regs(x86_cpu, 1);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001889 if (ret < 0) {
aliguori05330442008-11-05 16:29:27 +00001890 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001891 }
Andreas Färber1bc22652012-10-31 06:06:49 +01001892 ret = kvm_put_xsave(x86_cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001893 if (ret < 0) {
Sheng Yangf1665b22010-06-17 17:53:07 +08001894 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001895 }
Andreas Färber1bc22652012-10-31 06:06:49 +01001896 ret = kvm_put_xcrs(x86_cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001897 if (ret < 0) {
aliguori05330442008-11-05 16:29:27 +00001898 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001899 }
Andreas Färber1bc22652012-10-31 06:06:49 +01001900 ret = kvm_put_sregs(x86_cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001901 if (ret < 0) {
aliguori05330442008-11-05 16:29:27 +00001902 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001903 }
Jan Kiszkaab443472011-03-02 08:56:14 +01001904 /* must be before kvm_put_msrs */
Andreas Färber1bc22652012-10-31 06:06:49 +01001905 ret = kvm_inject_mce_oldstyle(x86_cpu);
Jan Kiszkaab443472011-03-02 08:56:14 +01001906 if (ret < 0) {
1907 return ret;
1908 }
Andreas Färber1bc22652012-10-31 06:06:49 +01001909 ret = kvm_put_msrs(x86_cpu, level);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001910 if (ret < 0) {
aliguori05330442008-11-05 16:29:27 +00001911 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001912 }
Jan Kiszkaea643052010-03-01 19:10:31 +01001913 if (level >= KVM_PUT_RESET_STATE) {
Andreas Färber1bc22652012-10-31 06:06:49 +01001914 ret = kvm_put_mp_state(x86_cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001915 if (ret < 0) {
Jan Kiszkaea643052010-03-01 19:10:31 +01001916 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001917 }
Andreas Färber1bc22652012-10-31 06:06:49 +01001918 ret = kvm_put_apic(x86_cpu);
Jan Kiszka680c1c62011-10-16 13:23:26 +02001919 if (ret < 0) {
1920 return ret;
1921 }
Jan Kiszkaea643052010-03-01 19:10:31 +01001922 }
Marcelo Tosatti7477cd32013-08-19 14:13:42 -03001923
1924 ret = kvm_put_tscdeadline_msr(x86_cpu);
1925 if (ret < 0) {
1926 return ret;
1927 }
1928
Andreas Färber1bc22652012-10-31 06:06:49 +01001929 ret = kvm_put_vcpu_events(x86_cpu, level);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001930 if (ret < 0) {
Jan Kiszkaa0fb0022009-11-25 00:33:03 +01001931 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001932 }
Andreas Färber1bc22652012-10-31 06:06:49 +01001933 ret = kvm_put_debugregs(x86_cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001934 if (ret < 0) {
Jan Kiszkab0b1d692010-03-01 19:10:29 +01001935 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001936 }
Jan Kiszkab0b1d692010-03-01 19:10:29 +01001937 /* must be last */
Andreas Färber1bc22652012-10-31 06:06:49 +01001938 ret = kvm_guest_debug_workarounds(x86_cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001939 if (ret < 0) {
Jan Kiszkab0b1d692010-03-01 19:10:29 +01001940 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001941 }
aliguori05330442008-11-05 16:29:27 +00001942 return 0;
1943}
1944
Andreas Färber20d695a2012-10-31 06:57:49 +01001945int kvm_arch_get_registers(CPUState *cs)
aliguori05330442008-11-05 16:29:27 +00001946{
Andreas Färber20d695a2012-10-31 06:57:49 +01001947 X86CPU *cpu = X86_CPU(cs);
aliguori05330442008-11-05 16:29:27 +00001948 int ret;
1949
Andreas Färber20d695a2012-10-31 06:57:49 +01001950 assert(cpu_is_stopped(cs) || qemu_cpu_is_self(cs));
Jan Kiszkadbaa07c2010-05-04 09:45:26 -03001951
Andreas Färber1bc22652012-10-31 06:06:49 +01001952 ret = kvm_getput_regs(cpu, 0);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001953 if (ret < 0) {
aliguori05330442008-11-05 16:29:27 +00001954 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001955 }
Andreas Färber1bc22652012-10-31 06:06:49 +01001956 ret = kvm_get_xsave(cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001957 if (ret < 0) {
Sheng Yangf1665b22010-06-17 17:53:07 +08001958 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001959 }
Andreas Färber1bc22652012-10-31 06:06:49 +01001960 ret = kvm_get_xcrs(cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001961 if (ret < 0) {
aliguori05330442008-11-05 16:29:27 +00001962 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001963 }
Andreas Färber1bc22652012-10-31 06:06:49 +01001964 ret = kvm_get_sregs(cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001965 if (ret < 0) {
aliguori05330442008-11-05 16:29:27 +00001966 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001967 }
Andreas Färber1bc22652012-10-31 06:06:49 +01001968 ret = kvm_get_msrs(cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001969 if (ret < 0) {
aliguori05330442008-11-05 16:29:27 +00001970 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001971 }
Andreas Färber23d02d92012-05-03 16:56:46 +02001972 ret = kvm_get_mp_state(cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001973 if (ret < 0) {
Jan Kiszka5a2e3c22009-11-25 00:31:03 +01001974 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001975 }
Andreas Färber1bc22652012-10-31 06:06:49 +01001976 ret = kvm_get_apic(cpu);
Jan Kiszka680c1c62011-10-16 13:23:26 +02001977 if (ret < 0) {
1978 return ret;
1979 }
Andreas Färber1bc22652012-10-31 06:06:49 +01001980 ret = kvm_get_vcpu_events(cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001981 if (ret < 0) {
Jan Kiszkaa0fb0022009-11-25 00:33:03 +01001982 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001983 }
Andreas Färber1bc22652012-10-31 06:06:49 +01001984 ret = kvm_get_debugregs(cpu);
Jan Kiszkab9bec742010-12-27 16:19:29 +01001985 if (ret < 0) {
Jan Kiszkaff44f1a2010-03-12 15:20:49 +01001986 return ret;
Jan Kiszkab9bec742010-12-27 16:19:29 +01001987 }
aliguori05330442008-11-05 16:29:27 +00001988 return 0;
1989}
1990
Andreas Färber20d695a2012-10-31 06:57:49 +01001991void kvm_arch_pre_run(CPUState *cpu, struct kvm_run *run)
aliguori05330442008-11-05 16:29:27 +00001992{
Andreas Färber20d695a2012-10-31 06:57:49 +01001993 X86CPU *x86_cpu = X86_CPU(cpu);
1994 CPUX86State *env = &x86_cpu->env;
Jan Kiszkace377af2011-02-07 12:19:21 +01001995 int ret;
1996
Lai Jiangshan276ce812010-12-10 15:42:53 +08001997 /* Inject NMI */
Andreas Färber259186a2013-01-17 18:51:17 +01001998 if (cpu->interrupt_request & CPU_INTERRUPT_NMI) {
1999 cpu->interrupt_request &= ~CPU_INTERRUPT_NMI;
Lai Jiangshan276ce812010-12-10 15:42:53 +08002000 DPRINTF("injected NMI\n");
Andreas Färber1bc22652012-10-31 06:06:49 +01002001 ret = kvm_vcpu_ioctl(cpu, KVM_NMI);
Jan Kiszkace377af2011-02-07 12:19:21 +01002002 if (ret < 0) {
2003 fprintf(stderr, "KVM: injection failed, NMI lost (%s)\n",
2004 strerror(-ret));
2005 }
Lai Jiangshan276ce812010-12-10 15:42:53 +08002006 }
2007
Jan Kiszkadb1669b2011-02-07 12:19:19 +01002008 if (!kvm_irqchip_in_kernel()) {
Jan Kiszkad362e752012-02-17 18:31:17 +01002009 /* Force the VCPU out of its inner loop to process any INIT requests
2010 * or pending TPR access reports. */
Andreas Färber259186a2013-01-17 18:51:17 +01002011 if (cpu->interrupt_request &
Jan Kiszkad362e752012-02-17 18:31:17 +01002012 (CPU_INTERRUPT_INIT | CPU_INTERRUPT_TPR)) {
Andreas Färberfcd7d002012-12-17 08:02:44 +01002013 cpu->exit_request = 1;
aliguori05330442008-11-05 16:29:27 +00002014 }
aliguori05330442008-11-05 16:29:27 +00002015
Jan Kiszkadb1669b2011-02-07 12:19:19 +01002016 /* Try to inject an interrupt if the guest can accept it */
2017 if (run->ready_for_interrupt_injection &&
Andreas Färber259186a2013-01-17 18:51:17 +01002018 (cpu->interrupt_request & CPU_INTERRUPT_HARD) &&
Jan Kiszkadb1669b2011-02-07 12:19:19 +01002019 (env->eflags & IF_MASK)) {
2020 int irq;
aliguori05330442008-11-05 16:29:27 +00002021
Andreas Färber259186a2013-01-17 18:51:17 +01002022 cpu->interrupt_request &= ~CPU_INTERRUPT_HARD;
Jan Kiszkadb1669b2011-02-07 12:19:19 +01002023 irq = cpu_get_pic_interrupt(env);
2024 if (irq >= 0) {
2025 struct kvm_interrupt intr;
2026
2027 intr.irq = irq;
Jan Kiszkadb1669b2011-02-07 12:19:19 +01002028 DPRINTF("injected interrupt %d\n", irq);
Andreas Färber1bc22652012-10-31 06:06:49 +01002029 ret = kvm_vcpu_ioctl(cpu, KVM_INTERRUPT, &intr);
Jan Kiszkace377af2011-02-07 12:19:21 +01002030 if (ret < 0) {
2031 fprintf(stderr,
2032 "KVM: injection failed, interrupt lost (%s)\n",
2033 strerror(-ret));
2034 }
Jan Kiszkadb1669b2011-02-07 12:19:19 +01002035 }
2036 }
2037
2038 /* If we have an interrupt but the guest is not ready to receive an
2039 * interrupt, request an interrupt window exit. This will
2040 * cause a return to userspace as soon as the guest is ready to
2041 * receive interrupts. */
Andreas Färber259186a2013-01-17 18:51:17 +01002042 if ((cpu->interrupt_request & CPU_INTERRUPT_HARD)) {
Jan Kiszkadb1669b2011-02-07 12:19:19 +01002043 run->request_interrupt_window = 1;
2044 } else {
2045 run->request_interrupt_window = 0;
2046 }
2047
2048 DPRINTF("setting tpr\n");
Chen Fan02e51482013-12-23 17:04:02 +08002049 run->cr8 = cpu_get_apic_tpr(x86_cpu->apic_state);
Jan Kiszkadb1669b2011-02-07 12:19:19 +01002050 }
aliguori05330442008-11-05 16:29:27 +00002051}
2052
Andreas Färber20d695a2012-10-31 06:57:49 +01002053void kvm_arch_post_run(CPUState *cpu, struct kvm_run *run)
aliguori05330442008-11-05 16:29:27 +00002054{
Andreas Färber20d695a2012-10-31 06:57:49 +01002055 X86CPU *x86_cpu = X86_CPU(cpu);
2056 CPUX86State *env = &x86_cpu->env;
2057
Jan Kiszkab9bec742010-12-27 16:19:29 +01002058 if (run->if_flag) {
aliguori05330442008-11-05 16:29:27 +00002059 env->eflags |= IF_MASK;
Jan Kiszkab9bec742010-12-27 16:19:29 +01002060 } else {
aliguori05330442008-11-05 16:29:27 +00002061 env->eflags &= ~IF_MASK;
Jan Kiszkab9bec742010-12-27 16:19:29 +01002062 }
Chen Fan02e51482013-12-23 17:04:02 +08002063 cpu_set_apic_tpr(x86_cpu->apic_state, run->cr8);
2064 cpu_set_apic_base(x86_cpu->apic_state, run->apic_base);
aliguori05330442008-11-05 16:29:27 +00002065}
2066
Andreas Färber20d695a2012-10-31 06:57:49 +01002067int kvm_arch_process_async_events(CPUState *cs)
Marcelo Tosatti0af691d2010-05-04 09:45:27 -03002068{
Andreas Färber20d695a2012-10-31 06:57:49 +01002069 X86CPU *cpu = X86_CPU(cs);
2070 CPUX86State *env = &cpu->env;
Andreas Färber232fc232012-05-05 01:14:41 +02002071
Andreas Färber259186a2013-01-17 18:51:17 +01002072 if (cs->interrupt_request & CPU_INTERRUPT_MCE) {
Jan Kiszkaab443472011-03-02 08:56:14 +01002073 /* We must not raise CPU_INTERRUPT_MCE if it's not supported. */
2074 assert(env->mcg_cap);
2075
Andreas Färber259186a2013-01-17 18:51:17 +01002076 cs->interrupt_request &= ~CPU_INTERRUPT_MCE;
Jan Kiszkaab443472011-03-02 08:56:14 +01002077
Andreas Färberdd1750d2013-05-01 13:45:44 +02002078 kvm_cpu_synchronize_state(cs);
Jan Kiszkaab443472011-03-02 08:56:14 +01002079
2080 if (env->exception_injected == EXCP08_DBLE) {
2081 /* this means triple fault */
2082 qemu_system_reset_request();
Andreas Färberfcd7d002012-12-17 08:02:44 +01002083 cs->exit_request = 1;
Jan Kiszkaab443472011-03-02 08:56:14 +01002084 return 0;
2085 }
2086 env->exception_injected = EXCP12_MCHK;
2087 env->has_error_code = 0;
2088
Andreas Färber259186a2013-01-17 18:51:17 +01002089 cs->halted = 0;
Jan Kiszkaab443472011-03-02 08:56:14 +01002090 if (kvm_irqchip_in_kernel() && env->mp_state == KVM_MP_STATE_HALTED) {
2091 env->mp_state = KVM_MP_STATE_RUNNABLE;
2092 }
2093 }
2094
Jan Kiszkadb1669b2011-02-07 12:19:19 +01002095 if (kvm_irqchip_in_kernel()) {
2096 return 0;
2097 }
2098
Andreas Färber259186a2013-01-17 18:51:17 +01002099 if (cs->interrupt_request & CPU_INTERRUPT_POLL) {
2100 cs->interrupt_request &= ~CPU_INTERRUPT_POLL;
Chen Fan02e51482013-12-23 17:04:02 +08002101 apic_poll_irq(cpu->apic_state);
Jan Kiszka5d62c432012-07-09 16:42:32 +02002102 }
Andreas Färber259186a2013-01-17 18:51:17 +01002103 if (((cs->interrupt_request & CPU_INTERRUPT_HARD) &&
Jan Kiszka4601f7b2011-03-15 12:26:19 +01002104 (env->eflags & IF_MASK)) ||
Andreas Färber259186a2013-01-17 18:51:17 +01002105 (cs->interrupt_request & CPU_INTERRUPT_NMI)) {
2106 cs->halted = 0;
Jan Kiszka6792a572011-02-07 12:19:18 +01002107 }
Andreas Färber259186a2013-01-17 18:51:17 +01002108 if (cs->interrupt_request & CPU_INTERRUPT_INIT) {
Andreas Färberdd1750d2013-05-01 13:45:44 +02002109 kvm_cpu_synchronize_state(cs);
Andreas Färber232fc232012-05-05 01:14:41 +02002110 do_cpu_init(cpu);
Marcelo Tosatti0af691d2010-05-04 09:45:27 -03002111 }
Andreas Färber259186a2013-01-17 18:51:17 +01002112 if (cs->interrupt_request & CPU_INTERRUPT_SIPI) {
Andreas Färberdd1750d2013-05-01 13:45:44 +02002113 kvm_cpu_synchronize_state(cs);
Andreas Färber232fc232012-05-05 01:14:41 +02002114 do_cpu_sipi(cpu);
Marcelo Tosatti0af691d2010-05-04 09:45:27 -03002115 }
Andreas Färber259186a2013-01-17 18:51:17 +01002116 if (cs->interrupt_request & CPU_INTERRUPT_TPR) {
2117 cs->interrupt_request &= ~CPU_INTERRUPT_TPR;
Andreas Färberdd1750d2013-05-01 13:45:44 +02002118 kvm_cpu_synchronize_state(cs);
Chen Fan02e51482013-12-23 17:04:02 +08002119 apic_handle_tpr_access_report(cpu->apic_state, env->eip,
Jan Kiszkad362e752012-02-17 18:31:17 +01002120 env->tpr_access_type);
2121 }
Marcelo Tosatti0af691d2010-05-04 09:45:27 -03002122
Andreas Färber259186a2013-01-17 18:51:17 +01002123 return cs->halted;
Marcelo Tosatti0af691d2010-05-04 09:45:27 -03002124}
2125
Andreas Färber839b5632012-05-03 17:00:31 +02002126static int kvm_handle_halt(X86CPU *cpu)
aliguori05330442008-11-05 16:29:27 +00002127{
Andreas Färber259186a2013-01-17 18:51:17 +01002128 CPUState *cs = CPU(cpu);
Andreas Färber839b5632012-05-03 17:00:31 +02002129 CPUX86State *env = &cpu->env;
2130
Andreas Färber259186a2013-01-17 18:51:17 +01002131 if (!((cs->interrupt_request & CPU_INTERRUPT_HARD) &&
aliguori05330442008-11-05 16:29:27 +00002132 (env->eflags & IF_MASK)) &&
Andreas Färber259186a2013-01-17 18:51:17 +01002133 !(cs->interrupt_request & CPU_INTERRUPT_NMI)) {
2134 cs->halted = 1;
Jan Kiszkabb4ea392011-03-15 12:26:28 +01002135 return EXCP_HLT;
aliguori05330442008-11-05 16:29:27 +00002136 }
2137
Jan Kiszkabb4ea392011-03-15 12:26:28 +01002138 return 0;
aliguori05330442008-11-05 16:29:27 +00002139}
2140
Andreas Färberf7575c962012-12-01 06:18:14 +01002141static int kvm_handle_tpr_access(X86CPU *cpu)
Jan Kiszkad362e752012-02-17 18:31:17 +01002142{
Andreas Färberf7575c962012-12-01 06:18:14 +01002143 CPUState *cs = CPU(cpu);
2144 struct kvm_run *run = cs->kvm_run;
Jan Kiszkad362e752012-02-17 18:31:17 +01002145
Chen Fan02e51482013-12-23 17:04:02 +08002146 apic_handle_tpr_access_report(cpu->apic_state, run->tpr_access.rip,
Jan Kiszkad362e752012-02-17 18:31:17 +01002147 run->tpr_access.is_write ? TPR_ACCESS_WRITE
2148 : TPR_ACCESS_READ);
2149 return 1;
2150}
2151
Andreas Färberf17ec442013-06-29 19:40:58 +02002152int kvm_arch_insert_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp)
aliguorie22a25c2009-03-12 20:12:48 +00002153{
Juan Quintela38972932009-09-23 01:19:02 +02002154 static const uint8_t int3 = 0xcc;
aliguori64bf3f42009-03-28 17:51:40 +00002155
Andreas Färberf17ec442013-06-29 19:40:58 +02002156 if (cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, 1, 0) ||
2157 cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&int3, 1, 1)) {
aliguorie22a25c2009-03-12 20:12:48 +00002158 return -EINVAL;
Jan Kiszkab9bec742010-12-27 16:19:29 +01002159 }
aliguorie22a25c2009-03-12 20:12:48 +00002160 return 0;
2161}
2162
Andreas Färberf17ec442013-06-29 19:40:58 +02002163int kvm_arch_remove_sw_breakpoint(CPUState *cs, struct kvm_sw_breakpoint *bp)
aliguorie22a25c2009-03-12 20:12:48 +00002164{
2165 uint8_t int3;
2166
Andreas Färberf17ec442013-06-29 19:40:58 +02002167 if (cpu_memory_rw_debug(cs, bp->pc, &int3, 1, 0) || int3 != 0xcc ||
2168 cpu_memory_rw_debug(cs, bp->pc, (uint8_t *)&bp->saved_insn, 1, 1)) {
aliguorie22a25c2009-03-12 20:12:48 +00002169 return -EINVAL;
Jan Kiszkab9bec742010-12-27 16:19:29 +01002170 }
aliguorie22a25c2009-03-12 20:12:48 +00002171 return 0;
2172}
2173
2174static struct {
2175 target_ulong addr;
2176 int len;
2177 int type;
2178} hw_breakpoint[4];
2179
2180static int nb_hw_breakpoint;
2181
2182static int find_hw_breakpoint(target_ulong addr, int len, int type)
2183{
2184 int n;
2185
Jan Kiszkab9bec742010-12-27 16:19:29 +01002186 for (n = 0; n < nb_hw_breakpoint; n++) {
aliguorie22a25c2009-03-12 20:12:48 +00002187 if (hw_breakpoint[n].addr == addr && hw_breakpoint[n].type == type &&
Jan Kiszkab9bec742010-12-27 16:19:29 +01002188 (hw_breakpoint[n].len == len || len == -1)) {
aliguorie22a25c2009-03-12 20:12:48 +00002189 return n;
Jan Kiszkab9bec742010-12-27 16:19:29 +01002190 }
2191 }
aliguorie22a25c2009-03-12 20:12:48 +00002192 return -1;
2193}
2194
2195int kvm_arch_insert_hw_breakpoint(target_ulong addr,
2196 target_ulong len, int type)
2197{
2198 switch (type) {
2199 case GDB_BREAKPOINT_HW:
2200 len = 1;
2201 break;
2202 case GDB_WATCHPOINT_WRITE:
2203 case GDB_WATCHPOINT_ACCESS:
2204 switch (len) {
2205 case 1:
2206 break;
2207 case 2:
2208 case 4:
2209 case 8:
Jan Kiszkab9bec742010-12-27 16:19:29 +01002210 if (addr & (len - 1)) {
aliguorie22a25c2009-03-12 20:12:48 +00002211 return -EINVAL;
Jan Kiszkab9bec742010-12-27 16:19:29 +01002212 }
aliguorie22a25c2009-03-12 20:12:48 +00002213 break;
2214 default:
2215 return -EINVAL;
2216 }
2217 break;
2218 default:
2219 return -ENOSYS;
2220 }
2221
Jan Kiszkab9bec742010-12-27 16:19:29 +01002222 if (nb_hw_breakpoint == 4) {
aliguorie22a25c2009-03-12 20:12:48 +00002223 return -ENOBUFS;
Jan Kiszkab9bec742010-12-27 16:19:29 +01002224 }
2225 if (find_hw_breakpoint(addr, len, type) >= 0) {
aliguorie22a25c2009-03-12 20:12:48 +00002226 return -EEXIST;
Jan Kiszkab9bec742010-12-27 16:19:29 +01002227 }
aliguorie22a25c2009-03-12 20:12:48 +00002228 hw_breakpoint[nb_hw_breakpoint].addr = addr;
2229 hw_breakpoint[nb_hw_breakpoint].len = len;
2230 hw_breakpoint[nb_hw_breakpoint].type = type;
2231 nb_hw_breakpoint++;
2232
2233 return 0;
2234}
2235
2236int kvm_arch_remove_hw_breakpoint(target_ulong addr,
2237 target_ulong len, int type)
2238{
2239 int n;
2240
2241 n = find_hw_breakpoint(addr, (type == GDB_BREAKPOINT_HW) ? 1 : len, type);
Jan Kiszkab9bec742010-12-27 16:19:29 +01002242 if (n < 0) {
aliguorie22a25c2009-03-12 20:12:48 +00002243 return -ENOENT;
Jan Kiszkab9bec742010-12-27 16:19:29 +01002244 }
aliguorie22a25c2009-03-12 20:12:48 +00002245 nb_hw_breakpoint--;
2246 hw_breakpoint[n] = hw_breakpoint[nb_hw_breakpoint];
2247
2248 return 0;
2249}
2250
2251void kvm_arch_remove_all_hw_breakpoints(void)
2252{
2253 nb_hw_breakpoint = 0;
2254}
2255
2256static CPUWatchpoint hw_watchpoint;
2257
Andreas Färbera60f24b2012-12-01 05:35:08 +01002258static int kvm_handle_debug(X86CPU *cpu,
Blue Swirl48405522012-09-08 12:43:16 +00002259 struct kvm_debug_exit_arch *arch_info)
aliguorie22a25c2009-03-12 20:12:48 +00002260{
Andreas Färbered2803d2013-06-21 20:20:45 +02002261 CPUState *cs = CPU(cpu);
Andreas Färbera60f24b2012-12-01 05:35:08 +01002262 CPUX86State *env = &cpu->env;
Jan Kiszkaf2574732011-03-15 12:26:30 +01002263 int ret = 0;
aliguorie22a25c2009-03-12 20:12:48 +00002264 int n;
2265
2266 if (arch_info->exception == 1) {
2267 if (arch_info->dr6 & (1 << 14)) {
Andreas Färbered2803d2013-06-21 20:20:45 +02002268 if (cs->singlestep_enabled) {
Jan Kiszkaf2574732011-03-15 12:26:30 +01002269 ret = EXCP_DEBUG;
Jan Kiszkab9bec742010-12-27 16:19:29 +01002270 }
aliguorie22a25c2009-03-12 20:12:48 +00002271 } else {
Jan Kiszkab9bec742010-12-27 16:19:29 +01002272 for (n = 0; n < 4; n++) {
2273 if (arch_info->dr6 & (1 << n)) {
aliguorie22a25c2009-03-12 20:12:48 +00002274 switch ((arch_info->dr7 >> (16 + n*4)) & 0x3) {
2275 case 0x0:
Jan Kiszkaf2574732011-03-15 12:26:30 +01002276 ret = EXCP_DEBUG;
aliguorie22a25c2009-03-12 20:12:48 +00002277 break;
2278 case 0x1:
Jan Kiszkaf2574732011-03-15 12:26:30 +01002279 ret = EXCP_DEBUG;
Andreas Färberff4700b2013-08-26 18:23:18 +02002280 cs->watchpoint_hit = &hw_watchpoint;
aliguorie22a25c2009-03-12 20:12:48 +00002281 hw_watchpoint.vaddr = hw_breakpoint[n].addr;
2282 hw_watchpoint.flags = BP_MEM_WRITE;
2283 break;
2284 case 0x3:
Jan Kiszkaf2574732011-03-15 12:26:30 +01002285 ret = EXCP_DEBUG;
Andreas Färberff4700b2013-08-26 18:23:18 +02002286 cs->watchpoint_hit = &hw_watchpoint;
aliguorie22a25c2009-03-12 20:12:48 +00002287 hw_watchpoint.vaddr = hw_breakpoint[n].addr;
2288 hw_watchpoint.flags = BP_MEM_ACCESS;
2289 break;
2290 }
Jan Kiszkab9bec742010-12-27 16:19:29 +01002291 }
2292 }
aliguorie22a25c2009-03-12 20:12:48 +00002293 }
Andreas Färberff4700b2013-08-26 18:23:18 +02002294 } else if (kvm_find_sw_breakpoint(cs, arch_info->pc)) {
Jan Kiszkaf2574732011-03-15 12:26:30 +01002295 ret = EXCP_DEBUG;
Jan Kiszkab9bec742010-12-27 16:19:29 +01002296 }
Jan Kiszkaf2574732011-03-15 12:26:30 +01002297 if (ret == 0) {
Andreas Färberff4700b2013-08-26 18:23:18 +02002298 cpu_synchronize_state(cs);
Blue Swirl48405522012-09-08 12:43:16 +00002299 assert(env->exception_injected == -1);
Jan Kiszkab0b1d692010-03-01 19:10:29 +01002300
Jan Kiszkaf2574732011-03-15 12:26:30 +01002301 /* pass to guest */
Blue Swirl48405522012-09-08 12:43:16 +00002302 env->exception_injected = arch_info->exception;
2303 env->has_error_code = 0;
Jan Kiszkab0b1d692010-03-01 19:10:29 +01002304 }
aliguorie22a25c2009-03-12 20:12:48 +00002305
Jan Kiszkaf2574732011-03-15 12:26:30 +01002306 return ret;
aliguorie22a25c2009-03-12 20:12:48 +00002307}
2308
Andreas Färber20d695a2012-10-31 06:57:49 +01002309void kvm_arch_update_guest_debug(CPUState *cpu, struct kvm_guest_debug *dbg)
aliguorie22a25c2009-03-12 20:12:48 +00002310{
2311 const uint8_t type_code[] = {
2312 [GDB_BREAKPOINT_HW] = 0x0,
2313 [GDB_WATCHPOINT_WRITE] = 0x1,
2314 [GDB_WATCHPOINT_ACCESS] = 0x3
2315 };
2316 const uint8_t len_code[] = {
2317 [1] = 0x0, [2] = 0x1, [4] = 0x3, [8] = 0x2
2318 };
2319 int n;
2320
Andreas Färbera60f24b2012-12-01 05:35:08 +01002321 if (kvm_sw_breakpoints_active(cpu)) {
aliguorie22a25c2009-03-12 20:12:48 +00002322 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_SW_BP;
Jan Kiszkab9bec742010-12-27 16:19:29 +01002323 }
aliguorie22a25c2009-03-12 20:12:48 +00002324 if (nb_hw_breakpoint > 0) {
2325 dbg->control |= KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP;
2326 dbg->arch.debugreg[7] = 0x0600;
2327 for (n = 0; n < nb_hw_breakpoint; n++) {
2328 dbg->arch.debugreg[n] = hw_breakpoint[n].addr;
2329 dbg->arch.debugreg[7] |= (2 << (n * 2)) |
2330 (type_code[hw_breakpoint[n].type] << (16 + n*4)) |
Jan Kiszka95c077c2010-12-27 15:58:23 +01002331 ((uint32_t)len_code[hw_breakpoint[n].len] << (18 + n*4));
aliguorie22a25c2009-03-12 20:12:48 +00002332 }
2333 }
2334}
Gleb Natapov4513d922010-05-10 11:21:34 +03002335
Jan Kiszka2a4dac82011-03-15 12:26:29 +01002336static bool host_supports_vmx(void)
2337{
2338 uint32_t ecx, unused;
2339
2340 host_cpuid(1, 0, &unused, &unused, &ecx, &unused);
2341 return ecx & CPUID_EXT_VMX;
2342}
2343
2344#define VMX_INVALID_GUEST_STATE 0x80000021
2345
Andreas Färber20d695a2012-10-31 06:57:49 +01002346int kvm_arch_handle_exit(CPUState *cs, struct kvm_run *run)
Jan Kiszka2a4dac82011-03-15 12:26:29 +01002347{
Andreas Färber20d695a2012-10-31 06:57:49 +01002348 X86CPU *cpu = X86_CPU(cs);
Jan Kiszka2a4dac82011-03-15 12:26:29 +01002349 uint64_t code;
2350 int ret;
2351
2352 switch (run->exit_reason) {
2353 case KVM_EXIT_HLT:
2354 DPRINTF("handle_hlt\n");
Andreas Färber839b5632012-05-03 17:00:31 +02002355 ret = kvm_handle_halt(cpu);
Jan Kiszka2a4dac82011-03-15 12:26:29 +01002356 break;
2357 case KVM_EXIT_SET_TPR:
2358 ret = 0;
2359 break;
Jan Kiszkad362e752012-02-17 18:31:17 +01002360 case KVM_EXIT_TPR_ACCESS:
Andreas Färberf7575c962012-12-01 06:18:14 +01002361 ret = kvm_handle_tpr_access(cpu);
Jan Kiszkad362e752012-02-17 18:31:17 +01002362 break;
Jan Kiszka2a4dac82011-03-15 12:26:29 +01002363 case KVM_EXIT_FAIL_ENTRY:
2364 code = run->fail_entry.hardware_entry_failure_reason;
2365 fprintf(stderr, "KVM: entry failed, hardware error 0x%" PRIx64 "\n",
2366 code);
2367 if (host_supports_vmx() && code == VMX_INVALID_GUEST_STATE) {
2368 fprintf(stderr,
Vagrant Cascadian12619722011-11-14 14:06:23 -08002369 "\nIf you're running a guest on an Intel machine without "
Jan Kiszka2a4dac82011-03-15 12:26:29 +01002370 "unrestricted mode\n"
2371 "support, the failure can be most likely due to the guest "
2372 "entering an invalid\n"
2373 "state for Intel VT. For example, the guest maybe running "
2374 "in big real mode\n"
2375 "which is not supported on less recent Intel processors."
2376 "\n\n");
2377 }
2378 ret = -1;
2379 break;
2380 case KVM_EXIT_EXCEPTION:
2381 fprintf(stderr, "KVM: exception %d exit (error code 0x%x)\n",
2382 run->ex.exception, run->ex.error_code);
2383 ret = -1;
2384 break;
Jan Kiszkaf2574732011-03-15 12:26:30 +01002385 case KVM_EXIT_DEBUG:
2386 DPRINTF("kvm_exit_debug\n");
Andreas Färbera60f24b2012-12-01 05:35:08 +01002387 ret = kvm_handle_debug(cpu, &run->debug.arch);
Jan Kiszkaf2574732011-03-15 12:26:30 +01002388 break;
Jan Kiszka2a4dac82011-03-15 12:26:29 +01002389 default:
2390 fprintf(stderr, "KVM: unknown exit reason %d\n", run->exit_reason);
2391 ret = -1;
2392 break;
2393 }
2394
2395 return ret;
2396}
2397
Andreas Färber20d695a2012-10-31 06:57:49 +01002398bool kvm_arch_stop_on_emulation_error(CPUState *cs)
Gleb Natapov4513d922010-05-10 11:21:34 +03002399{
Andreas Färber20d695a2012-10-31 06:57:49 +01002400 X86CPU *cpu = X86_CPU(cs);
2401 CPUX86State *env = &cpu->env;
2402
Andreas Färberdd1750d2013-05-01 13:45:44 +02002403 kvm_cpu_synchronize_state(cs);
Jan Kiszkab9bec742010-12-27 16:19:29 +01002404 return !(env->cr[0] & CR0_PE_MASK) ||
2405 ((env->segs[R_CS].selector & 3) != 3);
Gleb Natapov4513d922010-05-10 11:21:34 +03002406}
Jan Kiszka84b058d2011-10-15 11:49:47 +02002407
2408void kvm_arch_init_irq_routing(KVMState *s)
2409{
2410 if (!kvm_check_extension(s, KVM_CAP_IRQ_ROUTING)) {
2411 /* If kernel can't do irq routing, interrupt source
2412 * override 0->2 cannot be set up as required by HPET.
2413 * So we have to disable it.
2414 */
2415 no_hpet = 1;
2416 }
Peter Maydellcc7e0dd2012-07-26 15:35:14 +01002417 /* We know at this point that we're using the in-kernel
Peter Maydell614e41b2012-07-26 15:35:15 +01002418 * irqchip, so we can use irqfds, and on x86 we know
Peter Maydellf3e1bed2012-07-26 15:35:16 +01002419 * we can use msi via irqfd and GSI routing.
Peter Maydellcc7e0dd2012-07-26 15:35:14 +01002420 */
2421 kvm_irqfds_allowed = true;
Peter Maydell614e41b2012-07-26 15:35:15 +01002422 kvm_msi_via_irqfd_allowed = true;
Peter Maydellf3e1bed2012-07-26 15:35:16 +01002423 kvm_gsi_routing_allowed = true;
Jan Kiszka84b058d2011-10-15 11:49:47 +02002424}
Jan Kiszkab139bd32012-08-27 08:28:40 +02002425
2426/* Classic KVM device assignment interface. Will remain x86 only. */
2427int kvm_device_pci_assign(KVMState *s, PCIHostDeviceAddress *dev_addr,
2428 uint32_t flags, uint32_t *dev_id)
2429{
2430 struct kvm_assigned_pci_dev dev_data = {
2431 .segnr = dev_addr->domain,
2432 .busnr = dev_addr->bus,
2433 .devfn = PCI_DEVFN(dev_addr->slot, dev_addr->function),
2434 .flags = flags,
2435 };
2436 int ret;
2437
2438 dev_data.assigned_dev_id =
2439 (dev_addr->domain << 16) | (dev_addr->bus << 8) | dev_data.devfn;
2440
2441 ret = kvm_vm_ioctl(s, KVM_ASSIGN_PCI_DEVICE, &dev_data);
2442 if (ret < 0) {
2443 return ret;
2444 }
2445
2446 *dev_id = dev_data.assigned_dev_id;
2447
2448 return 0;
2449}
2450
2451int kvm_device_pci_deassign(KVMState *s, uint32_t dev_id)
2452{
2453 struct kvm_assigned_pci_dev dev_data = {
2454 .assigned_dev_id = dev_id,
2455 };
2456
2457 return kvm_vm_ioctl(s, KVM_DEASSIGN_PCI_DEVICE, &dev_data);
2458}
2459
2460static int kvm_assign_irq_internal(KVMState *s, uint32_t dev_id,
2461 uint32_t irq_type, uint32_t guest_irq)
2462{
2463 struct kvm_assigned_irq assigned_irq = {
2464 .assigned_dev_id = dev_id,
2465 .guest_irq = guest_irq,
2466 .flags = irq_type,
2467 };
2468
2469 if (kvm_check_extension(s, KVM_CAP_ASSIGN_DEV_IRQ)) {
2470 return kvm_vm_ioctl(s, KVM_ASSIGN_DEV_IRQ, &assigned_irq);
2471 } else {
2472 return kvm_vm_ioctl(s, KVM_ASSIGN_IRQ, &assigned_irq);
2473 }
2474}
2475
2476int kvm_device_intx_assign(KVMState *s, uint32_t dev_id, bool use_host_msi,
2477 uint32_t guest_irq)
2478{
2479 uint32_t irq_type = KVM_DEV_IRQ_GUEST_INTX |
2480 (use_host_msi ? KVM_DEV_IRQ_HOST_MSI : KVM_DEV_IRQ_HOST_INTX);
2481
2482 return kvm_assign_irq_internal(s, dev_id, irq_type, guest_irq);
2483}
2484
2485int kvm_device_intx_set_mask(KVMState *s, uint32_t dev_id, bool masked)
2486{
2487 struct kvm_assigned_pci_dev dev_data = {
2488 .assigned_dev_id = dev_id,
2489 .flags = masked ? KVM_DEV_ASSIGN_MASK_INTX : 0,
2490 };
2491
2492 return kvm_vm_ioctl(s, KVM_ASSIGN_SET_INTX_MASK, &dev_data);
2493}
2494
2495static int kvm_deassign_irq_internal(KVMState *s, uint32_t dev_id,
2496 uint32_t type)
2497{
2498 struct kvm_assigned_irq assigned_irq = {
2499 .assigned_dev_id = dev_id,
2500 .flags = type,
2501 };
2502
2503 return kvm_vm_ioctl(s, KVM_DEASSIGN_DEV_IRQ, &assigned_irq);
2504}
2505
2506int kvm_device_intx_deassign(KVMState *s, uint32_t dev_id, bool use_host_msi)
2507{
2508 return kvm_deassign_irq_internal(s, dev_id, KVM_DEV_IRQ_GUEST_INTX |
2509 (use_host_msi ? KVM_DEV_IRQ_HOST_MSI : KVM_DEV_IRQ_HOST_INTX));
2510}
2511
2512int kvm_device_msi_assign(KVMState *s, uint32_t dev_id, int virq)
2513{
2514 return kvm_assign_irq_internal(s, dev_id, KVM_DEV_IRQ_HOST_MSI |
2515 KVM_DEV_IRQ_GUEST_MSI, virq);
2516}
2517
2518int kvm_device_msi_deassign(KVMState *s, uint32_t dev_id)
2519{
2520 return kvm_deassign_irq_internal(s, dev_id, KVM_DEV_IRQ_GUEST_MSI |
2521 KVM_DEV_IRQ_HOST_MSI);
2522}
2523
2524bool kvm_device_msix_supported(KVMState *s)
2525{
2526 /* The kernel lacks a corresponding KVM_CAP, so we probe by calling
2527 * KVM_ASSIGN_SET_MSIX_NR with an invalid parameter. */
2528 return kvm_vm_ioctl(s, KVM_ASSIGN_SET_MSIX_NR, NULL) == -EFAULT;
2529}
2530
2531int kvm_device_msix_init_vectors(KVMState *s, uint32_t dev_id,
2532 uint32_t nr_vectors)
2533{
2534 struct kvm_assigned_msix_nr msix_nr = {
2535 .assigned_dev_id = dev_id,
2536 .entry_nr = nr_vectors,
2537 };
2538
2539 return kvm_vm_ioctl(s, KVM_ASSIGN_SET_MSIX_NR, &msix_nr);
2540}
2541
2542int kvm_device_msix_set_vector(KVMState *s, uint32_t dev_id, uint32_t vector,
2543 int virq)
2544{
2545 struct kvm_assigned_msix_entry msix_entry = {
2546 .assigned_dev_id = dev_id,
2547 .gsi = virq,
2548 .entry = vector,
2549 };
2550
2551 return kvm_vm_ioctl(s, KVM_ASSIGN_SET_MSIX_ENTRY, &msix_entry);
2552}
2553
2554int kvm_device_msix_assign(KVMState *s, uint32_t dev_id)
2555{
2556 return kvm_assign_irq_internal(s, dev_id, KVM_DEV_IRQ_HOST_MSIX |
2557 KVM_DEV_IRQ_GUEST_MSIX, 0);
2558}
2559
2560int kvm_device_msix_deassign(KVMState *s, uint32_t dev_id)
2561{
2562 return kvm_deassign_irq_internal(s, dev_id, KVM_DEV_IRQ_GUEST_MSIX |
2563 KVM_DEV_IRQ_HOST_MSIX);
2564}