| Blue Swirl | aa28b9b | 2010-03-21 19:46:26 +0000 | [diff] [blame] | 1 | #ifndef APIC_H |
| 2 | #define APIC_H |
| 3 | |
| Blue Swirl | cf6d64b | 2010-06-19 10:42:08 +0300 | [diff] [blame] | 4 | /* apic.c */ |
| 5 | typedef struct APICState APICState; |
| Blue Swirl | aa28b9b | 2010-03-21 19:46:26 +0000 | [diff] [blame] | 6 | void apic_deliver_irq(uint8_t dest, uint8_t dest_mode, |
| 7 | uint8_t delivery_mode, |
| 8 | uint8_t vector_num, uint8_t polarity, |
| 9 | uint8_t trigger_mode); |
| Blue Swirl | 0e26b7b | 2010-06-19 10:42:34 +0300 | [diff] [blame^] | 10 | APICState *apic_init(CPUState *env, uint32_t apic_id); |
| Blue Swirl | cf6d64b | 2010-06-19 10:42:08 +0300 | [diff] [blame] | 11 | int apic_accept_pic_intr(APICState *s); |
| 12 | void apic_deliver_pic_intr(APICState *s, int level); |
| 13 | int apic_get_interrupt(APICState *s); |
| Blue Swirl | aa28b9b | 2010-03-21 19:46:26 +0000 | [diff] [blame] | 14 | void apic_reset_irq_delivered(void); |
| 15 | int apic_get_irq_delivered(void); |
| Blue Swirl | 0e26b7b | 2010-06-19 10:42:34 +0300 | [diff] [blame^] | 16 | void cpu_set_apic_base(APICState *s, uint64_t val); |
| 17 | uint64_t cpu_get_apic_base(APICState *s); |
| 18 | void cpu_set_apic_tpr(APICState *s, uint8_t val); |
| 19 | uint8_t cpu_get_apic_tpr(APICState *s); |
| 20 | void apic_init_reset(APICState *s); |
| 21 | void apic_sipi(APICState *s); |
| Blue Swirl | aa28b9b | 2010-03-21 19:46:26 +0000 | [diff] [blame] | 22 | |
| Blue Swirl | 0e26b7b | 2010-06-19 10:42:34 +0300 | [diff] [blame^] | 23 | /* pc.c */ |
| Blue Swirl | aa28b9b | 2010-03-21 19:46:26 +0000 | [diff] [blame] | 24 | int cpu_is_bsp(CPUState *env); |
| Blue Swirl | 0e26b7b | 2010-06-19 10:42:34 +0300 | [diff] [blame^] | 25 | APICState *cpu_get_current_apic(void); |
| Blue Swirl | aa28b9b | 2010-03-21 19:46:26 +0000 | [diff] [blame] | 26 | |
| 27 | #endif |
