Pavel Fedin | 386ce3c | 2016-10-04 13:28:08 +0100 | [diff] [blame] | 1 | /* |
| 2 | * ITS support for ARM GICv3 |
| 3 | * |
| 4 | * Copyright (c) 2015 Samsung Electronics Co., Ltd. |
| 5 | * Written by Pavel Fedin |
| 6 | * |
| 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation, either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License along |
| 18 | * with this program; if not, see <http://www.gnu.org/licenses/>. |
| 19 | */ |
| 20 | |
| 21 | #ifndef QEMU_ARM_GICV3_ITS_COMMON_H |
| 22 | #define QEMU_ARM_GICV3_ITS_COMMON_H |
| 23 | |
| 24 | #include "hw/sysbus.h" |
| 25 | #include "hw/intc/arm_gicv3_common.h" |
| 26 | |
| 27 | #define ITS_CONTROL_SIZE 0x10000 |
| 28 | #define ITS_TRANS_SIZE 0x10000 |
| 29 | #define ITS_SIZE (ITS_CONTROL_SIZE + ITS_TRANS_SIZE) |
| 30 | |
Eric Auger | cddafd8 | 2017-06-13 14:57:00 +0100 | [diff] [blame] | 31 | #define GITS_CTLR 0x0 |
| 32 | #define GITS_IIDR 0x4 |
| 33 | #define GITS_CBASER 0x80 |
| 34 | #define GITS_CWRITER 0x88 |
| 35 | #define GITS_CREADR 0x90 |
| 36 | #define GITS_BASER 0x100 |
| 37 | |
Pavel Fedin | 386ce3c | 2016-10-04 13:28:08 +0100 | [diff] [blame] | 38 | struct GICv3ITSState { |
| 39 | SysBusDevice parent_obj; |
| 40 | |
| 41 | MemoryRegion iomem_main; |
| 42 | MemoryRegion iomem_its_cntrl; |
| 43 | MemoryRegion iomem_its_translation; |
| 44 | |
| 45 | GICv3State *gicv3; |
| 46 | |
| 47 | int dev_fd; /* kvm device fd if backed by kvm vgic support */ |
| 48 | uint64_t gits_translater_gpa; |
| 49 | bool translater_gpa_known; |
| 50 | |
| 51 | /* Registers */ |
| 52 | uint32_t ctlr; |
Eric Auger | cddafd8 | 2017-06-13 14:57:00 +0100 | [diff] [blame] | 53 | uint32_t iidr; |
Pavel Fedin | 386ce3c | 2016-10-04 13:28:08 +0100 | [diff] [blame] | 54 | uint64_t cbaser; |
| 55 | uint64_t cwriter; |
| 56 | uint64_t creadr; |
| 57 | uint64_t baser[8]; |
| 58 | |
| 59 | Error *migration_blocker; |
| 60 | }; |
| 61 | |
| 62 | typedef struct GICv3ITSState GICv3ITSState; |
| 63 | |
| 64 | void gicv3_its_init_mmio(GICv3ITSState *s, const MemoryRegionOps *ops); |
| 65 | |
| 66 | #define TYPE_ARM_GICV3_ITS_COMMON "arm-gicv3-its-common" |
| 67 | #define ARM_GICV3_ITS_COMMON(obj) \ |
| 68 | OBJECT_CHECK(GICv3ITSState, (obj), TYPE_ARM_GICV3_ITS_COMMON) |
| 69 | #define ARM_GICV3_ITS_COMMON_CLASS(klass) \ |
| 70 | OBJECT_CLASS_CHECK(GICv3ITSCommonClass, (klass), TYPE_ARM_GICV3_ITS_COMMON) |
| 71 | #define ARM_GICV3_ITS_COMMON_GET_CLASS(obj) \ |
| 72 | OBJECT_GET_CLASS(GICv3ITSCommonClass, (obj), TYPE_ARM_GICV3_ITS_COMMON) |
| 73 | |
| 74 | struct GICv3ITSCommonClass { |
| 75 | /*< private >*/ |
| 76 | SysBusDeviceClass parent_class; |
| 77 | /*< public >*/ |
| 78 | |
| 79 | int (*send_msi)(GICv3ITSState *s, uint32_t data, uint16_t devid); |
| 80 | void (*pre_save)(GICv3ITSState *s); |
| 81 | void (*post_load)(GICv3ITSState *s); |
| 82 | }; |
| 83 | |
| 84 | typedef struct GICv3ITSCommonClass GICv3ITSCommonClass; |
| 85 | |
| 86 | #endif |