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bellard2c0262a2003-09-30 20:34:21 +00001/*
ths5fafdf22007-09-16 21:08:06 +00002 * i386 execution defines
bellard2c0262a2003-09-30 20:34:21 +00003 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
Blue Swirl8167ee82009-07-16 20:47:01 +000017 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
bellard2c0262a2003-09-30 20:34:21 +000018 */
bellard7d3505c2004-05-12 19:32:15 +000019#include "config.h"
bellard2c0262a2003-09-30 20:34:21 +000020#include "dyngen-exec.h"
21
bellard14ce26e2005-01-03 23:50:08 +000022/* XXX: factorize this mess */
bellard14ce26e2005-01-03 23:50:08 +000023#ifdef TARGET_X86_64
24#define TARGET_LONG_BITS 64
25#else
26#define TARGET_LONG_BITS 32
27#endif
28
bellardd785e6b2005-03-01 22:33:42 +000029#include "cpu-defs.h"
30
bellard2c0262a2003-09-30 20:34:21 +000031register struct CPUX86State *env asm(AREG0);
bellard14ce26e2005-01-03 23:50:08 +000032
blueswir17d99a002009-01-14 19:00:36 +000033#include "qemu-common.h"
blueswir179383c92008-08-30 09:51:20 +000034#include "qemu-log.h"
bellard2c0262a2003-09-30 20:34:21 +000035
bellard2c0262a2003-09-30 20:34:21 +000036#include "cpu.h"
bellard2c0262a2003-09-30 20:34:21 +000037
blueswir1d9957a82008-12-13 11:49:17 +000038/* op_helper.c */
malca5e50b22009-02-01 22:19:27 +000039void QEMU_NORETURN raise_exception_err(int exception_index, int error_code);
40void QEMU_NORETURN raise_exception(int exception_index);
Jason Wessel63a54732010-01-26 16:29:50 -060041void QEMU_NORETURN raise_exception_env(int exception_index, CPUState *nenv);
bellard2c0262a2003-09-30 20:34:21 +000042
bellardb6abf972008-05-17 12:44:31 +000043/* n must be a constant to be efficient */
44static inline target_long lshift(target_long x, int n)
45{
46 if (n >= 0)
47 return x << n;
48 else
49 return x >> (-n);
50}
51
bellard57fec1f2008-02-01 10:50:11 +000052#include "helper.h"
53
bellard9951bf32003-10-28 23:06:17 +000054#if !defined(CONFIG_USER_ONLY)
55
bellarda9049a02005-10-30 18:16:26 +000056#include "softmmu_exec.h"
bellard9951bf32003-10-28 23:06:17 +000057
bellard9951bf32003-10-28 23:06:17 +000058#endif /* !defined(CONFIG_USER_ONLY) */
59
bellard2c0262a2003-09-30 20:34:21 +000060#define RC_MASK 0xc00
61#define RC_NEAR 0x000
62#define RC_DOWN 0x400
63#define RC_UP 0x800
64#define RC_CHOP 0xc00
65
66#define MAXTAN 9223372036854775808.0
67
bellard2c0262a2003-09-30 20:34:21 +000068/* the following deal with x86 long double-precision numbers */
69#define MAXEXPD 0x7fff
70#define EXPBIAS 16383
71#define EXPD(fp) (fp.l.upper & 0x7fff)
72#define SIGND(fp) ((fp.l.upper) & 0x8000)
73#define MANTD(fp) (fp.l.lower)
74#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
75
bellard2c0262a2003-09-30 20:34:21 +000076static inline void fpush(void)
77{
78 env->fpstt = (env->fpstt - 1) & 7;
79 env->fptags[env->fpstt] = 0; /* validate stack entry */
80}
81
82static inline void fpop(void)
83{
84 env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
85 env->fpstt = (env->fpstt + 1) & 7;
86}
87
Aurelien Jarnoc31da132011-05-15 14:09:18 +020088static inline floatx80 helper_fldt(target_ulong ptr)
bellard2c0262a2003-09-30 20:34:21 +000089{
Aurelien Jarnoc31da132011-05-15 14:09:18 +020090 CPU_LDoubleU temp;
bellard9951bf32003-10-28 23:06:17 +000091
92 temp.l.lower = ldq(ptr);
93 temp.l.upper = lduw(ptr + 8);
94 return temp.d;
95}
96
Aurelien Jarnoc31da132011-05-15 14:09:18 +020097static inline void helper_fstt(floatx80 f, target_ulong ptr)
bellard9951bf32003-10-28 23:06:17 +000098{
Aurelien Jarnoc31da132011-05-15 14:09:18 +020099 CPU_LDoubleU temp;
ths3b46e622007-09-17 08:09:54 +0000100
bellard9951bf32003-10-28 23:06:17 +0000101 temp.d = f;
102 stq(ptr, temp.l.lower);
103 stw(ptr + 8, temp.l.upper);
104}
105
bellard2ee73ac2004-05-08 21:08:41 +0000106#define FPUS_IE (1 << 0)
107#define FPUS_DE (1 << 1)
108#define FPUS_ZE (1 << 2)
109#define FPUS_OE (1 << 3)
110#define FPUS_UE (1 << 4)
111#define FPUS_PE (1 << 5)
112#define FPUS_SF (1 << 6)
113#define FPUS_SE (1 << 7)
114#define FPUS_B (1 << 15)
115
116#define FPUC_EM 0x3f
117
bellard2c0262a2003-09-30 20:34:21 +0000118static inline uint32_t compute_eflags(void)
119{
pbrooka7812ae2008-11-17 14:43:54 +0000120 return env->eflags | helper_cc_compute_all(CC_OP) | (DF & DF_MASK);
bellard2c0262a2003-09-30 20:34:21 +0000121}
122
bellard2c0262a2003-09-30 20:34:21 +0000123/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
124static inline void load_eflags(int eflags, int update_mask)
125{
126 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
127 DF = 1 - (2 * ((eflags >> 10) & 1));
ths5fafdf22007-09-16 21:08:06 +0000128 env->eflags = (env->eflags & ~update_mask) |
bellard093f8f02008-05-28 16:25:20 +0000129 (eflags & update_mask) | 0x2;
bellard2c0262a2003-09-30 20:34:21 +0000130}
131
bellard5efc27b2008-06-04 13:35:58 +0000132/* load efer and update the corresponding hflags. XXX: do consistency
133 checks with cpuid bits ? */
134static inline void cpu_load_efer(CPUState *env, uint64_t val)
135{
136 env->efer = val;
137 env->hflags &= ~(HF_LMA_MASK | HF_SVME_MASK);
138 if (env->efer & MSR_EFER_LMA)
139 env->hflags |= HF_LMA_MASK;
140 if (env->efer & MSR_EFER_SVME)
141 env->hflags |= HF_SVME_MASK;
142}