bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Software MMU support |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 3 | * |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 4 | * Copyright (c) 2003 Fabrice Bellard |
| 5 | * |
| 6 | * This library is free software; you can redistribute it and/or |
| 7 | * modify it under the terms of the GNU Lesser General Public |
| 8 | * License as published by the Free Software Foundation; either |
| 9 | * version 2 of the License, or (at your option) any later version. |
| 10 | * |
| 11 | * This library is distributed in the hope that it will be useful, |
| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
| 14 | * Lesser General Public License for more details. |
| 15 | * |
| 16 | * You should have received a copy of the GNU Lesser General Public |
| 17 | * License along with this library; if not, write to the Free Software |
aurel32 | fad6cb1 | 2009-01-04 22:05:52 +0000 | [diff] [blame] | 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 19 | */ |
| 20 | #define DATA_SIZE (1 << SHIFT) |
| 21 | |
| 22 | #if DATA_SIZE == 8 |
| 23 | #define SUFFIX q |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 24 | #define USUFFIX q |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 25 | #define DATA_TYPE uint64_t |
| 26 | #elif DATA_SIZE == 4 |
| 27 | #define SUFFIX l |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 28 | #define USUFFIX l |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 29 | #define DATA_TYPE uint32_t |
| 30 | #elif DATA_SIZE == 2 |
| 31 | #define SUFFIX w |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 32 | #define USUFFIX uw |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 33 | #define DATA_TYPE uint16_t |
| 34 | #elif DATA_SIZE == 1 |
| 35 | #define SUFFIX b |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 36 | #define USUFFIX ub |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 37 | #define DATA_TYPE uint8_t |
| 38 | #else |
| 39 | #error unsupported data size |
| 40 | #endif |
| 41 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 42 | #ifdef SOFTMMU_CODE_ACCESS |
| 43 | #define READ_ACCESS_TYPE 2 |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 44 | #define ADDR_READ addr_code |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 45 | #else |
| 46 | #define READ_ACCESS_TYPE 0 |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 47 | #define ADDR_READ addr_read |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 48 | #endif |
| 49 | |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 50 | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 51 | int mmu_idx, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 52 | void *retaddr); |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 53 | static inline DATA_TYPE glue(io_read, SUFFIX)(target_phys_addr_t physaddr, |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 54 | target_ulong addr, |
| 55 | void *retaddr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 56 | { |
| 57 | DATA_TYPE res; |
| 58 | int index; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 59 | index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); |
| 60 | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 61 | env->mem_io_pc = (unsigned long)retaddr; |
| 62 | if (index > (IO_MEM_NOTDIRTY >> IO_MEM_SHIFT) |
| 63 | && !can_do_io(env)) { |
| 64 | cpu_io_recompile(env, retaddr); |
| 65 | } |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 66 | |
aliguori | db8886d | 2008-11-18 20:09:43 +0000 | [diff] [blame] | 67 | env->mem_io_vaddr = addr; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 68 | #if SHIFT <= 2 |
bellard | a4193c8 | 2004-06-03 14:01:43 +0000 | [diff] [blame] | 69 | res = io_mem_read[index][SHIFT](io_mem_opaque[index], physaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 70 | #else |
| 71 | #ifdef TARGET_WORDS_BIGENDIAN |
bellard | a4193c8 | 2004-06-03 14:01:43 +0000 | [diff] [blame] | 72 | res = (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr) << 32; |
| 73 | res |= io_mem_read[index][2](io_mem_opaque[index], physaddr + 4); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 74 | #else |
bellard | a4193c8 | 2004-06-03 14:01:43 +0000 | [diff] [blame] | 75 | res = io_mem_read[index][2](io_mem_opaque[index], physaddr); |
| 76 | res |= (uint64_t)io_mem_read[index][2](io_mem_opaque[index], physaddr + 4) << 32; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 77 | #endif |
| 78 | #endif /* SHIFT > 2 */ |
bellard | f1c8567 | 2006-02-08 22:41:53 +0000 | [diff] [blame] | 79 | #ifdef USE_KQEMU |
| 80 | env->last_io_time = cpu_get_time_fast(); |
| 81 | #endif |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 82 | return res; |
| 83 | } |
| 84 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 85 | /* handle all cases except unaligned access which span two pages */ |
bellard | d656469 | 2008-01-31 09:22:27 +0000 | [diff] [blame] | 86 | DATA_TYPE REGPARM glue(glue(__ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
| 87 | int mmu_idx) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 88 | { |
| 89 | DATA_TYPE res; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 90 | int index; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 91 | target_ulong tlb_addr; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 92 | target_phys_addr_t addend; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 93 | void *retaddr; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 94 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 95 | /* test if there is match for unaligned or IO access */ |
| 96 | /* XXX: could done more in memory macro in a non portable way */ |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 97 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 98 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 99 | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 100 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 101 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 102 | /* IO access */ |
| 103 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 104 | goto do_unaligned_access; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 105 | retaddr = GETPC(); |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 106 | addend = env->iotlb[mmu_idx][index]; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 107 | res = glue(io_read, SUFFIX)(addend, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 108 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 109 | /* slow unaligned access (it spans two pages or IO) */ |
| 110 | do_unaligned_access: |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 111 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 112 | #ifdef ALIGNED_ONLY |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 113 | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 114 | #endif |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 115 | res = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 116 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 117 | } else { |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 118 | /* unaligned/aligned access in the same page */ |
| 119 | #ifdef ALIGNED_ONLY |
| 120 | if ((addr & (DATA_SIZE - 1)) != 0) { |
| 121 | retaddr = GETPC(); |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 122 | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 123 | } |
| 124 | #endif |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 125 | addend = env->tlb_table[mmu_idx][index].addend; |
| 126 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend)); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 127 | } |
| 128 | } else { |
| 129 | /* the page is not in the TLB : fill it */ |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 130 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 131 | #ifdef ALIGNED_ONLY |
| 132 | if ((addr & (DATA_SIZE - 1)) != 0) |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 133 | do_unaligned_access(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 134 | #endif |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 135 | tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 136 | goto redo; |
| 137 | } |
| 138 | return res; |
| 139 | } |
| 140 | |
| 141 | /* handle all unaligned cases */ |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 142 | static DATA_TYPE glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(target_ulong addr, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 143 | int mmu_idx, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 144 | void *retaddr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 145 | { |
| 146 | DATA_TYPE res, res1, res2; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 147 | int index, shift; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 148 | target_phys_addr_t addend; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 149 | target_ulong tlb_addr, addr1, addr2; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 150 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 151 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 152 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 153 | tlb_addr = env->tlb_table[mmu_idx][index].ADDR_READ; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 154 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 155 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 156 | /* IO access */ |
| 157 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 158 | goto do_unaligned_access; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 159 | retaddr = GETPC(); |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 160 | addend = env->iotlb[mmu_idx][index]; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 161 | res = glue(io_read, SUFFIX)(addend, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 162 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 163 | do_unaligned_access: |
| 164 | /* slow unaligned access (it spans two pages) */ |
| 165 | addr1 = addr & ~(DATA_SIZE - 1); |
| 166 | addr2 = addr1 + DATA_SIZE; |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 167 | res1 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr1, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 168 | mmu_idx, retaddr); |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 169 | res2 = glue(glue(slow_ld, SUFFIX), MMUSUFFIX)(addr2, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 170 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 171 | shift = (addr & (DATA_SIZE - 1)) * 8; |
| 172 | #ifdef TARGET_WORDS_BIGENDIAN |
| 173 | res = (res1 << shift) | (res2 >> ((DATA_SIZE * 8) - shift)); |
| 174 | #else |
| 175 | res = (res1 >> shift) | (res2 << ((DATA_SIZE * 8) - shift)); |
| 176 | #endif |
bellard | 6986f88 | 2004-01-18 21:53:18 +0000 | [diff] [blame] | 177 | res = (DATA_TYPE)res; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 178 | } else { |
| 179 | /* unaligned/aligned access in the same page */ |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 180 | addend = env->tlb_table[mmu_idx][index].addend; |
| 181 | res = glue(glue(ld, USUFFIX), _raw)((uint8_t *)(long)(addr+addend)); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 182 | } |
| 183 | } else { |
| 184 | /* the page is not in the TLB : fill it */ |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 185 | tlb_fill(addr, READ_ACCESS_TYPE, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 186 | goto redo; |
| 187 | } |
| 188 | return res; |
| 189 | } |
| 190 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 191 | #ifndef SOFTMMU_CODE_ACCESS |
| 192 | |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 193 | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
| 194 | DATA_TYPE val, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 195 | int mmu_idx, |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 196 | void *retaddr); |
| 197 | |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 198 | static inline void glue(io_write, SUFFIX)(target_phys_addr_t physaddr, |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 199 | DATA_TYPE val, |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 200 | target_ulong addr, |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 201 | void *retaddr) |
| 202 | { |
| 203 | int index; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 204 | index = (physaddr >> IO_MEM_SHIFT) & (IO_MEM_NB_ENTRIES - 1); |
| 205 | physaddr = (physaddr & TARGET_PAGE_MASK) + addr; |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 206 | if (index > (IO_MEM_NOTDIRTY >> IO_MEM_SHIFT) |
| 207 | && !can_do_io(env)) { |
| 208 | cpu_io_recompile(env, retaddr); |
| 209 | } |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 210 | |
pbrook | 2e70f6e | 2008-06-29 01:03:05 +0000 | [diff] [blame] | 211 | env->mem_io_vaddr = addr; |
| 212 | env->mem_io_pc = (unsigned long)retaddr; |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 213 | #if SHIFT <= 2 |
| 214 | io_mem_write[index][SHIFT](io_mem_opaque[index], physaddr, val); |
| 215 | #else |
| 216 | #ifdef TARGET_WORDS_BIGENDIAN |
| 217 | io_mem_write[index][2](io_mem_opaque[index], physaddr, val >> 32); |
| 218 | io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val); |
| 219 | #else |
| 220 | io_mem_write[index][2](io_mem_opaque[index], physaddr, val); |
| 221 | io_mem_write[index][2](io_mem_opaque[index], physaddr + 4, val >> 32); |
| 222 | #endif |
| 223 | #endif /* SHIFT > 2 */ |
bellard | f1c8567 | 2006-02-08 22:41:53 +0000 | [diff] [blame] | 224 | #ifdef USE_KQEMU |
| 225 | env->last_io_time = cpu_get_time_fast(); |
| 226 | #endif |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 227 | } |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 228 | |
bellard | d656469 | 2008-01-31 09:22:27 +0000 | [diff] [blame] | 229 | void REGPARM glue(glue(__st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
| 230 | DATA_TYPE val, |
| 231 | int mmu_idx) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 232 | { |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 233 | target_phys_addr_t addend; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 234 | target_ulong tlb_addr; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 235 | void *retaddr; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 236 | int index; |
ths | 3b46e62 | 2007-09-17 08:09:54 +0000 | [diff] [blame] | 237 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 238 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 239 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 240 | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 241 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 242 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 243 | /* IO access */ |
| 244 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 245 | goto do_unaligned_access; |
bellard | d720b93 | 2004-04-25 17:57:43 +0000 | [diff] [blame] | 246 | retaddr = GETPC(); |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 247 | addend = env->iotlb[mmu_idx][index]; |
| 248 | glue(io_write, SUFFIX)(addend, val, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 249 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 250 | do_unaligned_access: |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 251 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 252 | #ifdef ALIGNED_ONLY |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 253 | do_unaligned_access(addr, 1, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 254 | #endif |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 255 | glue(glue(slow_st, SUFFIX), MMUSUFFIX)(addr, val, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 256 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 257 | } else { |
| 258 | /* aligned/unaligned access in the same page */ |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 259 | #ifdef ALIGNED_ONLY |
| 260 | if ((addr & (DATA_SIZE - 1)) != 0) { |
| 261 | retaddr = GETPC(); |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 262 | do_unaligned_access(addr, 1, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 263 | } |
| 264 | #endif |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 265 | addend = env->tlb_table[mmu_idx][index].addend; |
| 266 | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 267 | } |
| 268 | } else { |
| 269 | /* the page is not in the TLB : fill it */ |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 270 | retaddr = GETPC(); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 271 | #ifdef ALIGNED_ONLY |
| 272 | if ((addr & (DATA_SIZE - 1)) != 0) |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 273 | do_unaligned_access(addr, 1, mmu_idx, retaddr); |
bellard | a64d471 | 2005-12-05 19:57:57 +0000 | [diff] [blame] | 274 | #endif |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 275 | tlb_fill(addr, 1, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 276 | goto redo; |
| 277 | } |
| 278 | } |
| 279 | |
| 280 | /* handles all unaligned cases */ |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 281 | static void glue(glue(slow_st, SUFFIX), MMUSUFFIX)(target_ulong addr, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 282 | DATA_TYPE val, |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 283 | int mmu_idx, |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 284 | void *retaddr) |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 285 | { |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 286 | target_phys_addr_t addend; |
bellard | c27004e | 2005-01-03 23:35:10 +0000 | [diff] [blame] | 287 | target_ulong tlb_addr; |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 288 | int index, i; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 289 | |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 290 | index = (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
| 291 | redo: |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 292 | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 293 | if ((addr & TARGET_PAGE_MASK) == (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 294 | if (tlb_addr & ~TARGET_PAGE_MASK) { |
| 295 | /* IO access */ |
| 296 | if ((addr & (DATA_SIZE - 1)) != 0) |
| 297 | goto do_unaligned_access; |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 298 | addend = env->iotlb[mmu_idx][index]; |
| 299 | glue(io_write, SUFFIX)(addend, val, addr, retaddr); |
bellard | 9869996 | 2005-11-26 10:29:22 +0000 | [diff] [blame] | 300 | } else if (((addr & ~TARGET_PAGE_MASK) + DATA_SIZE - 1) >= TARGET_PAGE_SIZE) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 301 | do_unaligned_access: |
| 302 | /* XXX: not efficient, but simple */ |
balrog | 6c41b27 | 2007-11-17 12:12:29 +0000 | [diff] [blame] | 303 | /* Note: relies on the fact that tlb_fill() does not remove the |
| 304 | * previous page from the TLB cache. */ |
balrog | 7221fa9 | 2007-11-17 09:53:42 +0000 | [diff] [blame] | 305 | for(i = DATA_SIZE - 1; i >= 0; i--) { |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 306 | #ifdef TARGET_WORDS_BIGENDIAN |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 307 | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (((DATA_SIZE - 1) * 8) - (i * 8)), |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 308 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 309 | #else |
ths | 5fafdf2 | 2007-09-16 21:08:06 +0000 | [diff] [blame] | 310 | glue(slow_stb, MMUSUFFIX)(addr + i, val >> (i * 8), |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 311 | mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 312 | #endif |
| 313 | } |
| 314 | } else { |
| 315 | /* aligned/unaligned access in the same page */ |
pbrook | 0f459d1 | 2008-06-09 00:20:13 +0000 | [diff] [blame] | 316 | addend = env->tlb_table[mmu_idx][index].addend; |
| 317 | glue(glue(st, SUFFIX), _raw)((uint8_t *)(long)(addr+addend), val); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 318 | } |
| 319 | } else { |
| 320 | /* the page is not in the TLB : fill it */ |
j_mayer | 6ebbf39 | 2007-10-14 07:07:08 +0000 | [diff] [blame] | 321 | tlb_fill(addr, 1, mmu_idx, retaddr); |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 322 | goto redo; |
| 323 | } |
| 324 | } |
| 325 | |
bellard | b769d8f | 2004-10-03 15:07:13 +0000 | [diff] [blame] | 326 | #endif /* !defined(SOFTMMU_CODE_ACCESS) */ |
| 327 | |
| 328 | #undef READ_ACCESS_TYPE |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 329 | #undef SHIFT |
| 330 | #undef DATA_TYPE |
| 331 | #undef SUFFIX |
bellard | 61382a5 | 2003-10-27 21:22:23 +0000 | [diff] [blame] | 332 | #undef USUFFIX |
bellard | b92e5a2 | 2003-08-08 23:58:05 +0000 | [diff] [blame] | 333 | #undef DATA_SIZE |
bellard | 84b7b8e | 2005-11-28 21:19:04 +0000 | [diff] [blame] | 334 | #undef ADDR_READ |