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Blue Swirle1c6bba2010-02-05 18:48:36 +00001/*
2 * QEMU DEC 21154 PCI bridge
3 *
4 * Copyright (c) 2006-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell0d755902016-01-26 18:16:58 +000026#include "qemu/osdep.h"
Paolo Bonzini47b43a12013-03-18 17:36:02 +010027#include "dec.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010028#include "hw/sysbus.h"
Markus Armbruster9307d062020-06-10 07:32:04 +020029#include "qapi/error.h"
Markus Armbruster0b8fa322019-05-23 16:35:07 +020030#include "qemu/module.h"
Paolo Bonzini83c9f4c2013-02-04 15:40:22 +010031#include "hw/pci/pci.h"
32#include "hw/pci/pci_host.h"
33#include "hw/pci/pci_bridge.h"
34#include "hw/pci/pci_bus.h"
Eduardo Habkostdb1015e2020-09-03 16:43:22 -040035#include "qom/object.h"
Blue Swirle1c6bba2010-02-05 18:48:36 +000036
Eduardo Habkost80633962020-09-16 14:25:19 -040037OBJECT_DECLARE_SIMPLE_TYPE(DECState, DEC_21154)
Andreas Färberab615362012-08-20 19:07:59 +020038
Eduardo Habkostdb1015e2020-09-03 16:43:22 -040039struct DECState {
Andreas Färber67c332f2012-08-20 19:08:09 +020040 PCIHostState parent_obj;
Eduardo Habkostdb1015e2020-09-03 16:43:22 -040041};
Blue Swirle1c6bba2010-02-05 18:48:36 +000042
Blue Swirld55380b2010-02-07 19:28:32 +000043static int dec_map_irq(PCIDevice *pci_dev, int irq_num)
44{
45 return irq_num;
46}
47
Cao jin33c28f32016-01-15 10:23:31 +080048static void dec_pci_bridge_realize(PCIDevice *pci_dev, Error **errp)
Alex Williamson60a0e442013-03-14 16:01:11 -060049{
Cao jin33c28f32016-01-15 10:23:31 +080050 pci_bridge_initfn(pci_dev, TYPE_PCI_BUS);
Alex Williamson60a0e442013-03-14 16:01:11 -060051}
52
Anthony Liguori40021f02011-12-04 12:22:06 -060053static void dec_21154_pci_bridge_class_init(ObjectClass *klass, void *data)
54{
Anthony Liguori39bffca2011-12-07 21:34:16 -060055 DeviceClass *dc = DEVICE_CLASS(klass);
Anthony Liguori40021f02011-12-04 12:22:06 -060056 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
57
Thomas Huthba949712017-06-13 21:48:49 +020058 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
Cao jin33c28f32016-01-15 10:23:31 +080059 k->realize = dec_pci_bridge_realize;
Anthony Liguori40021f02011-12-04 12:22:06 -060060 k->exit = pci_bridge_exitfn;
61 k->vendor_id = PCI_VENDOR_ID_DEC;
62 k->device_id = PCI_DEVICE_ID_DEC_21154;
63 k->config_write = pci_bridge_write_config;
David Gibson91f4c992019-05-13 16:19:38 +100064 k->is_bridge = true;
Anthony Liguori39bffca2011-12-07 21:34:16 -060065 dc->desc = "DEC 21154 PCI-PCI bridge";
66 dc->reset = pci_bridge_reset;
67 dc->vmsd = &vmstate_pci_device;
Anthony Liguori40021f02011-12-04 12:22:06 -060068}
69
Andreas Färber4240abf2012-08-20 19:07:56 +020070static const TypeInfo dec_21154_pci_bridge_info = {
Anthony Liguori39bffca2011-12-07 21:34:16 -060071 .name = "dec-21154-p2p-bridge",
Andreas Färberf055e962013-07-11 17:13:43 +020072 .parent = TYPE_PCI_BRIDGE,
Anthony Liguori39bffca2011-12-07 21:34:16 -060073 .instance_size = sizeof(PCIBridge),
74 .class_init = dec_21154_pci_bridge_class_init,
Eduardo Habkostfd3b02c2017-09-27 16:56:34 -030075 .interfaces = (InterfaceInfo[]) {
76 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
77 { },
78 },
Isaku Yamahata68f79992010-07-13 13:01:42 +090079};
80
Blue Swirld55380b2010-02-07 19:28:32 +000081PCIBus *pci_dec_21154_init(PCIBus *parent_bus, int devfn)
82{
Isaku Yamahata68f79992010-07-13 13:01:42 +090083 PCIDevice *dev;
84 PCIBridge *br;
Blue Swirld55380b2010-02-07 19:28:32 +000085
Markus Armbruster9307d062020-06-10 07:32:04 +020086 dev = pci_new_multifunction(devfn, false, "dec-21154-p2p-bridge");
Andreas Färberf055e962013-07-11 17:13:43 +020087 br = PCI_BRIDGE(dev);
Isaku Yamahata68f79992010-07-13 13:01:42 +090088 pci_bridge_map_irq(br, "DEC 21154 PCI-PCI bridge", dec_map_irq);
Markus Armbruster9307d062020-06-10 07:32:04 +020089 pci_realize_and_unref(dev, parent_bus, &error_fatal);
Isaku Yamahata68f79992010-07-13 13:01:42 +090090 return pci_bridge_get_sec_bus(br);
Blue Swirld55380b2010-02-07 19:28:32 +000091}
92
Mao Zhongyi9b275552018-12-13 13:48:00 +000093static void pci_dec_21154_device_realize(DeviceState *dev, Error **errp)
Blue Swirle1c6bba2010-02-05 18:48:36 +000094{
Andreas Färberab615362012-08-20 19:07:59 +020095 PCIHostState *phb;
Mao Zhongyi9b275552018-12-13 13:48:00 +000096 SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
Blue Swirle1c6bba2010-02-05 18:48:36 +000097
Andreas Färber8558d942012-08-20 19:08:08 +020098 phb = PCI_HOST_BRIDGE(dev);
Blue Swirle1c6bba2010-02-05 18:48:36 +000099
Paolo Bonzini40c5dce2013-06-06 21:25:08 -0400100 memory_region_init_io(&phb->conf_mem, OBJECT(dev), &pci_host_conf_le_ops,
Andreas Färberab615362012-08-20 19:07:59 +0200101 dev, "pci-conf-idx", 0x1000);
Paolo Bonzini40c5dce2013-06-06 21:25:08 -0400102 memory_region_init_io(&phb->data_mem, OBJECT(dev), &pci_host_data_le_ops,
Andreas Färberab615362012-08-20 19:07:59 +0200103 dev, "pci-data-idx", 0x1000);
Mao Zhongyi9b275552018-12-13 13:48:00 +0000104 sysbus_init_mmio(sbd, &phb->conf_mem);
105 sysbus_init_mmio(sbd, &phb->data_mem);
Blue Swirle1c6bba2010-02-05 18:48:36 +0000106}
107
Markus Armbruster9af21db2015-01-19 15:52:30 +0100108static void dec_21154_pci_host_realize(PCIDevice *d, Error **errp)
Blue Swirle1c6bba2010-02-05 18:48:36 +0000109{
110 /* PCI2PCI bridge same values as PearPC - check this */
Blue Swirle1c6bba2010-02-05 18:48:36 +0000111}
112
Anthony Liguori40021f02011-12-04 12:22:06 -0600113static void dec_21154_pci_host_class_init(ObjectClass *klass, void *data)
114{
115 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
Markus Armbruster08c58f92013-11-28 17:26:58 +0100116 DeviceClass *dc = DEVICE_CLASS(klass);
Anthony Liguori40021f02011-12-04 12:22:06 -0600117
Thomas Huthba949712017-06-13 21:48:49 +0200118 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
Markus Armbruster9af21db2015-01-19 15:52:30 +0100119 k->realize = dec_21154_pci_host_realize;
Anthony Liguori40021f02011-12-04 12:22:06 -0600120 k->vendor_id = PCI_VENDOR_ID_DEC;
121 k->device_id = PCI_DEVICE_ID_DEC_21154;
122 k->revision = 0x02;
123 k->class_id = PCI_CLASS_BRIDGE_PCI;
David Gibson91f4c992019-05-13 16:19:38 +1000124 k->is_bridge = true;
Markus Armbruster08c58f92013-11-28 17:26:58 +0100125 /*
126 * PCI-facing part of the host bridge, not usable without the
127 * host-facing part, which can't be device_add'ed, yet.
128 */
Eduardo Habkoste90f2a82017-05-03 17:35:44 -0300129 dc->user_creatable = false;
Anthony Liguori40021f02011-12-04 12:22:06 -0600130}
131
Andreas Färber4240abf2012-08-20 19:07:56 +0200132static const TypeInfo dec_21154_pci_host_info = {
Anthony Liguori39bffca2011-12-07 21:34:16 -0600133 .name = "dec-21154",
134 .parent = TYPE_PCI_DEVICE,
135 .instance_size = sizeof(PCIDevice),
136 .class_init = dec_21154_pci_host_class_init,
Eduardo Habkostfd3b02c2017-09-27 16:56:34 -0300137 .interfaces = (InterfaceInfo[]) {
138 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
139 { },
140 },
Blue Swirle1c6bba2010-02-05 18:48:36 +0000141};
142
Anthony Liguori999e12b2012-01-24 13:12:29 -0600143static void pci_dec_21154_device_class_init(ObjectClass *klass, void *data)
144{
Mao Zhongyi9b275552018-12-13 13:48:00 +0000145 DeviceClass *dc = DEVICE_CLASS(klass);
Anthony Liguori999e12b2012-01-24 13:12:29 -0600146
Mao Zhongyi9b275552018-12-13 13:48:00 +0000147 dc->realize = pci_dec_21154_device_realize;
Anthony Liguori999e12b2012-01-24 13:12:29 -0600148}
149
Andreas Färber4240abf2012-08-20 19:07:56 +0200150static const TypeInfo pci_dec_21154_device_info = {
Andreas Färberab615362012-08-20 19:07:59 +0200151 .name = TYPE_DEC_21154,
Andreas Färber8558d942012-08-20 19:08:08 +0200152 .parent = TYPE_PCI_HOST_BRIDGE,
Anthony Liguori39bffca2011-12-07 21:34:16 -0600153 .instance_size = sizeof(DECState),
154 .class_init = pci_dec_21154_device_class_init,
Anthony Liguori999e12b2012-01-24 13:12:29 -0600155};
156
Andreas Färber83f7d432012-02-09 15:20:55 +0100157static void dec_register_types(void)
Blue Swirle1c6bba2010-02-05 18:48:36 +0000158{
Anthony Liguori39bffca2011-12-07 21:34:16 -0600159 type_register_static(&pci_dec_21154_device_info);
160 type_register_static(&dec_21154_pci_host_info);
161 type_register_static(&dec_21154_pci_bridge_info);
Blue Swirle1c6bba2010-02-05 18:48:36 +0000162}
163
Andreas Färber83f7d432012-02-09 15:20:55 +0100164type_init(dec_register_types)