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bellard798b0c22004-06-05 10:30:49 +00001/*
2 * QEMU internal VGA defines.
ths5fafdf22007-09-16 21:08:06 +00003 *
bellard798b0c22004-06-05 10:30:49 +00004 * Copyright (c) 2003-2004 Fabrice Bellard
ths5fafdf22007-09-16 21:08:06 +00005 *
bellard798b0c22004-06-05 10:30:49 +00006 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
Paolo Bonzinicb9c3772012-12-06 12:15:58 +010024#ifndef HW_VGA_INT_H
25#define HW_VGA_INT_H 1
Juan Quintela11b6b342009-10-14 15:25:25 +020026
27#include <hw/hw.h>
Paolo Bonzini7b1b5d12012-12-17 18:19:43 +010028#include "qapi/error.h"
Paolo Bonzini022c62c2012-12-17 18:19:49 +010029#include "exec/memory.h"
Juan Quintela11b6b342009-10-14 15:25:25 +020030
bellard798b0c22004-06-05 10:30:49 +000031#define ST01_V_RETRACE 0x08
32#define ST01_DISP_ENABLE 0x01
33
Gerd Hoffmanne9c61492012-05-24 09:16:29 +020034#define VBE_DISPI_MAX_XRES 16000
35#define VBE_DISPI_MAX_YRES 12000
bellard8454df82006-06-13 16:37:40 +000036#define VBE_DISPI_MAX_BPP 32
bellard798b0c22004-06-05 10:30:49 +000037
38#define VBE_DISPI_INDEX_ID 0x0
39#define VBE_DISPI_INDEX_XRES 0x1
40#define VBE_DISPI_INDEX_YRES 0x2
41#define VBE_DISPI_INDEX_BPP 0x3
42#define VBE_DISPI_INDEX_ENABLE 0x4
43#define VBE_DISPI_INDEX_BANK 0x5
44#define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
45#define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
46#define VBE_DISPI_INDEX_X_OFFSET 0x8
47#define VBE_DISPI_INDEX_Y_OFFSET 0x9
Gerd Hoffmannaf922842010-03-25 11:38:52 +010048#define VBE_DISPI_INDEX_NB 0xa /* size of vbe_regs[] */
49#define VBE_DISPI_INDEX_VIDEO_MEMORY_64K 0xa /* read-only, not in vbe_regs */
ths3b46e622007-09-17 08:09:54 +000050
bellard798b0c22004-06-05 10:30:49 +000051#define VBE_DISPI_ID0 0xB0C0
52#define VBE_DISPI_ID1 0xB0C1
53#define VBE_DISPI_ID2 0xB0C2
bellard37dd2082006-09-21 21:46:53 +000054#define VBE_DISPI_ID3 0xB0C3
55#define VBE_DISPI_ID4 0xB0C4
Gerd Hoffmannaf922842010-03-25 11:38:52 +010056#define VBE_DISPI_ID5 0xB0C5
ths3b46e622007-09-17 08:09:54 +000057
bellard798b0c22004-06-05 10:30:49 +000058#define VBE_DISPI_DISABLED 0x00
59#define VBE_DISPI_ENABLED 0x01
bellard8454df82006-06-13 16:37:40 +000060#define VBE_DISPI_GETCAPS 0x02
61#define VBE_DISPI_8BIT_DAC 0x20
bellard798b0c22004-06-05 10:30:49 +000062#define VBE_DISPI_LFB_ENABLED 0x40
63#define VBE_DISPI_NOCLEARMEM 0x80
ths3b46e622007-09-17 08:09:54 +000064
bellard798b0c22004-06-05 10:30:49 +000065#define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
66
bellard798b0c22004-06-05 10:30:49 +000067#define CH_ATTR_SIZE (160 * 100)
bellard8454df82006-06-13 16:37:40 +000068#define VGA_MAX_HEIGHT 2048
bellard4e3e9d02004-06-05 13:18:45 +000069
malccb5a7aa2008-09-28 00:42:12 +000070struct vga_precise_retrace {
71 int64_t ticks_per_char;
72 int64_t total_chars;
73 int htotal;
74 int hstart;
75 int hend;
76 int vstart;
77 int vend;
78 int freq;
79};
80
81union vga_retrace {
82 struct vga_precise_retrace precise;
83};
84
Avi Kivity4e12cd92009-05-03 22:25:16 +030085struct VGACommonState;
86typedef uint8_t (* vga_retrace_fn)(struct VGACommonState *s);
87typedef void (* vga_update_retrace_info_fn)(struct VGACommonState *s);
malccb5a7aa2008-09-28 00:42:12 +000088
Avi Kivity4e12cd92009-05-03 22:25:16 +030089typedef struct VGACommonState {
Jan Kiszka80763882011-08-22 19:12:12 +020090 MemoryRegion *legacy_address_space;
Avi Kivity4e12cd92009-05-03 22:25:16 +030091 uint8_t *vram_ptr;
Avi Kivityb1950432011-08-08 16:08:57 +030092 MemoryRegion vram;
Avi Kivity8294a642012-05-09 18:23:06 +030093 MemoryRegion vram_vbe;
Gerd Hoffmanna19cbfb2010-04-27 11:50:11 +020094 uint32_t vram_size;
Gerd Hoffmann4a1e2442012-05-24 09:59:44 +020095 uint32_t vram_size_mb; /* property */
Avi Kivity4e12cd92009-05-03 22:25:16 +030096 uint32_t latch;
Jan Kiszka80763882011-08-22 19:12:12 +020097 MemoryRegion *chain4_alias;
Avi Kivity4e12cd92009-05-03 22:25:16 +030098 uint8_t sr_index;
99 uint8_t sr[256];
100 uint8_t gr_index;
101 uint8_t gr[256];
102 uint8_t ar_index;
103 uint8_t ar[21];
104 int ar_flip_flop;
105 uint8_t cr_index;
106 uint8_t cr[256]; /* CRT registers */
107 uint8_t msr; /* Misc Output Register */
108 uint8_t fcr; /* Feature Control Register */
109 uint8_t st00; /* status 0 */
110 uint8_t st01; /* status 1 */
111 uint8_t dac_state;
112 uint8_t dac_sub_index;
113 uint8_t dac_read_index;
114 uint8_t dac_write_index;
115 uint8_t dac_cache[3]; /* used when writing */
116 int dac_8bit;
117 uint8_t palette[768];
118 int32_t bank_offset;
Avi Kivity4e12cd92009-05-03 22:25:16 +0300119 int (*get_bpp)(struct VGACommonState *s);
120 void (*get_offsets)(struct VGACommonState *s,
121 uint32_t *pline_offset,
122 uint32_t *pstart_addr,
123 uint32_t *pline_compare);
124 void (*get_resolution)(struct VGACommonState *s,
125 int *pwidth,
126 int *pheight);
Gerd Hoffmanna96d8be2012-10-15 08:02:57 +0200127 /* bochs vbe state */
128 uint16_t vbe_index;
129 uint16_t vbe_regs[VBE_DISPI_INDEX_NB];
130 uint32_t vbe_start_addr;
131 uint32_t vbe_line_offset;
132 uint32_t vbe_bank_mask;
133 int vbe_mapped;
Avi Kivity4e12cd92009-05-03 22:25:16 +0300134 /* display refresh support */
Gerd Hoffmannc78f7132013-03-05 15:24:14 +0100135 QemuConsole *con;
Avi Kivity4e12cd92009-05-03 22:25:16 +0300136 uint32_t font_offsets[2];
137 int graphic_mode;
138 uint8_t shift_control;
139 uint8_t double_scan;
140 uint32_t line_offset;
141 uint32_t line_compare;
142 uint32_t start_addr;
143 uint32_t plane_updated;
144 uint32_t last_line_offset;
145 uint8_t last_cw, last_ch;
146 uint32_t last_width, last_height; /* in chars or pixels */
147 uint32_t last_scr_width, last_scr_height; /* in pixels */
148 uint32_t last_depth; /* in bits */
149 uint8_t cursor_start, cursor_end;
Jan Kiszka9aa0ff02012-07-04 19:49:54 +0200150 bool cursor_visible_phase;
151 int64_t cursor_blink_time;
Avi Kivity4e12cd92009-05-03 22:25:16 +0300152 uint32_t cursor_offset;
153 unsigned int (*rgb_to_pixel)(unsigned int r,
154 unsigned int g, unsigned b);
Gerd Hoffmann380cd052013-03-13 14:04:18 +0100155 const GraphicHwOps *hw_ops;
Gerd Hoffmann9678aed2012-10-09 17:10:13 +0200156 bool full_update_text;
157 bool full_update_gfx;
Avi Kivity4e12cd92009-05-03 22:25:16 +0300158 /* hardware mouse cursor support */
159 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
160 void (*cursor_invalidate)(struct VGACommonState *s);
161 void (*cursor_draw_line)(struct VGACommonState *s, uint8_t *d, int y);
162 /* tell for each page if it has been updated since the last time */
163 uint32_t last_palette[256];
164 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
165 /* retrace */
166 vga_retrace_fn retrace;
167 vga_update_retrace_info_fn update_retrace_info;
malccb5a7aa2008-09-28 00:42:12 +0000168 union vga_retrace retrace_info;
Juan Quintela2a3138a2009-10-14 14:10:11 +0200169 uint8_t is_vbe_vmstate;
Avi Kivity4e12cd92009-05-03 22:25:16 +0300170} VGACommonState;
bellard4e3e9d02004-06-05 13:18:45 +0000171
bellarda8aa6692004-06-06 15:17:19 +0000172static inline int c6_to_8(int v)
173{
174 int b;
175 v &= 0x3f;
176 b = v & 1;
177 return (v << 2) | (b << 1) | b;
178}
179
Paolo Bonzini270327fe2013-06-06 21:21:13 -0400180void vga_common_init(VGACommonState *s, Object *obj);
Paolo Bonzini712f0cc2013-06-06 21:21:13 -0400181void vga_init(VGACommonState *s, Object *obj, MemoryRegion *address_space,
Richard Henderson0a039dc2011-08-16 08:27:39 -0700182 MemoryRegion *address_space_io, bool init_vga_ports);
Paolo Bonzinic84b28e2013-06-06 21:21:13 -0400183MemoryRegion *vga_init_io(VGACommonState *s, Object *obj,
Richard Henderson0a039dc2011-08-16 08:27:39 -0700184 const MemoryRegionPortio **vga_ports,
185 const MemoryRegionPortio **vbe_ports);
Juan Quintela03a3e7b2009-08-24 18:42:45 +0200186void vga_common_reset(VGACommonState *s);
aliguori2bec46d2008-11-24 20:21:41 +0000187
BALATON Zoltanb51d7b22012-11-03 12:47:08 +0100188void vga_sync_dirty_bitmap(VGACommonState *s);
Juan Quintelaa4a2f592009-08-24 18:42:47 +0200189void vga_dirty_log_start(VGACommonState *s);
Anthony Liguorib5cc6e32009-12-18 08:08:10 +1000190void vga_dirty_log_stop(VGACommonState *s);
aliguori2bec46d2008-11-24 20:21:41 +0000191
Juan Quintela11b6b342009-10-14 15:25:25 +0200192extern const VMStateDescription vmstate_vga_common;
Juan Quintela43bf7822009-08-31 16:07:13 +0200193uint32_t vga_ioport_read(void *opaque, uint32_t addr);
194void vga_ioport_write(void *opaque, uint32_t addr, uint32_t val);
Avi Kivitya8170e52012-10-23 12:30:10 +0200195uint32_t vga_mem_readb(VGACommonState *s, hwaddr addr);
196void vga_mem_writeb(VGACommonState *s, hwaddr addr, uint32_t val);
Juan Quintelaa4a2f592009-08-24 18:42:47 +0200197void vga_invalidate_scanlines(VGACommonState *s, int y1, int y2);
bellarda8aa6692004-06-06 15:17:19 +0000198
Juan Quintela25a18cb2009-08-31 16:07:19 +0200199int vga_ioport_invalid(VGACommonState *s, uint32_t addr);
Gerd Hoffmann803ff052012-10-15 08:02:55 +0200200
Paolo Bonzini83118322013-06-06 21:21:13 -0400201void vga_init_vbe(VGACommonState *s, Object *obj, MemoryRegion *address_space);
Gerd Hoffmann803ff052012-10-15 08:02:55 +0200202uint32_t vbe_ioport_read_data(void *opaque, uint32_t addr);
203void vbe_ioport_write_index(void *opaque, uint32_t addr, uint32_t val);
204void vbe_ioport_write_data(void *opaque, uint32_t addr, uint32_t val);
Juan Quintela25a18cb2009-08-31 16:07:19 +0200205
bellard798b0c22004-06-05 10:30:49 +0000206extern const uint8_t sr_mask[8];
207extern const uint8_t gr_mask[16];
Paul Brookfbe1b592009-05-13 17:56:25 +0100208
Gerd Hoffmann5245d572009-10-26 12:18:26 +0100209#define VGABIOS_FILENAME "vgabios.bin"
210#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
Paul Brookfbe1b592009-05-13 17:56:25 +0100211
Avi Kivityb1950432011-08-08 16:08:57 +0300212extern const MemoryRegionOps vga_mem_ops;
Paolo Bonzinicb9c3772012-12-06 12:15:58 +0100213
214#endif