| Paolo Bonzini | 82f5181 | 2019-01-23 14:56:00 +0800 | [diff] [blame] | 1 | config MALTA |
| 2 | bool |
| Paolo Bonzini | 8a1f6d0 | 2024-01-25 13:36:37 +0100 | [diff] [blame] | 3 | default y |
| 4 | depends on MIPS |
| Paolo Bonzini | 9ed7c6d | 2024-01-29 14:21:36 +0100 | [diff] [blame] | 5 | imply PCNET_PCI |
| 6 | imply PCI_DEVICES |
| 7 | imply TEST_DEVICES |
| Paolo Bonzini | fbd7580 | 2024-02-13 16:50:01 +0100 | [diff] [blame] | 8 | select FDC37M81X |
| Philippe Mathieu-Daudé | 7c032bf | 2019-03-10 02:25:07 +0100 | [diff] [blame] | 9 | select GT64120 |
| Paolo Bonzini | 9ed7c6d | 2024-01-29 14:21:36 +0100 | [diff] [blame] | 10 | select MIPS_CPS |
| Bernhard Beschow | 1697189 | 2023-10-07 14:38:27 +0200 | [diff] [blame] | 11 | select PIIX |
| Paolo Bonzini | 9ed7c6d | 2024-01-29 14:21:36 +0100 | [diff] [blame] | 12 | select PFLASH_CFI01 |
| 13 | select SERIAL |
| 14 | select SMBUS_EEPROM |
| Paolo Bonzini | 82f5181 | 2019-01-23 14:56:00 +0800 | [diff] [blame] | 15 | |
| 16 | config MIPSSIM |
| 17 | bool |
| Paolo Bonzini | 8a1f6d0 | 2024-01-25 13:36:37 +0100 | [diff] [blame] | 18 | default y |
| 19 | depends on MIPS |
| Bernhard Beschow | e6f2193 | 2024-02-13 16:49:58 +0100 | [diff] [blame] | 20 | select SERIAL |
| Philippe Mathieu-Daudé | 44fa013 | 2019-07-01 13:26:10 +0200 | [diff] [blame] | 21 | select MIPSNET |
| Paolo Bonzini | 82f5181 | 2019-01-23 14:56:00 +0800 | [diff] [blame] | 22 | |
| 23 | config JAZZ |
| 24 | bool |
| Paolo Bonzini | 8a1f6d0 | 2024-01-25 13:36:37 +0100 | [diff] [blame] | 25 | default y |
| 26 | depends on MIPS64 |
| Philippe Mathieu-Daudé | a6b1625 | 2019-07-01 13:26:11 +0200 | [diff] [blame] | 27 | select ISA_BUS |
| 28 | select RC4030 |
| 29 | select I8259 |
| 30 | select I8254 |
| 31 | select I8257 |
| 32 | select PCSPK |
| Philippe Mathieu-Daudé | 3ac2523 | 2021-12-06 23:45:25 +0100 | [diff] [blame] | 33 | select VGA_MMIO |
| Philippe Mathieu-Daudé | a6b1625 | 2019-07-01 13:26:11 +0200 | [diff] [blame] | 34 | select G364FB |
| 35 | select DP8393X |
| 36 | select ESP |
| Philippe Mathieu-Daudé | 1430759 | 2021-06-14 21:32:19 +0200 | [diff] [blame] | 37 | select FDC_SYSBUS |
| Philippe Mathieu-Daudé | a6b1625 | 2019-07-01 13:26:11 +0200 | [diff] [blame] | 38 | select MC146818RTC |
| 39 | select PCKBD |
| 40 | select SERIAL |
| 41 | select PARALLEL |
| 42 | select DS1225Y |
| 43 | select JAZZ_LED |
| Paolo Bonzini | 82f5181 | 2019-01-23 14:56:00 +0800 | [diff] [blame] | 44 | |
| Philippe Mathieu-Daudé | c3a09ff | 2020-04-26 12:16:37 +0200 | [diff] [blame] | 45 | config FULOONG |
| Paolo Bonzini | 82f5181 | 2019-01-23 14:56:00 +0800 | [diff] [blame] | 46 | bool |
| Paolo Bonzini | 8a1f6d0 | 2024-01-25 13:36:37 +0100 | [diff] [blame] | 47 | default y |
| 48 | depends on MIPS64 && !TARGET_BIG_ENDIAN |
| Paolo Bonzini | 9ed7c6d | 2024-01-29 14:21:36 +0100 | [diff] [blame] | 49 | imply PCI_DEVICES |
| 50 | imply TEST_DEVICES |
| 51 | imply ATI_VGA |
| 52 | imply RTL8139_PCI |
| Philippe Mathieu-Daudé | abc82de | 2019-02-03 22:37:26 +0100 | [diff] [blame] | 53 | select PCI_BONITO |
| Paolo Bonzini | 9ed7c6d | 2024-01-29 14:21:36 +0100 | [diff] [blame] | 54 | select SMBUS_EEPROM |
| Marc-André Lureau | 376a053 | 2023-11-04 15:37:19 +0400 | [diff] [blame] | 55 | select VT82C686 |
| Paolo Bonzini | 82f5181 | 2019-01-23 14:56:00 +0800 | [diff] [blame] | 56 | |
| Huacai Chen | c76b409 | 2020-04-27 17:33:14 +0800 | [diff] [blame] | 57 | config LOONGSON3V |
| 58 | bool |
| Paolo Bonzini | 8a1f6d0 | 2024-01-25 13:36:37 +0100 | [diff] [blame] | 59 | default y |
| 60 | depends on MIPS64 && !TARGET_BIG_ENDIAN |
| Paolo Bonzini | 9ed7c6d | 2024-01-29 14:21:36 +0100 | [diff] [blame] | 61 | imply PCI_DEVICES |
| 62 | imply TEST_DEVICES |
| 63 | imply VIRTIO_PCI |
| 64 | imply VIRTIO_NET |
| Huacai Chen | c76b409 | 2020-04-27 17:33:14 +0800 | [diff] [blame] | 65 | imply VIRTIO_VGA |
| 66 | imply QXL if SPICE |
| Paolo Bonzini | 9ed7c6d | 2024-01-29 14:21:36 +0100 | [diff] [blame] | 67 | imply USB_OHCI_PCI |
| Huacai Chen | c76b409 | 2020-04-27 17:33:14 +0800 | [diff] [blame] | 68 | select SERIAL |
| 69 | select GOLDFISH_RTC |
| 70 | select LOONGSON_LIOINTC |
| Huacai Chen | c76b409 | 2020-04-27 17:33:14 +0800 | [diff] [blame] | 71 | select PCI_EXPRESS_GENERIC_BRIDGE |
| 72 | select MSI_NONBROKEN |
| 73 | select FW_CFG_MIPS |
| Marc-André Lureau | 52c773c | 2023-11-07 18:06:15 +0400 | [diff] [blame] | 74 | select UNIMP |
| Huacai Chen | c76b409 | 2020-04-27 17:33:14 +0800 | [diff] [blame] | 75 | |
| Paolo Bonzini | 82f5181 | 2019-01-23 14:56:00 +0800 | [diff] [blame] | 76 | config MIPS_CPS |
| 77 | bool |
| Philippe Mathieu-Daudé | 2321d97 | 2019-03-10 02:07:58 +0100 | [diff] [blame] | 78 | select MIPS_ITU |
| Paolo Bonzini | 82f5181 | 2019-01-23 14:56:00 +0800 | [diff] [blame] | 79 | |
| 80 | config MIPS_BOSTON |
| 81 | bool |
| Paolo Bonzini | 8a1f6d0 | 2024-01-25 13:36:37 +0100 | [diff] [blame] | 82 | default y |
| Paolo Bonzini | d641ec3 | 2024-04-30 21:08:15 +0200 | [diff] [blame] | 83 | depends on MIPS64 && !TARGET_BIG_ENDIAN && FDT |
| Paolo Bonzini | 9ed7c6d | 2024-01-29 14:21:36 +0100 | [diff] [blame] | 84 | imply PCI_DEVICES |
| 85 | imply TEST_DEVICES |
| Paolo Bonzini | d641ec3 | 2024-04-30 21:08:15 +0200 | [diff] [blame] | 86 | select DEVICE_TREE |
| Philippe Mathieu-Daudé | 39f6049 | 2019-02-03 21:24:10 +0100 | [diff] [blame] | 87 | select FITLOADER |
| 88 | select MIPS_CPS |
| 89 | select PCI_EXPRESS_XILINX |
| 90 | select AHCI_ICH9 |
| 91 | select SERIAL |
| Huacai Chen | 313d1e9 | 2020-09-22 10:49:25 +0800 | [diff] [blame] | 92 | |
| 93 | config FW_CFG_MIPS |
| 94 | bool |
