| /* |
| * RISC-V Vector Extension Helpers for QEMU. |
| * |
| * Copyright (c) 2020 T-Head Semiconductor Co., Ltd. All rights reserved. |
| * |
| * This program is free software; you can redistribute it and/or modify it |
| * under the terms and conditions of the GNU General Public License, |
| * version 2 or later, as published by the Free Software Foundation. |
| * |
| * This program is distributed in the hope it will be useful, but WITHOUT |
| * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or |
| * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for |
| * more details. |
| * |
| * You should have received a copy of the GNU General Public License along with |
| * this program. If not, see <http://www.gnu.org/licenses/>. |
| */ |
| |
| #include "qemu/osdep.h" |
| #include "cpu.h" |
| #include "exec/exec-all.h" |
| #include "exec/helper-proto.h" |
| #include <math.h> |
| |
| target_ulong HELPER(vsetvl)(CPURISCVState *env, target_ulong s1, |
| target_ulong s2) |
| { |
| int vlmax, vl; |
| RISCVCPU *cpu = env_archcpu(env); |
| uint16_t sew = 8 << FIELD_EX64(s2, VTYPE, VSEW); |
| uint8_t ediv = FIELD_EX64(s2, VTYPE, VEDIV); |
| bool vill = FIELD_EX64(s2, VTYPE, VILL); |
| target_ulong reserved = FIELD_EX64(s2, VTYPE, RESERVED); |
| |
| if ((sew > cpu->cfg.elen) || vill || (ediv != 0) || (reserved != 0)) { |
| /* only set vill bit. */ |
| env->vtype = FIELD_DP64(0, VTYPE, VILL, 1); |
| env->vl = 0; |
| env->vstart = 0; |
| return 0; |
| } |
| |
| vlmax = vext_get_vlmax(cpu, s2); |
| if (s1 <= vlmax) { |
| vl = s1; |
| } else { |
| vl = vlmax; |
| } |
| env->vl = vl; |
| env->vtype = s2; |
| env->vstart = 0; |
| return vl; |
| } |