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qemu
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a538626aff7c8934ec47bc6ed41cac5bd1b7723c
/
.
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target
/
riscv
/
trace-events
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# target/riscv/cpu_helper.c
riscv_trap
(
uint64_t
hartid
,
bool
async
,
uint64_t
cause
,
uint64_t
epc
,
uint64_t
tval
,
const
char
*
desc
)
"hart:%"
PRId64
", async:%d, cause:%"
PRId64
", epc:0x%"
PRIx64
", tval:0x%"
PRIx64
", desc=%s"