Sign in
qemu
/
qemu
/
62f2b0389ff6fc7856b801bb5bee1c2d364d3e6c
/
.
/
target
/
riscv
/
trace-events
blob: 48af0373df6e80a3d62ddc8b042c97bafa148176 [
file
] [
log
] [
blame
]
# target/riscv/cpu_helper.c
riscv_trap
(
uint64_t
hartid
,
bool
async
,
uint64_t
cause
,
uint64_t
epc
,
uint64_t
tval
,
const
char
*
desc
)
"hart:%"
PRId64
", async:%d, cause:%"
PRId64
", epc:0x%"
PRIx64
", tval:0x%"
PRIx64
", desc=%s"