Merge tag 'pull-riscv-to-apply-20241220' of https://github.com/alistair23/qemu into staging
RISC-V PR for 10.0
* Correct the validness check of iova
* Fix APLIC in_clrip and clripnum write emulation
* Support riscv-iommu-sys device
* Add Tenstorrent Ascalon CPU
* Add AIA userspace irqchip_split support
* Add Microblaze V generic board
* Upgrade ACPI SPCR table to support SPCR table revision 4 format
* Remove tswap64() calls from HTIF
* Support 64-bit address of initrd
* Introduce svukte ISA extension
* Support ssstateen extension
* Support for RV64 Xiangshan Nanhu CPU
# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEEaukCtqfKh31tZZKWr3yVEwxTgBMFAmdkzjgACgkQr3yVEwxT
# gBOcyA//e0XhAQciQglCZZCfINdOyI8qSh+P2K0qtrXZ4VERHEMp7UoD5CQr2cZv
# h8ij1EkatXCwukVELx0rNckxG33bEFgG1oESnQSrwGE0Iu4csNW24nK5WlUS0/r+
# A5oD2wtzEF+cbhTKrVSDBN/PvlnWTKGEoJRkuXWfz5d4uR9eyQhfED0S2j36lNEC
# X1x/OZoKM89XuXtOFe9g55Z5UNzAatcdTISozL0FydiPh7QeVjTLHh28/tt559MX
# 7v5aJFlQuZ78z1mIHkZmPSorSrJ0zqhkP6NWe1ae06oMgzwRQQhYLppDILV4ZgUF
# 3mSDRoXmBycQXiYNPcHep3LdXfvxr+PpWHSevx8gH1jwm93On7Y/H7Uol6TDXzfC
# mrFjalfV5tzrD90ZvB+s5bCMF1q5Z8Dlj0pYF9aN9P1ILoWy3dndFAPJB6uKKDP7
# Qd4qOQ3dVyHAX9jLmVkB6QvAV/vTDrYTsAxaF/EaoLOy0IoKhjTvgda3XzE1MFKA
# gVafLluADIfSEdqa2QR2ExL8d1SZVoiObCp5TMLRer0HIpg/vQZwjfdbo4BgQKL3
# 7Q6wBxcZUNqrFgspXjm5WFIrdk2rfS/79OmvpNM6SZaK6BnklntdJHJHtAWujGsm
# EM310AUFpHMp2h6Nqnemb3qr5l4d20KSt8DhoPAUq1IE59Kb8XY=
# =0iQW
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 19 Dec 2024 20:54:00 EST
# gpg: using RSA key 6AE902B6A7CA877D6D659296AF7C95130C538013
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6AE9 02B6 A7CA 877D 6D65 9296 AF7C 9513 0C53 8013
* tag 'pull-riscv-to-apply-20241220' of https://github.com/alistair23/qemu: (39 commits)
target/riscv: add support for RV64 Xiangshan Nanhu CPU
target/riscv: add ssstateen
target/riscv/tcg: hide warn for named feats when disabling via priv_ver
target/riscv: Include missing headers in 'internals.h'
target/riscv: Include missing headers in 'vector_internals.h'
target/riscv: Check svukte is not enabled in RV32
target/riscv: Expose svukte ISA extension
target/riscv: Check memory access to meet svukte rule
target/riscv: Support hstatus[HUKTE] bit when svukte extension is enabled
target/riscv: Support senvcfg[UKTE] bit when svukte extension is enabled
target/riscv: Add svukte extension capability variable
hw/riscv: Add the checking if DTB overlaps to kernel or initrd
hw/riscv: Add a new struct RISCVBootInfo
hw/riscv: Support to load DTB after 3GB memory on 64-bit system.
hw/char/riscv_htif: Clarify MemoryRegionOps expect 32-bit accesses
hw/char/riscv_htif: Explicit little-endian implementation
MAINTAINERS: Cover RISC-V HTIF interface
tests/qtest/bios-tables-test: Update virt SPCR golden reference for RISC-V
hw/acpi: Upgrade ACPI SPCR table to support SPCR table revision 4 format
qtest: allow SPCR acpi table changes
...
Conflicts:
target/riscv/cpu.c
Merge conflict with DEFINE_PROP_END_OF_LIST() removal. No Property
array terminator is needed anymore.
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 801cff1..4ab277c 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -437,6 +437,16 @@
return kvm_fd;
}
+static void kvm_reset_parked_vcpus(void *param)
+{
+ KVMState *s = param;
+ struct KVMParkedVcpu *cpu;
+
+ QLIST_FOREACH(cpu, &s->kvm_parked_vcpus, node) {
+ kvm_arch_reset_parked_vcpu(cpu->vcpu_id, cpu->kvm_fd);
+ }
+}
+
int kvm_create_vcpu(CPUState *cpu)
{
unsigned long vcpu_id = kvm_arch_vcpu_id(cpu);
@@ -2728,6 +2738,7 @@
}
qemu_register_reset(kvm_unpoison_all, NULL);
+ qemu_register_reset(kvm_reset_parked_vcpus, s);
if (s->kernel_irqchip_allowed) {
kvm_irqchip_create(s);
@@ -2999,17 +3010,17 @@
MemoryRegion *mr;
RAMBlock *rb;
void *addr;
- int ret = -1;
+ int ret = -EINVAL;
trace_kvm_convert_memory(start, size, to_private ? "shared_to_private" : "private_to_shared");
if (!QEMU_PTR_IS_ALIGNED(start, qemu_real_host_page_size()) ||
!QEMU_PTR_IS_ALIGNED(size, qemu_real_host_page_size())) {
- return -1;
+ return ret;
}
if (!size) {
- return -1;
+ return ret;
}
section = memory_region_find(get_system_memory(), start, size);
@@ -3027,7 +3038,7 @@
if (!to_private) {
return 0;
}
- return -1;
+ return ret;
}
if (!memory_region_has_guest_memfd(mr)) {
diff --git a/backends/tpm/tpm_util.c b/backends/tpm/tpm_util.c
index cf13855..485982b 100644
--- a/backends/tpm/tpm_util.c
+++ b/backends/tpm/tpm_util.c
@@ -46,7 +46,7 @@
static void set_tpm(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
TPMBackend *s, **be = object_field_prop_ptr(obj, prop);
char *str;
@@ -66,7 +66,7 @@
static void release_tpm(Object *obj, const char *name, void *opaque)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
TPMBackend **be = object_field_prop_ptr(obj, prop);
if (*be) {
diff --git a/configs/targets/i386-softmmu.mak b/configs/targets/i386-softmmu.mak
index 2ac69d5..2eb0e86 100644
--- a/configs/targets/i386-softmmu.mak
+++ b/configs/targets/i386-softmmu.mak
@@ -1,4 +1,5 @@
TARGET_ARCH=i386
TARGET_SUPPORTS_MTTCG=y
TARGET_KVM_HAVE_GUEST_DEBUG=y
+TARGET_KVM_HAVE_RESET_PARKED_VCPU=y
TARGET_XML_FILES= gdb-xml/i386-32bit.xml
diff --git a/configs/targets/x86_64-softmmu.mak b/configs/targets/x86_64-softmmu.mak
index e12ac3d..920e9a4 100644
--- a/configs/targets/x86_64-softmmu.mak
+++ b/configs/targets/x86_64-softmmu.mak
@@ -2,4 +2,5 @@
TARGET_BASE_ARCH=i386
TARGET_SUPPORTS_MTTCG=y
TARGET_KVM_HAVE_GUEST_DEBUG=y
+TARGET_KVM_HAVE_RESET_PARKED_VCPU=y
TARGET_XML_FILES= gdb-xml/i386-64bit.xml
diff --git a/cpu-target.c b/cpu-target.c
index 2ae07a7..6af3409 100644
--- a/cpu-target.c
+++ b/cpu-target.c
@@ -201,7 +201,6 @@
DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
MemoryRegion *),
#endif
- DEFINE_PROP_END_OF_LIST(),
};
#ifndef CONFIG_USER_ONLY
diff --git a/docs/devel/migration/compatibility.rst b/docs/devel/migration/compatibility.rst
index c787f53..ecb887e 100644
--- a/docs/devel/migration/compatibility.rst
+++ b/docs/devel/migration/compatibility.rst
@@ -401,7 +401,6 @@
DEFINE_PROP_UINT32("acpi-index", PCIDevice, acpi_index, 0),
+ DEFINE_PROP_BIT("x-pcie-err-unc-mask", PCIDevice, cap_present,
+ QEMU_PCIE_ERR_UNC_MASK_BITNR, true),
- DEFINE_PROP_END_OF_LIST()
};
Notice that we enable the feature for new machine types.
diff --git a/docs/devel/virtio-backends.rst b/docs/devel/virtio-backends.rst
index a6f9df4..679d754 100644
--- a/docs/devel/virtio-backends.rst
+++ b/docs/devel/virtio-backends.rst
@@ -107,7 +107,6 @@
VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
DEV_NVECTORS_UNSPECIFIED),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/9pfs/virtio-9p-device.c b/hw/9pfs/virtio-9p-device.c
index b764e4c..ef0d845 100644
--- a/hw/9pfs/virtio-9p-device.c
+++ b/hw/9pfs/virtio-9p-device.c
@@ -246,7 +246,6 @@
static const Property virtio_9p_properties[] = {
DEFINE_PROP_STRING("mount_tag", V9fsVirtioState, state.fsconf.tag),
DEFINE_PROP_STRING("fsdev", V9fsVirtioState, state.fsconf.fsdev_id),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_9p_class_init(ObjectClass *klass, void *data)
diff --git a/hw/acpi/erst.c b/hw/acpi/erst.c
index 5ef5ddc..dfa0f37 100644
--- a/hw/acpi/erst.c
+++ b/hw/acpi/erst.c
@@ -1016,7 +1016,6 @@
TYPE_MEMORY_BACKEND, HostMemoryBackend *),
DEFINE_PROP_UINT32(ACPI_ERST_RECORD_SIZE_PROP, ERSTDeviceState,
default_record_size, ERST_RECORD_SIZE),
- DEFINE_PROP_END_OF_LIST(),
};
static void erst_class_init(ObjectClass *klass, void *data)
diff --git a/hw/acpi/generic_event_device.c b/hw/acpi/generic_event_device.c
index 8c4706f..cfb1429 100644
--- a/hw/acpi/generic_event_device.c
+++ b/hw/acpi/generic_event_device.c
@@ -318,7 +318,6 @@
static const Property acpi_ged_properties[] = {
DEFINE_PROP_UINT32("ged-event", AcpiGedState, ged_event_bitmap, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_memhp_state = {
diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
index 2bfaf5a..cc755b3 100644
--- a/hw/acpi/piix4.c
+++ b/hw/acpi/piix4.c
@@ -617,7 +617,6 @@
DEFINE_PROP_BOOL("smm-enabled", PIIX4PMState, smm_enabled, false),
DEFINE_PROP_BOOL("x-not-migrate-acpi-index", PIIX4PMState,
not_migrate_acpi_index, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void piix4_pm_class_init(ObjectClass *klass, void *data)
diff --git a/hw/acpi/vmgenid.c b/hw/acpi/vmgenid.c
index 9c2ca85..af3ec85 100644
--- a/hw/acpi/vmgenid.c
+++ b/hw/acpi/vmgenid.c
@@ -216,7 +216,6 @@
static const Property vmgenid_device_properties[] = {
DEFINE_PROP_UUID(VMGENID_GUID, VmGenIdState, guid),
- DEFINE_PROP_END_OF_LIST(),
};
static void vmgenid_device_class_init(ObjectClass *klass, void *data)
diff --git a/hw/adc/aspeed_adc.c b/hw/adc/aspeed_adc.c
index f94c6f2..1cc554f 100644
--- a/hw/adc/aspeed_adc.c
+++ b/hw/adc/aspeed_adc.c
@@ -289,7 +289,6 @@
static const Property aspeed_adc_engine_properties[] = {
DEFINE_PROP_UINT32("engine-id", AspeedADCEngineState, engine_id, 0),
DEFINE_PROP_UINT32("nr-channels", AspeedADCEngineState, nr_channels, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void aspeed_adc_engine_class_init(ObjectClass *klass, void *data)
diff --git a/hw/adc/npcm7xx_adc.c b/hw/adc/npcm7xx_adc.c
index 1781ff4..0a83d28 100644
--- a/hw/adc/npcm7xx_adc.c
+++ b/hw/adc/npcm7xx_adc.c
@@ -269,7 +269,6 @@
static const Property npcm7xx_timer_properties[] = {
DEFINE_PROP_UINT32("iref", NPCM7xxADCState, iref, NPCM7XX_ADC_DEFAULT_IREF),
- DEFINE_PROP_END_OF_LIST(),
};
static void npcm7xx_adc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index 1cd6b4a..ffd732f 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -72,6 +72,7 @@
bool has_cpu_pwrctrl;
bool has_sse_counter;
bool has_tcms;
+ uint8_t props_count;
const Property *props;
const ARMSSEDeviceInfo *devinfo;
const bool *irq_is_common;
@@ -87,7 +88,6 @@
DEFINE_PROP_BOOL("CPU0_DSP", ARMSSE, cpu_dsp[0], true),
DEFINE_PROP_UINT32("CPU0_MPU_NS", ARMSSE, cpu_mpu_ns[0], 8),
DEFINE_PROP_UINT32("CPU0_MPU_S", ARMSSE, cpu_mpu_s[0], 8),
- DEFINE_PROP_END_OF_LIST()
};
static const Property sse200_properties[] = {
@@ -104,7 +104,6 @@
DEFINE_PROP_UINT32("CPU0_MPU_S", ARMSSE, cpu_mpu_s[0], 8),
DEFINE_PROP_UINT32("CPU1_MPU_NS", ARMSSE, cpu_mpu_ns[1], 8),
DEFINE_PROP_UINT32("CPU1_MPU_S", ARMSSE, cpu_mpu_s[1], 8),
- DEFINE_PROP_END_OF_LIST()
};
static const Property sse300_properties[] = {
@@ -117,7 +116,6 @@
DEFINE_PROP_BOOL("CPU0_DSP", ARMSSE, cpu_dsp[0], true),
DEFINE_PROP_UINT32("CPU0_MPU_NS", ARMSSE, cpu_mpu_ns[0], 8),
DEFINE_PROP_UINT32("CPU0_MPU_S", ARMSSE, cpu_mpu_s[0], 8),
- DEFINE_PROP_END_OF_LIST()
};
static const ARMSSEDeviceInfo iotkit_devices[] = {
@@ -528,6 +526,7 @@
.has_sse_counter = false,
.has_tcms = false,
.props = iotkit_properties,
+ .props_count = ARRAY_SIZE(iotkit_properties),
.devinfo = iotkit_devices,
.irq_is_common = sse200_irq_is_common,
},
@@ -549,6 +548,7 @@
.has_sse_counter = false,
.has_tcms = false,
.props = sse200_properties,
+ .props_count = ARRAY_SIZE(sse200_properties),
.devinfo = sse200_devices,
.irq_is_common = sse200_irq_is_common,
},
@@ -570,6 +570,7 @@
.has_sse_counter = true,
.has_tcms = true,
.props = sse300_properties,
+ .props_count = ARRAY_SIZE(sse300_properties),
.devinfo = sse300_devices,
.irq_is_common = sse300_irq_is_common,
},
@@ -1699,7 +1700,7 @@
dc->realize = armsse_realize;
dc->vmsd = &armsse_vmstate;
- device_class_set_props(dc, info->props);
+ device_class_set_props_n(dc, info->props, info->props_count);
device_class_set_legacy_reset(dc, armsse_reset);
iic->check = armsse_idau_check;
asc->info = info;
diff --git a/hw/arm/armv7m.c b/hw/arm/armv7m.c
index e20f719..1134606 100644
--- a/hw/arm/armv7m.c
+++ b/hw/arm/armv7m.c
@@ -552,7 +552,6 @@
DEFINE_PROP_BOOL("dsp", ARMv7MState, dsp, true),
DEFINE_PROP_UINT32("mpu-ns-regions", ARMv7MState, mpu_ns_regions, UINT_MAX),
DEFINE_PROP_UINT32("mpu-s-regions", ARMv7MState, mpu_s_regions, UINT_MAX),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_armv7m = {
@@ -635,7 +634,6 @@
DEFINE_PROP_UINT32("base", BitBandState, base, 0),
DEFINE_PROP_LINK("source-memory", BitBandState, source_memory,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void bitband_class_init(ObjectClass *klass, void *data)
diff --git a/hw/arm/aspeed_soc_common.c b/hw/arm/aspeed_soc_common.c
index 4221cac..1ddcb26 100644
--- a/hw/arm/aspeed_soc_common.c
+++ b/hw/arm/aspeed_soc_common.c
@@ -144,7 +144,6 @@
MemoryRegion *),
DEFINE_PROP_LINK("memory", AspeedSoCState, memory, TYPE_MEMORY_REGION,
MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void aspeed_soc_class_init(ObjectClass *oc, void *data)
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index 48763b0..ef1242d 100644
--- a/hw/arm/fsl-imx25.c
+++ b/hw/arm/fsl-imx25.c
@@ -311,7 +311,6 @@
static const Property fsl_imx25_properties[] = {
DEFINE_PROP_UINT32("fec-phy-num", FslIMX25State, phy_num, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void fsl_imx25_class_init(ObjectClass *oc, void *data)
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index 236d15b..fed2dbb 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -483,7 +483,6 @@
static const Property fsl_imx6_properties[] = {
DEFINE_PROP_UINT32("fec-phy-num", FslIMX6State, phy_num, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void fsl_imx6_class_init(ObjectClass *oc, void *data)
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index 1e0bbbb..6995746 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -725,7 +725,6 @@
true),
DEFINE_PROP_BOOL("fec2-phy-connected", FslIMX6ULState, phy_connected[1],
true),
- DEFINE_PROP_END_OF_LIST(),
};
static void fsl_imx6ul_class_init(ObjectClass *oc, void *data)
diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c
index 0310c15..55b3b3d 100644
--- a/hw/arm/fsl-imx7.c
+++ b/hw/arm/fsl-imx7.c
@@ -743,7 +743,6 @@
true),
DEFINE_PROP_BOOL("fec2-phy-connected", FslIMX7State, phy_connected[1],
true),
- DEFINE_PROP_END_OF_LIST(),
};
static void fsl_imx7_class_init(ObjectClass *oc, void *data)
diff --git a/hw/arm/integratorcp.c b/hw/arm/integratorcp.c
index ee6c7e0..64025ba 100644
--- a/hw/arm/integratorcp.c
+++ b/hw/arm/integratorcp.c
@@ -696,7 +696,6 @@
static const Property core_properties[] = {
DEFINE_PROP_UINT32("memsz", IntegratorCMState, memsz, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void core_class_init(ObjectClass *klass, void *data)
diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c
index 5d7c3f2..224530f 100644
--- a/hw/arm/msf2-soc.c
+++ b/hw/arm/msf2-soc.c
@@ -234,7 +234,6 @@
/* default divisors in Libero GUI */
DEFINE_PROP_UINT8("apb0div", MSF2State, apb0div, 2),
DEFINE_PROP_UINT8("apb1div", MSF2State, apb1div, 2),
- DEFINE_PROP_END_OF_LIST(),
};
static void m2sxxx_soc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/arm/npcm7xx.c b/hw/arm/npcm7xx.c
index 2960b63..7809364 100644
--- a/hw/arm/npcm7xx.c
+++ b/hw/arm/npcm7xx.c
@@ -813,7 +813,6 @@
static const Property npcm7xx_properties[] = {
DEFINE_PROP_LINK("dram-mr", NPCM7xxState, dram, TYPE_MEMORY_REGION,
MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void npcm7xx_class_init(ObjectClass *oc, void *data)
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index 43fac8a..37dd4cf 100644
--- a/hw/arm/nrf51_soc.c
+++ b/hw/arm/nrf51_soc.c
@@ -214,7 +214,6 @@
DEFINE_PROP_UINT32("sram-size", NRF51State, sram_size, NRF51822_SRAM_SIZE),
DEFINE_PROP_UINT32("flash-size", NRF51State, flash_size,
NRF51822_FLASH_SIZE),
- DEFINE_PROP_END_OF_LIST(),
};
static void nrf51_soc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
index 6baa9d0..dd74c2e 100644
--- a/hw/arm/smmu-common.c
+++ b/hw/arm/smmu-common.c
@@ -938,7 +938,6 @@
DEFINE_PROP_UINT8("bus_num", SMMUState, bus_num, 0),
DEFINE_PROP_LINK("primary-bus", SMMUState, primary_bus,
TYPE_PCI_BUS, PCIBus *),
- DEFINE_PROP_END_OF_LIST(),
};
static void smmu_base_class_init(ObjectClass *klass, void *data)
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 026838f..c0cf5df 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -1985,7 +1985,6 @@
* Defaults to stage 1
*/
DEFINE_PROP_STRING("stage", SMMUv3State, stage),
- DEFINE_PROP_END_OF_LIST()
};
static void smmuv3_instance_init(Object *obj)
diff --git a/hw/arm/stellaris.c b/hw/arm/stellaris.c
index 7fc13d9..ea04b28 100644
--- a/hw/arm/stellaris.c
+++ b/hw/arm/stellaris.c
@@ -448,7 +448,6 @@
DEFINE_PROP_UINT32("dc2", ssys_state, dc2, 0),
DEFINE_PROP_UINT32("dc3", ssys_state, dc3, 0),
DEFINE_PROP_UINT32("dc4", ssys_state, dc4, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void stellaris_sys_instance_init(Object *obj)
diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c
index 4c4ff21..f567815 100644
--- a/hw/arm/strongarm.c
+++ b/hw/arm/strongarm.c
@@ -1334,7 +1334,6 @@
static const Property strongarm_uart_properties[] = {
DEFINE_PROP_CHR("chardev", StrongARMUARTState, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void strongarm_uart_class_init(ObjectClass *klass, void *data)
diff --git a/hw/arm/xlnx-versal.c b/hw/arm/xlnx-versal.c
index 3adbe7b..3760d10 100644
--- a/hw/arm/xlnx-versal.c
+++ b/hw/arm/xlnx-versal.c
@@ -975,7 +975,6 @@
TYPE_CAN_BUS, CanBusState *),
DEFINE_PROP_LINK("canbus1", Versal, lpd.iou.canbus[1],
TYPE_CAN_BUS, CanBusState *),
- DEFINE_PROP_END_OF_LIST()
};
static void versal_class_init(ObjectClass *klass, void *data)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 1082c62..6bb4629 100644
--- a/hw/arm/xlnx-zynqmp.c
+++ b/hw/arm/xlnx-zynqmp.c
@@ -867,7 +867,6 @@
CanBusState *),
DEFINE_PROP_LINK("canbus1", XlnxZynqMPState, canbus[1], TYPE_CAN_BUS,
CanBusState *),
- DEFINE_PROP_END_OF_LIST()
};
static void xlnx_zynqmp_class_init(ObjectClass *oc, void *data)
diff --git a/hw/audio/ac97.c b/hw/audio/ac97.c
index 8033bbb..35533c6 100644
--- a/hw/audio/ac97.c
+++ b/hw/audio/ac97.c
@@ -1326,7 +1326,6 @@
static const Property ac97_properties[] = {
DEFINE_AUDIO_PROPERTIES(AC97LinkState, card),
- DEFINE_PROP_END_OF_LIST(),
};
static void ac97_class_init(ObjectClass *klass, void *data)
diff --git a/hw/audio/adlib.c b/hw/audio/adlib.c
index c1d8fae..8c9767b 100644
--- a/hw/audio/adlib.c
+++ b/hw/audio/adlib.c
@@ -301,7 +301,6 @@
DEFINE_AUDIO_PROPERTIES(AdlibState, card),
DEFINE_PROP_UINT32 ("iobase", AdlibState, port, 0x220),
DEFINE_PROP_UINT32 ("freq", AdlibState, freq, 44100),
- DEFINE_PROP_END_OF_LIST (),
};
static void adlib_class_initfn (ObjectClass *klass, void *data)
diff --git a/hw/audio/asc.c b/hw/audio/asc.c
index 4520394..cc205bf 100644
--- a/hw/audio/asc.c
+++ b/hw/audio/asc.c
@@ -698,7 +698,6 @@
static const Property asc_properties[] = {
DEFINE_AUDIO_PROPERTIES(ASCState, card),
DEFINE_PROP_UINT8("asctype", ASCState, type, ASC_TYPE_ASC),
- DEFINE_PROP_END_OF_LIST(),
};
static void asc_class_init(ObjectClass *oc, void *data)
diff --git a/hw/audio/cs4231a.c b/hw/audio/cs4231a.c
index abc3872..5a9be80 100644
--- a/hw/audio/cs4231a.c
+++ b/hw/audio/cs4231a.c
@@ -694,7 +694,6 @@
DEFINE_PROP_UINT32 ("iobase", CSState, port, 0x534),
DEFINE_PROP_UINT32 ("irq", CSState, irq, 9),
DEFINE_PROP_UINT32 ("dma", CSState, dma, 3),
- DEFINE_PROP_END_OF_LIST (),
};
static void cs4231a_class_initfn (ObjectClass *klass, void *data)
diff --git a/hw/audio/es1370.c b/hw/audio/es1370.c
index 6170425..b5756b9 100644
--- a/hw/audio/es1370.c
+++ b/hw/audio/es1370.c
@@ -870,7 +870,6 @@
static const Property es1370_properties[] = {
DEFINE_AUDIO_PROPERTIES(ES1370State, card),
- DEFINE_PROP_END_OF_LIST(),
};
static void es1370_class_init (ObjectClass *klass, void *data)
diff --git a/hw/audio/gus.c b/hw/audio/gus.c
index dd5a5a3..e718c11 100644
--- a/hw/audio/gus.c
+++ b/hw/audio/gus.c
@@ -296,7 +296,6 @@
DEFINE_PROP_UINT32 ("iobase", GUSState, port, 0x240),
DEFINE_PROP_UINT32 ("irq", GUSState, emu.gusirq, 7),
DEFINE_PROP_UINT32 ("dma", GUSState, emu.gusdma, 3),
- DEFINE_PROP_END_OF_LIST (),
};
static void gus_class_initfn (ObjectClass *klass, void *data)
diff --git a/hw/audio/hda-codec.c b/hw/audio/hda-codec.c
index 8bd8f62..6f3a8f6 100644
--- a/hw/audio/hda-codec.c
+++ b/hw/audio/hda-codec.c
@@ -862,7 +862,6 @@
DEFINE_PROP_UINT32("debug", HDAAudioState, debug, 0),
DEFINE_PROP_BOOL("mixer", HDAAudioState, mixer, true),
DEFINE_PROP_BOOL("use-timer", HDAAudioState, use_timer, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void hda_audio_init_output(HDACodecDevice *hda, Error **errp)
diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c
index 3e4a755..ec24dfd 100644
--- a/hw/audio/intel-hda.c
+++ b/hw/audio/intel-hda.c
@@ -39,7 +39,6 @@
static const Property hda_props[] = {
DEFINE_PROP_UINT32("cad", HDACodecDevice, cad, -1),
- DEFINE_PROP_END_OF_LIST()
};
static const TypeInfo hda_codec_bus_info = {
@@ -1219,7 +1218,6 @@
DEFINE_PROP_UINT32("debug", IntelHDAState, debug, 0),
DEFINE_PROP_ON_OFF_AUTO("msi", IntelHDAState, msi, ON_OFF_AUTO_AUTO),
DEFINE_PROP_BOOL("old_msi_addr", IntelHDAState, old_msi_addr, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void intel_hda_class_init(ObjectClass *klass, void *data)
diff --git a/hw/audio/pcspk.c b/hw/audio/pcspk.c
index 7a6b9f5..17be185 100644
--- a/hw/audio/pcspk.c
+++ b/hw/audio/pcspk.c
@@ -219,7 +219,6 @@
DEFINE_AUDIO_PROPERTIES(PCSpkState, card),
DEFINE_PROP_UINT32("iobase", PCSpkState, iobase, 0x61),
DEFINE_PROP_BOOL("migrate", PCSpkState, migrate, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void pcspk_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/audio/pl041.c b/hw/audio/pl041.c
index 6c66a24..f771d72 100644
--- a/hw/audio/pl041.c
+++ b/hw/audio/pl041.c
@@ -630,7 +630,6 @@
/* Non-compact FIFO depth property */
DEFINE_PROP_UINT32("nc_fifo_depth", PL041State, fifo_depth,
DEFAULT_FIFO_DEPTH),
- DEFINE_PROP_END_OF_LIST(),
};
static void pl041_device_class_init(ObjectClass *klass, void *data)
diff --git a/hw/audio/sb16.c b/hw/audio/sb16.c
index 143b9e7..0c661b4 100644
--- a/hw/audio/sb16.c
+++ b/hw/audio/sb16.c
@@ -1447,7 +1447,6 @@
DEFINE_PROP_UINT32 ("irq", SB16State, irq, 5),
DEFINE_PROP_UINT32 ("dma", SB16State, dma, 1),
DEFINE_PROP_UINT32 ("dma16", SB16State, hdma, 5),
- DEFINE_PROP_END_OF_LIST (),
};
static void sb16_class_initfn (ObjectClass *klass, void *data)
diff --git a/hw/audio/via-ac97.c b/hw/audio/via-ac97.c
index e43ddf3..4e115e0 100644
--- a/hw/audio/via-ac97.c
+++ b/hw/audio/via-ac97.c
@@ -461,7 +461,6 @@
static const Property via_ac97_properties[] = {
DEFINE_AUDIO_PROPERTIES(ViaAC97State, card),
- DEFINE_PROP_END_OF_LIST(),
};
static void via_ac97_class_init(ObjectClass *klass, void *data)
diff --git a/hw/audio/virtio-snd-pci.c b/hw/audio/virtio-snd-pci.c
index b762d7e..74d93f4 100644
--- a/hw/audio/virtio-snd-pci.c
+++ b/hw/audio/virtio-snd-pci.c
@@ -31,7 +31,6 @@
DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_snd_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/audio/virtio-snd.c b/hw/audio/virtio-snd.c
index e2b112e..7e8ab74 100644
--- a/hw/audio/virtio-snd.c
+++ b/hw/audio/virtio-snd.c
@@ -85,7 +85,6 @@
VIRTIO_SOUND_STREAM_DEFAULT),
DEFINE_PROP_UINT32("chmaps", VirtIOSound, snd_conf.chmaps,
VIRTIO_SOUND_CHMAP_DEFAULT),
- DEFINE_PROP_END_OF_LIST(),
};
static void
diff --git a/hw/audio/wm8750.c b/hw/audio/wm8750.c
index 19e7755..8d381db 100644
--- a/hw/audio/wm8750.c
+++ b/hw/audio/wm8750.c
@@ -708,7 +708,6 @@
static const Property wm8750_properties[] = {
DEFINE_AUDIO_PROPERTIES(WM8750State, card),
- DEFINE_PROP_END_OF_LIST(),
};
static void wm8750_class_init(ObjectClass *klass, void *data)
diff --git a/hw/avr/atmega.c b/hw/avr/atmega.c
index ce630ec..981f342 100644
--- a/hw/avr/atmega.c
+++ b/hw/avr/atmega.c
@@ -358,7 +358,6 @@
static const Property atmega_props[] = {
DEFINE_PROP_UINT64("xtal-frequency-hz", AtmegaMcuState,
xtal_freq_hz, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void atmega_class_init(ObjectClass *oc, void *data)
diff --git a/hw/block/fdc-isa.c b/hw/block/fdc-isa.c
index 2b9f667..e71be8a 100644
--- a/hw/block/fdc-isa.c
+++ b/hw/block/fdc-isa.c
@@ -296,7 +296,6 @@
DEFINE_PROP_SIGNED("fallback", FDCtrlISABus, state.fallback,
FLOPPY_DRIVE_TYPE_288, qdev_prop_fdc_drive_type,
FloppyDriveType),
- DEFINE_PROP_END_OF_LIST(),
};
static void isabus_fdc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/block/fdc-sysbus.c b/hw/block/fdc-sysbus.c
index f17e04b..381b492 100644
--- a/hw/block/fdc-sysbus.c
+++ b/hw/block/fdc-sysbus.c
@@ -206,7 +206,6 @@
DEFINE_PROP_SIGNED("fallback", FDCtrlSysBus, state.fallback,
FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type,
FloppyDriveType),
- DEFINE_PROP_END_OF_LIST(),
};
static void sysbus_fdc_class_init(ObjectClass *klass, void *data)
@@ -230,7 +229,6 @@
DEFINE_PROP_SIGNED("fallback", FDCtrlSysBus, state.fallback,
FLOPPY_DRIVE_TYPE_144, qdev_prop_fdc_drive_type,
FloppyDriveType),
- DEFINE_PROP_END_OF_LIST(),
};
static void sun4m_fdc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/block/fdc.c b/hw/block/fdc.c
index 57d6844..d81b7a2 100644
--- a/hw/block/fdc.c
+++ b/hw/block/fdc.c
@@ -460,7 +460,6 @@
DEFINE_PROP_SIGNED("drive-type", FloppyDrive, type,
FLOPPY_DRIVE_TYPE_AUTO, qdev_prop_fdc_drive_type,
FloppyDriveType),
- DEFINE_PROP_END_OF_LIST(),
};
static void floppy_drive_realize(DeviceState *qdev, Error **errp)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index ca97365..8b5f148 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -1729,7 +1729,6 @@
DEFINE_PROP_UINT8("spansion-cr3nv", Flash, spansion_cr3nv, 0x2),
DEFINE_PROP_UINT8("spansion-cr4nv", Flash, spansion_cr4nv, 0x10),
DEFINE_PROP_DRIVE("drive", Flash, blk),
- DEFINE_PROP_END_OF_LIST(),
};
static int m25p80_pre_load(void *opaque)
diff --git a/hw/block/nand.c b/hw/block/nand.c
index b6e6bfa..35a91a8 100644
--- a/hw/block/nand.c
+++ b/hw/block/nand.c
@@ -449,7 +449,6 @@
DEFINE_PROP_UINT8("manufacturer_id", NANDFlashState, manf_id, 0),
DEFINE_PROP_UINT8("chip_id", NANDFlashState, chip_id, 0),
DEFINE_PROP_DRIVE("drive", NANDFlashState, blk),
- DEFINE_PROP_END_OF_LIST(),
};
static void nand_class_init(ObjectClass *klass, void *data)
diff --git a/hw/block/pflash_cfi01.c b/hw/block/pflash_cfi01.c
index 20f4fc6..06db20d 100644
--- a/hw/block/pflash_cfi01.c
+++ b/hw/block/pflash_cfi01.c
@@ -932,7 +932,6 @@
DEFINE_PROP_STRING("name", PFlashCFI01, name),
DEFINE_PROP_BOOL("old-multiple-chip-handling", PFlashCFI01,
old_multiple_chip_handling, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void pflash_cfi01_class_init(ObjectClass *klass, void *data)
diff --git a/hw/block/pflash_cfi02.c b/hw/block/pflash_cfi02.c
index c82002d..559fac8 100644
--- a/hw/block/pflash_cfi02.c
+++ b/hw/block/pflash_cfi02.c
@@ -959,7 +959,6 @@
DEFINE_PROP_UINT16("unlock-addr0", PFlashCFI02, unlock_addr0, 0),
DEFINE_PROP_UINT16("unlock-addr1", PFlashCFI02, unlock_addr1, 0),
DEFINE_PROP_STRING("name", PFlashCFI02, name),
- DEFINE_PROP_END_OF_LIST(),
};
static void pflash_cfi02_unrealize(DeviceState *dev)
diff --git a/hw/block/swim.c b/hw/block/swim.c
index c336d83..4a7f8d1 100644
--- a/hw/block/swim.c
+++ b/hw/block/swim.c
@@ -169,7 +169,6 @@
static const Property swim_drive_properties[] = {
DEFINE_PROP_INT32("unit", SWIMDrive, unit, -1),
DEFINE_BLOCK_PROPERTIES(SWIMDrive, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void swim_drive_realize(DeviceState *qdev, Error **errp)
diff --git a/hw/block/vhost-user-blk.c b/hw/block/vhost-user-blk.c
index f3ac007..d13c597 100644
--- a/hw/block/vhost-user-blk.c
+++ b/hw/block/vhost-user-blk.c
@@ -581,7 +581,6 @@
VIRTIO_BLK_F_DISCARD, true),
DEFINE_PROP_BIT64("write-zeroes", VHostUserBlk, parent_obj.host_features,
VIRTIO_BLK_F_WRITE_ZEROES, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_user_blk_class_init(ObjectClass *klass, void *data)
diff --git a/hw/block/virtio-blk.c b/hw/block/virtio-blk.c
index 9ca60fb..5bcb77e 100644
--- a/hw/block/virtio-blk.c
+++ b/hw/block/virtio-blk.c
@@ -2014,7 +2014,6 @@
conf.max_write_zeroes_sectors, BDRV_REQUEST_MAX_SECTORS),
DEFINE_PROP_BOOL("x-enable-wce-if-config-wce", VirtIOBlock,
conf.x_enable_wce_if_config_wce, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_blk_class_init(ObjectClass *klass, void *data)
diff --git a/hw/block/xen-block.c b/hw/block/xen-block.c
index 0c0817f..ec3413f 100644
--- a/hw/block/xen-block.c
+++ b/hw/block/xen-block.c
@@ -485,7 +485,7 @@
static void xen_block_get_vdev(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
XenBlockVdev *vdev = object_field_prop_ptr(obj, prop);
char *str;
@@ -545,7 +545,7 @@
static void xen_block_set_vdev(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
XenBlockVdev *vdev = object_field_prop_ptr(obj, prop);
char *str, *p;
const char *end;
@@ -674,7 +674,6 @@
props.max_ring_page_order, 4),
DEFINE_PROP_LINK("iothread", XenBlockDevice, props.iothread,
TYPE_IOTHREAD, IOThread *),
- DEFINE_PROP_END_OF_LIST()
};
static void xen_block_class_init(ObjectClass *class, void *data)
diff --git a/hw/char/avr_usart.c b/hw/char/avr_usart.c
index 3421576..e8012ca 100644
--- a/hw/char/avr_usart.c
+++ b/hw/char/avr_usart.c
@@ -261,7 +261,6 @@
static const Property avr_usart_properties[] = {
DEFINE_PROP_CHR("chardev", AVRUsartState, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void avr_usart_pr(void *opaque, int irq, int level)
diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c
index 30285c9..73ad593 100644
--- a/hw/char/bcm2835_aux.c
+++ b/hw/char/bcm2835_aux.c
@@ -292,7 +292,6 @@
static const Property bcm2835_aux_props[] = {
DEFINE_PROP_CHR("chardev", BCM2835AuxState, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void bcm2835_aux_class_init(ObjectClass *oc, void *data)
diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index 2e778f7..ebd846a 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -619,7 +619,6 @@
static const Property cadence_uart_properties[] = {
DEFINE_PROP_CHR("chardev", CadenceUARTState, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void cadence_uart_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/cmsdk-apb-uart.c b/hw/char/cmsdk-apb-uart.c
index e37e14e..0506500 100644
--- a/hw/char/cmsdk-apb-uart.c
+++ b/hw/char/cmsdk-apb-uart.c
@@ -380,7 +380,6 @@
static const Property cmsdk_apb_uart_properties[] = {
DEFINE_PROP_CHR("chardev", CMSDKAPBUART, chr),
DEFINE_PROP_UINT32("pclk-frq", CMSDKAPBUART, pclk_frq, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void cmsdk_apb_uart_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/debugcon.c b/hw/char/debugcon.c
index c0f16e9..1bc3bf8 100644
--- a/hw/char/debugcon.c
+++ b/hw/char/debugcon.c
@@ -118,7 +118,6 @@
DEFINE_PROP_UINT32("iobase", ISADebugconState, iobase, 0xe9),
DEFINE_PROP_CHR("chardev", ISADebugconState, state.chr),
DEFINE_PROP_UINT32("readback", ISADebugconState, state.readback, 0xe9),
- DEFINE_PROP_END_OF_LIST(),
};
static void debugcon_isa_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/char/digic-uart.c b/hw/char/digic-uart.c
index 03beba1..b0b0714 100644
--- a/hw/char/digic-uart.c
+++ b/hw/char/digic-uart.c
@@ -174,7 +174,6 @@
static const Property digic_uart_properties[] = {
DEFINE_PROP_CHR("chardev", DigicUartState, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void digic_uart_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/escc.c b/hw/char/escc.c
index 08bc65e..a5fdd8f 100644
--- a/hw/char/escc.c
+++ b/hw/char/escc.c
@@ -1099,7 +1099,6 @@
DEFINE_PROP_CHR("chrB", ESCCState, chn[0].chr),
DEFINE_PROP_CHR("chrA", ESCCState, chn[1].chr),
DEFINE_PROP_STRING("chnA-sunkbd-layout", ESCCState, chn[1].sunkbd_layout),
- DEFINE_PROP_END_OF_LIST(),
};
static void escc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/exynos4210_uart.c b/hw/char/exynos4210_uart.c
index c2836ff..a1a9a12 100644
--- a/hw/char/exynos4210_uart.c
+++ b/hw/char/exynos4210_uart.c
@@ -709,7 +709,6 @@
DEFINE_PROP_UINT32("channel", Exynos4210UartState, channel, 0),
DEFINE_PROP_UINT32("rx-size", Exynos4210UartState, rx.size, 16),
DEFINE_PROP_UINT32("tx-size", Exynos4210UartState, tx.size, 16),
- DEFINE_PROP_END_OF_LIST(),
};
static void exynos4210_uart_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/goldfish_tty.c b/hw/char/goldfish_tty.c
index 68e2612..701eb98 100644
--- a/hw/char/goldfish_tty.c
+++ b/hw/char/goldfish_tty.c
@@ -243,7 +243,6 @@
static const Property goldfish_tty_properties[] = {
DEFINE_PROP_CHR("chardev", GoldfishTTYState, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void goldfish_tty_instance_init(Object *obj)
diff --git a/hw/char/grlib_apbuart.c b/hw/char/grlib_apbuart.c
index caae88d..db6bcda 100644
--- a/hw/char/grlib_apbuart.c
+++ b/hw/char/grlib_apbuart.c
@@ -279,7 +279,6 @@
static const Property grlib_apbuart_properties[] = {
DEFINE_PROP_CHR("chrdev", UART, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void grlib_apbuart_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/ibex_uart.c b/hw/char/ibex_uart.c
index b1bdb2a..392375a 100644
--- a/hw/char/ibex_uart.c
+++ b/hw/char/ibex_uart.c
@@ -510,7 +510,6 @@
static const Property ibex_uart_properties[] = {
DEFINE_PROP_CHR("chardev", IbexUartState, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void ibex_uart_init(Object *obj)
diff --git a/hw/char/imx_serial.c b/hw/char/imx_serial.c
index 6376f2c..12705a1 100644
--- a/hw/char/imx_serial.c
+++ b/hw/char/imx_serial.c
@@ -440,7 +440,6 @@
static const Property imx_serial_properties[] = {
DEFINE_PROP_CHR("chardev", IMXSerialState, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void imx_serial_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/ipoctal232.c b/hw/char/ipoctal232.c
index fb8cb6c..d1e5f6d 100644
--- a/hw/char/ipoctal232.c
+++ b/hw/char/ipoctal232.c
@@ -567,7 +567,6 @@
DEFINE_PROP_CHR("chardev5", IPOctalState, ch[5].dev),
DEFINE_PROP_CHR("chardev6", IPOctalState, ch[6].dev),
DEFINE_PROP_CHR("chardev7", IPOctalState, ch[7].dev),
- DEFINE_PROP_END_OF_LIST(),
};
static void ipoctal_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/mcf_uart.c b/hw/char/mcf_uart.c
index c044536..980a12f 100644
--- a/hw/char/mcf_uart.c
+++ b/hw/char/mcf_uart.c
@@ -314,7 +314,6 @@
static const Property mcf_uart_properties[] = {
DEFINE_PROP_CHR("chardev", mcf_uart_state, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void mcf_uart_class_init(ObjectClass *oc, void *data)
diff --git a/hw/char/nrf51_uart.c b/hw/char/nrf51_uart.c
index b164c70..82a61ee 100644
--- a/hw/char/nrf51_uart.c
+++ b/hw/char/nrf51_uart.c
@@ -306,7 +306,6 @@
static const Property nrf51_uart_properties[] = {
DEFINE_PROP_CHR("chardev", NRF51UARTState, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void nrf51_uart_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/parallel.c b/hw/char/parallel.c
index 1519169..df31ce4 100644
--- a/hw/char/parallel.c
+++ b/hw/char/parallel.c
@@ -608,7 +608,6 @@
DEFINE_PROP_UINT32("iobase", ISAParallelState, iobase, -1),
DEFINE_PROP_UINT32("irq", ISAParallelState, isairq, 7),
DEFINE_PROP_CHR("chardev", ISAParallelState, state.chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void parallel_isa_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/char/pl011.c b/hw/char/pl011.c
index 5fbee5e..06ce851 100644
--- a/hw/char/pl011.c
+++ b/hw/char/pl011.c
@@ -606,7 +606,6 @@
static const Property pl011_properties[] = {
DEFINE_PROP_CHR("chardev", PL011State, chr),
DEFINE_PROP_BOOL("migrate-clk", PL011State, migrate_clk, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void pl011_init(Object *obj)
diff --git a/hw/char/renesas_sci.c b/hw/char/renesas_sci.c
index 516b486..ea94494 100644
--- a/hw/char/renesas_sci.c
+++ b/hw/char/renesas_sci.c
@@ -322,7 +322,6 @@
static const Property rsci_properties[] = {
DEFINE_PROP_UINT64("input-freq", RSCIState, input_freq, 0),
DEFINE_PROP_CHR("chardev", RSCIState, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void rsci_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/sclpconsole-lm.c b/hw/char/sclpconsole-lm.c
index 536b283..ddb9a72 100644
--- a/hw/char/sclpconsole-lm.c
+++ b/hw/char/sclpconsole-lm.c
@@ -337,7 +337,6 @@
DEFINE_PROP_CHR("chardev", SCLPConsoleLM, chr),
DEFINE_PROP_UINT32("write_errors", SCLPConsoleLM, write_errors, 0),
DEFINE_PROP_BOOL("echo", SCLPConsoleLM, echo, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void console_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/sclpconsole.c b/hw/char/sclpconsole.c
index a90b892..01233b9 100644
--- a/hw/char/sclpconsole.c
+++ b/hw/char/sclpconsole.c
@@ -253,7 +253,6 @@
static const Property console_properties[] = {
DEFINE_PROP_CHR("chardev", SCLPConsole, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void console_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/serial-isa.c b/hw/char/serial-isa.c
index 2cf50eb..f44959c 100644
--- a/hw/char/serial-isa.c
+++ b/hw/char/serial-isa.c
@@ -117,7 +117,6 @@
DEFINE_PROP_UINT32("index", ISASerialState, index, -1),
DEFINE_PROP_UINT32("iobase", ISASerialState, iobase, -1),
DEFINE_PROP_UINT32("irq", ISASerialState, isairq, -1),
- DEFINE_PROP_END_OF_LIST(),
};
static void serial_isa_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/char/serial-mm.c b/hw/char/serial-mm.c
index 8f51f1d..6338e7c 100644
--- a/hw/char/serial-mm.c
+++ b/hw/char/serial-mm.c
@@ -132,7 +132,6 @@
*/
DEFINE_PROP_UINT8("regshift", SerialMM, regshift, 0),
DEFINE_PROP_UINT8("endianness", SerialMM, endianness, DEVICE_NATIVE_ENDIAN),
- DEFINE_PROP_END_OF_LIST(),
};
static void serial_mm_class_init(ObjectClass *oc, void *data)
diff --git a/hw/char/serial-pci-multi.c b/hw/char/serial-pci-multi.c
index c2f20d8..7578e86 100644
--- a/hw/char/serial-pci-multi.c
+++ b/hw/char/serial-pci-multi.c
@@ -136,7 +136,6 @@
DEFINE_PROP_CHR("chardev1", PCIMultiSerialState, state[0].chr),
DEFINE_PROP_CHR("chardev2", PCIMultiSerialState, state[1].chr),
DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02),
- DEFINE_PROP_END_OF_LIST(),
};
static const Property multi_4x_serial_pci_properties[] = {
@@ -145,7 +144,6 @@
DEFINE_PROP_CHR("chardev3", PCIMultiSerialState, state[2].chr),
DEFINE_PROP_CHR("chardev4", PCIMultiSerialState, state[3].chr),
DEFINE_PROP_UINT8("prog_if", PCIMultiSerialState, prog_if, 0x02),
- DEFINE_PROP_END_OF_LIST(),
};
static void multi_2x_serial_pci_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/char/serial-pci.c b/hw/char/serial-pci.c
index 2f487a3a..6659cef 100644
--- a/hw/char/serial-pci.c
+++ b/hw/char/serial-pci.c
@@ -83,7 +83,6 @@
static const Property serial_pci_properties[] = {
DEFINE_PROP_UINT8("prog_if", PCISerialState, prog_if, 0x02),
- DEFINE_PROP_END_OF_LIST(),
};
static void serial_pci_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/char/serial.c b/hw/char/serial.c
index 85dba02..81b346a 100644
--- a/hw/char/serial.c
+++ b/hw/char/serial.c
@@ -968,7 +968,6 @@
DEFINE_PROP_CHR("chardev", SerialState, chr),
DEFINE_PROP_UINT32("baudbase", SerialState, baudbase, 115200),
DEFINE_PROP_BOOL("wakeup", SerialState, wakeup, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void serial_class_init(ObjectClass *klass, void* data)
diff --git a/hw/char/sh_serial.c b/hw/char/sh_serial.c
index 2ab7197..247aeb07 100644
--- a/hw/char/sh_serial.c
+++ b/hw/char/sh_serial.c
@@ -450,7 +450,6 @@
static const Property sh_serial_properties[] = {
DEFINE_PROP_CHR("chardev", SHSerialState, chr),
DEFINE_PROP_UINT8("features", SHSerialState, feat, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void sh_serial_class_init(ObjectClass *oc, void *data)
diff --git a/hw/char/shakti_uart.c b/hw/char/shakti_uart.c
index 6e56754..09975d9 100644
--- a/hw/char/shakti_uart.c
+++ b/hw/char/shakti_uart.c
@@ -159,7 +159,6 @@
static const Property shakti_uart_properties[] = {
DEFINE_PROP_CHR("chardev", ShaktiUartState, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void shakti_uart_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/sifive_uart.c b/hw/char/sifive_uart.c
index 97e4be3..4bc5767 100644
--- a/hw/char/sifive_uart.c
+++ b/hw/char/sifive_uart.c
@@ -253,7 +253,6 @@
static const Property sifive_uart_properties[] = {
DEFINE_PROP_CHR("chardev", SiFiveUARTState, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void sifive_uart_init(Object *obj)
diff --git a/hw/char/spapr_vty.c b/hw/char/spapr_vty.c
index cd91dad..6451d01 100644
--- a/hw/char/spapr_vty.c
+++ b/hw/char/spapr_vty.c
@@ -166,7 +166,6 @@
static const Property spapr_vty_properties[] = {
DEFINE_SPAPR_PROPERTIES(SpaprVioVty, sdev),
DEFINE_PROP_CHR("chardev", SpaprVioVty, chardev),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_spapr_vty = {
diff --git a/hw/char/stm32f2xx_usart.c b/hw/char/stm32f2xx_usart.c
index 4a3c30e..ebcc510 100644
--- a/hw/char/stm32f2xx_usart.c
+++ b/hw/char/stm32f2xx_usart.c
@@ -201,7 +201,6 @@
static const Property stm32f2xx_usart_properties[] = {
DEFINE_PROP_CHR("chardev", STM32F2XXUsartState, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void stm32f2xx_usart_init(Object *obj)
diff --git a/hw/char/stm32l4x5_usart.c b/hw/char/stm32l4x5_usart.c
index 360e79c..bcc310b 100644
--- a/hw/char/stm32l4x5_usart.c
+++ b/hw/char/stm32l4x5_usart.c
@@ -536,7 +536,6 @@
static const Property stm32l4x5_usart_base_properties[] = {
DEFINE_PROP_CHR("chardev", Stm32l4x5UsartBaseState, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void stm32l4x5_usart_base_init(Object *obj)
diff --git a/hw/char/terminal3270.c b/hw/char/terminal3270.c
index c2aafda..04ee26d 100644
--- a/hw/char/terminal3270.c
+++ b/hw/char/terminal3270.c
@@ -285,7 +285,6 @@
static const Property terminal_properties[] = {
DEFINE_PROP_CHR("chardev", Terminal3270, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription terminal3270_vmstate = {
diff --git a/hw/char/virtio-console.c b/hw/char/virtio-console.c
index f58292e..aa6d611 100644
--- a/hw/char/virtio-console.c
+++ b/hw/char/virtio-console.c
@@ -276,7 +276,6 @@
static const Property virtserialport_properties[] = {
DEFINE_PROP_CHR("chardev", VirtConsole, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtserialport_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/virtio-serial-bus.c b/hw/char/virtio-serial-bus.c
index 1e631bc..b6d2743 100644
--- a/hw/char/virtio-serial-bus.c
+++ b/hw/char/virtio-serial-bus.c
@@ -838,7 +838,6 @@
static const Property virtser_props[] = {
DEFINE_PROP_UINT32("nr", VirtIOSerialPort, id, VIRTIO_CONSOLE_BAD_ID),
DEFINE_PROP_STRING("name", VirtIOSerialPort, name),
- DEFINE_PROP_END_OF_LIST()
};
static void virtser_bus_class_init(ObjectClass *klass, void *data)
@@ -1158,7 +1157,6 @@
31),
DEFINE_PROP_BIT64("emergency-write", VirtIOSerial, host_features,
VIRTIO_CONSOLE_F_EMERG_WRITE, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_serial_class_init(ObjectClass *klass, void *data)
diff --git a/hw/char/xen_console.c b/hw/char/xen_console.c
index c20c1b4..96e7d59 100644
--- a/hw/char/xen_console.c
+++ b/hw/char/xen_console.c
@@ -490,7 +490,6 @@
static const Property xen_console_properties[] = {
DEFINE_PROP_CHR("chardev", XenConsole, chr),
DEFINE_PROP_INT32("idx", XenConsole, dev, -1),
- DEFINE_PROP_END_OF_LIST(),
};
static void xen_console_class_init(ObjectClass *class, void *data)
diff --git a/hw/char/xilinx_uartlite.c b/hw/char/xilinx_uartlite.c
index ad77226..56955e0 100644
--- a/hw/char/xilinx_uartlite.c
+++ b/hw/char/xilinx_uartlite.c
@@ -178,7 +178,6 @@
static const Property xilinx_uartlite_properties[] = {
DEFINE_PROP_CHR("chardev", XilinxUARTLite, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void uart_rx(void *opaque, const uint8_t *buf, int size)
diff --git a/hw/core/generic-loader.c b/hw/core/generic-loader.c
index c1cddec..67f2008 100644
--- a/hw/core/generic-loader.c
+++ b/hw/core/generic-loader.c
@@ -187,7 +187,6 @@
DEFINE_PROP_UINT32("cpu-num", GenericLoaderState, cpu_num, CPU_NONE),
DEFINE_PROP_BOOL("force-raw", GenericLoaderState, force_raw, false),
DEFINE_PROP_STRING("file", GenericLoaderState, file),
- DEFINE_PROP_END_OF_LIST(),
};
static void generic_loader_class_init(ObjectClass *klass, void *data)
diff --git a/hw/core/guest-loader.c b/hw/core/guest-loader.c
index 74af00c..57315e5 100644
--- a/hw/core/guest-loader.c
+++ b/hw/core/guest-loader.c
@@ -116,7 +116,6 @@
DEFINE_PROP_STRING("kernel", GuestLoaderState, kernel),
DEFINE_PROP_STRING("bootargs", GuestLoaderState, args),
DEFINE_PROP_STRING("initrd", GuestLoaderState, initrd),
- DEFINE_PROP_END_OF_LIST(),
};
static void guest_loader_class_init(ObjectClass *klass, void *data)
diff --git a/hw/core/or-irq.c b/hw/core/or-irq.c
index fc52796..4d0d3ca 100644
--- a/hw/core/or-irq.c
+++ b/hw/core/or-irq.c
@@ -117,7 +117,6 @@
static const Property or_irq_properties[] = {
DEFINE_PROP_UINT16("num-lines", OrIRQState, num_lines, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void or_irq_class_init(ObjectClass *klass, void *data)
diff --git a/hw/core/platform-bus.c b/hw/core/platform-bus.c
index a29c9c6..1d00c4d 100644
--- a/hw/core/platform-bus.c
+++ b/hw/core/platform-bus.c
@@ -207,7 +207,6 @@
static const Property platform_bus_properties[] = {
DEFINE_PROP_UINT32("num_irqs", PlatformBusDevice, num_irqs, 0),
DEFINE_PROP_UINT32("mmio_size", PlatformBusDevice, mmio_size, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void platform_bus_class_init(ObjectClass *klass, void *data)
diff --git a/hw/core/qdev-properties-system.c b/hw/core/qdev-properties-system.c
index 22ea1ed..1bae135 100644
--- a/hw/core/qdev-properties-system.c
+++ b/hw/core/qdev-properties-system.c
@@ -90,7 +90,7 @@
static void get_drive(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
void **ptr = object_field_prop_ptr(obj, prop);
const char *value;
char *p;
@@ -116,7 +116,7 @@
void *opaque, bool iothread, Error **errp)
{
DeviceState *dev = DEVICE(obj);
- Property *prop = opaque;
+ const Property *prop = opaque;
void **ptr = object_field_prop_ptr(obj, prop);
char *str;
BlockBackend *blk;
@@ -225,7 +225,7 @@
static void release_drive(Object *obj, const char *name, void *opaque)
{
DeviceState *dev = DEVICE(obj);
- Property *prop = opaque;
+ const Property *prop = opaque;
BlockBackend **ptr = object_field_prop_ptr(obj, prop);
if (*ptr) {
@@ -269,7 +269,7 @@
Error **errp)
{
ERRP_GUARD();
- Property *prop = opaque;
+ const Property *prop = opaque;
CharBackend *be = object_field_prop_ptr(obj, prop);
Chardev *s;
char *str;
@@ -305,7 +305,7 @@
static void release_chr(Object *obj, const char *name, void *opaque)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
CharBackend *be = object_field_prop_ptr(obj, prop);
qemu_chr_fe_deinit(be, false);
@@ -329,7 +329,7 @@
static void get_mac(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
MACAddr *mac = object_field_prop_ptr(obj, prop);
char buffer[2 * 6 + 5 + 1];
char *p = buffer;
@@ -344,7 +344,7 @@
static void set_mac(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
MACAddr *mac = object_field_prop_ptr(obj, prop);
int i, pos;
char *str;
@@ -406,7 +406,7 @@
static void get_netdev(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
NICPeers *peers_ptr = object_field_prop_ptr(obj, prop);
char *p = g_strdup(peers_ptr->ncs[0] ? peers_ptr->ncs[0]->name : "");
@@ -417,7 +417,7 @@
static void set_netdev(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
NICPeers *peers_ptr = object_field_prop_ptr(obj, prop);
NetClientState **ncs = peers_ptr->ncs;
NetClientState *peers[MAX_QUEUE_NUM];
@@ -485,7 +485,7 @@
static void get_audiodev(Object *obj, Visitor *v, const char* name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
QEMUSoundCard *card = object_field_prop_ptr(obj, prop);
char *p = g_strdup(audio_get_id(card));
@@ -496,7 +496,7 @@
static void set_audiodev(Object *obj, Visitor *v, const char* name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
QEMUSoundCard *card = object_field_prop_ptr(obj, prop);
AudioState *state;
g_autofree char *str = NULL;
@@ -578,7 +578,7 @@
const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
int *ptr = object_field_prop_ptr(obj, prop);
int value;
@@ -614,7 +614,7 @@
static void set_blocksize(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint32_t *ptr = object_field_prop_ptr(obj, prop);
uint64_t value;
@@ -737,7 +737,7 @@
static void get_reserved_region(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
ReservedRegion *rr = object_field_prop_ptr(obj, prop);
char buffer[64];
char *p = buffer;
@@ -753,7 +753,7 @@
static void set_reserved_region(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
ReservedRegion *rr = object_field_prop_ptr(obj, prop);
const char *endptr;
uint64_t lob, upb;
@@ -815,7 +815,7 @@
static void set_pci_devfn(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
g_autofree GenericAlternate *alt;
int32_t value, *ptr = object_field_prop_ptr(obj, prop);
unsigned int slot, fn, n;
@@ -869,7 +869,7 @@
visit_end_alternate(v, (void **) &alt);
}
-static int print_pci_devfn(Object *obj, Property *prop, char *dest,
+static int print_pci_devfn(Object *obj, const Property *prop, char *dest,
size_t len)
{
int32_t *ptr = object_field_prop_ptr(obj, prop);
@@ -895,7 +895,7 @@
static void get_pci_host_devaddr(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
PCIHostDeviceAddress *addr = object_field_prop_ptr(obj, prop);
char buffer[] = "ffff:ff:ff.f";
char *p = buffer;
@@ -921,7 +921,7 @@
static void set_pci_host_devaddr(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
PCIHostDeviceAddress *addr = object_field_prop_ptr(obj, prop);
char *str, *p;
char *e;
@@ -1011,7 +1011,7 @@
static void get_prop_pcielinkspeed(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
PCIExpLinkSpeed *p = object_field_prop_ptr(obj, prop);
int speed;
@@ -1045,7 +1045,7 @@
static void set_prop_pcielinkspeed(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
PCIExpLinkSpeed *p = object_field_prop_ptr(obj, prop);
int speed;
@@ -1093,7 +1093,7 @@
static void get_prop_pcielinkwidth(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
PCIExpLinkWidth *p = object_field_prop_ptr(obj, prop);
int width;
@@ -1130,7 +1130,7 @@
static void set_prop_pcielinkwidth(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
PCIExpLinkWidth *p = object_field_prop_ptr(obj, prop);
int width;
@@ -1181,7 +1181,7 @@
static void get_uuid(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
QemuUUID *uuid = object_field_prop_ptr(obj, prop);
char buffer[UUID_STR_LEN];
char *p = buffer;
@@ -1196,7 +1196,7 @@
static void set_uuid(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
QemuUUID *uuid = object_field_prop_ptr(obj, prop);
char *str;
diff --git a/hw/core/qdev-properties.c b/hw/core/qdev-properties.c
index 315196b..434a76f 100644
--- a/hw/core/qdev-properties.c
+++ b/hw/core/qdev-properties.c
@@ -51,7 +51,7 @@
}
}
-void *object_field_prop_ptr(Object *obj, Property *prop)
+void *object_field_prop_ptr(Object *obj, const Property *prop)
{
void *ptr = obj;
ptr += prop->offset;
@@ -61,7 +61,7 @@
static void field_prop_get(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
return prop->info->get(obj, v, name, opaque, errp);
}
@@ -78,7 +78,7 @@
static void field_prop_set(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
if (!qdev_prop_allow_set(obj, name, prop->info, errp)) {
return;
@@ -100,7 +100,7 @@
void qdev_propinfo_get_enum(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
int *ptr = object_field_prop_ptr(obj, prop);
visit_type_enum(v, name, ptr, prop->info->enum_table, errp);
@@ -109,7 +109,7 @@
void qdev_propinfo_set_enum(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
int *ptr = object_field_prop_ptr(obj, prop);
visit_type_enum(v, name, ptr, prop->info->enum_table, errp);
@@ -131,13 +131,13 @@
/* Bit */
-static uint32_t qdev_get_prop_mask(Property *prop)
+static uint32_t qdev_get_prop_mask(const Property *prop)
{
assert(prop->info == &qdev_prop_bit);
return 0x1 << prop->bitnr;
}
-static void bit_prop_set(Object *obj, Property *props, bool val)
+static void bit_prop_set(Object *obj, const Property *props, bool val)
{
uint32_t *p = object_field_prop_ptr(obj, props);
uint32_t mask = qdev_get_prop_mask(props);
@@ -151,7 +151,7 @@
static void prop_get_bit(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint32_t *p = object_field_prop_ptr(obj, prop);
bool value = (*p & qdev_get_prop_mask(prop)) != 0;
@@ -161,7 +161,7 @@
static void prop_set_bit(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
bool value;
if (!visit_type_bool(v, name, &value, errp)) {
@@ -185,13 +185,13 @@
/* Bit64 */
-static uint64_t qdev_get_prop_mask64(Property *prop)
+static uint64_t qdev_get_prop_mask64(const Property *prop)
{
assert(prop->info == &qdev_prop_bit64);
return 0x1ull << prop->bitnr;
}
-static void bit64_prop_set(Object *obj, Property *props, bool val)
+static void bit64_prop_set(Object *obj, const Property *props, bool val)
{
uint64_t *p = object_field_prop_ptr(obj, props);
uint64_t mask = qdev_get_prop_mask64(props);
@@ -205,7 +205,7 @@
static void prop_get_bit64(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint64_t *p = object_field_prop_ptr(obj, prop);
bool value = (*p & qdev_get_prop_mask64(prop)) != 0;
@@ -215,7 +215,7 @@
static void prop_set_bit64(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
bool value;
if (!visit_type_bool(v, name, &value, errp)) {
@@ -237,7 +237,7 @@
static void get_bool(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
bool *ptr = object_field_prop_ptr(obj, prop);
visit_type_bool(v, name, ptr, errp);
@@ -246,7 +246,7 @@
static void set_bool(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
bool *ptr = object_field_prop_ptr(obj, prop);
visit_type_bool(v, name, ptr, errp);
@@ -264,7 +264,7 @@
static void get_uint8(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint8_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_uint8(v, name, ptr, errp);
@@ -273,7 +273,7 @@
static void set_uint8(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint8_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_uint8(v, name, ptr, errp);
@@ -303,7 +303,7 @@
static void get_uint16(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint16_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_uint16(v, name, ptr, errp);
@@ -312,7 +312,7 @@
static void set_uint16(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint16_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_uint16(v, name, ptr, errp);
@@ -330,7 +330,7 @@
static void get_uint32(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint32_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_uint32(v, name, ptr, errp);
@@ -339,7 +339,7 @@
static void set_uint32(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint32_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_uint32(v, name, ptr, errp);
@@ -348,7 +348,7 @@
void qdev_propinfo_get_int32(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
int32_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_int32(v, name, ptr, errp);
@@ -357,7 +357,7 @@
static void set_int32(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
int32_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_int32(v, name, ptr, errp);
@@ -382,7 +382,7 @@
static void get_uint64(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint64_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_uint64(v, name, ptr, errp);
@@ -391,7 +391,7 @@
static void set_uint64(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint64_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_uint64(v, name, ptr, errp);
@@ -400,7 +400,7 @@
static void get_int64(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
int64_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_int64(v, name, ptr, errp);
@@ -409,7 +409,7 @@
static void set_int64(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
int64_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_int64(v, name, ptr, errp);
@@ -432,7 +432,7 @@
static void set_uint64_checkmask(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint64_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_uint64(v, name, ptr, errp);
@@ -452,14 +452,14 @@
static void release_string(Object *obj, const char *name, void *opaque)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
g_free(*(char **)object_field_prop_ptr(obj, prop));
}
static void get_string(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
char **ptr = object_field_prop_ptr(obj, prop);
if (!*ptr) {
@@ -473,7 +473,7 @@
static void set_string(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
char **ptr = object_field_prop_ptr(obj, prop);
char *str;
@@ -507,7 +507,7 @@
void qdev_propinfo_get_size32(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint32_t *ptr = object_field_prop_ptr(obj, prop);
uint64_t value = *ptr;
@@ -517,7 +517,7 @@
static void set_size32(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint32_t *ptr = object_field_prop_ptr(obj, prop);
uint64_t value;
@@ -557,7 +557,7 @@
* specific element of the array. Arrays are backed by an uint32_t length field
* and an element array. @elem points at an element in this element array.
*/
-static Property array_elem_prop(Object *obj, Property *parent_prop,
+static Property array_elem_prop(Object *obj, const Property *parent_prop,
const char *name, char *elem)
{
return (Property) {
@@ -582,7 +582,7 @@
*/
static void release_prop_array(Object *obj, const char *name, void *opaque)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint32_t *alenptr = object_field_prop_ptr(obj, prop);
void **arrayptr = (void *)obj + prop->arrayoffset;
char *elem = *arrayptr;
@@ -609,7 +609,7 @@
void *opaque, Error **errp)
{
ERRP_GUARD();
- Property *prop = opaque;
+ const Property *prop = opaque;
uint32_t *alenptr = object_field_prop_ptr(obj, prop);
void **arrayptr = (void *)obj + prop->arrayoffset;
ArrayElementList *list, *elem, *next;
@@ -685,7 +685,7 @@
void *opaque, Error **errp)
{
ERRP_GUARD();
- Property *prop = opaque;
+ const Property *prop = opaque;
uint32_t *alenptr = object_field_prop_ptr(obj, prop);
void **arrayptr = (void *)obj + prop->arrayoffset;
char *elemptr = *arrayptr;
@@ -749,16 +749,13 @@
/* --- public helpers --- */
-static const Property *qdev_prop_walk(const Property *props, const char *name)
+static const Property *qdev_prop_walk(DeviceClass *cls, const char *name)
{
- if (!props) {
- return NULL;
- }
- while (props->name) {
- if (strcmp(props->name, name) == 0) {
- return props;
+ for (int i = 0, n = cls->props_count_; i < n; ++i) {
+ const Property *prop = &cls->props_[i];
+ if (strcmp(prop->name, name) == 0) {
+ return prop;
}
- props++;
}
return NULL;
}
@@ -771,7 +768,7 @@
/* device properties */
class = object_get_class(OBJECT(dev));
do {
- prop = qdev_prop_walk(DEVICE_CLASS(class)->props_, name);
+ prop = qdev_prop_walk(DEVICE_CLASS(class), name);
if (prop) {
return prop;
}
@@ -931,7 +928,7 @@
static void get_size(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint64_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_size(v, name, ptr, errp);
@@ -940,7 +937,7 @@
static void set_size(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint64_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_size(v, name, ptr, errp);
@@ -1023,7 +1020,7 @@
const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
char buffer[1024];
char *ptr = buffer;
@@ -1061,12 +1058,18 @@
NULL, NULL, (Property *)prop);
}
-void device_class_set_props(DeviceClass *dc, const Property *props)
+void device_class_set_props_n(DeviceClass *dc, const Property *props, size_t n)
{
- const Property *prop;
+ /* We used a hole in DeviceClass because that's still a lot. */
+ assert(n <= UINT16_MAX);
+ assert(n != 0);
dc->props_ = props;
- for (prop = props; prop && prop->name; prop++) {
+ dc->props_count_ = n;
+
+ for (size_t i = 0; i < n; ++i) {
+ const Property *prop = &props[i];
+ assert(prop->name);
qdev_class_add_legacy_property(dc, prop);
qdev_class_add_property(dc, prop->name, prop);
}
diff --git a/hw/core/qdev.c b/hw/core/qdev.c
index 5f13111..57c1d9d 100644
--- a/hw/core/qdev.c
+++ b/hw/core/qdev.c
@@ -703,6 +703,7 @@
* so do not propagate them to the subclasses.
*/
klass->props_ = NULL;
+ klass->props_count_ = 0;
}
static void device_unparent(Object *obj)
diff --git a/hw/core/split-irq.c b/hw/core/split-irq.c
index 40fc7e2..fc12274 100644
--- a/hw/core/split-irq.c
+++ b/hw/core/split-irq.c
@@ -61,7 +61,6 @@
static const Property split_irq_properties[] = {
DEFINE_PROP_UINT16("num-lines", SplitIRQ, num_lines, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void split_irq_class_init(ObjectClass *klass, void *data)
diff --git a/hw/cpu/a15mpcore.c b/hw/cpu/a15mpcore.c
index 5346b8b..bad4483 100644
--- a/hw/cpu/a15mpcore.c
+++ b/hw/cpu/a15mpcore.c
@@ -153,7 +153,6 @@
* Other boards may differ and should set this property appropriately.
*/
DEFINE_PROP_UINT32("num-irq", A15MPPrivState, num_irq, 160),
- DEFINE_PROP_END_OF_LIST(),
};
static void a15mp_priv_class_init(ObjectClass *klass, void *data)
diff --git a/hw/cpu/a9mpcore.c b/hw/cpu/a9mpcore.c
index c3fdfb9..9671585 100644
--- a/hw/cpu/a9mpcore.c
+++ b/hw/cpu/a9mpcore.c
@@ -167,7 +167,6 @@
* Other boards may differ and should set this property appropriately.
*/
DEFINE_PROP_UINT32("num-irq", A9MPPrivState, num_irq, 96),
- DEFINE_PROP_END_OF_LIST(),
};
static void a9mp_priv_class_init(ObjectClass *klass, void *data)
diff --git a/hw/cpu/arm11mpcore.c b/hw/cpu/arm11mpcore.c
index 193fc18..94861a0 100644
--- a/hw/cpu/arm11mpcore.c
+++ b/hw/cpu/arm11mpcore.c
@@ -142,7 +142,6 @@
* has more IRQ lines than the kernel expects.
*/
DEFINE_PROP_UINT32("num-irq", ARM11MPCorePriveState, num_irq, 64),
- DEFINE_PROP_END_OF_LIST(),
};
static void mpcore_priv_class_init(ObjectClass *klass, void *data)
diff --git a/hw/cpu/cluster.c b/hw/cpu/cluster.c
index 8e43621..9da5221 100644
--- a/hw/cpu/cluster.c
+++ b/hw/cpu/cluster.c
@@ -27,7 +27,6 @@
static const Property cpu_cluster_properties[] = {
DEFINE_PROP_UINT32("cluster-id", CPUClusterState, cluster_id, 0),
- DEFINE_PROP_END_OF_LIST()
};
typedef struct CallbackData {
diff --git a/hw/cpu/realview_mpcore.c b/hw/cpu/realview_mpcore.c
index 9a0ff1d..4268735 100644
--- a/hw/cpu/realview_mpcore.c
+++ b/hw/cpu/realview_mpcore.c
@@ -110,7 +110,6 @@
static const Property mpcore_rirq_properties[] = {
DEFINE_PROP_UINT32("num-cpu", mpcore_rirq_state, num_cpu, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void mpcore_rirq_class_init(ObjectClass *klass, void *data)
diff --git a/hw/cxl/switch-mailbox-cci.c b/hw/cxl/switch-mailbox-cci.c
index 3fde0f8..65cdac6 100644
--- a/hw/cxl/switch-mailbox-cci.c
+++ b/hw/cxl/switch-mailbox-cci.c
@@ -68,7 +68,6 @@
static const Property cxl_switch_cci_props[] = {
DEFINE_PROP_LINK("target", CSWMBCCIDev,
target, TYPE_CXL_USP, PCIDevice *),
- DEFINE_PROP_END_OF_LIST(),
};
static void cswmbcci_class_init(ObjectClass *oc, void *data)
diff --git a/hw/display/artist.c b/hw/display/artist.c
index 49deed3..8b719b1 100644
--- a/hw/display/artist.c
+++ b/hw/display/artist.c
@@ -1478,7 +1478,6 @@
DEFINE_PROP_UINT16("width", ARTISTState, width, 1280),
DEFINE_PROP_UINT16("height", ARTISTState, height, 1024),
DEFINE_PROP_UINT16("depth", ARTISTState, depth, 8),
- DEFINE_PROP_END_OF_LIST(),
};
static void artist_reset(DeviceState *qdev)
diff --git a/hw/display/ati.c b/hw/display/ati.c
index e24e092..864fa4f 100644
--- a/hw/display/ati.c
+++ b/hw/display/ati.c
@@ -1047,7 +1047,6 @@
DEFINE_PROP_BOOL("guest_hwcursor", ATIVGAState, cursor_guest_mode, false),
/* this is a debug option, prefer PROP_UINT over PROP_BIT for simplicity */
DEFINE_PROP_UINT8("x-pixman", ATIVGAState, use_pixman, DEFAULT_X_PIXMAN),
- DEFINE_PROP_END_OF_LIST()
};
static void ati_vga_class_init(ObjectClass *klass, void *data)
diff --git a/hw/display/bcm2835_fb.c b/hw/display/bcm2835_fb.c
index 2539fcc..a5bded5 100644
--- a/hw/display/bcm2835_fb.c
+++ b/hw/display/bcm2835_fb.c
@@ -440,7 +440,6 @@
initial_config.pixo, 1), /* 1=RGB, 0=BGR */
DEFINE_PROP_UINT32("alpha", BCM2835FBState,
initial_config.alpha, 2), /* alpha ignored */
- DEFINE_PROP_END_OF_LIST()
};
static void bcm2835_fb_class_init(ObjectClass *klass, void *data)
diff --git a/hw/display/bochs-display.c b/hw/display/bochs-display.c
index 9a3263a..086f7a0 100644
--- a/hw/display/bochs-display.c
+++ b/hw/display/bochs-display.c
@@ -349,7 +349,6 @@
DEFINE_PROP_SIZE("vgamem", BochsDisplayState, vgamem, 16 * MiB),
DEFINE_PROP_BOOL("edid", BochsDisplayState, enable_edid, true),
DEFINE_EDID_PROPERTIES(BochsDisplayState, edid_info),
- DEFINE_PROP_END_OF_LIST(),
};
static void bochs_display_class_init(ObjectClass *klass, void *data)
diff --git a/hw/display/cg3.c b/hw/display/cg3.c
index 75b3312..3f971d8 100644
--- a/hw/display/cg3.c
+++ b/hw/display/cg3.c
@@ -366,7 +366,6 @@
DEFINE_PROP_UINT16("width", CG3State, width, -1),
DEFINE_PROP_UINT16("height", CG3State, height, -1),
DEFINE_PROP_UINT16("depth", CG3State, depth, -1),
- DEFINE_PROP_END_OF_LIST(),
};
static void cg3_class_init(ObjectClass *klass, void *data)
diff --git a/hw/display/cirrus_vga.c b/hw/display/cirrus_vga.c
index 198ed9e..47ca6a7 100644
--- a/hw/display/cirrus_vga.c
+++ b/hw/display/cirrus_vga.c
@@ -2989,7 +2989,6 @@
cirrus_vga.enable_blitter, true),
DEFINE_PROP_BOOL("global-vmstate", struct PCICirrusVGAState,
cirrus_vga.vga.global_vmstate, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void cirrus_vga_class_init(ObjectClass *klass, void *data)
diff --git a/hw/display/cirrus_vga_isa.c b/hw/display/cirrus_vga_isa.c
index d0d1344..60b7fd2 100644
--- a/hw/display/cirrus_vga_isa.c
+++ b/hw/display/cirrus_vga_isa.c
@@ -74,7 +74,6 @@
cirrus_vga.vga.vram_size_mb, 4),
DEFINE_PROP_BOOL("blitter", struct ISACirrusVGAState,
cirrus_vga.enable_blitter, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void isa_cirrus_vga_class_init(ObjectClass *klass, void *data)
diff --git a/hw/display/exynos4210_fimd.c b/hw/display/exynos4210_fimd.c
index 4f097a1..04c864a 100644
--- a/hw/display/exynos4210_fimd.c
+++ b/hw/display/exynos4210_fimd.c
@@ -1928,7 +1928,6 @@
static const Property exynos4210_fimd_properties[] = {
DEFINE_PROP_LINK("framebuffer-memory", Exynos4210fimdState, fbmem,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void exynos4210_fimd_init(Object *obj)
diff --git a/hw/display/g364fb.c b/hw/display/g364fb.c
index a7533c6..30b5ea6 100644
--- a/hw/display/g364fb.c
+++ b/hw/display/g364fb.c
@@ -514,7 +514,6 @@
static const Property g364fb_sysbus_properties[] = {
DEFINE_PROP_UINT32("vram_size", G364SysBusState, g364.vram_size, 8 * MiB),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_g364fb_sysbus = {
diff --git a/hw/display/i2c-ddc.c b/hw/display/i2c-ddc.c
index a2d1f2b..d8ab9ee 100644
--- a/hw/display/i2c-ddc.c
+++ b/hw/display/i2c-ddc.c
@@ -97,7 +97,6 @@
static const Property i2c_ddc_properties[] = {
DEFINE_EDID_PROPERTIES(I2CDDCState, edid_info),
- DEFINE_PROP_END_OF_LIST(),
};
static void i2c_ddc_class_init(ObjectClass *oc, void *data)
diff --git a/hw/display/macfb.c b/hw/display/macfb.c
index 977901b..e83fc86 100644
--- a/hw/display/macfb.c
+++ b/hw/display/macfb.c
@@ -764,7 +764,6 @@
DEFINE_PROP_UINT8("depth", MacfbSysBusState, macfb.depth, 8),
DEFINE_PROP_UINT8("display", MacfbSysBusState, macfb.type,
MACFB_DISPLAY_VGA),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_macfb_sysbus = {
@@ -783,7 +782,6 @@
DEFINE_PROP_UINT8("depth", MacfbNubusState, macfb.depth, 8),
DEFINE_PROP_UINT8("display", MacfbNubusState, macfb.type,
MACFB_DISPLAY_VGA),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_macfb_nubus = {
diff --git a/hw/display/pl110.c b/hw/display/pl110.c
index eca00b4..4d4f477 100644
--- a/hw/display/pl110.c
+++ b/hw/display/pl110.c
@@ -538,7 +538,6 @@
static const Property pl110_properties[] = {
DEFINE_PROP_LINK("framebuffer-memory", PL110State, fbmem,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void pl110_realize(DeviceState *dev, Error **errp)
diff --git a/hw/display/qxl.c b/hw/display/qxl.c
index 949949d..f3b1be7 100644
--- a/hw/display/qxl.c
+++ b/hw/display/qxl.c
@@ -2475,7 +2475,6 @@
DEFINE_PROP_UINT32("xres", PCIQXLDevice, xres, 0),
DEFINE_PROP_UINT32("yres", PCIQXLDevice, yres, 0),
DEFINE_PROP_BOOL("global-vmstate", PCIQXLDevice, vga.global_vmstate, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void qxl_pci_class_init(ObjectClass *klass, void *data)
diff --git a/hw/display/ramfb-standalone.c b/hw/display/ramfb-standalone.c
index e677f44..6c35028 100644
--- a/hw/display/ramfb-standalone.c
+++ b/hw/display/ramfb-standalone.c
@@ -62,7 +62,6 @@
static const Property ramfb_properties[] = {
DEFINE_PROP_BOOL("x-migrate", RAMFBStandaloneState, migrate, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void ramfb_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/display/sm501.c b/hw/display/sm501.c
index 446b648..09edcf8 100644
--- a/hw/display/sm501.c
+++ b/hw/display/sm501.c
@@ -2058,7 +2058,6 @@
DEFINE_PROP_UINT32("vram-size", SM501SysBusState, vram_size, 0),
/* this a debug option, prefer PROP_UINT over PROP_BIT for simplicity */
DEFINE_PROP_UINT8("x-pixman", SM501SysBusState, state.use_pixman, DEFAULT_X_PIXMAN),
- DEFINE_PROP_END_OF_LIST(),
};
static void sm501_reset_sysbus(DeviceState *dev)
@@ -2146,7 +2145,6 @@
static const Property sm501_pci_properties[] = {
DEFINE_PROP_UINT32("vram-size", SM501PCIState, vram_size, 64 * MiB),
DEFINE_PROP_UINT8("x-pixman", SM501PCIState, state.use_pixman, DEFAULT_X_PIXMAN),
- DEFINE_PROP_END_OF_LIST(),
};
static void sm501_reset_pci(DeviceState *dev)
diff --git a/hw/display/tcx.c b/hw/display/tcx.c
index 3eb0a91..2cfc1e8 100644
--- a/hw/display/tcx.c
+++ b/hw/display/tcx.c
@@ -884,7 +884,6 @@
DEFINE_PROP_UINT16("width", TCXState, width, -1),
DEFINE_PROP_UINT16("height", TCXState, height, -1),
DEFINE_PROP_UINT16("depth", TCXState, depth, -1),
- DEFINE_PROP_END_OF_LIST(),
};
static void tcx_class_init(ObjectClass *klass, void *data)
diff --git a/hw/display/vga-isa.c b/hw/display/vga-isa.c
index a6cbf77..2920628 100644
--- a/hw/display/vga-isa.c
+++ b/hw/display/vga-isa.c
@@ -90,7 +90,6 @@
static const Property vga_isa_properties[] = {
DEFINE_PROP_UINT32("vgamem_mb", ISAVGAState, state.vram_size_mb, 8),
- DEFINE_PROP_END_OF_LIST(),
};
static void vga_isa_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/display/vga-mmio.c b/hw/display/vga-mmio.c
index b759efd..1e0c2db 100644
--- a/hw/display/vga-mmio.c
+++ b/hw/display/vga-mmio.c
@@ -114,7 +114,6 @@
static const Property vga_mmio_properties[] = {
DEFINE_PROP_UINT8("it_shift", VGAMmioState, it_shift, 0),
DEFINE_PROP_UINT32("vgamem_mb", VGAMmioState, vga.vram_size_mb, 8),
- DEFINE_PROP_END_OF_LIST(),
};
static void vga_mmio_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/display/vga-pci.c b/hw/display/vga-pci.c
index 3145c44..dd084c2 100644
--- a/hw/display/vga-pci.c
+++ b/hw/display/vga-pci.c
@@ -339,7 +339,6 @@
PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, true),
DEFINE_EDID_PROPERTIES(PCIVGAState, edid_info),
DEFINE_PROP_BOOL("global-vmstate", PCIVGAState, vga.global_vmstate, false),
- DEFINE_PROP_END_OF_LIST(),
};
static const Property secondary_pci_properties[] = {
@@ -349,7 +348,6 @@
DEFINE_PROP_BIT("edid",
PCIVGAState, flags, PCI_VGA_FLAG_ENABLE_EDID, true),
DEFINE_EDID_PROPERTIES(PCIVGAState, edid_info),
- DEFINE_PROP_END_OF_LIST(),
};
static void vga_pci_class_init(ObjectClass *klass, void *data)
diff --git a/hw/display/vhost-user-gpu.c b/hw/display/vhost-user-gpu.c
index a36eddc..12d5c37 100644
--- a/hw/display/vhost-user-gpu.c
+++ b/hw/display/vhost-user-gpu.c
@@ -647,7 +647,6 @@
static const Property vhost_user_gpu_properties[] = {
VIRTIO_GPU_BASE_PROPERTIES(VhostUserGPU, parent_obj.conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void
diff --git a/hw/display/virtio-gpu-gl.c b/hw/display/virtio-gpu-gl.c
index 6f31149..c6609dd 100644
--- a/hw/display/virtio-gpu-gl.c
+++ b/hw/display/virtio-gpu-gl.c
@@ -159,7 +159,6 @@
VIRTIO_GPU_FLAG_STATS_ENABLED, false),
DEFINE_PROP_BIT("venus", VirtIOGPU, parent_obj.conf.flags,
VIRTIO_GPU_FLAG_VENUS_ENABLED, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_gpu_gl_device_unrealize(DeviceState *qdev)
diff --git a/hw/display/virtio-gpu-pci.c b/hw/display/virtio-gpu-pci.c
index 89d27c9..6d78970 100644
--- a/hw/display/virtio-gpu-pci.c
+++ b/hw/display/virtio-gpu-pci.c
@@ -23,7 +23,6 @@
static const Property virtio_gpu_pci_base_properties[] = {
DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_gpu_pci_base_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/display/virtio-gpu-rutabaga.c b/hw/display/virtio-gpu-rutabaga.c
index f6486ac..f6eb294 100644
--- a/hw/display/virtio-gpu-rutabaga.c
+++ b/hw/display/virtio-gpu-rutabaga.c
@@ -1108,7 +1108,6 @@
DEFINE_PROP_STRING("wayland-socket-path", VirtIOGPURutabaga,
wayland_socket_path),
DEFINE_PROP_STRING("wsi", VirtIOGPURutabaga, wsi),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_gpu_rutabaga_class_init(ObjectClass *klass, void *data)
diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c
index 82741d1..c2a74a8 100644
--- a/hw/display/virtio-gpu.c
+++ b/hw/display/virtio-gpu.c
@@ -1682,7 +1682,6 @@
VIRTIO_GPU_FLAG_BLOB_ENABLED, false),
DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0),
DEFINE_PROP_UINT8("x-scanout-vmstate-version", VirtIOGPU, scanout_vmstate_version, 2),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_gpu_class_init(ObjectClass *klass, void *data)
diff --git a/hw/display/virtio-vga.c b/hw/display/virtio-vga.c
index 532e4c6..fefbdb6 100644
--- a/hw/display/virtio-vga.c
+++ b/hw/display/virtio-vga.c
@@ -211,7 +211,6 @@
static const Property virtio_vga_base_properties[] = {
DEFINE_VIRTIO_GPU_PCI_PROPERTIES(VirtIOPCIProxy),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_vga_base_class_init(ObjectClass *klass, void *data)
diff --git a/hw/display/vmware_vga.c b/hw/display/vmware_vga.c
index f49bbf3..2dd661e 100644
--- a/hw/display/vmware_vga.c
+++ b/hw/display/vmware_vga.c
@@ -1337,7 +1337,6 @@
chip.vga.vram_size_mb, 16),
DEFINE_PROP_BOOL("global-vmstate", struct pci_vmsvga_state_s,
chip.vga.global_vmstate, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void vmsvga_class_init(ObjectClass *klass, void *data)
diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c
index 7838f28..1272da0 100644
--- a/hw/display/xlnx_dp.c
+++ b/hw/display/xlnx_dp.c
@@ -1389,7 +1389,6 @@
static const Property xlnx_dp_device_properties[] = {
DEFINE_AUDIO_PROPERTIES(XlnxDPState, aud_card),
- DEFINE_PROP_END_OF_LIST(),
};
static void xlnx_dp_class_init(ObjectClass *oc, void *data)
diff --git a/hw/dma/i82374.c b/hw/dma/i82374.c
index 032afed..9652d47 100644
--- a/hw/dma/i82374.c
+++ b/hw/dma/i82374.c
@@ -141,7 +141,6 @@
static const Property i82374_properties[] = {
DEFINE_PROP_UINT32("iobase", I82374State, iobase, 0x400),
- DEFINE_PROP_END_OF_LIST()
};
static void i82374_class_init(ObjectClass *klass, void *data)
diff --git a/hw/dma/i8257.c b/hw/dma/i8257.c
index 8b04177..74c38d2 100644
--- a/hw/dma/i8257.c
+++ b/hw/dma/i8257.c
@@ -590,7 +590,6 @@
DEFINE_PROP_INT32("page-base", I8257State, page_base, 0x80),
DEFINE_PROP_INT32("pageh-base", I8257State, pageh_base, 0x480),
DEFINE_PROP_INT32("dshift", I8257State, dshift, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void i8257_class_init(ObjectClass *klass, void *data)
diff --git a/hw/dma/pl080.c b/hw/dma/pl080.c
index 3f39282..8a9b073 100644
--- a/hw/dma/pl080.c
+++ b/hw/dma/pl080.c
@@ -411,7 +411,6 @@
static const Property pl080_properties[] = {
DEFINE_PROP_LINK("downstream", PL080State, downstream,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void pl080_class_init(ObjectClass *oc, void *data)
diff --git a/hw/dma/pl330.c b/hw/dma/pl330.c
index d5a0a1c..ffef9eb 100644
--- a/hw/dma/pl330.c
+++ b/hw/dma/pl330.c
@@ -1669,8 +1669,6 @@
DEFINE_PROP_LINK("memory", PL330State, mem_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
-
- DEFINE_PROP_END_OF_LIST(),
};
static void pl330_class_init(ObjectClass *klass, void *data)
diff --git a/hw/dma/xilinx_axidma.c b/hw/dma/xilinx_axidma.c
index f09452d..4bae52a 100644
--- a/hw/dma/xilinx_axidma.c
+++ b/hw/dma/xilinx_axidma.c
@@ -619,7 +619,6 @@
tx_control_dev, TYPE_STREAM_SINK, StreamSink *),
DEFINE_PROP_LINK("dma", XilinxAXIDMA, dma_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void axidma_class_init(ObjectClass *klass, void *data)
diff --git a/hw/dma/xlnx-zdma.c b/hw/dma/xlnx-zdma.c
index 1a63d5f..bb27cb2 100644
--- a/hw/dma/xlnx-zdma.c
+++ b/hw/dma/xlnx-zdma.c
@@ -814,7 +814,6 @@
DEFINE_PROP_UINT32("bus-width", XlnxZDMA, cfg.bus_width, 64),
DEFINE_PROP_LINK("dma", XlnxZDMA, dma_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void zdma_class_init(ObjectClass *klass, void *data)
diff --git a/hw/dma/xlnx_csu_dma.c b/hw/dma/xlnx_csu_dma.c
index d78dc64..f46485a 100644
--- a/hw/dma/xlnx_csu_dma.c
+++ b/hw/dma/xlnx_csu_dma.c
@@ -710,7 +710,6 @@
TYPE_STREAM_SINK, StreamSink *),
DEFINE_PROP_LINK("dma", XlnxCSUDMA, dma_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void xlnx_csu_dma_class_init(ObjectClass *klass, void *data)
diff --git a/hw/gpio/imx_gpio.c b/hw/gpio/imx_gpio.c
index 919d537..898f80f 100644
--- a/hw/gpio/imx_gpio.c
+++ b/hw/gpio/imx_gpio.c
@@ -294,7 +294,6 @@
DEFINE_PROP_BOOL("has-edge-sel", IMXGPIOState, has_edge_sel, true),
DEFINE_PROP_BOOL("has-upper-pin-irq", IMXGPIOState, has_upper_pin_irq,
false),
- DEFINE_PROP_END_OF_LIST(),
};
static void imx_gpio_reset(DeviceState *dev)
diff --git a/hw/gpio/npcm7xx_gpio.c b/hw/gpio/npcm7xx_gpio.c
index db6792b..23e6742 100644
--- a/hw/gpio/npcm7xx_gpio.c
+++ b/hw/gpio/npcm7xx_gpio.c
@@ -395,7 +395,6 @@
DEFINE_PROP_UINT32("reset-osrc", NPCM7xxGPIOState, reset_osrc, 0),
/* Bit n set => pin n has high drive strength by default. */
DEFINE_PROP_UINT32("reset-odsc", NPCM7xxGPIOState, reset_odsc, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void npcm7xx_gpio_class_init(ObjectClass *klass, void *data)
diff --git a/hw/gpio/omap_gpio.c b/hw/gpio/omap_gpio.c
index 03ee9e4..8a9f14b 100644
--- a/hw/gpio/omap_gpio.c
+++ b/hw/gpio/omap_gpio.c
@@ -227,7 +227,6 @@
static const Property omap_gpio_properties[] = {
DEFINE_PROP_INT32("mpu_model", Omap1GpioState, mpu_model, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void omap_gpio_class_init(ObjectClass *klass, void *data)
diff --git a/hw/gpio/pca9552.c b/hw/gpio/pca9552.c
index 427419d..1ac0cf6 100644
--- a/hw/gpio/pca9552.c
+++ b/hw/gpio/pca9552.c
@@ -430,7 +430,6 @@
static const Property pca955x_properties[] = {
DEFINE_PROP_STRING("description", PCA955xState, description),
- DEFINE_PROP_END_OF_LIST(),
};
static void pca955x_class_init(ObjectClass *klass, void *data)
diff --git a/hw/gpio/pca9554.c b/hw/gpio/pca9554.c
index e8b0458..fe03bb4 100644
--- a/hw/gpio/pca9554.c
+++ b/hw/gpio/pca9554.c
@@ -293,7 +293,6 @@
static const Property pca9554_properties[] = {
DEFINE_PROP_STRING("description", PCA9554State, description),
- DEFINE_PROP_END_OF_LIST(),
};
static void pca9554_class_init(ObjectClass *klass, void *data)
diff --git a/hw/gpio/pl061.c b/hw/gpio/pl061.c
index 9b8ca6d..60ce4a7 100644
--- a/hw/gpio/pl061.c
+++ b/hw/gpio/pl061.c
@@ -565,7 +565,6 @@
static const Property pl061_props[] = {
DEFINE_PROP_UINT32("pullups", PL061State, pullups, 0xff),
DEFINE_PROP_UINT32("pulldowns", PL061State, pulldowns, 0x0),
- DEFINE_PROP_END_OF_LIST()
};
static void pl061_class_init(ObjectClass *klass, void *data)
diff --git a/hw/gpio/sifive_gpio.c b/hw/gpio/sifive_gpio.c
index 5603f0c..0d5206a 100644
--- a/hw/gpio/sifive_gpio.c
+++ b/hw/gpio/sifive_gpio.c
@@ -351,7 +351,6 @@
static const Property sifive_gpio_properties[] = {
DEFINE_PROP_UINT32("ngpio", SIFIVEGPIOState, ngpio, SIFIVE_GPIO_PINS),
- DEFINE_PROP_END_OF_LIST(),
};
static void sifive_gpio_realize(DeviceState *dev, Error **errp)
diff --git a/hw/gpio/stm32l4x5_gpio.c b/hw/gpio/stm32l4x5_gpio.c
index d1394f3..f69fc1d 100644
--- a/hw/gpio/stm32l4x5_gpio.c
+++ b/hw/gpio/stm32l4x5_gpio.c
@@ -452,7 +452,6 @@
DEFINE_PROP_UINT32("mode-reset", Stm32l4x5GpioState, moder_reset, 0),
DEFINE_PROP_UINT32("ospeed-reset", Stm32l4x5GpioState, ospeedr_reset, 0),
DEFINE_PROP_UINT32("pupd-reset", Stm32l4x5GpioState, pupdr_reset, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void stm32l4x5_gpio_class_init(ObjectClass *klass, void *data)
diff --git a/hw/hyperv/hv-balloon.c b/hw/hyperv/hv-balloon.c
index 74897b16..c0bf528 100644
--- a/hw/hyperv/hv-balloon.c
+++ b/hw/hyperv/hv-balloon.c
@@ -1741,8 +1741,6 @@
DEFINE_PROP_LINK(HV_BALLOON_MEMDEV_PROP, HvBalloon, hostmem,
TYPE_MEMORY_BACKEND, HostMemoryBackend *),
DEFINE_PROP_UINT64(HV_BALLOON_ADDR_PROP, HvBalloon, addr, 0),
-
- DEFINE_PROP_END_OF_LIST(),
};
static void hv_balloon_class_init(ObjectClass *klass, void *data)
diff --git a/hw/hyperv/syndbg.c b/hw/hyperv/syndbg.c
index 0193add..d3e3917 100644
--- a/hw/hyperv/syndbg.c
+++ b/hw/hyperv/syndbg.c
@@ -370,7 +370,6 @@
DEFINE_PROP_STRING("host_ip", HvSynDbg, host_ip),
DEFINE_PROP_UINT16("host_port", HvSynDbg, host_port, 50000),
DEFINE_PROP_BOOL("use_hcalls", HvSynDbg, use_hcalls, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void hv_syndbg_class_init(ObjectClass *klass, void *data)
diff --git a/hw/hyperv/vmbus.c b/hw/hyperv/vmbus.c
index 3d1f4d1..12a7dc4 100644
--- a/hw/hyperv/vmbus.c
+++ b/hw/hyperv/vmbus.c
@@ -2348,7 +2348,6 @@
static const Property vmbus_dev_props[] = {
DEFINE_PROP_UUID("instanceid", VMBusDevice, instanceid),
- DEFINE_PROP_END_OF_LIST()
};
@@ -2655,7 +2654,6 @@
static const Property vmbus_bridge_props[] = {
DEFINE_PROP_UINT8("irq", VMBusBridge, irq, 7),
- DEFINE_PROP_END_OF_LIST()
};
static void vmbus_bridge_class_init(ObjectClass *klass, void *data)
diff --git a/hw/i2c/aspeed_i2c.c b/hw/i2c/aspeed_i2c.c
index 2ea68c3..a8fbb9f 100644
--- a/hw/i2c/aspeed_i2c.c
+++ b/hw/i2c/aspeed_i2c.c
@@ -1261,7 +1261,6 @@
static const Property aspeed_i2c_properties[] = {
DEFINE_PROP_LINK("dram", AspeedI2CState, dram_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void aspeed_i2c_class_init(ObjectClass *klass, void *data)
@@ -1450,7 +1449,6 @@
DEFINE_PROP_UINT8("bus-id", AspeedI2CBus, id, 0),
DEFINE_PROP_LINK("controller", AspeedI2CBus, controller, TYPE_ASPEED_I2C,
AspeedI2CState *),
- DEFINE_PROP_END_OF_LIST(),
};
static void aspeed_i2c_bus_class_init(ObjectClass *klass, void *data)
diff --git a/hw/i2c/core.c b/hw/i2c/core.c
index 4118d3d..26bb185 100644
--- a/hw/i2c/core.c
+++ b/hw/i2c/core.c
@@ -20,7 +20,6 @@
static const Property i2c_props[] = {
DEFINE_PROP_UINT8("address", struct I2CSlave, address, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static const TypeInfo i2c_bus_info = {
diff --git a/hw/i2c/i2c_mux_pca954x.c b/hw/i2c/i2c_mux_pca954x.c
index 80c570f..779cc4e 100644
--- a/hw/i2c/i2c_mux_pca954x.c
+++ b/hw/i2c/i2c_mux_pca954x.c
@@ -213,7 +213,6 @@
static const Property pca954x_props[] = {
DEFINE_PROP_STRING("name", Pca954xState, name),
- DEFINE_PROP_END_OF_LIST()
};
static void pca954x_class_init(ObjectClass *klass, void *data)
diff --git a/hw/i2c/omap_i2c.c b/hw/i2c/omap_i2c.c
index 172df13..a641db2 100644
--- a/hw/i2c/omap_i2c.c
+++ b/hw/i2c/omap_i2c.c
@@ -513,7 +513,6 @@
static const Property omap_i2c_properties[] = {
DEFINE_PROP_UINT8("revision", OMAPI2CState, revision, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void omap_i2c_class_init(ObjectClass *klass, void *data)
diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
index ca3e62a..be522b5 100644
--- a/hw/i386/amd_iommu.c
+++ b/hw/i386/amd_iommu.c
@@ -1670,7 +1670,6 @@
static const Property amdvi_properties[] = {
DEFINE_PROP_BOOL("xtsup", AMDVIState, xtsup, false),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_amdvi_sysbus = {
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index a5b2683..f81f34d 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -3418,7 +3418,6 @@
DEFINE_PROP_BOOL("dma-drain", IntelIOMMUState, dma_drain, true),
DEFINE_PROP_BOOL("dma-translation", IntelIOMMUState, dma_translation, true),
DEFINE_PROP_BOOL("stale-tm", IntelIOMMUState, stale_tm, false),
- DEFINE_PROP_END_OF_LIST(),
};
/* Read IRTE entry with specific index */
diff --git a/hw/i386/kvm/clock.c b/hw/i386/kvm/clock.c
index 71150ed..f7b49bd 100644
--- a/hw/i386/kvm/clock.c
+++ b/hw/i386/kvm/clock.c
@@ -308,7 +308,6 @@
static const Property kvmclock_properties[] = {
DEFINE_PROP_BOOL("x-mach-use-reliable-get-clock", KVMClockState,
mach_use_reliable_get_clock, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void kvmclock_class_init(ObjectClass *klass, void *data)
diff --git a/hw/i386/kvm/i8254.c b/hw/i386/kvm/i8254.c
index 2933d3f..da5eb60 100644
--- a/hw/i386/kvm/i8254.c
+++ b/hw/i386/kvm/i8254.c
@@ -290,7 +290,6 @@
static const Property kvm_pit_properties[] = {
DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", KVMPITState,
lost_tick_policy, LOST_TICK_POLICY_DELAY),
- DEFINE_PROP_END_OF_LIST(),
};
static void kvm_pit_class_init(ObjectClass *klass, void *data)
diff --git a/hw/i386/kvm/ioapic.c b/hw/i386/kvm/ioapic.c
index 217ff43..73b31df 100644
--- a/hw/i386/kvm/ioapic.c
+++ b/hw/i386/kvm/ioapic.c
@@ -135,7 +135,6 @@
static const Property kvm_ioapic_properties[] = {
DEFINE_PROP_UINT32("gsi_base", KVMIOAPICState, kvm_gsi_base, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void kvm_ioapic_class_init(ObjectClass *klass, void *data)
diff --git a/hw/i386/sgx-epc.c b/hw/i386/sgx-epc.c
index c232e82..875e1c5 100644
--- a/hw/i386/sgx-epc.c
+++ b/hw/i386/sgx-epc.c
@@ -24,7 +24,6 @@
DEFINE_PROP_UINT32(SGX_EPC_NUMA_NODE_PROP, SGXEPCDevice, node, 0),
DEFINE_PROP_LINK(SGX_EPC_MEMDEV_PROP, SGXEPCDevice, hostmem,
TYPE_MEMORY_BACKEND_EPC, HostMemoryBackendEpc *),
- DEFINE_PROP_END_OF_LIST(),
};
static void sgx_epc_get_size(Object *obj, Visitor *v, const char *name,
diff --git a/hw/i386/vmmouse.c b/hw/i386/vmmouse.c
index da9c35c..3e07d12 100644
--- a/hw/i386/vmmouse.c
+++ b/hw/i386/vmmouse.c
@@ -319,7 +319,6 @@
static const Property vmmouse_properties[] = {
DEFINE_PROP_LINK("i8042", VMMouseState, i8042, TYPE_I8042, ISAKBDState *),
- DEFINE_PROP_END_OF_LIST(),
};
static void vmmouse_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/i386/vmport.c b/hw/i386/vmport.c
index cab6e72..2096686 100644
--- a/hw/i386/vmport.c
+++ b/hw/i386/vmport.c
@@ -284,8 +284,6 @@
* 5 - ACE 1.x (Deprecated)
*/
DEFINE_PROP_UINT8("vmware-vmx-type", VMPortState, vmware_vmx_type, 2),
-
- DEFINE_PROP_END_OF_LIST(),
};
static void vmport_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c
index 155f626..e5ec60e 100644
--- a/hw/i386/x86-iommu.c
+++ b/hw/i386/x86-iommu.c
@@ -130,7 +130,6 @@
intr_supported, ON_OFF_AUTO_AUTO),
DEFINE_PROP_BOOL("device-iotlb", X86IOMMUState, dt_supported, false),
DEFINE_PROP_BOOL("pt", X86IOMMUState, pt_supported, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void x86_iommu_class_init(ObjectClass *klass, void *data)
diff --git a/hw/i386/xen/xen_pvdevice.c b/hw/i386/xen/xen_pvdevice.c
index e71483e..9453da9 100644
--- a/hw/i386/xen/xen_pvdevice.c
+++ b/hw/i386/xen/xen_pvdevice.c
@@ -120,7 +120,6 @@
DEFINE_PROP_UINT16("device-id", XenPVDevice, device_id, 0xffff),
DEFINE_PROP_UINT8("revision", XenPVDevice, revision, 0x01),
DEFINE_PROP_UINT32("size", XenPVDevice, size, 0x400000),
- DEFINE_PROP_END_OF_LIST()
};
static void xen_pv_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ide/ahci-sysbus.c b/hw/ide/ahci-sysbus.c
index d43db09..03a5bd4 100644
--- a/hw/ide/ahci-sysbus.c
+++ b/hw/ide/ahci-sysbus.c
@@ -62,9 +62,8 @@
ahci_realize(&s->ahci, dev, &address_space_memory);
}
-static Property sysbus_ahci_properties[] = {
+static const Property sysbus_ahci_properties[] = {
DEFINE_PROP_UINT32("num-ports", SysbusAHCIState, ahci.ports, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void sysbus_ahci_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ide/cf.c b/hw/ide/cf.c
index 190914f..cfb4394 100644
--- a/hw/ide/cf.c
+++ b/hw/ide/cf.c
@@ -29,7 +29,6 @@
DEFINE_BLOCK_CHS_PROPERTIES(IDEDrive, dev.conf),
DEFINE_PROP_BIOS_CHS_TRANS("bios-chs-trans",
IDEDrive, dev.chs_trans, BIOS_ATA_TRANSLATION_AUTO),
- DEFINE_PROP_END_OF_LIST(),
};
static void ide_cf_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ide/cmd646.c b/hw/ide/cmd646.c
index 942f6c4..bcc3f34 100644
--- a/hw/ide/cmd646.c
+++ b/hw/ide/cmd646.c
@@ -315,7 +315,6 @@
static const Property cmd646_ide_properties[] = {
DEFINE_PROP_UINT32("secondary", PCIIDEState, secondary, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void cmd646_ide_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ide/ide-dev.c b/hw/ide/ide-dev.c
index cc92531..789056c 100644
--- a/hw/ide/ide-dev.c
+++ b/hw/ide/ide-dev.c
@@ -32,7 +32,6 @@
static const Property ide_props[] = {
DEFINE_PROP_UINT32("unit", IDEDevice, unit, -1),
DEFINE_PROP_BOOL("win2k-install-hack", IDEDevice, win2k_install_hack, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void ide_qdev_realize(DeviceState *qdev, Error **errp)
@@ -197,7 +196,6 @@
DEFINE_PROP_BIOS_CHS_TRANS("bios-chs-trans",
IDEDrive, dev.chs_trans, BIOS_ATA_TRANSLATION_AUTO),
DEFINE_PROP_UINT16("rotation_rate", IDEDrive, dev.rotation_rate, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void ide_hd_class_init(ObjectClass *klass, void *data)
@@ -220,7 +218,6 @@
static const Property ide_cd_properties[] = {
DEFINE_IDE_DEV_PROPERTIES(),
- DEFINE_PROP_END_OF_LIST(),
};
static void ide_cd_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ide/isa.c b/hw/ide/isa.c
index a0a7e48..9a3c2d5 100644
--- a/hw/ide/isa.c
+++ b/hw/ide/isa.c
@@ -105,7 +105,6 @@
DEFINE_PROP_UINT32("iobase", ISAIDEState, iobase, 0x1f0),
DEFINE_PROP_UINT32("iobase2", ISAIDEState, iobase2, 0x3f6),
DEFINE_PROP_UINT32("irq", ISAIDEState, irqnum, 14),
- DEFINE_PROP_END_OF_LIST(),
};
static void isa_ide_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/ide/macio.c b/hw/ide/macio.c
index 25f8403..ecaab77 100644
--- a/hw/ide/macio.c
+++ b/hw/ide/macio.c
@@ -462,7 +462,6 @@
static const Property macio_ide_properties[] = {
DEFINE_PROP_UINT32("channel", MACIOIDEState, channel, 0),
DEFINE_PROP_UINT32("addr", MACIOIDEState, addr, -1),
- DEFINE_PROP_END_OF_LIST(),
};
static void macio_ide_class_init(ObjectClass *oc, void *data)
diff --git a/hw/ide/mmio.c b/hw/ide/mmio.c
index 43ab66f..a1b0fd2 100644
--- a/hw/ide/mmio.c
+++ b/hw/ide/mmio.c
@@ -143,7 +143,6 @@
static const Property mmio_ide_properties[] = {
DEFINE_PROP_UINT32("shift", MMIOIDEState, shift, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void mmio_ide_class_init(ObjectClass *oc, void *data)
diff --git a/hw/input/pckbd.c b/hw/input/pckbd.c
index 24a133f..16ac82e 100644
--- a/hw/input/pckbd.c
+++ b/hw/input/pckbd.c
@@ -738,7 +738,6 @@
static const Property i8042_mmio_properties[] = {
DEFINE_PROP_UINT64("mask", MMIOKBDState, kbd.mask, UINT64_MAX),
DEFINE_PROP_UINT32("size", MMIOKBDState, size, -1),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_kbd_mmio = {
@@ -938,7 +937,6 @@
DEFINE_PROP_BOOL("kbd-throttle", ISAKBDState, kbd_throttle, false),
DEFINE_PROP_UINT8("kbd-irq", ISAKBDState, kbd_irq, 1),
DEFINE_PROP_UINT8("mouse-irq", ISAKBDState, mouse_irq, 12),
- DEFINE_PROP_END_OF_LIST(),
};
static void i8042_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/input/stellaris_gamepad.c b/hw/input/stellaris_gamepad.c
index b1cc693..98382a0 100644
--- a/hw/input/stellaris_gamepad.c
+++ b/hw/input/stellaris_gamepad.c
@@ -80,7 +80,6 @@
static const Property stellaris_gamepad_properties[] = {
DEFINE_PROP_ARRAY("keycodes", StellarisGamepad, num_buttons,
keycodes, qdev_prop_uint32, uint32_t),
- DEFINE_PROP_END_OF_LIST(),
};
static void stellaris_gamepad_class_init(ObjectClass *klass, void *data)
diff --git a/hw/input/virtio-input-hid.c b/hw/input/virtio-input-hid.c
index 7396385..812faae 100644
--- a/hw/input/virtio-input-hid.c
+++ b/hw/input/virtio-input-hid.c
@@ -240,7 +240,6 @@
static const Property virtio_input_hid_properties[] = {
DEFINE_PROP_STRING("display", VirtIOInputHID, display),
DEFINE_PROP_UINT32("head", VirtIOInputHID, head, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_input_hid_class_init(ObjectClass *klass, void *data)
@@ -382,7 +381,6 @@
static const Property virtio_mouse_properties[] = {
DEFINE_PROP_BOOL("wheel-axis", VirtIOInputHID, wheel_axis, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_mouse_class_init(ObjectClass *klass, void *data)
@@ -507,7 +505,6 @@
static const Property virtio_tablet_properties[] = {
DEFINE_PROP_BOOL("wheel-axis", VirtIOInputHID, wheel_axis, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_tablet_class_init(ObjectClass *klass, void *data)
diff --git a/hw/input/virtio-input-host.c b/hw/input/virtio-input-host.c
index 2be2c63..8bfb17f 100644
--- a/hw/input/virtio-input-host.c
+++ b/hw/input/virtio-input-host.c
@@ -223,7 +223,6 @@
static const Property virtio_input_host_properties[] = {
DEFINE_PROP_STRING("evdev", VirtIOInputHost, evdev),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_input_host_class_init(ObjectClass *klass, void *data)
diff --git a/hw/input/virtio-input.c b/hw/input/virtio-input.c
index edcd94d..1394d99 100644
--- a/hw/input/virtio-input.c
+++ b/hw/input/virtio-input.c
@@ -302,7 +302,6 @@
static const Property virtio_input_properties[] = {
DEFINE_PROP_STRING("serial", VirtIOInput, serial),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_input_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index 8be9f22..de8074d 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -414,7 +414,6 @@
true),
DEFINE_PROP_BOOL("legacy-instance-id", APICCommonState, legacy_instance_id,
false),
- DEFINE_PROP_END_OF_LIST(),
};
static void apic_common_get_id(Object *obj, Visitor *v, const char *name,
diff --git a/hw/intc/arm_gic_common.c b/hw/intc/arm_gic_common.c
index e961cd9..50c516f 100644
--- a/hw/intc/arm_gic_common.c
+++ b/hw/intc/arm_gic_common.c
@@ -360,7 +360,6 @@
/* True if the GIC should implement the virtualization extensions */
DEFINE_PROP_BOOL("has-virtualization-extensions", GICState, virt_extn, 0),
DEFINE_PROP_UINT32("num-priority-bits", GICState, n_prio_bits, 8),
- DEFINE_PROP_END_OF_LIST(),
};
static void arm_gic_common_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/arm_gicv2m.c b/hw/intc/arm_gicv2m.c
index ffa830b..ae389fe 100644
--- a/hw/intc/arm_gicv2m.c
+++ b/hw/intc/arm_gicv2m.c
@@ -173,7 +173,6 @@
static const Property gicv2m_properties[] = {
DEFINE_PROP_UINT32("base-spi", ARMGICv2mState, base_spi, 0),
DEFINE_PROP_UINT32("num-spi", ARMGICv2mState, num_spi, 64),
- DEFINE_PROP_END_OF_LIST(),
};
static void gicv2m_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c
index a8ec615..53e7a25 100644
--- a/hw/intc/arm_gicv3_common.c
+++ b/hw/intc/arm_gicv3_common.c
@@ -621,7 +621,6 @@
redist_region_count, qdev_prop_uint32, uint32_t),
DEFINE_PROP_LINK("sysmem", GICv3State, dma, TYPE_MEMORY_REGION,
MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void arm_gicv3_common_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/arm_gicv3_its.c b/hw/intc/arm_gicv3_its.c
index 0de7643..936368c 100644
--- a/hw/intc/arm_gicv3_its.c
+++ b/hw/intc/arm_gicv3_its.c
@@ -2005,7 +2005,6 @@
static const Property gicv3_its_props[] = {
DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState, gicv3, "arm-gicv3",
GICv3State *),
- DEFINE_PROP_END_OF_LIST(),
};
static void gicv3_its_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c
index 68a6144..3d9150a 100644
--- a/hw/intc/arm_gicv3_its_kvm.c
+++ b/hw/intc/arm_gicv3_its_kvm.c
@@ -237,7 +237,6 @@
static const Property kvm_arm_its_props[] = {
DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState, gicv3, "kvm-arm-gicv3",
GICv3State *),
- DEFINE_PROP_END_OF_LIST(),
};
static void kvm_arm_its_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c
index 6e2803b..a30f318 100644
--- a/hw/intc/armv7m_nvic.c
+++ b/hw/intc/armv7m_nvic.c
@@ -2577,7 +2577,6 @@
* to use a reasonable default.
*/
DEFINE_PROP_UINT8("num-prio-bits", NVICState, num_prio_bits, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void armv7m_nvic_reset(DeviceState *dev)
diff --git a/hw/intc/exynos4210_combiner.c b/hw/intc/exynos4210_combiner.c
index 221dfa9..6ddbcd4 100644
--- a/hw/intc/exynos4210_combiner.c
+++ b/hw/intc/exynos4210_combiner.c
@@ -327,7 +327,6 @@
static const Property exynos4210_combiner_properties[] = {
DEFINE_PROP_UINT32("external", Exynos4210CombinerState, external, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void exynos4210_combiner_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c
index e1b956d..01a5393 100644
--- a/hw/intc/exynos4210_gic.c
+++ b/hw/intc/exynos4210_gic.c
@@ -113,7 +113,6 @@
static const Property exynos4210_gic_properties[] = {
DEFINE_PROP_UINT32("num-cpu", Exynos4210GicState, num_cpu, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void exynos4210_gic_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/goldfish_pic.c b/hw/intc/goldfish_pic.c
index f5343c9..aa5162c 100644
--- a/hw/intc/goldfish_pic.c
+++ b/hw/intc/goldfish_pic.c
@@ -183,7 +183,6 @@
static const Property goldfish_pic_properties[] = {
DEFINE_PROP_UINT8("index", GoldfishPICState, idx, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void goldfish_pic_class_init(ObjectClass *oc, void *data)
diff --git a/hw/intc/grlib_irqmp.c b/hw/intc/grlib_irqmp.c
index bf53251..95cdb41 100644
--- a/hw/intc/grlib_irqmp.c
+++ b/hw/intc/grlib_irqmp.c
@@ -378,7 +378,6 @@
static const Property grlib_irqmp_properties[] = {
DEFINE_PROP_UINT32("ncpus", IRQMP, ncpus, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void grlib_irqmp_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/i8259_common.c b/hw/intc/i8259_common.c
index c3174f4..c77ff68 100644
--- a/hw/intc/i8259_common.c
+++ b/hw/intc/i8259_common.c
@@ -198,7 +198,6 @@
DEFINE_PROP_UINT32("elcr_addr", PICCommonState, elcr_addr, -1),
DEFINE_PROP_UINT8("elcr_mask", PICCommonState, elcr_mask, -1),
DEFINE_PROP_BIT("master", PICCommonState, master, 0, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void pic_common_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/ioapic.c b/hw/intc/ioapic.c
index 6d56616..bfc8cb7 100644
--- a/hw/intc/ioapic.c
+++ b/hw/intc/ioapic.c
@@ -478,7 +478,6 @@
static const Property ioapic_properties[] = {
DEFINE_PROP_UINT8("version", IOAPICCommonState, version, IOAPIC_VER_DEF),
- DEFINE_PROP_END_OF_LIST(),
};
static void ioapic_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
index dd91f89..4a1a7c3 100644
--- a/hw/intc/loongarch_extioi.c
+++ b/hw/intc/loongarch_extioi.c
@@ -10,16 +10,13 @@
#include "qemu/log.h"
#include "qapi/error.h"
#include "hw/irq.h"
-#include "hw/sysbus.h"
#include "hw/loongarch/virt.h"
-#include "hw/qdev-properties.h"
#include "exec/address-spaces.h"
#include "hw/intc/loongarch_extioi.h"
-#include "migration/vmstate.h"
#include "trace.h"
-static void extioi_update_irq(LoongArchExtIOI *s, int irq, int level)
+static void extioi_update_irq(LoongArchExtIOICommonState *s, int irq, int level)
{
int ipnum, cpu, found, irq_index, irq_mask;
@@ -54,7 +51,7 @@
static void extioi_setirq(void *opaque, int irq, int level)
{
- LoongArchExtIOI *s = LOONGARCH_EXTIOI(opaque);
+ LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI_COMMON(opaque);
trace_loongarch_extioi_setirq(irq, level);
if (level) {
set_bit32(irq, s->isr);
@@ -67,7 +64,7 @@
static MemTxResult extioi_readw(void *opaque, hwaddr addr, uint64_t *data,
unsigned size, MemTxAttrs attrs)
{
- LoongArchExtIOI *s = LOONGARCH_EXTIOI(opaque);
+ LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI_COMMON(opaque);
unsigned long offset = addr & 0xffff;
uint32_t index, cpu;
@@ -106,7 +103,7 @@
return MEMTX_OK;
}
-static inline void extioi_enable_irq(LoongArchExtIOI *s, int index,\
+static inline void extioi_enable_irq(LoongArchExtIOICommonState *s, int index,\
uint32_t mask, int level)
{
uint32_t val;
@@ -125,8 +122,8 @@
}
}
-static inline void extioi_update_sw_coremap(LoongArchExtIOI *s, int irq,
- uint64_t val, bool notify)
+static inline void extioi_update_sw_coremap(LoongArchExtIOICommonState *s,
+ int irq, uint64_t val, bool notify)
{
int i, cpu;
@@ -162,8 +159,8 @@
}
}
-static inline void extioi_update_sw_ipmap(LoongArchExtIOI *s, int index,
- uint64_t val)
+static inline void extioi_update_sw_ipmap(LoongArchExtIOICommonState *s,
+ int index, uint64_t val)
{
int i;
uint8_t ipnum;
@@ -186,7 +183,7 @@
uint64_t val, unsigned size,
MemTxAttrs attrs)
{
- LoongArchExtIOI *s = LOONGARCH_EXTIOI(opaque);
+ LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI_COMMON(opaque);
int cpu, index, old_data, irq;
uint32_t offset;
@@ -266,7 +263,7 @@
static MemTxResult extioi_virt_readw(void *opaque, hwaddr addr, uint64_t *data,
unsigned size, MemTxAttrs attrs)
{
- LoongArchExtIOI *s = LOONGARCH_EXTIOI(opaque);
+ LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI_COMMON(opaque);
switch (addr) {
case EXTIOI_VIRT_FEATURES:
@@ -286,7 +283,7 @@
uint64_t val, unsigned size,
MemTxAttrs attrs)
{
- LoongArchExtIOI *s = LOONGARCH_EXTIOI(opaque);
+ LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI_COMMON(opaque);
switch (addr) {
case EXTIOI_VIRT_FEATURES:
@@ -320,12 +317,15 @@
static void loongarch_extioi_realize(DeviceState *dev, Error **errp)
{
- LoongArchExtIOI *s = LOONGARCH_EXTIOI(dev);
+ LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI_COMMON(dev);
+ LoongArchExtIOIClass *lec = LOONGARCH_EXTIOI_GET_CLASS(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+ Error *local_err = NULL;
int i, pin;
- if (s->num_cpu == 0) {
- error_setg(errp, "num-cpu must be at least 1");
+ lec->parent_realize(dev, &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
return;
}
@@ -360,23 +360,23 @@
}
}
-static void loongarch_extioi_finalize(Object *obj)
+static void loongarch_extioi_unrealize(DeviceState *dev)
{
- LoongArchExtIOI *s = LOONGARCH_EXTIOI(obj);
+ LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI_COMMON(dev);
g_free(s->cpu);
}
static void loongarch_extioi_reset(DeviceState *d)
{
- LoongArchExtIOI *s = LOONGARCH_EXTIOI(d);
+ LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI_COMMON(d);
s->status = 0;
}
static int vmstate_extioi_post_load(void *opaque, int version_id)
{
- LoongArchExtIOI *s = LOONGARCH_EXTIOI(opaque);
+ LoongArchExtIOICommonState *s = LOONGARCH_EXTIOI_COMMON(opaque);
int i, start_irq;
for (i = 0; i < (EXTIOI_IRQS / 4); i++) {
@@ -391,66 +391,28 @@
return 0;
}
-static const VMStateDescription vmstate_extioi_core = {
- .name = "extioi-core",
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (const VMStateField[]) {
- VMSTATE_UINT32_ARRAY(coreisr, ExtIOICore, EXTIOI_IRQS_GROUP_COUNT),
- VMSTATE_END_OF_LIST()
- }
-};
-
-static const VMStateDescription vmstate_loongarch_extioi = {
- .name = TYPE_LOONGARCH_EXTIOI,
- .version_id = 3,
- .minimum_version_id = 3,
- .post_load = vmstate_extioi_post_load,
- .fields = (const VMStateField[]) {
- VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOI, EXTIOI_IRQS_GROUP_COUNT),
- VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOI,
- EXTIOI_IRQS_NODETYPE_COUNT / 2),
- VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOI, EXTIOI_IRQS / 32),
- VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOI, EXTIOI_IRQS / 32),
- VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOI, EXTIOI_IRQS_IPMAP_SIZE / 4),
- VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOI, EXTIOI_IRQS / 4),
-
- VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOI, num_cpu,
- vmstate_extioi_core, ExtIOICore),
- VMSTATE_UINT32(features, LoongArchExtIOI),
- VMSTATE_UINT32(status, LoongArchExtIOI),
- VMSTATE_END_OF_LIST()
- }
-};
-
-static const Property extioi_properties[] = {
- DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOI, num_cpu, 1),
- DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOI, features,
- EXTIOI_HAS_VIRT_EXTENSION, 0),
- DEFINE_PROP_END_OF_LIST(),
-};
-
static void loongarch_extioi_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
+ LoongArchExtIOIClass *lec = LOONGARCH_EXTIOI_CLASS(klass);
+ LoongArchExtIOICommonClass *lecc = LOONGARCH_EXTIOI_COMMON_CLASS(klass);
- dc->realize = loongarch_extioi_realize;
+ device_class_set_parent_realize(dc, loongarch_extioi_realize,
+ &lec->parent_realize);
+ device_class_set_parent_unrealize(dc, loongarch_extioi_unrealize,
+ &lec->parent_unrealize);
device_class_set_legacy_reset(dc, loongarch_extioi_reset);
- device_class_set_props(dc, extioi_properties);
- dc->vmsd = &vmstate_loongarch_extioi;
+ lecc->post_load = vmstate_extioi_post_load;
}
-static const TypeInfo loongarch_extioi_info = {
- .name = TYPE_LOONGARCH_EXTIOI,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(struct LoongArchExtIOI),
- .class_init = loongarch_extioi_class_init,
- .instance_finalize = loongarch_extioi_finalize,
+static const TypeInfo loongarch_extioi_types[] = {
+ {
+ .name = TYPE_LOONGARCH_EXTIOI,
+ .parent = TYPE_LOONGARCH_EXTIOI_COMMON,
+ .instance_size = sizeof(LoongArchExtIOIState),
+ .class_size = sizeof(LoongArchExtIOIClass),
+ .class_init = loongarch_extioi_class_init,
+ }
};
-static void loongarch_extioi_register_types(void)
-{
- type_register_static(&loongarch_extioi_info);
-}
-
-type_init(loongarch_extioi_register_types)
+DEFINE_TYPES(loongarch_extioi_types)
diff --git a/hw/intc/loongarch_extioi_common.c b/hw/intc/loongarch_extioi_common.c
new file mode 100644
index 0000000..e4c1cc3
--- /dev/null
+++ b/hw/intc/loongarch_extioi_common.c
@@ -0,0 +1,112 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Loongson extioi interrupt controller emulation
+ * Copyright (C) 2024 Loongson Technology Corporation Limited
+ */
+#include "qemu/osdep.h"
+#include "qemu/module.h"
+#include "qapi/error.h"
+#include "hw/qdev-properties.h"
+#include "hw/intc/loongarch_extioi_common.h"
+#include "migration/vmstate.h"
+
+static void loongarch_extioi_common_realize(DeviceState *dev, Error **errp)
+{
+ LoongArchExtIOICommonState *s = (LoongArchExtIOICommonState *)dev;
+
+ if (s->num_cpu == 0) {
+ error_setg(errp, "num-cpu must be at least 1");
+ return;
+ }
+}
+
+static int loongarch_extioi_common_pre_save(void *opaque)
+{
+ LoongArchExtIOICommonState *s = (LoongArchExtIOICommonState *)opaque;
+ LoongArchExtIOICommonClass *lecc = LOONGARCH_EXTIOI_COMMON_GET_CLASS(s);
+
+ if (lecc->pre_save) {
+ return lecc->pre_save(s);
+ }
+
+ return 0;
+}
+
+static int loongarch_extioi_common_post_load(void *opaque, int version_id)
+{
+ LoongArchExtIOICommonState *s = (LoongArchExtIOICommonState *)opaque;
+ LoongArchExtIOICommonClass *lecc = LOONGARCH_EXTIOI_COMMON_GET_CLASS(s);
+
+ if (lecc->post_load) {
+ return lecc->post_load(s, version_id);
+ }
+
+ return 0;
+}
+
+static const VMStateDescription vmstate_extioi_core = {
+ .name = "extioi-core",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .fields = (const VMStateField[]) {
+ VMSTATE_UINT32_ARRAY(coreisr, ExtIOICore, EXTIOI_IRQS_GROUP_COUNT),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static const VMStateDescription vmstate_loongarch_extioi = {
+ .name = "loongarch.extioi",
+ .version_id = 3,
+ .minimum_version_id = 3,
+ .pre_save = loongarch_extioi_common_pre_save,
+ .post_load = loongarch_extioi_common_post_load,
+ .fields = (const VMStateField[]) {
+ VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOICommonState,
+ EXTIOI_IRQS_GROUP_COUNT),
+ VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOICommonState,
+ EXTIOI_IRQS_NODETYPE_COUNT / 2),
+ VMSTATE_UINT32_ARRAY(enable, LoongArchExtIOICommonState,
+ EXTIOI_IRQS / 32),
+ VMSTATE_UINT32_ARRAY(isr, LoongArchExtIOICommonState,
+ EXTIOI_IRQS / 32),
+ VMSTATE_UINT32_ARRAY(ipmap, LoongArchExtIOICommonState,
+ EXTIOI_IRQS_IPMAP_SIZE / 4),
+ VMSTATE_UINT32_ARRAY(coremap, LoongArchExtIOICommonState,
+ EXTIOI_IRQS / 4),
+ VMSTATE_STRUCT_VARRAY_POINTER_UINT32(cpu, LoongArchExtIOICommonState,
+ num_cpu, vmstate_extioi_core, ExtIOICore),
+ VMSTATE_UINT32(features, LoongArchExtIOICommonState),
+ VMSTATE_UINT32(status, LoongArchExtIOICommonState),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static const Property extioi_properties[] = {
+ DEFINE_PROP_UINT32("num-cpu", LoongArchExtIOICommonState, num_cpu, 1),
+ DEFINE_PROP_BIT("has-virtualization-extension", LoongArchExtIOICommonState,
+ features, EXTIOI_HAS_VIRT_EXTENSION, 0),
+};
+
+static void loongarch_extioi_common_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ LoongArchExtIOICommonClass *lecc = LOONGARCH_EXTIOI_COMMON_CLASS(klass);
+
+ device_class_set_parent_realize(dc, loongarch_extioi_common_realize,
+ &lecc->parent_realize);
+ device_class_set_props(dc, extioi_properties);
+ dc->vmsd = &vmstate_loongarch_extioi;
+}
+
+static const TypeInfo loongarch_extioi_common_types[] = {
+ {
+ .name = TYPE_LOONGARCH_EXTIOI_COMMON,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(LoongArchExtIOICommonState),
+ .class_size = sizeof(LoongArchExtIOICommonClass),
+ .class_init = loongarch_extioi_common_class_init,
+ .abstract = true,
+ }
+};
+
+DEFINE_TYPES(loongarch_extioi_common_types)
diff --git a/hw/intc/loongarch_pch_msi.c b/hw/intc/loongarch_pch_msi.c
index e2eca30..66b5c1e 100644
--- a/hw/intc/loongarch_pch_msi.c
+++ b/hw/intc/loongarch_pch_msi.c
@@ -86,7 +86,6 @@
static const Property loongarch_msi_properties[] = {
DEFINE_PROP_UINT32("msi_irq_base", LoongArchPCHMSI, irq_base, 0),
DEFINE_PROP_UINT32("msi_irq_num", LoongArchPCHMSI, irq_num, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void loongarch_pch_msi_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/loongarch_pch_pic.c b/hw/intc/loongarch_pch_pic.c
index 6a87b1a..acd75cc 100644
--- a/hw/intc/loongarch_pch_pic.c
+++ b/hw/intc/loongarch_pch_pic.c
@@ -7,17 +7,13 @@
#include "qemu/osdep.h"
#include "qemu/bitops.h"
-#include "hw/sysbus.h"
-#include "hw/loongarch/virt.h"
-#include "hw/pci-host/ls7a.h"
#include "hw/irq.h"
#include "hw/intc/loongarch_pch_pic.h"
-#include "hw/qdev-properties.h"
-#include "migration/vmstate.h"
#include "trace.h"
#include "qapi/error.h"
-static void pch_pic_update_irq(LoongArchPCHPIC *s, uint64_t mask, int level)
+static void pch_pic_update_irq(LoongArchPICCommonState *s, uint64_t mask,
+ int level)
{
uint64_t val;
int irq;
@@ -45,7 +41,7 @@
static void pch_pic_irq_handler(void *opaque, int irq, int level)
{
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
uint64_t mask = 1ULL << irq;
assert(irq < s->irq_num);
@@ -78,7 +74,7 @@
static uint64_t loongarch_pch_pic_low_readw(void *opaque, hwaddr addr,
unsigned size)
{
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
uint64_t val = 0;
uint32_t offset = addr & 0xfff;
@@ -136,7 +132,7 @@
static void loongarch_pch_pic_low_writew(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
uint32_t offset, old_valid, data = (uint32_t)value;
uint64_t old, int_mask;
offset = addr & 0xfff;
@@ -208,7 +204,7 @@
static uint64_t loongarch_pch_pic_high_readw(void *opaque, hwaddr addr,
unsigned size)
{
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
uint64_t val = 0;
uint32_t offset = addr & 0xfff;
@@ -236,7 +232,7 @@
static void loongarch_pch_pic_high_writew(void *opaque, hwaddr addr,
uint64_t value, unsigned size)
{
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
uint32_t offset, data = (uint32_t)value;
offset = addr & 0xfff;
@@ -263,7 +259,7 @@
static uint64_t loongarch_pch_pic_readb(void *opaque, hwaddr addr,
unsigned size)
{
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
uint64_t val = 0;
uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET;
int64_t offset_tmp;
@@ -292,7 +288,7 @@
static void loongarch_pch_pic_writeb(void *opaque, hwaddr addr,
uint64_t data, unsigned size)
{
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(opaque);
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(opaque);
int32_t offset_tmp;
uint32_t offset = (addr & 0xfff) + PCH_PIC_ROUTE_ENTRY_OFFSET;
@@ -360,7 +356,7 @@
static void loongarch_pch_pic_reset(DeviceState *d)
{
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(d);
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(d);
int i;
s->int_mask = -1;
@@ -379,30 +375,27 @@
s->int_polarity = 0x0;
}
-static void loongarch_pch_pic_realize(DeviceState *dev, Error **errp)
+static void loongarch_pic_realize(DeviceState *dev, Error **errp)
{
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(dev);
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
+ LoongarchPICClass *lpc = LOONGARCH_PIC_GET_CLASS(dev);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+ Error *local_err = NULL;
- if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) {
- error_setg(errp, "Invalid 'pic_irq_num'");
+ lpc->parent_realize(dev, &local_err);
+ if (local_err) {
+ error_propagate(errp, local_err);
return;
}
qdev_init_gpio_out(dev, s->parent_irq, s->irq_num);
qdev_init_gpio_in(dev, pch_pic_irq_handler, s->irq_num);
-}
-
-static void loongarch_pch_pic_init(Object *obj)
-{
- LoongArchPCHPIC *s = LOONGARCH_PCH_PIC(obj);
- SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
-
- memory_region_init_io(&s->iomem32_low, obj,
+ memory_region_init_io(&s->iomem32_low, OBJECT(dev),
&loongarch_pch_pic_reg32_low_ops,
s, PCH_PIC_NAME(.reg32_part1), 0x100);
- memory_region_init_io(&s->iomem8, obj, &loongarch_pch_pic_reg8_ops,
+ memory_region_init_io(&s->iomem8, OBJECT(dev), &loongarch_pch_pic_reg8_ops,
s, PCH_PIC_NAME(.reg8), 0x2a0);
- memory_region_init_io(&s->iomem32_high, obj,
+ memory_region_init_io(&s->iomem32_high, OBJECT(dev),
&loongarch_pch_pic_reg32_high_ops,
s, PCH_PIC_NAME(.reg32_part2), 0xc60);
sysbus_init_mmio(sbd, &s->iomem32_low);
@@ -411,53 +404,24 @@
}
-static const Property loongarch_pch_pic_properties[] = {
- DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPCHPIC, irq_num, 0),
- DEFINE_PROP_END_OF_LIST(),
-};
+static void loongarch_pic_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ LoongarchPICClass *lpc = LOONGARCH_PIC_CLASS(klass);
-static const VMStateDescription vmstate_loongarch_pch_pic = {
- .name = TYPE_LOONGARCH_PCH_PIC,
- .version_id = 1,
- .minimum_version_id = 1,
- .fields = (const VMStateField[]) {
- VMSTATE_UINT64(int_mask, LoongArchPCHPIC),
- VMSTATE_UINT64(htmsi_en, LoongArchPCHPIC),
- VMSTATE_UINT64(intedge, LoongArchPCHPIC),
- VMSTATE_UINT64(intclr, LoongArchPCHPIC),
- VMSTATE_UINT64(auto_crtl0, LoongArchPCHPIC),
- VMSTATE_UINT64(auto_crtl1, LoongArchPCHPIC),
- VMSTATE_UINT8_ARRAY(route_entry, LoongArchPCHPIC, 64),
- VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPCHPIC, 64),
- VMSTATE_UINT64(last_intirr, LoongArchPCHPIC),
- VMSTATE_UINT64(intirr, LoongArchPCHPIC),
- VMSTATE_UINT64(intisr, LoongArchPCHPIC),
- VMSTATE_UINT64(int_polarity, LoongArchPCHPIC),
- VMSTATE_END_OF_LIST()
+ device_class_set_legacy_reset(dc, loongarch_pch_pic_reset);
+ device_class_set_parent_realize(dc, loongarch_pic_realize,
+ &lpc->parent_realize);
+}
+
+static const TypeInfo loongarch_pic_types[] = {
+ {
+ .name = TYPE_LOONGARCH_PIC,
+ .parent = TYPE_LOONGARCH_PIC_COMMON,
+ .instance_size = sizeof(LoongarchPICState),
+ .class_size = sizeof(LoongarchPICClass),
+ .class_init = loongarch_pic_class_init,
}
};
-static void loongarch_pch_pic_class_init(ObjectClass *klass, void *data)
-{
- DeviceClass *dc = DEVICE_CLASS(klass);
-
- dc->realize = loongarch_pch_pic_realize;
- device_class_set_legacy_reset(dc, loongarch_pch_pic_reset);
- dc->vmsd = &vmstate_loongarch_pch_pic;
- device_class_set_props(dc, loongarch_pch_pic_properties);
-}
-
-static const TypeInfo loongarch_pch_pic_info = {
- .name = TYPE_LOONGARCH_PCH_PIC,
- .parent = TYPE_SYS_BUS_DEVICE,
- .instance_size = sizeof(LoongArchPCHPIC),
- .instance_init = loongarch_pch_pic_init,
- .class_init = loongarch_pch_pic_class_init,
-};
-
-static void loongarch_pch_pic_register_types(void)
-{
- type_register_static(&loongarch_pch_pic_info);
-}
-
-type_init(loongarch_pch_pic_register_types)
+DEFINE_TYPES(loongarch_pic_types)
diff --git a/hw/intc/loongarch_pic_common.c b/hw/intc/loongarch_pic_common.c
new file mode 100644
index 0000000..e7f541d
--- /dev/null
+++ b/hw/intc/loongarch_pic_common.c
@@ -0,0 +1,96 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * QEMU Loongson 7A1000 I/O interrupt controller.
+ * Copyright (C) 2024 Loongson Technology Corporation Limited
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "hw/intc/loongarch_pic_common.h"
+#include "hw/qdev-properties.h"
+#include "migration/vmstate.h"
+
+static int loongarch_pic_pre_save(void *opaque)
+{
+ LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque;
+ LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s);
+
+ if (lpcc->pre_save) {
+ return lpcc->pre_save(s);
+ }
+
+ return 0;
+}
+
+static int loongarch_pic_post_load(void *opaque, int version_id)
+{
+ LoongArchPICCommonState *s = (LoongArchPICCommonState *)opaque;
+ LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_GET_CLASS(s);
+
+ if (lpcc->post_load) {
+ return lpcc->post_load(s, version_id);
+ }
+
+ return 0;
+}
+
+static void loongarch_pic_common_realize(DeviceState *dev, Error **errp)
+{
+ LoongArchPICCommonState *s = LOONGARCH_PIC_COMMON(dev);
+
+ if (!s->irq_num || s->irq_num > VIRT_PCH_PIC_IRQ_NUM) {
+ error_setg(errp, "Invalid 'pic_irq_num'");
+ return;
+ }
+}
+
+static const Property loongarch_pic_common_properties[] = {
+ DEFINE_PROP_UINT32("pch_pic_irq_num", LoongArchPICCommonState, irq_num, 0),
+};
+
+static const VMStateDescription vmstate_loongarch_pic_common = {
+ .name = "loongarch_pch_pic",
+ .version_id = 1,
+ .minimum_version_id = 1,
+ .pre_save = loongarch_pic_pre_save,
+ .post_load = loongarch_pic_post_load,
+ .fields = (const VMStateField[]) {
+ VMSTATE_UINT64(int_mask, LoongArchPICCommonState),
+ VMSTATE_UINT64(htmsi_en, LoongArchPICCommonState),
+ VMSTATE_UINT64(intedge, LoongArchPICCommonState),
+ VMSTATE_UINT64(intclr, LoongArchPICCommonState),
+ VMSTATE_UINT64(auto_crtl0, LoongArchPICCommonState),
+ VMSTATE_UINT64(auto_crtl1, LoongArchPICCommonState),
+ VMSTATE_UINT8_ARRAY(route_entry, LoongArchPICCommonState, 64),
+ VMSTATE_UINT8_ARRAY(htmsi_vector, LoongArchPICCommonState, 64),
+ VMSTATE_UINT64(last_intirr, LoongArchPICCommonState),
+ VMSTATE_UINT64(intirr, LoongArchPICCommonState),
+ VMSTATE_UINT64(intisr, LoongArchPICCommonState),
+ VMSTATE_UINT64(int_polarity, LoongArchPICCommonState),
+ VMSTATE_END_OF_LIST()
+ }
+};
+
+static void loongarch_pic_common_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+ LoongArchPICCommonClass *lpcc = LOONGARCH_PIC_COMMON_CLASS(klass);
+
+ device_class_set_parent_realize(dc, loongarch_pic_common_realize,
+ &lpcc->parent_realize);
+ device_class_set_props(dc, loongarch_pic_common_properties);
+ dc->vmsd = &vmstate_loongarch_pic_common;
+}
+
+static const TypeInfo loongarch_pic_common_types[] = {
+ {
+ .name = TYPE_LOONGARCH_PIC_COMMON,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(LoongArchPICCommonState),
+ .class_size = sizeof(LoongArchPICCommonClass),
+ .class_init = loongarch_pic_common_class_init,
+ .abstract = true,
+ }
+};
+
+DEFINE_TYPES(loongarch_pic_common_types)
diff --git a/hw/intc/loongson_ipi_common.c b/hw/intc/loongson_ipi_common.c
index d3f894a..9a08156 100644
--- a/hw/intc/loongson_ipi_common.c
+++ b/hw/intc/loongson_ipi_common.c
@@ -317,7 +317,6 @@
static const Property ipi_common_properties[] = {
DEFINE_PROP_UINT32("num-cpu", LoongsonIPICommonState, num_cpu, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void loongson_ipi_common_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/m68k_irqc.c b/hw/intc/m68k_irqc.c
index b5d10ab..a82b80f 100644
--- a/hw/intc/m68k_irqc.c
+++ b/hw/intc/m68k_irqc.c
@@ -88,7 +88,6 @@
static const Property m68k_irqc_properties[] = {
DEFINE_PROP_LINK("m68k-cpu", M68KIRQCState, cpu,
TYPE_M68K_CPU, ArchCPU *),
- DEFINE_PROP_END_OF_LIST(),
};
static void m68k_irqc_class_init(ObjectClass *oc, void *data)
diff --git a/hw/intc/meson.build b/hw/intc/meson.build
index 6bfdc4e..510fdfb 100644
--- a/hw/intc/meson.build
+++ b/hw/intc/meson.build
@@ -71,6 +71,6 @@
specific_ss.add(when: 'CONFIG_LOONGSON_IPI_COMMON', if_true: files('loongson_ipi_common.c'))
specific_ss.add(when: 'CONFIG_LOONGSON_IPI', if_true: files('loongson_ipi.c'))
specific_ss.add(when: 'CONFIG_LOONGARCH_IPI', if_true: files('loongarch_ipi.c'))
-specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c'))
+specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_PIC', if_true: files('loongarch_pch_pic.c', 'loongarch_pic_common.c'))
specific_ss.add(when: 'CONFIG_LOONGARCH_PCH_MSI', if_true: files('loongarch_pch_msi.c'))
-specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch_extioi.c'))
+specific_ss.add(when: 'CONFIG_LOONGARCH_EXTIOI', if_true: files('loongarch_extioi.c', 'loongarch_extioi_common.c'))
diff --git a/hw/intc/mips_gic.c b/hw/intc/mips_gic.c
index 996db09..3f50eac 100644
--- a/hw/intc/mips_gic.c
+++ b/hw/intc/mips_gic.c
@@ -441,7 +441,6 @@
static const Property mips_gic_properties[] = {
DEFINE_PROP_UINT32("num-vp", MIPSGICState, num_vps, 1),
DEFINE_PROP_UINT32("num-irq", MIPSGICState, num_irq, 256),
- DEFINE_PROP_END_OF_LIST(),
};
static void mips_gic_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/omap_intc.c b/hw/intc/omap_intc.c
index 28606f1..095a3d5 100644
--- a/hw/intc/omap_intc.c
+++ b/hw/intc/omap_intc.c
@@ -377,7 +377,6 @@
static const Property omap_intc_properties[] = {
DEFINE_PROP_UINT32("size", OMAPIntcState, size, 0x100),
- DEFINE_PROP_END_OF_LIST(),
};
static void omap_intc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/ompic.c b/hw/intc/ompic.c
index 8ee1bd6..42af456 100644
--- a/hw/intc/ompic.c
+++ b/hw/intc/ompic.c
@@ -130,7 +130,6 @@
static const Property or1k_ompic_properties[] = {
DEFINE_PROP_UINT32("num-cpus", OR1KOMPICState, num_cpus, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_or1k_ompic_cpu = {
diff --git a/hw/intc/openpic.c b/hw/intc/openpic.c
index 2257ae2..78a82d0 100644
--- a/hw/intc/openpic.c
+++ b/hw/intc/openpic.c
@@ -1609,7 +1609,6 @@
static const Property openpic_properties[] = {
DEFINE_PROP_UINT32("model", OpenPICState, model, OPENPIC_MODEL_FSL_MPIC_20),
DEFINE_PROP_UINT32("nb_cpus", OpenPICState, nb_cpus, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void openpic_class_init(ObjectClass *oc, void *data)
diff --git a/hw/intc/openpic_kvm.c b/hw/intc/openpic_kvm.c
index 135fe83..3f5d7e5 100644
--- a/hw/intc/openpic_kvm.c
+++ b/hw/intc/openpic_kvm.c
@@ -265,7 +265,6 @@
static const Property kvm_openpic_properties[] = {
DEFINE_PROP_UINT32("model", KVMOpenPICState, model,
OPENPIC_MODEL_FSL_MPIC_20),
- DEFINE_PROP_END_OF_LIST(),
};
static void kvm_openpic_class_init(ObjectClass *oc, void *data)
diff --git a/hw/intc/pnv_xive.c b/hw/intc/pnv_xive.c
index 5816598..fc5b5a9 100644
--- a/hw/intc/pnv_xive.c
+++ b/hw/intc/pnv_xive.c
@@ -2066,7 +2066,6 @@
DEFINE_PROP_UINT64("tm-bar", PnvXive, tm_base, 0),
/* The PnvChip id identifies the XIVE interrupt controller. */
DEFINE_PROP_LINK("chip", PnvXive, chip, TYPE_PNV_CHIP, PnvChip *),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_xive_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/pnv_xive2.c b/hw/intc/pnv_xive2.c
index 5dd3054..ff36d4d 100644
--- a/hw/intc/pnv_xive2.c
+++ b/hw/intc/pnv_xive2.c
@@ -2366,7 +2366,6 @@
DEFINE_PROP_UINT64("config", PnvXive2, config,
PNV_XIVE2_CONFIGURATION),
DEFINE_PROP_LINK("chip", PnvXive2, chip, TYPE_PNV_CHIP, PnvChip *),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_xive2_instance_init(Object *obj)
diff --git a/hw/intc/ppc-uic.c b/hw/intc/ppc-uic.c
index d683413..7de4bf9 100644
--- a/hw/intc/ppc-uic.c
+++ b/hw/intc/ppc-uic.c
@@ -262,7 +262,6 @@
static const Property ppc_uic_properties[] = {
DEFINE_PROP_UINT32("dcr-base", PPCUIC, dcr_base, 0xc0),
DEFINE_PROP_BOOL("use-vectors", PPCUIC, use_vectors, true),
- DEFINE_PROP_END_OF_LIST()
};
static const VMStateDescription ppc_uic_vmstate = {
diff --git a/hw/intc/riscv_aclint.c b/hw/intc/riscv_aclint.c
index db195fb..db374a7 100644
--- a/hw/intc/riscv_aclint.c
+++ b/hw/intc/riscv_aclint.c
@@ -274,7 +274,6 @@
aperture_size, RISCV_ACLINT_DEFAULT_MTIMER_SIZE),
DEFINE_PROP_UINT32("timebase-freq", RISCVAclintMTimerState,
timebase_freq, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void riscv_aclint_mtimer_realize(DeviceState *dev, Error **errp)
@@ -466,7 +465,6 @@
DEFINE_PROP_UINT32("hartid-base", RISCVAclintSwiState, hartid_base, 0),
DEFINE_PROP_UINT32("num-harts", RISCVAclintSwiState, num_harts, 1),
DEFINE_PROP_UINT32("sswi", RISCVAclintSwiState, sswi, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void riscv_aclint_swi_realize(DeviceState *dev, Error **errp)
diff --git a/hw/intc/riscv_aplic.c b/hw/intc/riscv_aplic.c
index 1e4cdb5..2e2f2a4 100644
--- a/hw/intc/riscv_aplic.c
+++ b/hw/intc/riscv_aplic.c
@@ -956,7 +956,6 @@
DEFINE_PROP_UINT32("num-irqs", RISCVAPLICState, num_irqs, 0),
DEFINE_PROP_BOOL("msimode", RISCVAPLICState, msimode, 0),
DEFINE_PROP_BOOL("mmode", RISCVAPLICState, mmode, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_riscv_aplic = {
diff --git a/hw/intc/riscv_imsic.c b/hw/intc/riscv_imsic.c
index adc3615..64b0da6 100644
--- a/hw/intc/riscv_imsic.c
+++ b/hw/intc/riscv_imsic.c
@@ -393,7 +393,6 @@
DEFINE_PROP_UINT32("hartid", RISCVIMSICState, hartid, 0),
DEFINE_PROP_UINT32("num-pages", RISCVIMSICState, num_pages, 0),
DEFINE_PROP_UINT32("num-irqs", RISCVIMSICState, num_irqs, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_riscv_imsic = {
diff --git a/hw/intc/rx_icu.c b/hw/intc/rx_icu.c
index dfe11ad..ca13c5f 100644
--- a/hw/intc/rx_icu.c
+++ b/hw/intc/rx_icu.c
@@ -366,7 +366,6 @@
qdev_prop_uint8, uint8_t),
DEFINE_PROP_ARRAY("trigger-level", RXICUState, nr_sense, init_sense,
qdev_prop_uint8, uint8_t),
- DEFINE_PROP_END_OF_LIST(),
};
static void rxicu_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/s390_flic.c b/hw/intc/s390_flic.c
index 2963bd5..3f3fa93 100644
--- a/hw/intc/s390_flic.c
+++ b/hw/intc/s390_flic.c
@@ -448,7 +448,6 @@
static const Property qemu_s390_flic_properties[] = {
DEFINE_PROP_BOOL("migrate-all-state", QEMUS390FLICState,
migrate_all_state, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void qemu_s390_flic_class_init(ObjectClass *oc, void *data)
@@ -476,7 +475,6 @@
adapter_routes_max_batch, ADAPTER_ROUTES_MAX_GSI),
DEFINE_PROP_BOOL("migration-enabled", S390FLICState,
migration_enabled, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void s390_flic_common_realize(DeviceState *dev, Error **errp)
diff --git a/hw/intc/sifive_plic.c b/hw/intc/sifive_plic.c
index 49895be..52946fb 100644
--- a/hw/intc/sifive_plic.c
+++ b/hw/intc/sifive_plic.c
@@ -444,7 +444,6 @@
DEFINE_PROP_UINT32("context-base", SiFivePLICState, context_base, 0),
DEFINE_PROP_UINT32("context-stride", SiFivePLICState, context_stride, 0),
DEFINE_PROP_UINT32("aperture-size", SiFivePLICState, aperture_size, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void sifive_plic_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/spapr_xive.c b/hw/intc/spapr_xive.c
index 09f643d..897029a 100644
--- a/hw/intc/spapr_xive.c
+++ b/hw/intc/spapr_xive.c
@@ -633,7 +633,6 @@
DEFINE_PROP_UINT64("vc-base", SpaprXive, vc_base, SPAPR_XIVE_VC_BASE),
DEFINE_PROP_UINT64("tm-base", SpaprXive, tm_base, SPAPR_XIVE_TM_BASE),
DEFINE_PROP_UINT8("hv-prio", SpaprXive, hv_prio, 7),
- DEFINE_PROP_END_OF_LIST(),
};
static int spapr_xive_cpu_intc_create(SpaprInterruptController *intc,
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index 81bbfdd..8852b68 100644
--- a/hw/intc/xics.c
+++ b/hw/intc/xics.c
@@ -348,7 +348,6 @@
DEFINE_PROP_LINK(ICP_PROP_XICS, ICPState, xics, TYPE_XICS_FABRIC,
XICSFabric *),
DEFINE_PROP_LINK(ICP_PROP_CPU, ICPState, cs, TYPE_CPU, CPUState *),
- DEFINE_PROP_END_OF_LIST(),
};
static void icp_class_init(ObjectClass *klass, void *data)
@@ -680,7 +679,6 @@
DEFINE_PROP_UINT32("nr-irqs", ICSState, nr_irqs, 0),
DEFINE_PROP_LINK(ICS_PROP_XICS, ICSState, xics, TYPE_XICS_FABRIC,
XICSFabric *),
- DEFINE_PROP_END_OF_LIST(),
};
static void ics_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/xilinx_intc.c b/hw/intc/xilinx_intc.c
index 3e860ab..d99cf567 100644
--- a/hw/intc/xilinx_intc.c
+++ b/hw/intc/xilinx_intc.c
@@ -178,7 +178,6 @@
static const Property xilinx_intc_properties[] = {
DEFINE_PROP_UINT32("kind-of-intr", XpsIntc, c_kind_of_intr, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void xilinx_intc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/xive.c b/hw/intc/xive.c
index 308e574..3cf8780 100644
--- a/hw/intc/xive.c
+++ b/hw/intc/xive.c
@@ -931,7 +931,6 @@
DEFINE_PROP_LINK("cpu", XiveTCTX, cs, TYPE_CPU, CPUState *),
DEFINE_PROP_LINK("presenter", XiveTCTX, xptr, TYPE_XIVE_PRESENTER,
XivePresenter *),
- DEFINE_PROP_END_OF_LIST(),
};
static void xive_tctx_class_init(ObjectClass *klass, void *data)
@@ -1414,7 +1413,6 @@
DEFINE_PROP_UINT8("reset-pq", XiveSource, reset_pq, XIVE_ESB_OFF),
DEFINE_PROP_LINK("xive", XiveSource, xive, TYPE_XIVE_NOTIFIER,
XiveNotifier *),
- DEFINE_PROP_END_OF_LIST(),
};
static void xive_source_class_init(ObjectClass *klass, void *data)
@@ -2005,7 +2003,6 @@
static const Property xive_router_properties[] = {
DEFINE_PROP_LINK("xive-fabric", XiveRouter, xfb,
TYPE_XIVE_FABRIC, XiveFabric *),
- DEFINE_PROP_END_OF_LIST(),
};
static void xive_router_class_init(ObjectClass *klass, void *data)
@@ -2175,7 +2172,6 @@
DEFINE_PROP_UINT32("shift", XiveENDSource, esb_shift, XIVE_ESB_64K),
DEFINE_PROP_LINK("xive", XiveENDSource, xrtr, TYPE_XIVE_ROUTER,
XiveRouter *),
- DEFINE_PROP_END_OF_LIST(),
};
static void xive_end_source_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/xive2.c b/hw/intc/xive2.c
index 3233d3f..07a90c9 100644
--- a/hw/intc/xive2.c
+++ b/hw/intc/xive2.c
@@ -1031,7 +1031,6 @@
static const Property xive2_router_properties[] = {
DEFINE_PROP_LINK("xive-fabric", Xive2Router, xfb,
TYPE_XIVE_FABRIC, XiveFabric *),
- DEFINE_PROP_END_OF_LIST(),
};
static void xive2_router_class_init(ObjectClass *klass, void *data)
@@ -1247,7 +1246,6 @@
DEFINE_PROP_UINT32("shift", Xive2EndSource, esb_shift, XIVE_ESB_64K),
DEFINE_PROP_LINK("xive", Xive2EndSource, xrtr, TYPE_XIVE2_ROUTER,
Xive2Router *),
- DEFINE_PROP_END_OF_LIST(),
};
static void xive2_end_source_class_init(ObjectClass *klass, void *data)
diff --git a/hw/intc/xlnx-pmu-iomod-intc.c b/hw/intc/xlnx-pmu-iomod-intc.c
index 21b9c83..ccdab24 100644
--- a/hw/intc/xlnx-pmu-iomod-intc.c
+++ b/hw/intc/xlnx-pmu-iomod-intc.c
@@ -478,7 +478,6 @@
DEFINE_PROP_UINT32("intc-intr-size", XlnxPMUIOIntc, cfg.intr_size, 0),
DEFINE_PROP_UINT32("intc-level-edge", XlnxPMUIOIntc, cfg.level_edge, 0),
DEFINE_PROP_UINT32("intc-positive", XlnxPMUIOIntc, cfg.positive, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void xlnx_pmu_io_intc_realize(DeviceState *dev, Error **errp)
diff --git a/hw/ipack/ipack.c b/hw/ipack/ipack.c
index 7ffc4ff..ed75f79 100644
--- a/hw/ipack/ipack.c
+++ b/hw/ipack/ipack.c
@@ -75,7 +75,6 @@
static const Property ipack_device_props[] = {
DEFINE_PROP_INT32("slot", IPackDevice, slot, -1),
- DEFINE_PROP_END_OF_LIST()
};
static void ipack_device_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ipmi/ipmi.c b/hw/ipmi/ipmi.c
index 850b3bc..047bb90 100644
--- a/hw/ipmi/ipmi.c
+++ b/hw/ipmi/ipmi.c
@@ -110,7 +110,6 @@
static const Property ipmi_bmc_properties[] = {
DEFINE_PROP_UINT8("slave_addr", IPMIBmc, slave_addr, 0x20),
- DEFINE_PROP_END_OF_LIST(),
};
static void bmc_class_init(ObjectClass *oc, void *data)
diff --git a/hw/ipmi/ipmi_bmc_extern.c b/hw/ipmi/ipmi_bmc_extern.c
index cfec1da..d015500 100644
--- a/hw/ipmi/ipmi_bmc_extern.c
+++ b/hw/ipmi/ipmi_bmc_extern.c
@@ -517,7 +517,6 @@
static const Property ipmi_bmc_extern_properties[] = {
DEFINE_PROP_CHR("chardev", IPMIBmcExtern, chr),
- DEFINE_PROP_END_OF_LIST(),
};
static void ipmi_bmc_extern_class_init(ObjectClass *oc, void *data)
diff --git a/hw/ipmi/ipmi_bmc_sim.c b/hw/ipmi/ipmi_bmc_sim.c
index 8a55893..eb2eecd 100644
--- a/hw/ipmi/ipmi_bmc_sim.c
+++ b/hw/ipmi/ipmi_bmc_sim.c
@@ -2203,7 +2203,6 @@
DEFINE_PROP_UINT32("mfg_id", IPMIBmcSim, mfg_id, 0),
DEFINE_PROP_UINT16("product_id", IPMIBmcSim, product_id, 0),
DEFINE_PROP_UUID_NODEFAULT("guid", IPMIBmcSim, uuid),
- DEFINE_PROP_END_OF_LIST(),
};
static void ipmi_sim_class_init(ObjectClass *oc, void *data)
diff --git a/hw/ipmi/isa_ipmi_bt.c b/hw/ipmi/isa_ipmi_bt.c
index 16062ab..a1b66d5 100644
--- a/hw/ipmi/isa_ipmi_bt.c
+++ b/hw/ipmi/isa_ipmi_bt.c
@@ -138,7 +138,6 @@
static const Property ipmi_isa_properties[] = {
DEFINE_PROP_UINT32("ioport", ISAIPMIBTDevice, bt.io_base, 0xe4),
DEFINE_PROP_INT32("irq", ISAIPMIBTDevice, isairq, 5),
- DEFINE_PROP_END_OF_LIST(),
};
static void isa_ipmi_bt_class_init(ObjectClass *oc, void *data)
diff --git a/hw/ipmi/isa_ipmi_kcs.c b/hw/ipmi/isa_ipmi_kcs.c
index 7e7a376..d9ebdd5 100644
--- a/hw/ipmi/isa_ipmi_kcs.c
+++ b/hw/ipmi/isa_ipmi_kcs.c
@@ -145,7 +145,6 @@
static const Property ipmi_isa_properties[] = {
DEFINE_PROP_UINT32("ioport", ISAIPMIKCSDevice, kcs.io_base, 0xca2),
DEFINE_PROP_INT32("irq", ISAIPMIKCSDevice, isairq, 5),
- DEFINE_PROP_END_OF_LIST(),
};
static void isa_ipmi_kcs_class_init(ObjectClass *oc, void *data)
diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c
index 378244a..0f94378 100644
--- a/hw/isa/lpc_ich9.c
+++ b/hw/isa/lpc_ich9.c
@@ -840,7 +840,6 @@
pm.swsmi_timer_enabled, true),
DEFINE_PROP_BOOL("x-smi-periodic-timer", ICH9LPCState,
pm.periodic_timer_enabled, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void ich9_send_gpe(AcpiDeviceIf *adev, AcpiEventStatusBits ev)
diff --git a/hw/isa/pc87312.c b/hw/isa/pc87312.c
index 7bb2af8..5f58684 100644
--- a/hw/isa/pc87312.c
+++ b/hw/isa/pc87312.c
@@ -330,7 +330,6 @@
static const Property pc87312_properties[] = {
DEFINE_PROP_UINT16("iobase", PC87312State, iobase, 0x398),
DEFINE_PROP_UINT8("config", PC87312State, config, 1),
- DEFINE_PROP_END_OF_LIST()
};
static void pc87312_class_init(ObjectClass *klass, void *data)
diff --git a/hw/isa/piix.c b/hw/isa/piix.c
index 8ec9c63..eabf256 100644
--- a/hw/isa/piix.c
+++ b/hw/isa/piix.c
@@ -415,7 +415,6 @@
DEFINE_PROP_BOOL("has-pit", PIIXState, has_pit, true),
DEFINE_PROP_BOOL("has-usb", PIIXState, has_usb, true),
DEFINE_PROP_BOOL("smm-enabled", PIIXState, smm_enabled, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void pci_piix_class_init(ObjectClass *klass, void *data)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 9a635d1..43a3e0d 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -894,7 +894,7 @@
/* Add Extend I/O Interrupt Controller node */
fdt_add_eiointc_node(lvms, &cpuintc_phandle, &eiointc_phandle);
- pch_pic = qdev_new(TYPE_LOONGARCH_PCH_PIC);
+ pch_pic = qdev_new(TYPE_LOONGARCH_PIC);
num = VIRT_PCH_PIC_IRQ_NUM;
qdev_prop_set_uint32(pch_pic, "pch_pic_irq_num", num);
d = SYS_BUS_DEVICE(pch_pic);
diff --git a/hw/m68k/mcf5206.c b/hw/m68k/mcf5206.c
index 45e5f74..395c49f 100644
--- a/hw/m68k/mcf5206.c
+++ b/hw/m68k/mcf5206.c
@@ -603,7 +603,6 @@
static const Property mcf5206_mbar_properties[] = {
DEFINE_PROP_LINK("m68k-cpu", m5206_mbar_state, cpu,
TYPE_M68K_CPU, M68kCPU *),
- DEFINE_PROP_END_OF_LIST(),
};
static void mcf5206_mbar_class_init(ObjectClass *oc, void *data)
diff --git a/hw/m68k/mcf_intc.c b/hw/m68k/mcf_intc.c
index c24b0b7..008626f 100644
--- a/hw/m68k/mcf_intc.c
+++ b/hw/m68k/mcf_intc.c
@@ -180,7 +180,6 @@
static const Property mcf_intc_properties[] = {
DEFINE_PROP_LINK("m68k-cpu", mcf_intc_state, cpu,
TYPE_M68K_CPU, M68kCPU *),
- DEFINE_PROP_END_OF_LIST(),
};
static void mcf_intc_class_init(ObjectClass *oc, void *data)
diff --git a/hw/m68k/next-cube.c b/hw/m68k/next-cube.c
index a37ce00..e4fb501 100644
--- a/hw/m68k/next-cube.c
+++ b/hw/m68k/next-cube.c
@@ -916,7 +916,6 @@
*/
static const Property next_pc_properties[] = {
DEFINE_PROP_LINK("cpu", NeXTPC, cpu, TYPE_M68K_CPU, M68kCPU *),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription next_rtc_vmstate = {
diff --git a/hw/m68k/q800-glue.c b/hw/m68k/q800-glue.c
index 0d8cb8b..168665b 100644
--- a/hw/m68k/q800-glue.c
+++ b/hw/m68k/q800-glue.c
@@ -205,7 +205,6 @@
*/
static const Property glue_properties[] = {
DEFINE_PROP_LINK("cpu", GLUEState, cpu, TYPE_M68K_CPU, M68kCPU *),
- DEFINE_PROP_END_OF_LIST(),
};
static void glue_finalize(Object *obj)
diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c
index 12205c4..b553c7d 100644
--- a/hw/mem/cxl_type3.c
+++ b/hw/mem/cxl_type3.c
@@ -1234,7 +1234,6 @@
speed, PCIE_LINK_SPEED_32),
DEFINE_PROP_PCIE_LINK_WIDTH("x-width", CXLType3Dev,
width, PCIE_LINK_WIDTH_16),
- DEFINE_PROP_END_OF_LIST(),
};
static uint64_t get_lsa_size(CXLType3Dev *ct3d)
diff --git a/hw/mem/nvdimm.c b/hw/mem/nvdimm.c
index 10506d5..51362cf 100644
--- a/hw/mem/nvdimm.c
+++ b/hw/mem/nvdimm.c
@@ -248,7 +248,6 @@
static const Property nvdimm_properties[] = {
DEFINE_PROP_BOOL(NVDIMM_UNARMED_PROP, NVDIMMDevice, unarmed, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void nvdimm_class_init(ObjectClass *oc, void *data)
diff --git a/hw/mem/pc-dimm.c b/hw/mem/pc-dimm.c
index 49c5f9f..dca3db7 100644
--- a/hw/mem/pc-dimm.c
+++ b/hw/mem/pc-dimm.c
@@ -157,7 +157,6 @@
PC_DIMM_UNASSIGNED_SLOT),
DEFINE_PROP_LINK(PC_DIMM_MEMDEV_PROP, PCDIMMDevice, hostmem,
TYPE_MEMORY_BACKEND, HostMemoryBackend *),
- DEFINE_PROP_END_OF_LIST(),
};
static void pc_dimm_get_size(Object *obj, Visitor *v, const char *name,
diff --git a/hw/mem/sparse-mem.c b/hw/mem/sparse-mem.c
index 8d681ad..375d728 100644
--- a/hw/mem/sparse-mem.c
+++ b/hw/mem/sparse-mem.c
@@ -103,7 +103,6 @@
DEFINE_PROP_UINT64("length", SparseMemState, length, UINT64_MAX),
/* Max amount of actual memory that can be used to back the sparse memory */
DEFINE_PROP_UINT64("maxsize", SparseMemState, maxsize, 10 * MiB),
- DEFINE_PROP_END_OF_LIST(),
};
MemoryRegion *sparse_mem_init(uint64_t addr, uint64_t length)
diff --git a/hw/mips/cps.c b/hw/mips/cps.c
index 1a22086..f8c17f3 100644
--- a/hw/mips/cps.c
+++ b/hw/mips/cps.c
@@ -171,7 +171,6 @@
DEFINE_PROP_UINT32("num-irq", MIPSCPSState, num_irq, 256),
DEFINE_PROP_STRING("cpu-type", MIPSCPSState, cpu_type),
DEFINE_PROP_BOOL("cpu-big-endian", MIPSCPSState, cpu_is_bigendian, false),
- DEFINE_PROP_END_OF_LIST()
};
static void mips_cps_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/a9scu.c b/hw/misc/a9scu.c
index e2d73ed..088d4ad 100644
--- a/hw/misc/a9scu.c
+++ b/hw/misc/a9scu.c
@@ -125,7 +125,6 @@
static const Property a9_scu_properties[] = {
DEFINE_PROP_UINT32("num-cpu", A9SCUState, num_cpu, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void a9_scu_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/allwinner-h3-dramc.c b/hw/misc/allwinner-h3-dramc.c
index 247bf62..13bba26 100644
--- a/hw/misc/allwinner-h3-dramc.c
+++ b/hw/misc/allwinner-h3-dramc.c
@@ -317,7 +317,6 @@
static const Property allwinner_h3_dramc_properties[] = {
DEFINE_PROP_UINT64("ram-addr", AwH3DramCtlState, ram_addr, 0x0),
DEFINE_PROP_UINT32("ram-size", AwH3DramCtlState, ram_size, 256 * MiB),
- DEFINE_PROP_END_OF_LIST()
};
static const VMStateDescription allwinner_h3_dramc_vmstate = {
diff --git a/hw/misc/allwinner-r40-dramc.c b/hw/misc/allwinner-r40-dramc.c
index a51284f..97c3664 100644
--- a/hw/misc/allwinner-r40-dramc.c
+++ b/hw/misc/allwinner-r40-dramc.c
@@ -467,7 +467,6 @@
static const Property allwinner_r40_dramc_properties[] = {
DEFINE_PROP_UINT64("ram-addr", AwR40DramCtlState, ram_addr, 0x0),
DEFINE_PROP_UINT32("ram-size", AwR40DramCtlState, ram_size, 256), /* MiB */
- DEFINE_PROP_END_OF_LIST()
};
static const VMStateDescription allwinner_r40_dramc_vmstate = {
diff --git a/hw/misc/allwinner-sid.c b/hw/misc/allwinner-sid.c
index 3a09dca..042b747 100644
--- a/hw/misc/allwinner-sid.c
+++ b/hw/misc/allwinner-sid.c
@@ -129,7 +129,6 @@
static const Property allwinner_sid_properties[] = {
DEFINE_PROP_UUID_NODEFAULT("identifier", AwSidState, identifier),
- DEFINE_PROP_END_OF_LIST()
};
static const VMStateDescription allwinner_sid_vmstate = {
diff --git a/hw/misc/applesmc.c b/hw/misc/applesmc.c
index 9d0e273..97ea842 100644
--- a/hw/misc/applesmc.c
+++ b/hw/misc/applesmc.c
@@ -354,7 +354,6 @@
DEFINE_PROP_UINT32(APPLESMC_PROP_IO_BASE, AppleSMCState, iobase,
APPLESMC_DEFAULT_IOBASE),
DEFINE_PROP_STRING("osk", AppleSMCState, osk),
- DEFINE_PROP_END_OF_LIST(),
};
static void build_applesmc_aml(AcpiDevAmlIf *adev, Aml *scope)
diff --git a/hw/misc/arm11scu.c b/hw/misc/arm11scu.c
index 37feed9..02493ce 100644
--- a/hw/misc/arm11scu.c
+++ b/hw/misc/arm11scu.c
@@ -77,7 +77,6 @@
static const Property arm11_scu_properties[] = {
DEFINE_PROP_UINT32("num-cpu", ARM11SCUState, num_cpu, 1),
- DEFINE_PROP_END_OF_LIST()
};
static void arm11_scu_class_init(ObjectClass *oc, void *data)
diff --git a/hw/misc/arm_l2x0.c b/hw/misc/arm_l2x0.c
index 9c209f1..39b4642 100644
--- a/hw/misc/arm_l2x0.c
+++ b/hw/misc/arm_l2x0.c
@@ -175,7 +175,6 @@
static const Property l2x0_properties[] = {
DEFINE_PROP_UINT32("cache-type", L2x0State, cache_type, 0x1c100100),
- DEFINE_PROP_END_OF_LIST(),
};
static void l2x0_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/arm_sysctl.c b/hw/misc/arm_sysctl.c
index 69e379f..1c25d51 100644
--- a/hw/misc/arm_sysctl.c
+++ b/hw/misc/arm_sysctl.c
@@ -632,7 +632,6 @@
/* Daughterboard clock reset values (as reported via SYS_CFG) */
DEFINE_PROP_ARRAY("db-clock", arm_sysctl_state, db_num_clocks,
db_clock_reset, qdev_prop_uint32, uint32_t),
- DEFINE_PROP_END_OF_LIST(),
};
static void arm_sysctl_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/armsse-cpuid.c b/hw/misc/armsse-cpuid.c
index b05bcdc..58cb373 100644
--- a/hw/misc/armsse-cpuid.c
+++ b/hw/misc/armsse-cpuid.c
@@ -94,7 +94,6 @@
static const Property armsse_cpuid_props[] = {
DEFINE_PROP_UINT32("CPUID", ARMSSECPUID, cpuid, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void armsse_cpuid_init(Object *obj)
diff --git a/hw/misc/aspeed_hace.c b/hw/misc/aspeed_hace.c
index 5cefbad..e3f7df2 100644
--- a/hw/misc/aspeed_hace.c
+++ b/hw/misc/aspeed_hace.c
@@ -439,7 +439,6 @@
static const Property aspeed_hace_properties[] = {
DEFINE_PROP_LINK("dram", AspeedHACEState, dram_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
diff --git a/hw/misc/aspeed_i3c.c b/hw/misc/aspeed_i3c.c
index 7f5a389..ab39c64 100644
--- a/hw/misc/aspeed_i3c.c
+++ b/hw/misc/aspeed_i3c.c
@@ -325,7 +325,6 @@
static const Property aspeed_i3c_device_properties[] = {
DEFINE_PROP_UINT8("device-id", AspeedI3CDevice, id, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void aspeed_i3c_device_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/aspeed_lpc.c b/hw/misc/aspeed_lpc.c
index bb9066b..228d250 100644
--- a/hw/misc/aspeed_lpc.c
+++ b/hw/misc/aspeed_lpc.c
@@ -456,7 +456,6 @@
static const Property aspeed_lpc_properties[] = {
DEFINE_PROP_UINT32("hicr7", AspeedLPCState, hicr7, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void aspeed_lpc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/aspeed_sbc.c b/hw/misc/aspeed_sbc.c
index b97cf51..e4a6bd1 100644
--- a/hw/misc/aspeed_sbc.c
+++ b/hw/misc/aspeed_sbc.c
@@ -139,7 +139,6 @@
static const Property aspeed_sbc_properties[] = {
DEFINE_PROP_BOOL("emmc-abr", AspeedSBCState, emmc_abr, 0),
DEFINE_PROP_UINT32("signing-settings", AspeedSBCState, signing_settings, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void aspeed_sbc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index ac33b8d..bac1441 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -607,7 +607,6 @@
DEFINE_PROP_UINT32("hw-strap1", AspeedSCUState, hw_strap1, 0),
DEFINE_PROP_UINT32("hw-strap2", AspeedSCUState, hw_strap2, 0),
DEFINE_PROP_UINT32("hw-prot-key", AspeedSCUState, hw_prot_key, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void aspeed_scu_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/aspeed_sdmc.c b/hw/misc/aspeed_sdmc.c
index 4980080..f359640 100644
--- a/hw/misc/aspeed_sdmc.c
+++ b/hw/misc/aspeed_sdmc.c
@@ -297,7 +297,6 @@
static const Property aspeed_sdmc_properties[] = {
DEFINE_PROP_UINT64("max-ram-size", AspeedSDMCState, max_ram_size, 0),
DEFINE_PROP_BOOL("unlocked", AspeedSDMCState, unlocked, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void aspeed_sdmc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
index 1a20cd0..aa14cd9 100644
--- a/hw/misc/bcm2835_cprman.c
+++ b/hw/misc/bcm2835_cprman.c
@@ -780,7 +780,6 @@
static const Property cprman_properties[] = {
DEFINE_PROP_UINT32("xosc-freq-hz", BCM2835CprmanState, xosc_freq, 19200000),
- DEFINE_PROP_END_OF_LIST()
};
static void cprman_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
index 09a6f2c..fde66cd 100644
--- a/hw/misc/bcm2835_property.c
+++ b/hw/misc/bcm2835_property.c
@@ -554,7 +554,6 @@
static const Property bcm2835_property_props[] = {
DEFINE_PROP_UINT32("board-rev", BCM2835PropertyState, board_rev, 0),
DEFINE_PROP_STRING("command-line", BCM2835PropertyState, command_line),
- DEFINE_PROP_END_OF_LIST()
};
static void bcm2835_property_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/debugexit.c b/hw/misc/debugexit.c
index 639a8cc..260537b 100644
--- a/hw/misc/debugexit.c
+++ b/hw/misc/debugexit.c
@@ -59,7 +59,6 @@
static const Property debug_exit_properties[] = {
DEFINE_PROP_UINT32("iobase", ISADebugExitState, iobase, 0x501),
DEFINE_PROP_UINT32("iosize", ISADebugExitState, iosize, 0x02),
- DEFINE_PROP_END_OF_LIST(),
};
static void debug_exit_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/misc/eccmemctl.c b/hw/misc/eccmemctl.c
index 4fc88bd..d7452c4 100644
--- a/hw/misc/eccmemctl.c
+++ b/hw/misc/eccmemctl.c
@@ -327,7 +327,6 @@
static const Property ecc_properties[] = {
DEFINE_PROP_UINT32("version", ECCState, version, -1),
- DEFINE_PROP_END_OF_LIST(),
};
static void ecc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/empty_slot.c b/hw/misc/empty_slot.c
index 79572c5..221ea7c 100644
--- a/hw/misc/empty_slot.c
+++ b/hw/misc/empty_slot.c
@@ -82,7 +82,6 @@
static const Property empty_slot_properties[] = {
DEFINE_PROP_UINT64("size", EmptySlot, size, 0),
DEFINE_PROP_STRING("name", EmptySlot, name),
- DEFINE_PROP_END_OF_LIST(),
};
static void empty_slot_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/iotkit-secctl.c b/hw/misc/iotkit-secctl.c
index abb6a96..04ced35 100644
--- a/hw/misc/iotkit-secctl.c
+++ b/hw/misc/iotkit-secctl.c
@@ -816,7 +816,6 @@
static const Property iotkit_secctl_props[] = {
DEFINE_PROP_UINT32("sse-version", IoTKitSecCtl, sse_version, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void iotkit_secctl_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/iotkit-sysctl.c b/hw/misc/iotkit-sysctl.c
index 23b49d7..57ffdc3 100644
--- a/hw/misc/iotkit-sysctl.c
+++ b/hw/misc/iotkit-sysctl.c
@@ -842,7 +842,6 @@
0x10000000),
DEFINE_PROP_UINT32("INITSVTOR1_RST", IoTKitSysCtl, initsvtor1_rst,
0x10000000),
- DEFINE_PROP_END_OF_LIST()
};
static void iotkit_sysctl_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/iotkit-sysinfo.c b/hw/misc/iotkit-sysinfo.c
index 7d4eea6..75260f7 100644
--- a/hw/misc/iotkit-sysinfo.c
+++ b/hw/misc/iotkit-sysinfo.c
@@ -136,7 +136,6 @@
DEFINE_PROP_UINT32("SYS_CONFIG", IoTKitSysInfo, sys_config, 0),
DEFINE_PROP_UINT32("sse-version", IoTKitSysInfo, sse_version, 0),
DEFINE_PROP_UINT32("IIDR", IoTKitSysInfo, iidr, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void iotkit_sysinfo_init(Object *obj)
diff --git a/hw/misc/ivshmem.c b/hw/misc/ivshmem.c
index 6d735ec..8f9e1f2 100644
--- a/hw/misc/ivshmem.c
+++ b/hw/misc/ivshmem.c
@@ -1026,7 +1026,6 @@
DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF),
DEFINE_PROP_LINK("memdev", IVShmemState, hostmem, TYPE_MEMORY_BACKEND,
HostMemoryBackend *),
- DEFINE_PROP_END_OF_LIST(),
};
static void ivshmem_plain_realize(PCIDevice *dev, Error **errp)
@@ -1083,7 +1082,6 @@
DEFINE_PROP_BIT("ioeventfd", IVShmemState, features, IVSHMEM_IOEVENTFD,
true),
DEFINE_PROP_ON_OFF_AUTO("master", IVShmemState, master, ON_OFF_AUTO_OFF),
- DEFINE_PROP_END_OF_LIST(),
};
static void ivshmem_doorbell_init(Object *obj)
diff --git a/hw/misc/led.c b/hw/misc/led.c
index 76efdbc..9364d99 100644
--- a/hw/misc/led.c
+++ b/hw/misc/led.c
@@ -105,7 +105,6 @@
DEFINE_PROP_STRING("color", LEDState, color),
DEFINE_PROP_STRING("description", LEDState, description),
DEFINE_PROP_BOOL("gpio-active-high", LEDState, gpio_active_high, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void led_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/mac_via.c b/hw/misc/mac_via.c
index a376a2b..5d16bff 100644
--- a/hw/misc/mac_via.c
+++ b/hw/misc/mac_via.c
@@ -1324,7 +1324,6 @@
static const Property mos6522_q800_via1_properties[] = {
DEFINE_PROP_DRIVE("drive", MOS6522Q800VIA1State, blk),
- DEFINE_PROP_END_OF_LIST(),
};
static void mos6522_q800_via1_class_init(ObjectClass *oc, void *data)
diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c
index cfc8afd..270adcb 100644
--- a/hw/misc/macio/cuda.c
+++ b/hw/misc/macio/cuda.c
@@ -556,7 +556,6 @@
static const Property cuda_properties[] = {
DEFINE_PROP_UINT64("timebase-frequency", CUDAState, tb_frequency, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void cuda_class_init(ObjectClass *oc, void *data)
diff --git a/hw/misc/macio/macio.c b/hw/misc/macio/macio.c
index 7e3d5aa..194b152 100644
--- a/hw/misc/macio/macio.c
+++ b/hw/misc/macio/macio.c
@@ -408,7 +408,6 @@
static const Property macio_newworld_properties[] = {
DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false),
DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false),
- DEFINE_PROP_END_OF_LIST()
};
static void macio_newworld_class_init(ObjectClass *oc, void *data)
@@ -424,7 +423,6 @@
static const Property macio_properties[] = {
DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void macio_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/macio/pmu.c b/hw/misc/macio/pmu.c
index 64bf44f..47ebb8e 100644
--- a/hw/misc/macio/pmu.c
+++ b/hw/misc/macio/pmu.c
@@ -762,7 +762,6 @@
static const Property pmu_properties[] = {
DEFINE_PROP_BOOL("has-adb", PMUState, has_adb, true),
- DEFINE_PROP_END_OF_LIST()
};
static void pmu_class_init(ObjectClass *oc, void *data)
diff --git a/hw/misc/mips_cmgcr.c b/hw/misc/mips_cmgcr.c
index 80ca224..95f1991 100644
--- a/hw/misc/mips_cmgcr.c
+++ b/hw/misc/mips_cmgcr.c
@@ -219,7 +219,6 @@
MemoryRegion *),
DEFINE_PROP_LINK("cpc", MIPSGCRState, cpc_mr, TYPE_MEMORY_REGION,
MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void mips_gcr_realize(DeviceState *dev, Error **errp)
diff --git a/hw/misc/mips_cpc.c b/hw/misc/mips_cpc.c
index 86ff0f7..772b8c0 100644
--- a/hw/misc/mips_cpc.c
+++ b/hw/misc/mips_cpc.c
@@ -166,7 +166,6 @@
static const Property mips_cpc_properties[] = {
DEFINE_PROP_UINT32("num-vp", MIPSCPCState, num_vp, 0x1),
DEFINE_PROP_UINT64("vp-start-running", MIPSCPCState, vp_start_running, 0x1),
- DEFINE_PROP_END_OF_LIST(),
};
static void mips_cpc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/mips_itu.c b/hw/misc/mips_itu.c
index d84a7db..2d126eb 100644
--- a/hw/misc/mips_itu.c
+++ b/hw/misc/mips_itu.c
@@ -538,7 +538,6 @@
ITC_FIFO_NUM_MAX),
DEFINE_PROP_UINT32("num-semaphores", MIPSITUState, num_semaphores,
ITC_SEMAPH_NUM_MAX),
- DEFINE_PROP_END_OF_LIST(),
};
static void mips_itu_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/mos6522.c b/hw/misc/mos6522.c
index 0225a58..0b8f6a4 100644
--- a/hw/misc/mos6522.c
+++ b/hw/misc/mos6522.c
@@ -698,7 +698,6 @@
static const Property mos6522_properties[] = {
DEFINE_PROP_UINT64("frequency", MOS6522State, frequency, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void mos6522_class_init(ObjectClass *oc, void *data)
diff --git a/hw/misc/mps2-fpgaio.c b/hw/misc/mps2-fpgaio.c
index 2e8d1c7..d075682 100644
--- a/hw/misc/mps2-fpgaio.c
+++ b/hw/misc/mps2-fpgaio.c
@@ -326,7 +326,6 @@
DEFINE_PROP_UINT32("num-leds", MPS2FPGAIO, num_leds, 2),
DEFINE_PROP_BOOL("has-switches", MPS2FPGAIO, has_switches, false),
DEFINE_PROP_BOOL("has-dbgctrl", MPS2FPGAIO, has_dbgctrl, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void mps2_fpgaio_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/mps2-scc.c b/hw/misc/mps2-scc.c
index f378b75..5f8d6bc 100644
--- a/hw/misc/mps2-scc.c
+++ b/hw/misc/mps2-scc.c
@@ -472,7 +472,6 @@
*/
DEFINE_PROP_ARRAY("oscclk", MPS2SCC, num_oscclk, oscclk_reset,
qdev_prop_uint32, uint32_t),
- DEFINE_PROP_END_OF_LIST(),
};
static void mps2_scc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/msf2-sysreg.c b/hw/misc/msf2-sysreg.c
index 0d7a713..20009ad 100644
--- a/hw/misc/msf2-sysreg.c
+++ b/hw/misc/msf2-sysreg.c
@@ -122,7 +122,6 @@
/* default divisors in Libero GUI */
DEFINE_PROP_UINT8("apb0divisor", MSF2SysregState, apb0div, 2),
DEFINE_PROP_UINT8("apb1divisor", MSF2SysregState, apb1div, 2),
- DEFINE_PROP_END_OF_LIST(),
};
static void msf2_sysreg_realize(DeviceState *dev, Error **errp)
diff --git a/hw/misc/npcm7xx_gcr.c b/hw/misc/npcm7xx_gcr.c
index 17aeaf2..07464a4 100644
--- a/hw/misc/npcm7xx_gcr.c
+++ b/hw/misc/npcm7xx_gcr.c
@@ -232,7 +232,6 @@
static const Property npcm7xx_gcr_properties[] = {
DEFINE_PROP_UINT32("disabled-modules", NPCM7xxGCRState, reset_mdlr, 0),
DEFINE_PROP_UINT32("power-on-straps", NPCM7xxGCRState, reset_pwron, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void npcm7xx_gcr_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/nrf51_rng.c b/hw/misc/nrf51_rng.c
index 2b550a6..1e67acd 100644
--- a/hw/misc/nrf51_rng.c
+++ b/hw/misc/nrf51_rng.c
@@ -224,7 +224,6 @@
period_unfiltered_us, 167),
DEFINE_PROP_UINT16("period_filtered_us", NRF51RNGState,
period_filtered_us, 660),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_rng = {
diff --git a/hw/misc/pci-testdev.c b/hw/misc/pci-testdev.c
index 7927397..ca6a388 100644
--- a/hw/misc/pci-testdev.c
+++ b/hw/misc/pci-testdev.c
@@ -321,7 +321,6 @@
static const Property pci_testdev_properties[] = {
DEFINE_PROP_SIZE("membar", PCITestDevState, membar_size, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void pci_testdev_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/pvpanic-isa.c b/hw/misc/pvpanic-isa.c
index 824a2e4..f9a3156 100644
--- a/hw/misc/pvpanic-isa.c
+++ b/hw/misc/pvpanic-isa.c
@@ -102,7 +102,6 @@
DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_UINT8("events", PVPanicISAState, pvpanic.events,
PVPANIC_EVENTS),
- DEFINE_PROP_END_OF_LIST(),
};
static void pvpanic_isa_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/pvpanic-pci.c b/hw/misc/pvpanic-pci.c
index 1c3eafc..9678423 100644
--- a/hw/misc/pvpanic-pci.c
+++ b/hw/misc/pvpanic-pci.c
@@ -56,7 +56,6 @@
static const Property pvpanic_pci_properties[] = {
DEFINE_PROP_UINT8("events", PVPanicPCIState, pvpanic.events,
PVPANIC_EVENTS),
- DEFINE_PROP_END_OF_LIST(),
};
static void pvpanic_pci_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/sifive_e_aon.c b/hw/misc/sifive_e_aon.c
index c48429b..165e41d 100644
--- a/hw/misc/sifive_e_aon.c
+++ b/hw/misc/sifive_e_aon.c
@@ -292,7 +292,6 @@
static const Property sifive_e_aon_properties[] = {
DEFINE_PROP_UINT64("wdogclk-frequency", SiFiveEAONState, wdogclk_freq,
SIFIVE_E_LFCLK_DEFAULT_FREQ),
- DEFINE_PROP_END_OF_LIST(),
};
static void sifive_e_aon_class_init(ObjectClass *oc, void *data)
diff --git a/hw/misc/sifive_u_otp.c b/hw/misc/sifive_u_otp.c
index 32cd8e8..955134a 100644
--- a/hw/misc/sifive_u_otp.c
+++ b/hw/misc/sifive_u_otp.c
@@ -197,7 +197,6 @@
static const Property sifive_u_otp_properties[] = {
DEFINE_PROP_UINT32("serial", SiFiveUOTPState, serial, 0),
DEFINE_PROP_DRIVE("drive", SiFiveUOTPState, blk),
- DEFINE_PROP_END_OF_LIST(),
};
static void sifive_u_otp_realize(DeviceState *dev, Error **errp)
diff --git a/hw/misc/stm32l4x5_rcc.c b/hw/misc/stm32l4x5_rcc.c
index b61241d..fd8466d 100644
--- a/hw/misc/stm32l4x5_rcc.c
+++ b/hw/misc/stm32l4x5_rcc.c
@@ -1433,7 +1433,6 @@
sai1_extclk_frequency, 0),
DEFINE_PROP_UINT64("sai2_extclk_frequency", Stm32l4x5RccState,
sai2_extclk_frequency, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void stm32l4x5_rcc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/tz-mpc.c b/hw/misc/tz-mpc.c
index b06eb9f..6d827d2 100644
--- a/hw/misc/tz-mpc.c
+++ b/hw/misc/tz-mpc.c
@@ -590,7 +590,6 @@
static const Property tz_mpc_properties[] = {
DEFINE_PROP_LINK("downstream", TZMPC, downstream,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void tz_mpc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/tz-msc.c b/hw/misc/tz-msc.c
index 96413a5..505df4e 100644
--- a/hw/misc/tz-msc.c
+++ b/hw/misc/tz-msc.c
@@ -283,7 +283,6 @@
TYPE_MEMORY_REGION, MemoryRegion *),
DEFINE_PROP_LINK("idau", TZMSC, idau,
TYPE_IDAU_INTERFACE, IDAUInterface *),
- DEFINE_PROP_END_OF_LIST(),
};
static void tz_msc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/tz-ppc.c b/hw/misc/tz-ppc.c
index 1943d8d..1daa54c 100644
--- a/hw/misc/tz-ppc.c
+++ b/hw/misc/tz-ppc.c
@@ -323,7 +323,6 @@
DEFINE_PORT(13),
DEFINE_PORT(14),
DEFINE_PORT(15),
- DEFINE_PROP_END_OF_LIST(),
};
static void tz_ppc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/unimp.c b/hw/misc/unimp.c
index 62e1153..257282a 100644
--- a/hw/misc/unimp.c
+++ b/hw/misc/unimp.c
@@ -73,7 +73,6 @@
static const Property unimp_properties[] = {
DEFINE_PROP_UINT64("size", UnimplementedDeviceState, size, 0),
DEFINE_PROP_STRING("name", UnimplementedDeviceState, name),
- DEFINE_PROP_END_OF_LIST(),
};
static void unimp_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/xlnx-versal-cframe-reg.c b/hw/misc/xlnx-versal-cframe-reg.c
index 8281a9b..8db0f7e 100644
--- a/hw/misc/xlnx-versal-cframe-reg.c
+++ b/hw/misc/xlnx-versal-cframe-reg.c
@@ -737,7 +737,6 @@
cfg.blktype_num_frames[5], 0),
DEFINE_PROP_UINT32("blktype6-frames", XlnxVersalCFrameReg,
cfg.blktype_num_frames[6], 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void cframe_bcast_reg_init(Object *obj)
@@ -802,7 +801,6 @@
TYPE_XLNX_CFI_IF, XlnxCfiIf *),
DEFINE_PROP_LINK("cframe14", XlnxVersalCFrameBcastReg, cfg.cframe[14],
TYPE_XLNX_CFI_IF, XlnxCfiIf *),
- DEFINE_PROP_END_OF_LIST(),
};
static void cframe_reg_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/xlnx-versal-cfu.c b/hw/misc/xlnx-versal-cfu.c
index 7cfdabd..26d06e2 100644
--- a/hw/misc/xlnx-versal-cfu.c
+++ b/hw/misc/xlnx-versal-cfu.c
@@ -457,13 +457,11 @@
TYPE_XLNX_CFI_IF, XlnxCfiIf *),
DEFINE_PROP_LINK("cframe14", XlnxVersalCFUAPB, cfg.cframe[14],
TYPE_XLNX_CFI_IF, XlnxCfiIf *),
- DEFINE_PROP_END_OF_LIST(),
};
static const Property cfu_sfr_props[] = {
DEFINE_PROP_LINK("cfu", XlnxVersalCFUSFR, cfg.cfu,
TYPE_XLNX_VERSAL_CFU_APB, XlnxVersalCFUAPB *),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_cfu_apb = {
diff --git a/hw/misc/xlnx-versal-trng.c b/hw/misc/xlnx-versal-trng.c
index 2f6af4f..dbd9b58 100644
--- a/hw/misc/xlnx-versal-trng.c
+++ b/hw/misc/xlnx-versal-trng.c
@@ -641,7 +641,7 @@
const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint32_t *events = object_field_prop_ptr(obj, prop);
if (!visit_type_uint32(v, name, events, errp)) {
@@ -666,8 +666,6 @@
DEFINE_PROP_UINT32("hw-version", XlnxVersalTRng, hw_version, 0x0200),
DEFINE_PROP("fips-fault-events", XlnxVersalTRng, forced_faults,
trng_prop_fault_events, uint32_t),
-
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_trng = {
diff --git a/hw/misc/xlnx-versal-xramc.c b/hw/misc/xlnx-versal-xramc.c
index a06b9fb..d1e76be 100644
--- a/hw/misc/xlnx-versal-xramc.c
+++ b/hw/misc/xlnx-versal-xramc.c
@@ -220,7 +220,6 @@
static const Property xram_ctrl_properties[] = {
DEFINE_PROP_UINT64("size", XlnxXramCtrl, cfg.size, 1 * MiB),
- DEFINE_PROP_END_OF_LIST(),
};
static void xram_ctrl_class_init(ObjectClass *klass, void *data)
diff --git a/hw/misc/zynq_slcr.c b/hw/misc/zynq_slcr.c
index ffa14ec..f4fa3b1 100644
--- a/hw/misc/zynq_slcr.c
+++ b/hw/misc/zynq_slcr.c
@@ -625,7 +625,6 @@
static const Property zynq_slcr_props[] = {
DEFINE_PROP_UINT8("boot-mode", ZynqSLCRState, boot_mode, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void zynq_slcr_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/allwinner-sun8i-emac.c b/hw/net/allwinner-sun8i-emac.c
index 3f03060..314a28a 100644
--- a/hw/net/allwinner-sun8i-emac.c
+++ b/hw/net/allwinner-sun8i-emac.c
@@ -834,7 +834,6 @@
DEFINE_PROP_UINT8("phy-addr", AwSun8iEmacState, mii_phy_addr, 0),
DEFINE_PROP_LINK("dma-memory", AwSun8iEmacState, dma_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static int allwinner_sun8i_emac_post_load(void *opaque, int version_id)
diff --git a/hw/net/allwinner_emac.c b/hw/net/allwinner_emac.c
index 39c1042..3eb9e09 100644
--- a/hw/net/allwinner_emac.c
+++ b/hw/net/allwinner_emac.c
@@ -465,7 +465,6 @@
static const Property aw_emac_properties[] = {
DEFINE_NIC_PROPERTIES(AwEmacState, conf),
DEFINE_PROP_UINT8("phy-addr", AwEmacState, phy_addr, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_mii = {
diff --git a/hw/net/cadence_gem.c b/hw/net/cadence_gem.c
index 3fce013..0282bd1 100644
--- a/hw/net/cadence_gem.c
+++ b/hw/net/cadence_gem.c
@@ -1799,7 +1799,6 @@
jumbo_max_len, 10240),
DEFINE_PROP_LINK("dma", CadenceGEMState, dma_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void gem_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/can/xlnx-versal-canfd.c b/hw/net/can/xlnx-versal-canfd.c
index 97fa46c..dc242e9 100644
--- a/hw/net/can/xlnx-versal-canfd.c
+++ b/hw/net/can/xlnx-versal-canfd.c
@@ -2052,7 +2052,6 @@
CANFD_DEFAULT_CLOCK),
DEFINE_PROP_LINK("canfdbus", XlnxVersalCANFDState, canfdbus, TYPE_CAN_BUS,
CanBusState *),
- DEFINE_PROP_END_OF_LIST(),
};
static void canfd_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/can/xlnx-zynqmp-can.c b/hw/net/can/xlnx-zynqmp-can.c
index 61c104c..9fbdeea 100644
--- a/hw/net/can/xlnx-zynqmp-can.c
+++ b/hw/net/can/xlnx-zynqmp-can.c
@@ -1174,7 +1174,6 @@
CAN_DEFAULT_CLOCK),
DEFINE_PROP_LINK("canbus", XlnxZynqMPCANState, canbus, TYPE_CAN_BUS,
CanBusState *),
- DEFINE_PROP_END_OF_LIST(),
};
static void xlnx_zynqmp_can_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c
index e3ca119..c80ddb1 100644
--- a/hw/net/dp8393x.c
+++ b/hw/net/dp8393x.c
@@ -937,7 +937,6 @@
TYPE_MEMORY_REGION, MemoryRegion *),
DEFINE_PROP_UINT8("it_shift", dp8393xState, it_shift, 0),
DEFINE_PROP_BOOL("big_endian", dp8393xState, big_endian, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void dp8393x_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/e1000.c b/hw/net/e1000.c
index ef0af31..7348d39 100644
--- a/hw/net/e1000.c
+++ b/hw/net/e1000.c
@@ -1685,7 +1685,6 @@
compat_flags, E1000_FLAG_TSO_BIT, true),
DEFINE_PROP_BIT("init-vet", E1000State,
compat_flags, E1000_FLAG_VET_BIT, true),
- DEFINE_PROP_END_OF_LIST(),
};
typedef struct E1000Info {
diff --git a/hw/net/e1000e.c b/hw/net/e1000e.c
index e2b7576..544a39e 100644
--- a/hw/net/e1000e.c
+++ b/hw/net/e1000e.c
@@ -672,7 +672,6 @@
e1000e_prop_subsys, uint16_t),
DEFINE_PROP_BOOL("init-vet", E1000EState, init_vet, true),
DEFINE_PROP_BOOL("migrate-timadj", E1000EState, timadj, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void e1000e_class_init(ObjectClass *class, void *data)
diff --git a/hw/net/eepro100.c b/hw/net/eepro100.c
index b8cb8d5..5801cb0 100644
--- a/hw/net/eepro100.c
+++ b/hw/net/eepro100.c
@@ -2060,7 +2060,6 @@
static const Property e100_properties[] = {
DEFINE_NIC_PROPERTIES(EEPRO100State, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void eepro100_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/fsl_etsec/etsec.c b/hw/net/fsl_etsec/etsec.c
index 764be2c..781b900 100644
--- a/hw/net/fsl_etsec/etsec.c
+++ b/hw/net/fsl_etsec/etsec.c
@@ -416,7 +416,6 @@
static const Property etsec_properties[] = {
DEFINE_NIC_PROPERTIES(eTSEC, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void etsec_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/ftgmac100.c b/hw/net/ftgmac100.c
index 4adc7fb..40a13d1 100644
--- a/hw/net/ftgmac100.c
+++ b/hw/net/ftgmac100.c
@@ -1258,7 +1258,6 @@
DEFINE_PROP_BOOL("aspeed", FTGMAC100State, aspeed, false),
DEFINE_NIC_PROPERTIES(FTGMAC100State, conf),
DEFINE_PROP_BOOL("dma64", FTGMAC100State, dma64, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void ftgmac100_class_init(ObjectClass *klass, void *data)
@@ -1418,7 +1417,6 @@
static const Property aspeed_mii_properties[] = {
DEFINE_PROP_LINK("nic", AspeedMiiState, nic, TYPE_FTGMAC100,
FTGMAC100State *),
- DEFINE_PROP_END_OF_LIST(),
};
static void aspeed_mii_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/igb.c b/hw/net/igb.c
index ad0f748..ae973f4 100644
--- a/hw/net/igb.c
+++ b/hw/net/igb.c
@@ -594,7 +594,6 @@
static const Property igb_properties[] = {
DEFINE_NIC_PROPERTIES(IGBState, conf),
DEFINE_PROP_BOOL("x-pcie-flr-init", IGBState, has_flr, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void igb_class_init(ObjectClass *class, void *data)
diff --git a/hw/net/imx_fec.c b/hw/net/imx_fec.c
index 9b64968..e0342d9 100644
--- a/hw/net/imx_fec.c
+++ b/hw/net/imx_fec.c
@@ -1229,7 +1229,6 @@
DEFINE_PROP_BOOL("phy-connected", IMXFECState, phy_connected, true),
DEFINE_PROP_LINK("phy-consumer", IMXFECState, phy_consumer, TYPE_IMX_FEC,
IMXFECState *),
- DEFINE_PROP_END_OF_LIST(),
};
static void imx_eth_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/lan9118.c b/hw/net/lan9118.c
index 237e9b9..afee68c 100644
--- a/hw/net/lan9118.c
+++ b/hw/net/lan9118.c
@@ -1307,7 +1307,6 @@
static const Property lan9118_properties[] = {
DEFINE_NIC_PROPERTIES(lan9118_state, conf),
DEFINE_PROP_UINT32("mode_16bit", lan9118_state, mode_16bit, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void lan9118_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/lance.c b/hw/net/lance.c
index 9ed9c94..a0945e1 100644
--- a/hw/net/lance.c
+++ b/hw/net/lance.c
@@ -141,7 +141,6 @@
DEFINE_PROP_LINK("dma", SysBusPCNetState, state.dma_opaque,
TYPE_DEVICE, DeviceState *),
DEFINE_NIC_PROPERTIES(SysBusPCNetState, state.conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void lance_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/lasi_i82596.c b/hw/net/lasi_i82596.c
index 248e384..95f5631 100644
--- a/hw/net/lasi_i82596.c
+++ b/hw/net/lasi_i82596.c
@@ -160,7 +160,6 @@
static const Property lasi_82596_properties[] = {
DEFINE_NIC_PROPERTIES(SysBusI82596State, state.conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void lasi_82596_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/mcf_fec.c b/hw/net/mcf_fec.c
index 55bad4c..d5572a8 100644
--- a/hw/net/mcf_fec.c
+++ b/hw/net/mcf_fec.c
@@ -662,7 +662,6 @@
static const Property mcf_fec_properties[] = {
DEFINE_NIC_PROPERTIES(mcf_fec_state, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void mcf_fec_class_init(ObjectClass *oc, void *data)
diff --git a/hw/net/mipsnet.c b/hw/net/mipsnet.c
index c9ef1be..8852b6f 100644
--- a/hw/net/mipsnet.c
+++ b/hw/net/mipsnet.c
@@ -268,7 +268,6 @@
static const Property mipsnet_properties[] = {
DEFINE_NIC_PROPERTIES(MIPSnetState, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void mipsnet_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/msf2-emac.c b/hw/net/msf2-emac.c
index 8d9015f..80f75f1 100644
--- a/hw/net/msf2-emac.c
+++ b/hw/net/msf2-emac.c
@@ -550,7 +550,6 @@
DEFINE_PROP_LINK("ahb-bus", MSF2EmacState, dma_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
DEFINE_NIC_PROPERTIES(MSF2EmacState, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_msf2_emac = {
diff --git a/hw/net/mv88w8618_eth.c b/hw/net/mv88w8618_eth.c
index ccb1151..a1f51f7 100644
--- a/hw/net/mv88w8618_eth.c
+++ b/hw/net/mv88w8618_eth.c
@@ -375,7 +375,6 @@
DEFINE_NIC_PROPERTIES(mv88w8618_eth_state, conf),
DEFINE_PROP_LINK("dma-memory", mv88w8618_eth_state, dma_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void mv88w8618_eth_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/ne2000-isa.c b/hw/net/ne2000-isa.c
index 1cd070d..c445f2a 100644
--- a/hw/net/ne2000-isa.c
+++ b/hw/net/ne2000-isa.c
@@ -83,7 +83,6 @@
DEFINE_PROP_UINT32("iobase", ISANE2000State, iobase, 0x300),
DEFINE_PROP_UINT32("irq", ISANE2000State, isairq, 9),
DEFINE_NIC_PROPERTIES(ISANE2000State, ne2000.c),
- DEFINE_PROP_END_OF_LIST(),
};
static void isa_ne2000_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/net/ne2000-pci.c b/hw/net/ne2000-pci.c
index 12fa579..929e9a1 100644
--- a/hw/net/ne2000-pci.c
+++ b/hw/net/ne2000-pci.c
@@ -98,7 +98,6 @@
static const Property ne2000_properties[] = {
DEFINE_NIC_PROPERTIES(PCINE2000State, ne2000.c),
- DEFINE_PROP_END_OF_LIST(),
};
static void ne2000_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/npcm7xx_emc.c b/hw/net/npcm7xx_emc.c
index f06e908..cc38080 100644
--- a/hw/net/npcm7xx_emc.c
+++ b/hw/net/npcm7xx_emc.c
@@ -847,7 +847,6 @@
static const Property npcm7xx_emc_properties[] = {
DEFINE_NIC_PROPERTIES(NPCM7xxEMCState, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void npcm7xx_emc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/npcm_gmac.c b/hw/net/npcm_gmac.c
index 1db2930..6d7f839 100644
--- a/hw/net/npcm_gmac.c
+++ b/hw/net/npcm_gmac.c
@@ -914,7 +914,6 @@
static const Property npcm_gmac_properties[] = {
DEFINE_NIC_PROPERTIES(NPCMGMACState, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void npcm_gmac_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/opencores_eth.c b/hw/net/opencores_eth.c
index 003b452..54daab7 100644
--- a/hw/net/opencores_eth.c
+++ b/hw/net/opencores_eth.c
@@ -745,7 +745,6 @@
static const Property open_eth_properties[] = {
DEFINE_NIC_PROPERTIES(OpenEthState, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void open_eth_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/pcnet-pci.c b/hw/net/pcnet-pci.c
index 83ba8cd..b8e9ff9 100644
--- a/hw/net/pcnet-pci.c
+++ b/hw/net/pcnet-pci.c
@@ -254,7 +254,6 @@
static const Property pcnet_properties[] = {
DEFINE_NIC_PROPERTIES(PCIPCNetState, state.conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void pcnet_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/rocker/rocker.c b/hw/net/rocker/rocker.c
index efc2039..aa5d87f 100644
--- a/hw/net/rocker/rocker.c
+++ b/hw/net/rocker/rocker.c
@@ -1468,7 +1468,6 @@
switch_id, 0),
DEFINE_PROP_ARRAY("ports", Rocker, fp_ports,
fp_ports_peers, qdev_prop_netdev, NICPeers),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription rocker_vmsd = {
diff --git a/hw/net/rtl8139.c b/hw/net/rtl8139.c
index 064a73b..3245aa1 100644
--- a/hw/net/rtl8139.c
+++ b/hw/net/rtl8139.c
@@ -3412,7 +3412,6 @@
static const Property rtl8139_properties[] = {
DEFINE_NIC_PROPERTIES(RTL8139State, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void rtl8139_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/smc91c111.c b/hw/net/smc91c111.c
index a853c30..b18d5c2 100644
--- a/hw/net/smc91c111.c
+++ b/hw/net/smc91c111.c
@@ -790,7 +790,6 @@
static const Property smc91c111_properties[] = {
DEFINE_NIC_PROPERTIES(smc91c111_state, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void smc91c111_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/spapr_llan.c b/hw/net/spapr_llan.c
index d381c04..da98a7e 100644
--- a/hw/net/spapr_llan.c
+++ b/hw/net/spapr_llan.c
@@ -791,7 +791,6 @@
DEFINE_NIC_PROPERTIES(SpaprVioVlan, nicconf),
DEFINE_PROP_BIT("use-rx-buffer-pools", SpaprVioVlan,
compat_flags, SPAPRVLAN_FLAG_RX_BUF_POOLS_BIT, true),
- DEFINE_PROP_END_OF_LIST(),
};
static bool spapr_vlan_rx_buffer_pools_needed(void *opaque)
diff --git a/hw/net/stellaris_enet.c b/hw/net/stellaris_enet.c
index 4af1afa..a420732 100644
--- a/hw/net/stellaris_enet.c
+++ b/hw/net/stellaris_enet.c
@@ -499,7 +499,6 @@
static const Property stellaris_enet_properties[] = {
DEFINE_NIC_PROPERTIES(stellaris_enet_state, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void stellaris_enet_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/sungem.c b/hw/net/sungem.c
index bcc7a18..e1c672a 100644
--- a/hw/net/sungem.c
+++ b/hw/net/sungem.c
@@ -1427,7 +1427,6 @@
* override.
*/
DEFINE_PROP_UINT32("phy_addr", SunGEMState, phy_addr, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_sungem = {
diff --git a/hw/net/sunhme.c b/hw/net/sunhme.c
index 86f472f..539e0d5 100644
--- a/hw/net/sunhme.c
+++ b/hw/net/sunhme.c
@@ -179,7 +179,6 @@
static const Property sunhme_properties[] = {
DEFINE_NIC_PROPERTIES(SunHMEState, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void sunhme_reset_tx(SunHMEState *s)
diff --git a/hw/net/tulip.c b/hw/net/tulip.c
index f35b58a..d753dc7 100644
--- a/hw/net/tulip.c
+++ b/hw/net/tulip.c
@@ -1009,7 +1009,6 @@
static const Property tulip_properties[] = {
DEFINE_NIC_PROPERTIES(TULIPState, c),
- DEFINE_PROP_END_OF_LIST(),
};
static void tulip_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/virtio-net.c b/hw/net/virtio-net.c
index 4fd1f9a..e2d3d18 100644
--- a/hw/net/virtio-net.c
+++ b/hw/net/virtio-net.c
@@ -4057,7 +4057,6 @@
VIRTIO_NET_F_GUEST_USO6, true),
DEFINE_PROP_BIT64("host_uso", VirtIONet, host_features,
VIRTIO_NET_F_HOST_USO, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_net_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c
index f69547c..4c77d69 100644
--- a/hw/net/vmxnet3.c
+++ b/hw/net/vmxnet3.c
@@ -2477,7 +2477,6 @@
VMXNET3_COMPAT_FLAG_OLD_MSI_OFFSETS_BIT, false),
DEFINE_PROP_BIT("x-disable-pcie", VMXNET3State, compat_flags,
VMXNET3_COMPAT_FLAG_DISABLE_PCIE_BIT, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void vmxnet3_realize(DeviceState *qdev, Error **errp)
diff --git a/hw/net/xen_nic.c b/hw/net/xen_nic.c
index 5a52591..97ebd9f 100644
--- a/hw/net/xen_nic.c
+++ b/hw/net/xen_nic.c
@@ -558,7 +558,6 @@
static const Property xen_netdev_properties[] = {
DEFINE_NIC_PROPERTIES(XenNetDev, conf),
DEFINE_PROP_INT32("idx", XenNetDev, dev, -1),
- DEFINE_PROP_END_OF_LIST(),
};
static void xen_netdev_class_init(ObjectClass *class, void *data)
diff --git a/hw/net/xgmac.c b/hw/net/xgmac.c
index 6e0f96f..e3cc4c6 100644
--- a/hw/net/xgmac.c
+++ b/hw/net/xgmac.c
@@ -416,7 +416,6 @@
static const Property xgmac_properties[] = {
DEFINE_NIC_PROPERTIES(XgmacState, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void xgmac_enet_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/xilinx_axienet.c b/hw/net/xilinx_axienet.c
index 9d0c618..457952a 100644
--- a/hw/net/xilinx_axienet.c
+++ b/hw/net/xilinx_axienet.c
@@ -1005,7 +1005,6 @@
tx_data_dev, TYPE_STREAM_SINK, StreamSink *),
DEFINE_PROP_LINK("axistream-control-connected", XilinxAXIEnet,
tx_control_dev, TYPE_STREAM_SINK, StreamSink *),
- DEFINE_PROP_END_OF_LIST(),
};
static void xilinx_enet_class_init(ObjectClass *klass, void *data)
diff --git a/hw/net/xilinx_ethlite.c b/hw/net/xilinx_ethlite.c
index 9413731..f3eb2af 100644
--- a/hw/net/xilinx_ethlite.c
+++ b/hw/net/xilinx_ethlite.c
@@ -255,7 +255,6 @@
DEFINE_PROP_UINT32("tx-ping-pong", struct xlx_ethlite, c_tx_pingpong, 1),
DEFINE_PROP_UINT32("rx-ping-pong", struct xlx_ethlite, c_rx_pingpong, 1),
DEFINE_NIC_PROPERTIES(struct xlx_ethlite, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void xilinx_ethlite_class_init(ObjectClass *klass, void *data)
diff --git a/hw/nubus/nubus-bridge.c b/hw/nubus/nubus-bridge.c
index 83893e5..8fe4362 100644
--- a/hw/nubus/nubus-bridge.c
+++ b/hw/nubus/nubus-bridge.c
@@ -26,7 +26,6 @@
static const Property nubus_bridge_properties[] = {
DEFINE_PROP_UINT16("slot-available-mask", NubusBridge,
bus.slot_available_mask, 0xffff),
- DEFINE_PROP_END_OF_LIST()
};
static void nubus_bridge_class_init(ObjectClass *klass, void *data)
diff --git a/hw/nubus/nubus-device.c b/hw/nubus/nubus-device.c
index 7cafc13..6755c3d 100644
--- a/hw/nubus/nubus-device.c
+++ b/hw/nubus/nubus-device.c
@@ -110,7 +110,6 @@
static const Property nubus_device_properties[] = {
DEFINE_PROP_INT32("slot", NubusDevice, slot, -1),
DEFINE_PROP_STRING("romfile", NubusDevice, romfile),
- DEFINE_PROP_END_OF_LIST()
};
static void nubus_device_class_init(ObjectClass *oc, void *data)
diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c
index 33a3062..d9c8dac 100644
--- a/hw/nvme/ctrl.c
+++ b/hw/nvme/ctrl.c
@@ -8965,7 +8965,6 @@
DEFINE_PROP_BOOL("atomic.dn", NvmeCtrl, params.atomic_dn, 0),
DEFINE_PROP_UINT16("atomic.awun", NvmeCtrl, params.atomic_awun, 0),
DEFINE_PROP_UINT16("atomic.awupf", NvmeCtrl, params.atomic_awupf, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void nvme_get_smart_warning(Object *obj, Visitor *v, const char *name,
diff --git a/hw/nvme/nguid.c b/hw/nvme/nguid.c
index 829832b..be63cb7 100644
--- a/hw/nvme/nguid.c
+++ b/hw/nvme/nguid.c
@@ -149,7 +149,7 @@
static void get_nguid(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
NvmeNGUID *nguid = object_field_prop_ptr(obj, prop);
char buffer[NGUID_STR_LEN];
char *p = buffer;
@@ -162,7 +162,7 @@
static void set_nguid(Object *obj, Visitor *v, const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
NvmeNGUID *nguid = object_field_prop_ptr(obj, prop);
char *str;
diff --git a/hw/nvme/ns.c b/hw/nvme/ns.c
index 192b80f..0a7881b 100644
--- a/hw/nvme/ns.c
+++ b/hw/nvme/ns.c
@@ -834,7 +834,6 @@
DEFINE_PROP_BOOL("eui64-default", NvmeNamespace, params.eui64_default,
false),
DEFINE_PROP_STRING("fdp.ruhs", NvmeNamespace, params.fdp.ruhs),
- DEFINE_PROP_END_OF_LIST(),
};
static void nvme_ns_class_init(ObjectClass *oc, void *data)
diff --git a/hw/nvme/subsys.c b/hw/nvme/subsys.c
index 3171c38..2ae56f1 100644
--- a/hw/nvme/subsys.c
+++ b/hw/nvme/subsys.c
@@ -223,7 +223,6 @@
NVME_DEFAULT_RU_SIZE),
DEFINE_PROP_UINT32("fdp.nrg", NvmeSubsystem, params.fdp.nrg, 1),
DEFINE_PROP_UINT16("fdp.nruh", NvmeSubsystem, params.fdp.nruh, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void nvme_subsys_class_init(ObjectClass *oc, void *data)
diff --git a/hw/nvram/ds1225y.c b/hw/nvram/ds1225y.c
index 19bf8d2..6b2aa8c 100644
--- a/hw/nvram/ds1225y.c
+++ b/hw/nvram/ds1225y.c
@@ -145,7 +145,6 @@
static const Property nvram_sysbus_properties[] = {
DEFINE_PROP_UINT32("size", SysBusNvRamState, nvram.chip_size, 0x2000),
DEFINE_PROP_STRING("filename", SysBusNvRamState, nvram.filename),
- DEFINE_PROP_END_OF_LIST(),
};
static void nvram_sysbus_class_init(ObjectClass *klass, void *data)
diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c
index 669920b..5f525d3 100644
--- a/hw/nvram/eeprom_at24c.c
+++ b/hw/nvram/eeprom_at24c.c
@@ -239,7 +239,6 @@
DEFINE_PROP_UINT8("address-size", EEPROMState, asize, 0),
DEFINE_PROP_BOOL("writable", EEPROMState, writable, true),
DEFINE_PROP_DRIVE("drive", EEPROMState, blk),
- DEFINE_PROP_END_OF_LIST()
};
static
diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c
index 7461d99..327d623 100644
--- a/hw/nvram/fw_cfg.c
+++ b/hw/nvram/fw_cfg.c
@@ -1084,7 +1084,6 @@
static const Property fw_cfg_properties[] = {
DEFINE_PROP_BOOL("acpi-mr-restore", FWCfgState, acpi_mr_restore, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void fw_cfg_common_realize(DeviceState *dev, Error **errp)
@@ -1278,7 +1277,6 @@
true),
DEFINE_PROP_UINT16("x-file-slots", FWCfgIoState, parent_obj.file_slots,
FW_CFG_FILE_SLOTS_DFLT),
- DEFINE_PROP_END_OF_LIST(),
};
static void fw_cfg_io_realize(DeviceState *dev, Error **errp)
@@ -1328,7 +1326,6 @@
true),
DEFINE_PROP_UINT16("x-file-slots", FWCfgMemState, parent_obj.file_slots,
FW_CFG_FILE_SLOTS_DFLT),
- DEFINE_PROP_END_OF_LIST(),
};
static void fw_cfg_mem_realize(DeviceState *dev, Error **errp)
diff --git a/hw/nvram/mac_nvram.c b/hw/nvram/mac_nvram.c
index d62ad71..db42817 100644
--- a/hw/nvram/mac_nvram.c
+++ b/hw/nvram/mac_nvram.c
@@ -138,7 +138,6 @@
DEFINE_PROP_UINT32("size", MacIONVRAMState, size, 0),
DEFINE_PROP_UINT32("it_shift", MacIONVRAMState, it_shift, 0),
DEFINE_PROP_DRIVE("drive", MacIONVRAMState, blk),
- DEFINE_PROP_END_OF_LIST()
};
static void macio_nvram_class_init(ObjectClass *oc, void *data)
diff --git a/hw/nvram/nrf51_nvm.c b/hw/nvram/nrf51_nvm.c
index 2360494..2ed4078 100644
--- a/hw/nvram/nrf51_nvm.c
+++ b/hw/nvram/nrf51_nvm.c
@@ -356,7 +356,6 @@
static const Property nrf51_nvm_properties[] = {
DEFINE_PROP_UINT32("flash-size", NRF51NVMState, flash_size, 0x40000),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_nvm = {
diff --git a/hw/nvram/spapr_nvram.c b/hw/nvram/spapr_nvram.c
index 2251ff2..1230884 100644
--- a/hw/nvram/spapr_nvram.c
+++ b/hw/nvram/spapr_nvram.c
@@ -255,7 +255,6 @@
static const Property spapr_nvram_properties[] = {
DEFINE_SPAPR_PROPERTIES(SpaprNvram, sdev),
DEFINE_PROP_DRIVE("drive", SpaprNvram, blk),
- DEFINE_PROP_END_OF_LIST(),
};
static void spapr_nvram_class_init(ObjectClass *klass, void *data)
diff --git a/hw/nvram/xlnx-bbram.c b/hw/nvram/xlnx-bbram.c
index 4fa528f..d3f238f 100644
--- a/hw/nvram/xlnx-bbram.c
+++ b/hw/nvram/xlnx-bbram.c
@@ -523,7 +523,6 @@
static const Property bbram_ctrl_props[] = {
DEFINE_PROP("drive", XlnxBBRam, blk, bbram_prop_drive, BlockBackend *),
DEFINE_PROP_UINT32("crc-zpads", XlnxBBRam, crc_zpads, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void bbram_ctrl_class_init(ObjectClass *klass, void *data)
diff --git a/hw/nvram/xlnx-efuse.c b/hw/nvram/xlnx-efuse.c
index 5dae9e8..f1787d0 100644
--- a/hw/nvram/xlnx-efuse.c
+++ b/hw/nvram/xlnx-efuse.c
@@ -272,7 +272,6 @@
DEFINE_PROP_BOOL("init-factory-tbits", XlnxEFuse, init_tbits, true),
DEFINE_PROP_ARRAY("read-only", XlnxEFuse, ro_bits_cnt, ro_bits,
qdev_prop_uint32, uint32_t),
- DEFINE_PROP_END_OF_LIST(),
};
static void efuse_class_init(ObjectClass *klass, void *data)
diff --git a/hw/nvram/xlnx-versal-efuse-cache.c b/hw/nvram/xlnx-versal-efuse-cache.c
index 1aea27a..2fb5994 100644
--- a/hw/nvram/xlnx-versal-efuse-cache.c
+++ b/hw/nvram/xlnx-versal-efuse-cache.c
@@ -87,8 +87,6 @@
DEFINE_PROP_LINK("efuse",
XlnxVersalEFuseCache, efuse,
TYPE_XLNX_EFUSE, XlnxEFuse *),
-
- DEFINE_PROP_END_OF_LIST(),
};
static void efuse_cache_class_init(ObjectClass *klass, void *data)
diff --git a/hw/nvram/xlnx-versal-efuse-ctrl.c b/hw/nvram/xlnx-versal-efuse-ctrl.c
index 599aa12..3246eb3 100644
--- a/hw/nvram/xlnx-versal-efuse-ctrl.c
+++ b/hw/nvram/xlnx-versal-efuse-ctrl.c
@@ -750,8 +750,6 @@
DEFINE_PROP_ARRAY("pg0-lock",
XlnxVersalEFuseCtrl, extra_pg0_lock_n16,
extra_pg0_lock_spec, qdev_prop_uint16, uint16_t),
-
- DEFINE_PROP_END_OF_LIST(),
};
static void efuse_ctrl_class_init(ObjectClass *klass, void *data)
diff --git a/hw/nvram/xlnx-zynqmp-efuse.c b/hw/nvram/xlnx-zynqmp-efuse.c
index af53187..15024da 100644
--- a/hw/nvram/xlnx-zynqmp-efuse.c
+++ b/hw/nvram/xlnx-zynqmp-efuse.c
@@ -837,8 +837,6 @@
DEFINE_PROP_LINK("efuse",
XlnxZynqMPEFuse, efuse,
TYPE_XLNX_EFUSE, XlnxEFuse *),
-
- DEFINE_PROP_END_OF_LIST(),
};
static void zynqmp_efuse_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-bridge/cxl_downstream.c b/hw/pci-bridge/cxl_downstream.c
index cfe50e6..e337f1a 100644
--- a/hw/pci-bridge/cxl_downstream.c
+++ b/hw/pci-bridge/cxl_downstream.c
@@ -217,7 +217,6 @@
speed, PCIE_LINK_SPEED_64),
DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot,
width, PCIE_LINK_WIDTH_16),
- DEFINE_PROP_END_OF_LIST()
};
static void cxl_dsp_class_init(ObjectClass *oc, void *data)
diff --git a/hw/pci-bridge/cxl_root_port.c b/hw/pci-bridge/cxl_root_port.c
index 5824ba3..c0037f2 100644
--- a/hw/pci-bridge/cxl_root_port.c
+++ b/hw/pci-bridge/cxl_root_port.c
@@ -211,7 +211,6 @@
speed, PCIE_LINK_SPEED_64),
DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot,
width, PCIE_LINK_WIDTH_32),
- DEFINE_PROP_END_OF_LIST()
};
static void cxl_rp_dvsec_write_config(PCIDevice *dev, uint32_t addr,
diff --git a/hw/pci-bridge/cxl_upstream.c b/hw/pci-bridge/cxl_upstream.c
index ef94aa3..28b109c 100644
--- a/hw/pci-bridge/cxl_upstream.c
+++ b/hw/pci-bridge/cxl_upstream.c
@@ -369,7 +369,6 @@
speed, PCIE_LINK_SPEED_32),
DEFINE_PROP_PCIE_LINK_WIDTH("x-width", CXLUpstreamPort,
width, PCIE_LINK_WIDTH_16),
- DEFINE_PROP_END_OF_LIST()
};
static void cxl_upstream_class_init(ObjectClass *oc, void *data)
diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c
index c319ca8..3c0b41e 100644
--- a/hw/pci-bridge/gen_pcie_root_port.c
+++ b/hw/pci-bridge/gen_pcie_root_port.c
@@ -145,7 +145,6 @@
speed, PCIE_LINK_SPEED_16),
DEFINE_PROP_PCIE_LINK_WIDTH("x-width", PCIESlot,
width, PCIE_LINK_WIDTH_32),
- DEFINE_PROP_END_OF_LIST()
};
static void gen_rp_dev_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c
index 35a37e0..0a91a8a 100644
--- a/hw/pci-bridge/pci_bridge_dev.c
+++ b/hw/pci-bridge/pci_bridge_dev.c
@@ -186,7 +186,6 @@
res_reserve.mem_pref_32, -1),
DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
res_reserve.mem_pref_64, -1),
- DEFINE_PROP_END_OF_LIST(),
};
static bool pci_device_shpc_present(void *opaque, int version_id)
diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index 01997c1..af4591a 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -425,7 +425,6 @@
DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0),
DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED),
DEFINE_PROP_BOOL("bypass_iommu", PXBDev, bypass_iommu, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void pxb_dev_class_init(ObjectClass *klass, void *data)
@@ -509,7 +508,6 @@
static const Property pxb_cxl_dev_properties[] = {
DEFINE_PROP_BOOL("hdm_for_passthrough", PXBCXLDev, hdm_for_passthrough, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void pxb_cxl_dev_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridge.c
index 8834ff3..fd4514a 100644
--- a/hw/pci-bridge/pcie_pci_bridge.c
+++ b/hw/pci-bridge/pcie_pci_bridge.c
@@ -126,7 +126,6 @@
static const Property pcie_pci_bridge_dev_properties[] = {
DEFINE_PROP_ON_OFF_AUTO("msi", PCIEPCIBridge, msi, ON_OFF_AUTO_AUTO),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription pcie_pci_bridge_dev_vmstate = {
diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c
index a7f87a1..dd40b36 100644
--- a/hw/pci-bridge/pcie_root_port.c
+++ b/hw/pci-bridge/pcie_root_port.c
@@ -152,7 +152,6 @@
DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present,
QEMU_PCIE_SLTCAP_PCP_BITNR, true),
DEFINE_PROP_BOOL("disable-acs", PCIESlot, disable_acs, false),
- DEFINE_PROP_END_OF_LIST()
};
static void rp_instance_post_init(Object *obj)
diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_downstream.c
index 92e5fb7..d4e94f2 100644
--- a/hw/pci-bridge/xio3130_downstream.c
+++ b/hw/pci-bridge/xio3130_downstream.c
@@ -137,7 +137,6 @@
static const Property xio3130_downstream_props[] = {
DEFINE_PROP_BIT(COMPAT_PROP_PCP, PCIDevice, cap_present,
QEMU_PCIE_SLTCAP_PCP_BITNR, true),
- DEFINE_PROP_END_OF_LIST()
};
static const VMStateDescription vmstate_xio3130_downstream = {
diff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c
index 379095b..62e9c8a 100644
--- a/hw/pci-host/astro.c
+++ b/hw/pci-host/astro.c
@@ -461,10 +461,6 @@
qdev_init_gpio_in(DEVICE(obj), elroy_set_irq, ELROY_IRQS);
}
-static Property elroy_pcihost_properties[] = {
- DEFINE_PROP_END_OF_LIST(),
-};
-
static const VMStateDescription vmstate_elroy = {
.name = "Elroy",
.version_id = 1,
@@ -490,7 +486,6 @@
DeviceClass *dc = DEVICE_CLASS(klass);
device_class_set_legacy_reset(dc, elroy_reset);
- device_class_set_props(dc, elroy_pcihost_properties);
dc->vmsd = &vmstate_elroy;
dc->user_creatable = false;
}
diff --git a/hw/pci-host/dino.c b/hw/pci-host/dino.c
index ead9893..58fdbf7 100644
--- a/hw/pci-host/dino.c
+++ b/hw/pci-host/dino.c
@@ -495,7 +495,6 @@
static const Property dino_pcihost_properties[] = {
DEFINE_PROP_LINK("memory-as", DinoState, memory_as, TYPE_MEMORY_REGION,
MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void dino_pcihost_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c
index 8a955ca..c6aa8e8 100644
--- a/hw/pci-host/gpex.c
+++ b/hw/pci-host/gpex.c
@@ -166,7 +166,6 @@
gpex_cfg.mmio64.base, 0),
DEFINE_PROP_SIZE(PCI_HOST_ABOVE_4G_MMIO_SIZE, GPEXHost,
gpex_cfg.mmio64.size, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void gpex_host_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c
index d64de73..84e5ee8 100644
--- a/hw/pci-host/grackle.c
+++ b/hw/pci-host/grackle.c
@@ -131,7 +131,6 @@
static const Property grackle_properties[] = {
DEFINE_PROP_UINT32("ofw-addr", GrackleState, ofw_addr, -1),
- DEFINE_PROP_END_OF_LIST()
};
static void grackle_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/gt64120.c b/hw/pci-host/gt64120.c
index 3c73ebe..d5c13a8 100644
--- a/hw/pci-host/gt64120.c
+++ b/hw/pci-host/gt64120.c
@@ -1277,7 +1277,6 @@
static const Property gt64120_properties[] = {
DEFINE_PROP_BOOL("cpu-little-endian", GT64120State,
cpu_little_endian, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void gt64120_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/i440fx.c b/hw/pci-host/i440fx.c
index 40780fb..1e69691 100644
--- a/hw/pci-host/i440fx.c
+++ b/hw/pci-host/i440fx.c
@@ -362,7 +362,6 @@
above_4g_mem_size, 0),
DEFINE_PROP_BOOL("x-pci-hole64-fix", I440FXState, pci_hole64_fix, true),
DEFINE_PROP_STRING(I440FX_HOST_PROP_PCI_TYPE, I440FXState, pci_type),
- DEFINE_PROP_END_OF_LIST(),
};
static void i440fx_pcihost_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/mv64361.c b/hw/pci-host/mv64361.c
index 2518d5a..9c41c15 100644
--- a/hw/pci-host/mv64361.c
+++ b/hw/pci-host/mv64361.c
@@ -100,7 +100,6 @@
static const Property mv64361_pcihost_props[] = {
DEFINE_PROP_UINT8("index", MV64361PCIState, index, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void mv64361_pcihost_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c
index 888f078..97cfb52 100644
--- a/hw/pci-host/pnv_phb.c
+++ b/hw/pci-host/pnv_phb.c
@@ -192,8 +192,6 @@
DEFINE_PROP_LINK("pec", PnvPHB, pec, TYPE_PNV_PHB4_PEC,
PnvPhb4PecState *),
-
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_phb_class_init(ObjectClass *klass, void *data)
@@ -304,8 +302,6 @@
static const Property pnv_phb_root_port_properties[] = {
DEFINE_PROP_UINT32("version", PnvPHBRootPort, version, 0),
-
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_phb_root_port_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/pnv_phb3.c b/hw/pci-host/pnv_phb3.c
index 529b33b..cd178f7 100644
--- a/hw/pci-host/pnv_phb3.c
+++ b/hw/pci-host/pnv_phb3.c
@@ -1095,7 +1095,6 @@
DEFINE_PROP_UINT32("chip-id", PnvPHB3, chip_id, 0),
DEFINE_PROP_LINK("chip", PnvPHB3, chip, TYPE_PNV_CHIP, PnvChip *),
DEFINE_PROP_LINK("phb-base", PnvPHB3, phb_base, TYPE_PNV_PHB, PnvPHB *),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_phb3_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c
index 482fe25..178c73f 100644
--- a/hw/pci-host/pnv_phb4.c
+++ b/hw/pci-host/pnv_phb4.c
@@ -1694,7 +1694,6 @@
DEFINE_PROP_LINK("pec", PnvPHB4, pec, TYPE_PNV_PHB4_PEC,
PnvPhb4PecState *),
DEFINE_PROP_LINK("phb-base", PnvPHB4, phb_base, TYPE_PNV_PHB, PnvPHB *),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_phb4_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/pnv_phb4_pec.c b/hw/pci-host/pnv_phb4_pec.c
index f897540..e4d33fa 100644
--- a/hw/pci-host/pnv_phb4_pec.c
+++ b/hw/pci-host/pnv_phb4_pec.c
@@ -288,7 +288,6 @@
DEFINE_PROP_UINT32("chip-id", PnvPhb4PecState, chip_id, 0),
DEFINE_PROP_LINK("chip", PnvPhb4PecState, chip, TYPE_PNV_CHIP,
PnvChip *),
- DEFINE_PROP_END_OF_LIST(),
};
static uint32_t pnv_pec_xscom_pci_base(PnvPhb4PecState *pec)
diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c
index 54071fc..345ce4c 100644
--- a/hw/pci-host/ppce500.c
+++ b/hw/pci-host/ppce500.c
@@ -510,7 +510,6 @@
static const Property pcihost_properties[] = {
DEFINE_PROP_UINT32("first_slot", PPCE500PCIState, first_slot, 0x11),
DEFINE_PROP_UINT32("first_pin_irq", PPCE500PCIState, first_pin_irq, 0x1),
- DEFINE_PROP_END_OF_LIST(),
};
static void e500_pcihost_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c
index af0b77e..06be3d7 100644
--- a/hw/pci-host/q35.c
+++ b/hw/pci-host/q35.c
@@ -182,7 +182,6 @@
DEFINE_PROP_BOOL(PCI_HOST_PROP_SMM_RANGES, Q35PCIHost,
mch.has_smm_ranges, true),
DEFINE_PROP_BOOL("x-pci-hole64-fix", Q35PCIHost, pci_hole64_fix, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void q35_host_class_init(ObjectClass *klass, void *data)
@@ -666,7 +665,6 @@
DEFINE_PROP_UINT16("extended-tseg-mbytes", MCHPCIState, ext_tseg_mbytes,
16),
DEFINE_PROP_BOOL("smbase-smram", MCHPCIState, has_smram_at_smbase, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void mch_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/raven.c b/hw/pci-host/raven.c
index b0a4a66..918a323 100644
--- a/hw/pci-host/raven.c
+++ b/hw/pci-host/raven.c
@@ -429,7 +429,6 @@
/* Temporary workaround until legacy prep machine is removed */
DEFINE_PROP_BOOL("is-legacy-prep", PREPPCIState, is_legacy_prep,
false),
- DEFINE_PROP_END_OF_LIST()
};
static void raven_pcihost_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/sabre.c b/hw/pci-host/sabre.c
index 623afed..56f057a 100644
--- a/hw/pci-host/sabre.c
+++ b/hw/pci-host/sabre.c
@@ -495,7 +495,6 @@
static const Property sabre_properties[] = {
DEFINE_PROP_UINT64("special-base", SabreState, special_base, 0),
DEFINE_PROP_UINT64("mem-base", SabreState, mem_base, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void sabre_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c
index bd670cf..37e2461 100644
--- a/hw/pci-host/uninorth.c
+++ b/hw/pci-host/uninorth.c
@@ -425,7 +425,6 @@
static const Property pci_unin_main_pci_host_props[] = {
DEFINE_PROP_UINT32("ofw-addr", UNINHostState, ofw_addr, -1),
- DEFINE_PROP_END_OF_LIST()
};
static void pci_unin_main_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c
index 5d59640..c3fbf4c 100644
--- a/hw/pci-host/versatile.c
+++ b/hw/pci-host/versatile.c
@@ -501,7 +501,6 @@
static const Property pci_vpb_properties[] = {
DEFINE_PROP_UINT8("broken-irq-mapping", PCIVPBState, irq_mapping_prop,
PCI_VPB_IRQMAP_ASSUME_OK),
- DEFINE_PROP_END_OF_LIST()
};
static void pci_vpb_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c
index 8484039..1868848 100644
--- a/hw/pci-host/xilinx-pcie.c
+++ b/hw/pci-host/xilinx-pcie.c
@@ -163,7 +163,6 @@
DEFINE_PROP_SIZE("mmio_base", XilinxPCIEHost, mmio_base, 0),
DEFINE_PROP_SIZE("mmio_size", XilinxPCIEHost, mmio_size, 1 * MiB),
DEFINE_PROP_BOOL("link_up", XilinxPCIEHost, link_up, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void xilinx_pcie_host_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 9024848..714208a 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@@ -104,7 +104,6 @@
DEFINE_PROP_BIT("x-pcie-ext-tag", PCIDevice, cap_present,
QEMU_PCIE_EXT_TAG_BITNR, true),
{ .name = "busnr", .info = &prop_pci_busnr },
- DEFINE_PROP_END_OF_LIST()
};
static const VMStateDescription vmstate_pcibus = {
diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c
index dd4fd36..aee4dd7 100644
--- a/hw/pci/pci_bridge.c
+++ b/hw/pci/pci_bridge.c
@@ -480,7 +480,6 @@
static const Property pci_bridge_properties[] = {
DEFINE_PROP_BOOL("x-pci-express-writeable-slt-bug", PCIBridge,
pcie_writeable_slt_bug, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void pci_bridge_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c
index 321e7be..4510890 100644
--- a/hw/pci/pci_host.c
+++ b/hw/pci/pci_host.c
@@ -244,7 +244,6 @@
DEFINE_PROP_BOOL("x-config-reg-migration-enabled", PCIHostState,
mig_enabled, true),
DEFINE_PROP_BOOL(PCI_HOST_BYPASS_IOMMU, PCIHostState, bypass_iommu, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void pci_host_class_init(ObjectClass *klass, void *data)
diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c
index bac2822..c73db30 100644
--- a/hw/pci/pcie_port.c
+++ b/hw/pci/pcie_port.c
@@ -116,7 +116,6 @@
DEFINE_PROP_UINT16("aer_log_max", PCIEPort,
parent_obj.parent_obj.exp.aer_log.log_max,
PCIE_AER_LOG_MAX_DEFAULT),
- DEFINE_PROP_END_OF_LIST()
};
static void pcie_port_class_init(ObjectClass *oc, void *data)
@@ -210,7 +209,6 @@
DEFINE_PROP_BOOL("hotplug", PCIESlot, hotplug, true),
DEFINE_PROP_BOOL("x-do-not-expose-native-hotplug-cap", PCIESlot,
hide_native_hotplug_cap, false),
- DEFINE_PROP_END_OF_LIST()
};
static void pcie_slot_class_init(ObjectClass *oc, void *data)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index b90a052..770516d 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -2431,7 +2431,6 @@
DEFINE_PROP_UINT32("nr-threads", PnvChip, nr_threads, 1),
DEFINE_PROP_BOOL("big-core", PnvChip, big_core, false),
DEFINE_PROP_BOOL("lpar-per-core", PnvChip, lpar_per_core, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_chip_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ppc/pnv_adu.c b/hw/ppc/pnv_adu.c
index 646736f..d09a167 100644
--- a/hw/ppc/pnv_adu.c
+++ b/hw/ppc/pnv_adu.c
@@ -187,7 +187,6 @@
static const Property pnv_adu_properties[] = {
DEFINE_PROP_LINK("lpc", PnvADU, lpc, TYPE_PNV_LPC, PnvLpcController *),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_adu_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ppc/pnv_chiptod.c b/hw/ppc/pnv_chiptod.c
index 840ef23..011822e 100644
--- a/hw/ppc/pnv_chiptod.c
+++ b/hw/ppc/pnv_chiptod.c
@@ -454,7 +454,6 @@
DEFINE_PROP_BOOL("primary", PnvChipTOD, primary, false),
DEFINE_PROP_BOOL("secondary", PnvChipTOD, secondary, false),
DEFINE_PROP_LINK("chip", PnvChipTOD , chip, TYPE_PNV_CHIP, PnvChip *),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_chiptod_power9_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c
index 22864c9..a5ebd39 100644
--- a/hw/ppc/pnv_core.c
+++ b/hw/ppc/pnv_core.c
@@ -443,7 +443,6 @@
false),
DEFINE_PROP_BOOL("lpar-per-core", PnvCore, lpar_per_core, false),
DEFINE_PROP_LINK("chip", PnvCore, chip, TYPE_PNV_CHIP, PnvChip *),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_core_power8_class_init(ObjectClass *oc, void *data)
@@ -695,7 +694,6 @@
static const Property pnv_quad_properties[] = {
DEFINE_PROP_UINT32("quad-id", PnvQuad, quad_id, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_quad_power9_class_init(ObjectClass *oc, void *data)
diff --git a/hw/ppc/pnv_homer.c b/hw/ppc/pnv_homer.c
index b1f83e2..11c8da8 100644
--- a/hw/ppc/pnv_homer.c
+++ b/hw/ppc/pnv_homer.c
@@ -414,7 +414,6 @@
static const Property pnv_homer_properties[] = {
DEFINE_PROP_LINK("chip", PnvHomer, chip, TYPE_PNV_CHIP, PnvChip *),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_homer_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ppc/pnv_i2c.c b/hw/ppc/pnv_i2c.c
index 4bd61ab..13f1690 100644
--- a/hw/ppc/pnv_i2c.c
+++ b/hw/ppc/pnv_i2c.c
@@ -547,7 +547,6 @@
DEFINE_PROP_LINK("chip", PnvI2C, chip, TYPE_PNV_CHIP, PnvChip *),
DEFINE_PROP_UINT32("engine", PnvI2C, engine, 1),
DEFINE_PROP_UINT32("num-busses", PnvI2C, num_busses, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_i2c_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
index 4d47167..0480a60 100644
--- a/hw/ppc/pnv_lpc.c
+++ b/hw/ppc/pnv_lpc.c
@@ -830,7 +830,6 @@
static const Property pnv_lpc_properties[] = {
DEFINE_PROP_BOOL("psi-serirq", PnvLpcController, psi_has_serirq, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_lpc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ppc/pnv_pnor.c b/hw/ppc/pnv_pnor.c
index eed6d32..5bb755d 100644
--- a/hw/ppc/pnv_pnor.c
+++ b/hw/ppc/pnv_pnor.c
@@ -115,7 +115,6 @@
static const Property pnv_pnor_properties[] = {
DEFINE_PROP_INT64("size", PnvPnor, size, 128 * MiB),
DEFINE_PROP_DRIVE("drive", PnvPnor, blk),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_pnor_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ppc/pnv_psi.c b/hw/ppc/pnv_psi.c
index e7d6cee..cd5021c 100644
--- a/hw/ppc/pnv_psi.c
+++ b/hw/ppc/pnv_psi.c
@@ -555,7 +555,6 @@
static const Property pnv_psi_properties[] = {
DEFINE_PROP_UINT64("bar", PnvPsi, bar, 0),
DEFINE_PROP_UINT64("fsp-bar", PnvPsi, fsp_bar, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_psi_power8_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c
index 801f978..f8c9cec 100644
--- a/hw/ppc/ppc405_uc.c
+++ b/hw/ppc/ppc405_uc.c
@@ -967,7 +967,6 @@
static const Property ppc405_cpc_properties[] = {
DEFINE_PROP_UINT32("sys-clk", Ppc405CpcState, sysclk, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void ppc405_cpc_class_init(ObjectClass *oc, void *data)
diff --git a/hw/ppc/ppc440_uc.c b/hw/ppc/ppc440_uc.c
index 05a5ef6..0d6f8d8 100644
--- a/hw/ppc/ppc440_uc.c
+++ b/hw/ppc/ppc440_uc.c
@@ -1025,7 +1025,6 @@
DEFINE_PROP_INT32("dcrn-base", PPC460EXPCIEState, dcrn_base, -1),
DEFINE_PROP_LINK("cpu", PPC460EXPCIEState, cpu, TYPE_POWERPC_CPU,
PowerPCCPU *),
- DEFINE_PROP_END_OF_LIST(),
};
static void ppc460ex_pcie_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c
index 530a392..9ce9777 100644
--- a/hw/ppc/ppc4xx_devs.c
+++ b/hw/ppc/ppc4xx_devs.c
@@ -234,7 +234,6 @@
static const Property ppc4xx_mal_properties[] = {
DEFINE_PROP_UINT8("txc-num", Ppc4xxMalState, txcnum, 0),
DEFINE_PROP_UINT8("rxc-num", Ppc4xxMalState, rxcnum, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void ppc4xx_mal_class_init(ObjectClass *oc, void *data)
@@ -542,7 +541,6 @@
static const Property ppc4xx_dcr_properties[] = {
DEFINE_PROP_LINK("cpu", Ppc4xxDcrDeviceState, cpu, TYPE_POWERPC_CPU,
PowerPCCPU *),
- DEFINE_PROP_END_OF_LIST(),
};
static void ppc4xx_dcr_class_init(ObjectClass *oc, void *data)
diff --git a/hw/ppc/ppc4xx_sdram.c b/hw/ppc/ppc4xx_sdram.c
index 6cfb07a..562bff8 100644
--- a/hw/ppc/ppc4xx_sdram.c
+++ b/hw/ppc/ppc4xx_sdram.c
@@ -429,7 +429,6 @@
DEFINE_PROP_LINK("dram", Ppc4xxSdramDdrState, dram_mr, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_UINT32("nbanks", Ppc4xxSdramDdrState, nbanks, 4),
- DEFINE_PROP_END_OF_LIST(),
};
static void ppc4xx_sdram_ddr_class_init(ObjectClass *oc, void *data)
@@ -714,7 +713,6 @@
DEFINE_PROP_LINK("dram", Ppc4xxSdramDdr2State, dram_mr, TYPE_MEMORY_REGION,
MemoryRegion *),
DEFINE_PROP_UINT32("nbanks", Ppc4xxSdramDdr2State, nbanks, 4),
- DEFINE_PROP_END_OF_LIST(),
};
static void ppc4xx_sdram_ddr2_class_init(ObjectClass *oc, void *data)
diff --git a/hw/ppc/prep_systemio.c b/hw/ppc/prep_systemio.c
index ca475c6..6e2ae98 100644
--- a/hw/ppc/prep_systemio.c
+++ b/hw/ppc/prep_systemio.c
@@ -288,7 +288,6 @@
static const Property prep_systemio_properties[] = {
DEFINE_PROP_UINT8("ibm-planar-id", PrepSystemIoState, ibm_planar_id, 0),
DEFINE_PROP_UINT8("equipment", PrepSystemIoState, equipment, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void prep_systemio_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/ppc/rs6000_mc.c b/hw/ppc/rs6000_mc.c
index bee9bc6..0e5d53b 100644
--- a/hw/ppc/rs6000_mc.c
+++ b/hw/ppc/rs6000_mc.c
@@ -210,7 +210,6 @@
static const Property rs6000mc_properties[] = {
DEFINE_PROP_UINT32("ram-size", RS6000MCState, ram_size, 0),
DEFINE_PROP_BOOL("auto-configure", RS6000MCState, autoconfigure, true),
- DEFINE_PROP_END_OF_LIST()
};
static void rs6000mc_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c
index 88d743a..559dd91 100644
--- a/hw/ppc/spapr_cpu_core.c
+++ b/hw/ppc/spapr_cpu_core.c
@@ -363,7 +363,6 @@
static const Property spapr_cpu_core_properties[] = {
DEFINE_PROP_INT32("node-id", SpaprCpuCore, node_id, CPU_UNSET_NUMA_NODE_ID),
- DEFINE_PROP_END_OF_LIST()
};
static void spapr_cpu_core_class_init(ObjectClass *oc, void *data)
diff --git a/hw/ppc/spapr_nvdimm.c b/hw/ppc/spapr_nvdimm.c
index 2ef6f29..6f875d7 100644
--- a/hw/ppc/spapr_nvdimm.c
+++ b/hw/ppc/spapr_nvdimm.c
@@ -884,22 +884,22 @@
vmstate_unregister(NULL, &vmstate_spapr_nvdimm_states, dimm);
}
-static const Property spapr_nvdimm_properties[] = {
#ifdef CONFIG_LIBPMEM
+static const Property spapr_nvdimm_properties[] = {
DEFINE_PROP_BOOL("pmem-override", SpaprNVDIMMDevice, pmem_override, false),
-#endif
- DEFINE_PROP_END_OF_LIST(),
};
+#endif
static void spapr_nvdimm_class_init(ObjectClass *oc, void *data)
{
- DeviceClass *dc = DEVICE_CLASS(oc);
NVDIMMClass *nvc = NVDIMM_CLASS(oc);
nvc->realize = spapr_nvdimm_realize;
nvc->unrealize = spapr_nvdimm_unrealize;
- device_class_set_props(dc, spapr_nvdimm_properties);
+#ifdef CONFIG_LIBPMEM
+ device_class_set_props(DEVICE_CLASS(oc), spapr_nvdimm_properties);
+#endif
}
static void spapr_nvdimm_init(Object *obj)
diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c
index 3edff52..0dcbd59 100644
--- a/hw/ppc/spapr_pci.c
+++ b/hw/ppc/spapr_pci.c
@@ -2055,7 +2055,6 @@
pcie_ecs, true),
DEFINE_PROP_BOOL("pre-5.1-associativity", SpaprPhbState,
pre_5_1_assoc, false),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_spapr_pci_lsi = {
diff --git a/hw/ppc/spapr_rng.c b/hw/ppc/spapr_rng.c
index 51c3a54..6935f00 100644
--- a/hw/ppc/spapr_rng.c
+++ b/hw/ppc/spapr_rng.c
@@ -134,7 +134,6 @@
DEFINE_PROP_BOOL("use-kvm", SpaprRngState, use_kvm, false),
DEFINE_PROP_LINK("rng", SpaprRngState, backend, TYPE_RNG_BACKEND,
RngBackend *),
- DEFINE_PROP_END_OF_LIST(),
};
static void spapr_rng_class_init(ObjectClass *oc, void *data)
diff --git a/hw/ppc/spapr_tpm_proxy.c b/hw/ppc/spapr_tpm_proxy.c
index 37521b8..2a17a51 100644
--- a/hw/ppc/spapr_tpm_proxy.c
+++ b/hw/ppc/spapr_tpm_proxy.c
@@ -147,7 +147,6 @@
static const Property spapr_tpm_proxy_properties[] = {
DEFINE_PROP_STRING("host-path", SpaprTpmProxy, host_path),
- DEFINE_PROP_END_OF_LIST(),
};
static void spapr_tpm_proxy_class_init(ObjectClass *k, void *data)
diff --git a/hw/remote/proxy.c b/hw/remote/proxy.c
index 6f84fdd..ee9a22b 100644
--- a/hw/remote/proxy.c
+++ b/hw/remote/proxy.c
@@ -193,7 +193,6 @@
static const Property proxy_properties[] = {
DEFINE_PROP_STRING("fd", PCIProxyDev, fd),
- DEFINE_PROP_END_OF_LIST(),
};
static void pci_proxy_dev_class_init(ObjectClass *klass, void *data)
diff --git a/hw/riscv/opentitan.c b/hw/riscv/opentitan.c
index 87ad9c8..253ab08 100644
--- a/hw/riscv/opentitan.c
+++ b/hw/riscv/opentitan.c
@@ -310,7 +310,6 @@
static const Property lowrisc_ibex_soc_props[] = {
DEFINE_PROP_UINT32("resetvec", LowRISCIbexSoCState, resetvec, 0x20000400),
- DEFINE_PROP_END_OF_LIST()
};
static void lowrisc_ibex_soc_class_init(ObjectClass *oc, void *data)
diff --git a/hw/riscv/riscv-iommu-pci.c b/hw/riscv/riscv-iommu-pci.c
index 2c1ae72..1245186 100644
--- a/hw/riscv/riscv-iommu-pci.c
+++ b/hw/riscv/riscv-iommu-pci.c
@@ -171,7 +171,6 @@
DEFINE_PROP_UINT16("device-id", RISCVIOMMUStatePci, device_id,
PCI_DEVICE_ID_REDHAT_RISCV_IOMMU),
DEFINE_PROP_UINT8("revision", RISCVIOMMUStatePci, revision, 0x01),
- DEFINE_PROP_END_OF_LIST(),
};
static void riscv_iommu_pci_reset_hold(Object *obj, ResetType type)
diff --git a/hw/riscv/riscv-iommu-sys.c b/hw/riscv/riscv-iommu-sys.c
index 605979a..28153f3 100644
--- a/hw/riscv/riscv-iommu-sys.c
+++ b/hw/riscv/riscv-iommu-sys.c
@@ -210,12 +210,11 @@
riscv_iommu_set_cap_igs(iommu, RISCV_IOMMU_CAP_IGS_BOTH);
}
-static Property riscv_iommu_sys_properties[] = {
+static const Property riscv_iommu_sys_properties[] = {
DEFINE_PROP_UINT64("addr", RISCVIOMMUStateSys, addr, 0),
DEFINE_PROP_UINT32("base-irq", RISCVIOMMUStateSys, base_irq, 0),
DEFINE_PROP_LINK("irqchip", RISCVIOMMUStateSys, irqchip,
TYPE_DEVICE, DeviceState *),
- DEFINE_PROP_END_OF_LIST(),
};
static void riscv_iommu_sys_reset_hold(Object *obj, ResetType type)
diff --git a/hw/riscv/riscv-iommu.c b/hw/riscv/riscv-iommu.c
index 72e607c..8bf920d 100644
--- a/hw/riscv/riscv-iommu.c
+++ b/hw/riscv/riscv-iommu.c
@@ -2310,7 +2310,6 @@
DEFINE_PROP_BOOL("g-stage", RISCVIOMMUState, enable_g_stage, TRUE),
DEFINE_PROP_LINK("downstream-mr", RISCVIOMMUState, target_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void riscv_iommu_class_init(ObjectClass *klass, void* data)
diff --git a/hw/riscv/riscv_hart.c b/hw/riscv/riscv_hart.c
index 0df4547..74b91ac 100644
--- a/hw/riscv/riscv_hart.c
+++ b/hw/riscv/riscv_hart.c
@@ -33,7 +33,6 @@
DEFINE_PROP_STRING("cpu-type", RISCVHartArrayState, cpu_type),
DEFINE_PROP_UINT64("resetvec", RISCVHartArrayState, resetvec,
DEFAULT_RSTVEC),
- DEFINE_PROP_END_OF_LIST(),
};
static void riscv_harts_cpu_reset(void *opaque)
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 6270e1c..a31d548 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -943,7 +943,6 @@
static const Property sifive_u_soc_props[] = {
DEFINE_PROP_UINT32("serial", SiFiveUSoCState, serial, OTP_SERIAL),
DEFINE_PROP_STRING("cpu-type", SiFiveUSoCState, cpu_type),
- DEFINE_PROP_END_OF_LIST()
};
static void sifive_u_soc_class_init(ObjectClass *oc, void *data)
diff --git a/hw/rtc/allwinner-rtc.c b/hw/rtc/allwinner-rtc.c
index 838db72..b56098b 100644
--- a/hw/rtc/allwinner-rtc.c
+++ b/hw/rtc/allwinner-rtc.c
@@ -313,7 +313,6 @@
static const Property allwinner_rtc_properties[] = {
DEFINE_PROP_INT32("base-year", AwRtcState, base_year, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void allwinner_rtc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/rtc/goldfish_rtc.c b/hw/rtc/goldfish_rtc.c
index 389f192..cd11bf8 100644
--- a/hw/rtc/goldfish_rtc.c
+++ b/hw/rtc/goldfish_rtc.c
@@ -289,7 +289,6 @@
static const Property goldfish_rtc_properties[] = {
DEFINE_PROP_BOOL("big-endian", GoldfishRTCState, big_endian,
false),
- DEFINE_PROP_END_OF_LIST(),
};
static void goldfish_rtc_class_init(ObjectClass *klass, void *data)
diff --git a/hw/rtc/m48t59-isa.c b/hw/rtc/m48t59-isa.c
index 51f80d2..38bc8dc 100644
--- a/hw/rtc/m48t59-isa.c
+++ b/hw/rtc/m48t59-isa.c
@@ -81,7 +81,6 @@
DEFINE_PROP_INT32("base-year", M48txxISAState, state.base_year, 0),
DEFINE_PROP_UINT32("iobase", M48txxISAState, io_base, 0x74),
DEFINE_PROP_UINT8("irq", M48txxISAState, isairq, 8),
- DEFINE_PROP_END_OF_LIST(),
};
static void m48t59_reset_isa(DeviceState *d)
diff --git a/hw/rtc/m48t59.c b/hw/rtc/m48t59.c
index 5a2c7b4..57c17e5 100644
--- a/hw/rtc/m48t59.c
+++ b/hw/rtc/m48t59.c
@@ -620,7 +620,6 @@
static const Property m48t59_sysbus_properties[] = {
DEFINE_PROP_INT32("base-year", M48txxSysBusState, state.base_year, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void m48txx_sysbus_class_init(ObjectClass *klass, void *data)
diff --git a/hw/rtc/mc146818rtc.c b/hw/rtc/mc146818rtc.c
index 973ed99..37f247f 100644
--- a/hw/rtc/mc146818rtc.c
+++ b/hw/rtc/mc146818rtc.c
@@ -966,7 +966,6 @@
DEFINE_PROP_UINT8("irq", MC146818RtcState, isairq, RTC_ISA_IRQ),
DEFINE_PROP_LOSTTICKPOLICY("lost_tick_policy", MC146818RtcState,
lost_tick_policy, LOST_TICK_POLICY_DISCARD),
- DEFINE_PROP_END_OF_LIST(),
};
static void rtc_reset_enter(Object *obj, ResetType type)
diff --git a/hw/rtc/pl031.c b/hw/rtc/pl031.c
index 1dc8e6e..32ce5bb 100644
--- a/hw/rtc/pl031.c
+++ b/hw/rtc/pl031.c
@@ -330,7 +330,6 @@
*/
DEFINE_PROP_BOOL("migrate-tick-offset",
PL031State, migrate_tick_offset, true),
- DEFINE_PROP_END_OF_LIST()
};
static void pl031_class_init(ObjectClass *klass, void *data)
diff --git a/hw/rx/rx62n.c b/hw/rx/rx62n.c
index dfa27bc..da1a1cc 100644
--- a/hw/rx/rx62n.c
+++ b/hw/rx/rx62n.c
@@ -262,7 +262,6 @@
MemoryRegion *),
DEFINE_PROP_BOOL("load-kernel", RX62NState, kernel, false),
DEFINE_PROP_UINT32("xtal-frequency-hz", RX62NState, xtal_freq_hz, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void rx62n_class_init(ObjectClass *klass, void *data)
diff --git a/hw/s390x/3270-ccw.c b/hw/s390x/3270-ccw.c
index 69e6783..3a8930d 100644
--- a/hw/s390x/3270-ccw.c
+++ b/hw/s390x/3270-ccw.c
@@ -150,15 +150,10 @@
g_free(sch);
}
-static Property emulated_ccw_3270_properties[] = {
- DEFINE_PROP_END_OF_LIST(),
-};
-
static void emulated_ccw_3270_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- device_class_set_props(dc, emulated_ccw_3270_properties);
dc->realize = emulated_ccw_3270_realize;
dc->hotpluggable = false;
set_bit(DEVICE_CATEGORY_DISPLAY, dc->categories);
diff --git a/hw/s390x/ccw-device.c b/hw/s390x/ccw-device.c
index 0d10c3e..494faeb 100644
--- a/hw/s390x/ccw-device.c
+++ b/hw/s390x/ccw-device.c
@@ -85,7 +85,6 @@
DEFINE_PROP_CSS_DEV_ID("devno", CcwDevice, devno),
DEFINE_PROP_CSS_DEV_ID_RO("dev_id", CcwDevice, dev_id),
DEFINE_PROP_CSS_DEV_ID_RO("subch_id", CcwDevice, subch_id),
- DEFINE_PROP_END_OF_LIST(),
};
static void ccw_device_reset_hold(Object *obj, ResetType type)
diff --git a/hw/s390x/css-bridge.c b/hw/s390x/css-bridge.c
index 860a04a..04ab1f6 100644
--- a/hw/s390x/css-bridge.c
+++ b/hw/s390x/css-bridge.c
@@ -123,7 +123,6 @@
static const Property virtual_css_bridge_properties[] = {
DEFINE_PROP_BOOL("css_dev_path", VirtualCssBridge, css_dev_path,
true),
- DEFINE_PROP_END_OF_LIST(),
};
static bool prop_get_true(Object *obj, Error **errp)
diff --git a/hw/s390x/css.c b/hw/s390x/css.c
index b2d5327..4e27b29 100644
--- a/hw/s390x/css.c
+++ b/hw/s390x/css.c
@@ -2463,7 +2463,7 @@
static void get_css_devid(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
CssDevId *dev_id = object_field_prop_ptr(obj, prop);
char buffer[] = "xx.x.xxxx";
char *p = buffer;
@@ -2492,7 +2492,7 @@
static void set_css_devid(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
CssDevId *dev_id = object_field_prop_ptr(obj, prop);
char *str;
int num, n1, n2;
diff --git a/hw/s390x/ipl.c b/hw/s390x/ipl.c
index 88a97f0..0344c02 100644
--- a/hw/s390x/ipl.c
+++ b/hw/s390x/ipl.c
@@ -299,7 +299,6 @@
DEFINE_PROP_BOOL("enforce_bios", S390IPLState, enforce_bios, false),
DEFINE_PROP_BOOL("iplbext_migration", S390IPLState, iplbext_migration,
true),
- DEFINE_PROP_END_OF_LIST(),
};
static void s390_ipl_set_boot_menu(S390IPLState *ipl)
diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c
index 22e6be6..94b1a5f 100644
--- a/hw/s390x/s390-pci-bus.c
+++ b/hw/s390x/s390-pci-bus.c
@@ -1453,7 +1453,7 @@
static void s390_pci_get_fid(Object *obj, Visitor *v, const char *name,
void *opaque, Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint32_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_uint32(v, name, ptr, errp);
@@ -1463,7 +1463,7 @@
void *opaque, Error **errp)
{
S390PCIBusDevice *zpci = S390_PCI_DEVICE(obj);
- Property *prop = opaque;
+ const Property *prop = opaque;
uint32_t *ptr = object_field_prop_ptr(obj, prop);
if (!visit_type_uint32(v, name, ptr, errp)) {
@@ -1488,7 +1488,6 @@
DEFINE_PROP_BOOL("interpret", S390PCIBusDevice, interp, true),
DEFINE_PROP_BOOL("forwarding-assist", S390PCIBusDevice, forwarding_assist,
true),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription s390_pci_device_vmstate = {
diff --git a/hw/s390x/s390-skeys.c b/hw/s390x/s390-skeys.c
index 6d0a47e..4409e62 100644
--- a/hw/s390x/s390-skeys.c
+++ b/hw/s390x/s390-skeys.c
@@ -477,7 +477,6 @@
static const Property s390_skeys_props[] = {
DEFINE_PROP_BOOL("migration-enabled", S390SKeysState, migration_enabled, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void s390_skeys_class_init(ObjectClass *oc, void *data)
diff --git a/hw/s390x/s390-stattrib.c b/hw/s390x/s390-stattrib.c
index 6c69c01..8e07acb 100644
--- a/hw/s390x/s390-stattrib.c
+++ b/hw/s390x/s390-stattrib.c
@@ -362,7 +362,6 @@
static const Property s390_stattrib_props[] = {
DEFINE_PROP_BOOL("migration-enabled", S390StAttribState, migration_enabled, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void s390_stattrib_class_init(ObjectClass *oc, void *data)
diff --git a/hw/s390x/vhost-scsi-ccw.c b/hw/s390x/vhost-scsi-ccw.c
index 0be0f8a..e6bf0c5 100644
--- a/hw/s390x/vhost-scsi-ccw.c
+++ b/hw/s390x/vhost-scsi-ccw.c
@@ -44,7 +44,6 @@
static const Property vhost_ccw_scsi_properties[] = {
DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev,
VIRTIO_CCW_MAX_REV),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_ccw_scsi_class_init(ObjectClass *klass, void *data)
diff --git a/hw/s390x/vhost-user-fs-ccw.c b/hw/s390x/vhost-user-fs-ccw.c
index 934378a..6a9654d 100644
--- a/hw/s390x/vhost-user-fs-ccw.c
+++ b/hw/s390x/vhost-user-fs-ccw.c
@@ -28,7 +28,6 @@
VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev,
VIRTIO_CCW_MAX_REV),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_user_fs_ccw_realize(VirtioCcwDevice *ccw_dev, Error **errp)
diff --git a/hw/s390x/vhost-vsock-ccw.c b/hw/s390x/vhost-vsock-ccw.c
index 3ba4008..875ccf3 100644
--- a/hw/s390x/vhost-vsock-ccw.c
+++ b/hw/s390x/vhost-vsock-ccw.c
@@ -25,7 +25,6 @@
static const Property vhost_vsock_ccw_properties[] = {
DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev,
VIRTIO_CCW_MAX_REV),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_vsock_ccw_realize(VirtioCcwDevice *ccw_dev, Error **errp)
diff --git a/hw/s390x/virtio-ccw-9p.c b/hw/s390x/virtio-ccw-9p.c
index c10b084..287ae2b 100644
--- a/hw/s390x/virtio-ccw-9p.c
+++ b/hw/s390x/virtio-ccw-9p.c
@@ -46,7 +46,6 @@
VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev,
VIRTIO_CCW_MAX_REV),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_ccw_9p_class_init(ObjectClass *klass, void *data)
diff --git a/hw/s390x/virtio-ccw-balloon.c b/hw/s390x/virtio-ccw-balloon.c
index bbbed49..1180efa 100644
--- a/hw/s390x/virtio-ccw-balloon.c
+++ b/hw/s390x/virtio-ccw-balloon.c
@@ -51,7 +51,6 @@
VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev,
VIRTIO_CCW_MAX_REV),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_ccw_balloon_class_init(ObjectClass *klass, void *data)
diff --git a/hw/s390x/virtio-ccw-blk.c b/hw/s390x/virtio-ccw-blk.c
index 3182851..db9d442 100644
--- a/hw/s390x/virtio-ccw-blk.c
+++ b/hw/s390x/virtio-ccw-blk.c
@@ -49,7 +49,6 @@
DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev,
VIRTIO_CCW_MAX_REV),
DEFINE_PROP_CCW_LOADPARM("loadparm", CcwDevice, loadparm),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_ccw_blk_class_init(ObjectClass *klass, void *data)
diff --git a/hw/s390x/virtio-ccw-crypto.c b/hw/s390x/virtio-ccw-crypto.c
index b4cd760..b693f87 100644
--- a/hw/s390x/virtio-ccw-crypto.c
+++ b/hw/s390x/virtio-ccw-crypto.c
@@ -49,7 +49,6 @@
VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev,
VIRTIO_CCW_MAX_REV),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_ccw_crypto_class_init(ObjectClass *klass, void *data)
diff --git a/hw/s390x/virtio-ccw-gpu.c b/hw/s390x/virtio-ccw-gpu.c
index c44dc2d..a6b14c2 100644
--- a/hw/s390x/virtio-ccw-gpu.c
+++ b/hw/s390x/virtio-ccw-gpu.c
@@ -47,7 +47,6 @@
VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev,
VIRTIO_CCW_MAX_REV),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_ccw_gpu_class_init(ObjectClass *klass, void *data)
diff --git a/hw/s390x/virtio-ccw-input.c b/hw/s390x/virtio-ccw-input.c
index 040a9e0..6ca10d5 100644
--- a/hw/s390x/virtio-ccw-input.c
+++ b/hw/s390x/virtio-ccw-input.c
@@ -48,7 +48,6 @@
VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev,
VIRTIO_CCW_MAX_REV),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_ccw_input_class_init(ObjectClass *klass, void *data)
diff --git a/hw/s390x/virtio-ccw-net.c b/hw/s390x/virtio-ccw-net.c
index c41d347..80a5581 100644
--- a/hw/s390x/virtio-ccw-net.c
+++ b/hw/s390x/virtio-ccw-net.c
@@ -52,7 +52,6 @@
DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev,
VIRTIO_CCW_MAX_REV),
DEFINE_PROP_CCW_LOADPARM("loadparm", CcwDevice, loadparm),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_ccw_net_class_init(ObjectClass *klass, void *data)
diff --git a/hw/s390x/virtio-ccw-rng.c b/hw/s390x/virtio-ccw-rng.c
index c9a15c4..ccd124e 100644
--- a/hw/s390x/virtio-ccw-rng.c
+++ b/hw/s390x/virtio-ccw-rng.c
@@ -48,7 +48,6 @@
VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev,
VIRTIO_CCW_MAX_REV),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_ccw_rng_class_init(ObjectClass *klass, void *data)
diff --git a/hw/s390x/virtio-ccw-scsi.c b/hw/s390x/virtio-ccw-scsi.c
index bec9a73..bfcea3c 100644
--- a/hw/s390x/virtio-ccw-scsi.c
+++ b/hw/s390x/virtio-ccw-scsi.c
@@ -58,7 +58,6 @@
VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev,
VIRTIO_CCW_MAX_REV),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_ccw_scsi_class_init(ObjectClass *klass, void *data)
diff --git a/hw/s390x/virtio-ccw-serial.c b/hw/s390x/virtio-ccw-serial.c
index 037d4f9..59743d1 100644
--- a/hw/s390x/virtio-ccw-serial.c
+++ b/hw/s390x/virtio-ccw-serial.c
@@ -58,7 +58,6 @@
VIRTIO_CCW_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("max_revision", VirtioCcwDevice, max_rev,
VIRTIO_CCW_MAX_REV),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_ccw_serial_class_init(ObjectClass *klass, void *data)
diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c
index 8323cd1..7f012c2 100644
--- a/hw/scsi/megasas.c
+++ b/hw/scsi/megasas.c
@@ -2459,7 +2459,6 @@
DEFINE_PROP_ON_OFF_AUTO("msix", MegasasState, msix, ON_OFF_AUTO_AUTO),
DEFINE_PROP_BIT("use_jbod", MegasasState, flags,
MEGASAS_FLAG_USE_JBOD, false),
- DEFINE_PROP_END_OF_LIST(),
};
static const Property megasas_properties_gen2[] = {
@@ -2473,7 +2472,6 @@
DEFINE_PROP_ON_OFF_AUTO("msix", MegasasState, msix, ON_OFF_AUTO_AUTO),
DEFINE_PROP_BIT("use_jbod", MegasasState, flags,
MEGASAS_FLAG_USE_JBOD, false),
- DEFINE_PROP_END_OF_LIST(),
};
typedef struct MegasasInfo {
@@ -2488,6 +2486,7 @@
int osts;
const VMStateDescription *vmsd;
const Property *props;
+ size_t props_count;
InterfaceInfo *interfaces;
} MegasasInfo;
@@ -2504,6 +2503,7 @@
.osts = MFI_1078_RM | 1,
.vmsd = &vmstate_megasas_gen1,
.props = megasas_properties_gen1,
+ .props_count = ARRAY_SIZE(megasas_properties_gen1),
.interfaces = (InterfaceInfo[]) {
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
{ },
@@ -2520,6 +2520,7 @@
.osts = MFI_GEN2_RM,
.vmsd = &vmstate_megasas_gen2,
.props = megasas_properties_gen2,
+ .props_count = ARRAY_SIZE(megasas_properties_gen2),
.interfaces = (InterfaceInfo[]) {
{ INTERFACE_PCIE_DEVICE },
{ }
@@ -2546,7 +2547,7 @@
e->osts = info->osts;
e->product_name = info->product_name;
e->product_version = info->product_version;
- device_class_set_props(dc, info->props);
+ device_class_set_props_n(dc, info->props, info->props_count);
device_class_set_legacy_reset(dc, megasas_scsi_reset);
dc->vmsd = info->vmsd;
set_bit(DEVICE_CATEGORY_STORAGE, dc->categories);
diff --git a/hw/scsi/mptsas.c b/hw/scsi/mptsas.c
index a06113d..de628ae 100644
--- a/hw/scsi/mptsas.c
+++ b/hw/scsi/mptsas.c
@@ -1414,7 +1414,6 @@
DEFINE_PROP_UINT64("sas_address", MPTSASState, sas_addr, 0),
/* TODO: test MSI support under Windows */
DEFINE_PROP_ON_OFF_AUTO("msi", MPTSASState, msi, ON_OFF_AUTO_AUTO),
- DEFINE_PROP_END_OF_LIST(),
};
static void mptsas1068_class_init(ObjectClass *oc, void *data)
diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c
index 2f1678d..181720b 100644
--- a/hw/scsi/scsi-bus.c
+++ b/hw/scsi/scsi-bus.c
@@ -1947,7 +1947,6 @@
DEFINE_PROP_UINT32("channel", SCSIDevice, channel, 0),
DEFINE_PROP_UINT32("scsi-id", SCSIDevice, id, -1),
DEFINE_PROP_UINT32("lun", SCSIDevice, lun, -1),
- DEFINE_PROP_END_OF_LIST(),
};
static void scsi_device_class_init(ObjectClass *klass, void *data)
diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c
index a47b8090..16351b4 100644
--- a/hw/scsi/scsi-disk.c
+++ b/hw/scsi/scsi-disk.c
@@ -3227,7 +3227,6 @@
quirks, SCSI_DISK_QUIRK_MODE_PAGE_VENDOR_SPECIFIC_APPLE,
0),
DEFINE_BLOCK_CHS_PROPERTIES(SCSIDiskState, qdev.conf),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_scsi_disk_state = {
@@ -3285,7 +3284,6 @@
0),
DEFINE_PROP_BIT("quirk_mode_page_truncated", SCSIDiskState, quirks,
SCSI_DISK_QUIRK_MODE_PAGE_TRUNCATED, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void scsi_cd_class_initfn(ObjectClass *klass, void *data)
@@ -3323,7 +3321,6 @@
-1),
DEFINE_PROP_UINT32("io_timeout", SCSIDiskState, qdev.io_timeout,
DEFAULT_IO_TIMEOUT),
- DEFINE_PROP_END_OF_LIST(),
};
static void scsi_block_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/scsi/scsi-generic.c b/hw/scsi/scsi-generic.c
index d7ae754..0290a19 100644
--- a/hw/scsi/scsi-generic.c
+++ b/hw/scsi/scsi-generic.c
@@ -777,7 +777,6 @@
DEFINE_PROP_BOOL("share-rw", SCSIDevice, conf.share_rw, false),
DEFINE_PROP_UINT32("io_timeout", SCSIDevice, io_timeout,
DEFAULT_IO_TIMEOUT),
- DEFINE_PROP_END_OF_LIST(),
};
static int scsi_generic_parse_cdb(SCSIDevice *dev, SCSICommand *cmd,
diff --git a/hw/scsi/spapr_vscsi.c b/hw/scsi/spapr_vscsi.c
index 7c55e4d..6962194 100644
--- a/hw/scsi/spapr_vscsi.c
+++ b/hw/scsi/spapr_vscsi.c
@@ -1252,7 +1252,6 @@
static const Property spapr_vscsi_properties[] = {
DEFINE_SPAPR_PROPERTIES(VSCSIState, vdev),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_spapr_vscsi = {
diff --git a/hw/scsi/vhost-scsi.c b/hw/scsi/vhost-scsi.c
index effb8da..9f76066 100644
--- a/hw/scsi/vhost-scsi.c
+++ b/hw/scsi/vhost-scsi.c
@@ -362,7 +362,6 @@
DEFINE_PROP_BOOL("migratable", VHostSCSICommon, migratable, false),
DEFINE_PROP_BOOL("worker_per_virtqueue", VirtIOSCSICommon,
conf.worker_per_virtqueue, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_scsi_class_init(ObjectClass *klass, void *data)
diff --git a/hw/scsi/vhost-user-scsi.c b/hw/scsi/vhost-user-scsi.c
index d5265c5..689bc6c 100644
--- a/hw/scsi/vhost-user-scsi.c
+++ b/hw/scsi/vhost-user-scsi.c
@@ -360,7 +360,6 @@
DEFINE_PROP_BIT64("t10_pi", VHostSCSICommon, host_features,
VIRTIO_SCSI_F_T10_PI,
false),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_user_scsi_reset(VirtIODevice *vdev)
diff --git a/hw/scsi/virtio-scsi.c b/hw/scsi/virtio-scsi.c
index c0a4f1a..eb70a7a 100644
--- a/hw/scsi/virtio-scsi.c
+++ b/hw/scsi/virtio-scsi.c
@@ -1302,7 +1302,6 @@
VIRTIO_SCSI_F_CHANGE, true),
DEFINE_PROP_LINK("iothread", VirtIOSCSI, parent_obj.conf.iothread,
TYPE_IOTHREAD, IOThread *),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_virtio_scsi = {
diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c
index 46cec53..f07e377 100644
--- a/hw/scsi/vmw_pvscsi.c
+++ b/hw/scsi/vmw_pvscsi.c
@@ -1302,7 +1302,6 @@
PVSCSI_COMPAT_OLD_PCI_CONFIGURATION_BIT, false),
DEFINE_PROP_BIT("x-disable-pcie", PVSCSIState, compat_flags,
PVSCSI_COMPAT_DISABLE_PCIE_BIT, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void pvscsi_realize(DeviceState *qdev, Error **errp)
diff --git a/hw/sd/allwinner-sdhost.c b/hw/sd/allwinner-sdhost.c
index be39ec2..0b235bc 100644
--- a/hw/sd/allwinner-sdhost.c
+++ b/hw/sd/allwinner-sdhost.c
@@ -811,7 +811,6 @@
static const Property allwinner_sdhost_properties[] = {
DEFINE_PROP_LINK("dma-memory", AwSdHostState, dma_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void allwinner_sdhost_init(Object *obj)
diff --git a/hw/sd/aspeed_sdhci.c b/hw/sd/aspeed_sdhci.c
index 99703f1..12cbbae 100644
--- a/hw/sd/aspeed_sdhci.c
+++ b/hw/sd/aspeed_sdhci.c
@@ -206,7 +206,6 @@
static const Property aspeed_sdhci_properties[] = {
DEFINE_PROP_UINT8("num-slots", AspeedSDHCIState, num_slots, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void aspeed_sdhci_class_init(ObjectClass *classp, void *data)
diff --git a/hw/sd/sd.c b/hw/sd/sd.c
index b994ef5..779bac6 100644
--- a/hw/sd/sd.c
+++ b/hw/sd/sd.c
@@ -2800,19 +2800,16 @@
static const Property sdmmc_common_properties[] = {
DEFINE_PROP_DRIVE("drive", SDState, blk),
- DEFINE_PROP_END_OF_LIST()
};
static const Property sd_properties[] = {
DEFINE_PROP_UINT8("spec_version", SDState,
spec_version, SD_PHY_SPECv3_01_VERS),
- DEFINE_PROP_END_OF_LIST()
};
static const Property emmc_properties[] = {
DEFINE_PROP_UINT64("boot-partition-size", SDState, boot_part_size, 0),
DEFINE_PROP_UINT8("boot-config", SDState, boot_config, 0x0),
- DEFINE_PROP_END_OF_LIST()
};
static void sdmmc_common_class_init(ObjectClass *klass, void *data)
diff --git a/hw/sd/sdhci-pci.c b/hw/sd/sdhci-pci.c
index 83892a7..5268c0d 100644
--- a/hw/sd/sdhci-pci.c
+++ b/hw/sd/sdhci-pci.c
@@ -24,7 +24,6 @@
static const Property sdhci_pci_properties[] = {
DEFINE_SDHCI_COMMON_PROPERTIES(SDHCIState),
- DEFINE_PROP_END_OF_LIST(),
};
static void sdhci_pci_realize(PCIDevice *dev, Error **errp)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index e697ee0..64a936f 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1550,7 +1550,6 @@
false),
DEFINE_PROP_LINK("dma", SDHCIState,
dma_mr, TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void sdhci_sysbus_init(Object *obj)
diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c
index d52e6a7..7ec3465 100644
--- a/hw/sparc/sun4m.c
+++ b/hw/sparc/sun4m.c
@@ -732,15 +732,10 @@
sysbus_init_mmio(dev, &s->prom);
}
-static Property prom_properties[] = {
- {/* end of property list */},
-};
-
static void prom_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- device_class_set_props(dc, prom_properties);
dc->realize = prom_realize;
}
diff --git a/hw/sparc/sun4m_iommu.c b/hw/sparc/sun4m_iommu.c
index 3d6fcdf..8c1fc82 100644
--- a/hw/sparc/sun4m_iommu.c
+++ b/hw/sparc/sun4m_iommu.c
@@ -370,7 +370,6 @@
static const Property iommu_properties[] = {
DEFINE_PROP_UINT32("version", IOMMUState, version, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void iommu_class_init(ObjectClass *klass, void *data)
diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c
index 7088ac2..b6f65e8 100644
--- a/hw/sparc64/sun4u.c
+++ b/hw/sparc64/sun4u.c
@@ -377,7 +377,6 @@
static const Property ebus_properties[] = {
DEFINE_PROP_UINT64("console-serial-base", EbusState,
console_serial_base, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void ebus_class_init(ObjectClass *klass, void *data)
@@ -471,15 +470,10 @@
sysbus_init_mmio(dev, &s->prom);
}
-static Property prom_properties[] = {
- {/* end of property list */},
-};
-
static void prom_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- device_class_set_props(dc, prom_properties);
dc->realize = prom_realize;
}
@@ -534,7 +528,6 @@
static const Property ram_properties[] = {
DEFINE_PROP_UINT64("size", RamDevice, size, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void ram_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index bbdd4e4..faef1a8 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -1292,7 +1292,6 @@
DEFINE_PROP_UINT64("dram-base", AspeedSMCState, dram_base, 0),
DEFINE_PROP_LINK("dram", AspeedSMCState, dram_mr,
TYPE_MEMORY_REGION, MemoryRegion *),
- DEFINE_PROP_END_OF_LIST(),
};
static void aspeed_smc_class_init(ObjectClass *klass, void *data)
@@ -1340,7 +1339,6 @@
DEFINE_PROP_UINT8("cs", AspeedSMCFlash, cs, 0),
DEFINE_PROP_LINK("controller", AspeedSMCFlash, controller, TYPE_ASPEED_SMC,
AspeedSMCState *),
- DEFINE_PROP_END_OF_LIST(),
};
static void aspeed_smc_flash_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ssi/ibex_spi_host.c b/hw/ssi/ibex_spi_host.c
index 60a0b17..46c7b63 100644
--- a/hw/ssi/ibex_spi_host.c
+++ b/hw/ssi/ibex_spi_host.c
@@ -563,7 +563,6 @@
static const Property ibex_spi_properties[] = {
DEFINE_PROP_UINT32("num_cs", IbexSPIHostState, num_cs, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_ibex = {
diff --git a/hw/ssi/npcm7xx_fiu.c b/hw/ssi/npcm7xx_fiu.c
index fdd3ad2..21fc489 100644
--- a/hw/ssi/npcm7xx_fiu.c
+++ b/hw/ssi/npcm7xx_fiu.c
@@ -543,7 +543,6 @@
static const Property npcm7xx_fiu_properties[] = {
DEFINE_PROP_INT32("cs-count", NPCM7xxFIUState, cs_count, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void npcm7xx_fiu_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ssi/pnv_spi.c b/hw/ssi/pnv_spi.c
index 4ca9c46..15e25bd 100644
--- a/hw/ssi/pnv_spi.c
+++ b/hw/ssi/pnv_spi.c
@@ -1198,7 +1198,6 @@
static const Property pnv_spi_properties[] = {
DEFINE_PROP_UINT32("spic_num", PnvSpi, spic_num, 0),
DEFINE_PROP_UINT8("transfer_len", PnvSpi, transfer_len, 4),
- DEFINE_PROP_END_OF_LIST(),
};
static void pnv_spi_realize(DeviceState *dev, Error **errp)
diff --git a/hw/ssi/sifive_spi.c b/hw/ssi/sifive_spi.c
index 7458747..76f8654 100644
--- a/hw/ssi/sifive_spi.c
+++ b/hw/ssi/sifive_spi.c
@@ -330,7 +330,6 @@
static const Property sifive_spi_properties[] = {
DEFINE_PROP_UINT32("num-cs", SiFiveSPIState, num_cs, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void sifive_spi_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ssi/ssi.c b/hw/ssi/ssi.c
index cab0014..872c4e8 100644
--- a/hw/ssi/ssi.c
+++ b/hw/ssi/ssi.c
@@ -110,7 +110,6 @@
static const Property ssi_peripheral_properties[] = {
DEFINE_PROP_UINT8("cs", SSIPeripheral, cs_index, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void ssi_peripheral_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ssi/xilinx_spi.c b/hw/ssi/xilinx_spi.c
index 588c1ec..fd1ff12 100644
--- a/hw/ssi/xilinx_spi.c
+++ b/hw/ssi/xilinx_spi.c
@@ -363,7 +363,6 @@
static const Property xilinx_spi_properties[] = {
DEFINE_PROP_UINT8("num-ss-bits", XilinxSPI, num_cs, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void xilinx_spi_class_init(ObjectClass *klass, void *data)
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index f72cb3c..984c178 100644
--- a/hw/ssi/xilinx_spips.c
+++ b/hw/ssi/xilinx_spips.c
@@ -1422,14 +1422,12 @@
static const Property xilinx_zynqmp_qspips_properties[] = {
DEFINE_PROP_UINT32("dma-burst-size", XlnxZynqMPQSPIPS, dma_burst_size, 64),
- DEFINE_PROP_END_OF_LIST(),
};
static const Property xilinx_spips_properties[] = {
DEFINE_PROP_UINT8("num-busses", XilinxSPIPS, num_busses, 1),
DEFINE_PROP_UINT8("num-ss-bits", XilinxSPIPS, num_cs, 4),
DEFINE_PROP_UINT8("num-txrx-bytes", XilinxSPIPS, num_txrx_bytes, 1),
- DEFINE_PROP_END_OF_LIST(),
};
static void xilinx_qspips_class_init(ObjectClass *klass, void * data)
diff --git a/hw/ssi/xlnx-versal-ospi.c b/hw/ssi/xlnx-versal-ospi.c
index e51abe9..9e96c9b 100644
--- a/hw/ssi/xlnx-versal-ospi.c
+++ b/hw/ssi/xlnx-versal-ospi.c
@@ -1829,7 +1829,6 @@
DEFINE_PROP_BOOL("dac-with-indac", XlnxVersalOspi, dac_with_indac, false),
DEFINE_PROP_BOOL("indac-write-disabled", XlnxVersalOspi,
ind_write_disabled, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void xlnx_versal_ospi_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/a9gtimer.c b/hw/timer/a9gtimer.c
index c0a91ba..0c4eef2 100644
--- a/hw/timer/a9gtimer.c
+++ b/hw/timer/a9gtimer.c
@@ -375,7 +375,6 @@
static const Property a9_gtimer_properties[] = {
DEFINE_PROP_UINT32("num-cpu", A9GTimerState, num_cpu, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void a9_gtimer_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/allwinner-a10-pit.c b/hw/timer/allwinner-a10-pit.c
index 2904ccf..ddaf212 100644
--- a/hw/timer/allwinner-a10-pit.c
+++ b/hw/timer/allwinner-a10-pit.c
@@ -193,7 +193,6 @@
DEFINE_PROP_UINT32("clk1-freq", AwA10PITState, clk_freq[1], 0),
DEFINE_PROP_UINT32("clk2-freq", AwA10PITState, clk_freq[2], 0),
DEFINE_PROP_UINT32("clk3-freq", AwA10PITState, clk_freq[3], 0),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_a10_pit = {
diff --git a/hw/timer/arm_mptimer.c b/hw/timer/arm_mptimer.c
index 6244a7a..803dad1 100644
--- a/hw/timer/arm_mptimer.c
+++ b/hw/timer/arm_mptimer.c
@@ -302,7 +302,6 @@
static const Property arm_mptimer_properties[] = {
DEFINE_PROP_UINT32("num-cpu", ARMMPTimerState, num_cpu, 0),
- DEFINE_PROP_END_OF_LIST()
};
static void arm_mptimer_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/arm_timer.c b/hw/timer/arm_timer.c
index dfa0342..1213b77 100644
--- a/hw/timer/arm_timer.c
+++ b/hw/timer/arm_timer.c
@@ -390,7 +390,6 @@
static const Property sp804_properties[] = {
DEFINE_PROP_UINT32("freq0", SP804State, freq0, 1000000),
DEFINE_PROP_UINT32("freq1", SP804State, freq1, 1000000),
- DEFINE_PROP_END_OF_LIST(),
};
static void sp804_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/aspeed_timer.c b/hw/timer/aspeed_timer.c
index 4c16b50..4868651 100644
--- a/hw/timer/aspeed_timer.c
+++ b/hw/timer/aspeed_timer.c
@@ -677,7 +677,6 @@
static const Property aspeed_timer_properties[] = {
DEFINE_PROP_LINK("scu", AspeedTimerCtrlState, scu, TYPE_ASPEED_SCU,
AspeedSCUState *),
- DEFINE_PROP_END_OF_LIST(),
};
static void timer_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/avr_timer16.c b/hw/timer/avr_timer16.c
index 2e3ce83..96baf9c 100644
--- a/hw/timer/avr_timer16.c
+++ b/hw/timer/avr_timer16.c
@@ -546,7 +546,6 @@
DEFINE_PROP_UINT8("id", struct AVRTimer16State, id, 0),
DEFINE_PROP_UINT64("cpu-frequency-hz", struct AVRTimer16State,
cpu_freq_hz, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void avr_timer16_pr(void *opaque, int irq, int level)
diff --git a/hw/timer/grlib_gptimer.c b/hw/timer/grlib_gptimer.c
index a7428ed..f0802b6 100644
--- a/hw/timer/grlib_gptimer.c
+++ b/hw/timer/grlib_gptimer.c
@@ -407,7 +407,6 @@
DEFINE_PROP_UINT32("frequency", GPTimerUnit, freq_hz, 40000000),
DEFINE_PROP_UINT32("irq-line", GPTimerUnit, irq_line, 8),
DEFINE_PROP_UINT32("nr-timers", GPTimerUnit, nr_timers, 2),
- DEFINE_PROP_END_OF_LIST(),
};
static void grlib_gptimer_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/hpet.c b/hw/timer/hpet.c
index 46886c3..2a45410 100644
--- a/hw/timer/hpet.c
+++ b/hw/timer/hpet.c
@@ -750,7 +750,6 @@
DEFINE_PROP_BIT("msi", HPETState, flags, HPET_MSI_SUPPORT, false),
DEFINE_PROP_UINT32(HPET_INTCAP, HPETState, intcap, 0),
DEFINE_PROP_BOOL("hpet-offset-saved", HPETState, hpet_offset_saved, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void hpet_device_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/i8254_common.c b/hw/timer/i8254_common.c
index 953c1e1..29105af 100644
--- a/hw/timer/i8254_common.c
+++ b/hw/timer/i8254_common.c
@@ -240,7 +240,6 @@
static const Property pit_common_properties[] = {
DEFINE_PROP_UINT32("iobase", PITCommonState, iobase, -1),
- DEFINE_PROP_END_OF_LIST(),
};
static void pit_common_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/ibex_timer.c b/hw/timer/ibex_timer.c
index fba4466..3ebc870 100644
--- a/hw/timer/ibex_timer.c
+++ b/hw/timer/ibex_timer.c
@@ -265,7 +265,6 @@
static const Property ibex_timer_properties[] = {
DEFINE_PROP_UINT32("timebase-freq", IbexTimerState, timebase_freq, 10000),
- DEFINE_PROP_END_OF_LIST(),
};
static void ibex_timer_init(Object *obj)
diff --git a/hw/timer/mss-timer.c b/hw/timer/mss-timer.c
index e5c5cd6..594da64 100644
--- a/hw/timer/mss-timer.c
+++ b/hw/timer/mss-timer.c
@@ -283,7 +283,6 @@
/* Libero GUI shows 100Mhz as default for clocks */
DEFINE_PROP_UINT32("clock-frequency", MSSTimerState, freq_hz,
100 * 1000000),
- DEFINE_PROP_END_OF_LIST(),
};
static void mss_timer_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/nrf51_timer.c b/hw/timer/nrf51_timer.c
index 48fccec..11ad8b5 100644
--- a/hw/timer/nrf51_timer.c
+++ b/hw/timer/nrf51_timer.c
@@ -381,7 +381,6 @@
static const Property nrf51_timer_properties[] = {
DEFINE_PROP_UINT8("id", NRF51TimerState, id, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void nrf51_timer_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/pxa2xx_timer.c b/hw/timer/pxa2xx_timer.c
index 345145b..6ec3fa5 100644
--- a/hw/timer/pxa2xx_timer.c
+++ b/hw/timer/pxa2xx_timer.c
@@ -553,7 +553,6 @@
DEFINE_PROP_UINT32("freq", PXA2xxTimerInfo, freq, PXA25X_FREQ),
DEFINE_PROP_BIT("tm4", PXA2xxTimerInfo, flags,
PXA2XX_TIMER_HAVE_TM4, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void pxa25x_timer_dev_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/renesas_cmt.c b/hw/timer/renesas_cmt.c
index 6d451fa..93e7f58 100644
--- a/hw/timer/renesas_cmt.c
+++ b/hw/timer/renesas_cmt.c
@@ -255,7 +255,6 @@
static const Property rcmt_properties[] = {
DEFINE_PROP_UINT64("input-freq", RCMTState, input_freq, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void rcmt_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/renesas_tmr.c b/hw/timer/renesas_tmr.c
index 890f803..884349c 100644
--- a/hw/timer/renesas_tmr.c
+++ b/hw/timer/renesas_tmr.c
@@ -465,7 +465,6 @@
static const Property rtmr_properties[] = {
DEFINE_PROP_UINT64("input-freq", RTMRState, input_freq, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void rtmr_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/sifive_pwm.c b/hw/timer/sifive_pwm.c
index 042c89c..fc796e9 100644
--- a/hw/timer/sifive_pwm.c
+++ b/hw/timer/sifive_pwm.c
@@ -408,7 +408,6 @@
/* 0.5Ghz per spec after FSBL */
DEFINE_PROP_UINT64("clock-frequency", struct SiFivePwmState,
freq_hz, 500000000ULL),
- DEFINE_PROP_END_OF_LIST(),
};
static void sifive_pwm_init(Object *obj)
diff --git a/hw/timer/slavio_timer.c b/hw/timer/slavio_timer.c
index 32991f4..65b24e4 100644
--- a/hw/timer/slavio_timer.c
+++ b/hw/timer/slavio_timer.c
@@ -422,7 +422,6 @@
static const Property slavio_timer_properties[] = {
DEFINE_PROP_UINT32("num_cpus", SLAVIO_TIMERState, num_cpus, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void slavio_timer_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/sse-timer.c b/hw/timer/sse-timer.c
index 6b7a679..e106739 100644
--- a/hw/timer/sse-timer.c
+++ b/hw/timer/sse-timer.c
@@ -442,7 +442,6 @@
static const Property sse_timer_properties[] = {
DEFINE_PROP_LINK("counter", SSETimer, counter, TYPE_SSE_COUNTER, SSECounter *),
- DEFINE_PROP_END_OF_LIST(),
};
static void sse_timer_class_init(ObjectClass *klass, void *data)
diff --git a/hw/timer/stm32f2xx_timer.c b/hw/timer/stm32f2xx_timer.c
index d9d745c..4707190 100644
--- a/hw/timer/stm32f2xx_timer.c
+++ b/hw/timer/stm32f2xx_timer.c
@@ -301,7 +301,6 @@
static const Property stm32f2xx_timer_properties[] = {
DEFINE_PROP_UINT64("clock-frequency", struct STM32F2XXTimerState,
freq_hz, 1000000000),
- DEFINE_PROP_END_OF_LIST(),
};
static void stm32f2xx_timer_init(Object *obj)
diff --git a/hw/timer/xilinx_timer.c b/hw/timer/xilinx_timer.c
index 7fe3e83..4955fe1 100644
--- a/hw/timer/xilinx_timer.c
+++ b/hw/timer/xilinx_timer.c
@@ -245,7 +245,6 @@
static const Property xilinx_timer_properties[] = {
DEFINE_PROP_UINT32("clock-frequency", XpsTimerState, freq_hz, 62 * 1000000),
DEFINE_PROP_UINT8("one-timer-only", XpsTimerState, one_timer_only, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void xilinx_timer_class_init(ObjectClass *klass, void *data)
diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c
index 2bf6e7f..e652679 100644
--- a/hw/tpm/tpm_crb.c
+++ b/hw/tpm/tpm_crb.c
@@ -229,7 +229,6 @@
static const Property tpm_crb_properties[] = {
DEFINE_PROP_TPMBE("tpmdev", CRBState, tpmbe),
DEFINE_PROP_BOOL("ppi", CRBState, ppi_enabled, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void tpm_crb_reset(void *dev)
diff --git a/hw/tpm/tpm_spapr.c b/hw/tpm/tpm_spapr.c
index e15b67d..797fd8b 100644
--- a/hw/tpm/tpm_spapr.c
+++ b/hw/tpm/tpm_spapr.c
@@ -367,7 +367,6 @@
static const Property tpm_spapr_properties[] = {
DEFINE_SPAPR_PROPERTIES(SpaprTpmState, vdev),
DEFINE_PROP_TPMBE("tpmdev", SpaprTpmState, be_driver),
- DEFINE_PROP_END_OF_LIST(),
};
static void tpm_spapr_realizefn(SpaprVioDevice *dev, Error **errp)
diff --git a/hw/tpm/tpm_tis_i2c.c b/hw/tpm/tpm_tis_i2c.c
index b27af23..504328e 100644
--- a/hw/tpm/tpm_tis_i2c.c
+++ b/hw/tpm/tpm_tis_i2c.c
@@ -493,7 +493,6 @@
static const Property tpm_tis_i2c_properties[] = {
DEFINE_PROP_TPMBE("tpmdev", TPMStateI2C, state.be_driver),
- DEFINE_PROP_END_OF_LIST(),
};
static void tpm_tis_i2c_realizefn(DeviceState *dev, Error **errp)
diff --git a/hw/tpm/tpm_tis_isa.c b/hw/tpm/tpm_tis_isa.c
index 9b21609..876cb02 100644
--- a/hw/tpm/tpm_tis_isa.c
+++ b/hw/tpm/tpm_tis_isa.c
@@ -95,7 +95,6 @@
DEFINE_PROP_UINT32("irq", TPMStateISA, state.irq_num, TPM_TIS_IRQ),
DEFINE_PROP_TPMBE("tpmdev", TPMStateISA, state.be_driver),
DEFINE_PROP_BOOL("ppi", TPMStateISA, state.ppi_enabled, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void tpm_tis_isa_initfn(Object *obj)
diff --git a/hw/tpm/tpm_tis_sysbus.c b/hw/tpm/tpm_tis_sysbus.c
index 88c1f1e..ee0bfe9 100644
--- a/hw/tpm/tpm_tis_sysbus.c
+++ b/hw/tpm/tpm_tis_sysbus.c
@@ -93,7 +93,6 @@
static const Property tpm_tis_sysbus_properties[] = {
DEFINE_PROP_UINT32("irq", TPMStateSysBus, state.irq_num, TPM_TIS_IRQ),
DEFINE_PROP_TPMBE("tpmdev", TPMStateSysBus, state.be_driver),
- DEFINE_PROP_END_OF_LIST(),
};
static void tpm_tis_sysbus_initfn(Object *obj)
diff --git a/hw/tricore/tc27x_soc.c b/hw/tricore/tc27x_soc.c
index ecd9271..81bb16d 100644
--- a/hw/tricore/tc27x_soc.c
+++ b/hw/tricore/tc27x_soc.c
@@ -201,16 +201,11 @@
object_initialize_child(obj, "tc27x", &s->cpu, sc->cpu_type);
}
-static Property tc27x_soc_properties[] = {
- DEFINE_PROP_END_OF_LIST(),
-};
-
static void tc27x_soc_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
dc->realize = tc27x_soc_realize;
- device_class_set_props(dc, tc27x_soc_properties);
}
static void tc277d_soc_class_init(ObjectClass *oc, void *data)
diff --git a/hw/tricore/tricore_testdevice.c b/hw/tricore/tricore_testdevice.c
index ae95c49..e60866d 100644
--- a/hw/tricore/tricore_testdevice.c
+++ b/hw/tricore/tricore_testdevice.c
@@ -58,15 +58,10 @@
"tricore_testdevice", 0x4);
}
-static Property tricore_testdevice_properties[] = {
- DEFINE_PROP_END_OF_LIST()
-};
-
static void tricore_testdevice_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- device_class_set_props(dc, tricore_testdevice_properties);
device_class_set_legacy_reset(dc, tricore_testdevice_reset);
}
diff --git a/hw/ufs/lu.c b/hw/ufs/lu.c
index 74ff52a..4100ea2 100644
--- a/hw/ufs/lu.c
+++ b/hw/ufs/lu.c
@@ -277,7 +277,6 @@
static const Property ufs_lu_props[] = {
DEFINE_PROP_DRIVE("drive", UfsLu, conf.blk),
DEFINE_PROP_UINT8("lun", UfsLu, lun, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static bool ufs_add_lu(UfsHc *u, UfsLu *lu, Error **errp)
diff --git a/hw/ufs/ufs.c b/hw/ufs/ufs.c
index fe77158..8d26d13 100644
--- a/hw/ufs/ufs.c
+++ b/hw/ufs/ufs.c
@@ -1758,7 +1758,6 @@
DEFINE_PROP_UINT8("nutmrs", UfsHc, params.nutmrs, 8),
DEFINE_PROP_BOOL("mcq", UfsHc, params.mcq, false),
DEFINE_PROP_UINT8("mcq-maxq", UfsHc, params.mcq_maxq, 2),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription ufs_vmstate = {
diff --git a/hw/usb/bus.c b/hw/usb/bus.c
index 80e6a92..7e4ff36 100644
--- a/hw/usb/bus.c
+++ b/hw/usb/bus.c
@@ -24,7 +24,6 @@
DEFINE_PROP_BIT("msos-desc", USBDevice, flags,
USB_DEV_FLAG_MSOS_DESC_ENABLE, true),
DEFINE_PROP_STRING("pcap", USBDevice, pcap_filename),
- DEFINE_PROP_END_OF_LIST()
};
static void usb_bus_class_init(ObjectClass *klass, void *data)
diff --git a/hw/usb/canokey.c b/hw/usb/canokey.c
index 7cb600e..fae212f 100644
--- a/hw/usb/canokey.c
+++ b/hw/usb/canokey.c
@@ -298,7 +298,6 @@
static const Property canokey_properties[] = {
DEFINE_PROP_STRING("file", CanoKeyState, file),
- DEFINE_PROP_END_OF_LIST(),
};
static void canokey_class_init(ObjectClass *klass, void *data)
diff --git a/hw/usb/ccid-card-emulated.c b/hw/usb/ccid-card-emulated.c
index dd58333..b1e330f 100644
--- a/hw/usb/ccid-card-emulated.c
+++ b/hw/usb/ccid-card-emulated.c
@@ -589,7 +589,6 @@
DEFINE_PROP_STRING("cert3", EmulatedState, cert3),
DEFINE_PROP_STRING("db", EmulatedState, db),
DEFINE_PROP_UINT8("debug", EmulatedState, debug, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void emulated_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/usb/ccid-card-passthru.c b/hw/usb/ccid-card-passthru.c
index f97dcf7..bf81485 100644
--- a/hw/usb/ccid-card-passthru.c
+++ b/hw/usb/ccid-card-passthru.c
@@ -391,7 +391,6 @@
static const Property passthru_card_properties[] = {
DEFINE_PROP_CHR("chardev", PassthruState, cs),
DEFINE_PROP_UINT8("debug", PassthruState, debug, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void passthru_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/usb/dev-audio.c b/hw/usb/dev-audio.c
index 6007f16..40f0312 100644
--- a/hw/usb/dev-audio.c
+++ b/hw/usb/dev-audio.c
@@ -995,7 +995,6 @@
DEFINE_PROP_UINT32("debug", USBAudioState, debug, 0),
DEFINE_PROP_UINT32("buffer", USBAudioState, buffer_user, 0),
DEFINE_PROP_BOOL("multi", USBAudioState, multi, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void usb_audio_class_init(ObjectClass *klass, void *data)
diff --git a/hw/usb/dev-hid.c b/hw/usb/dev-hid.c
index d83f67b..accdd46 100644
--- a/hw/usb/dev-hid.c
+++ b/hw/usb/dev-hid.c
@@ -797,7 +797,6 @@
DEFINE_PROP_UINT32("usb_version", USBHIDState, usb_version, 2),
DEFINE_PROP_STRING("display", USBHIDState, display),
DEFINE_PROP_UINT32("head", USBHIDState, head, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void usb_tablet_class_initfn(ObjectClass *klass, void *data)
@@ -820,7 +819,6 @@
static const Property usb_mouse_properties[] = {
DEFINE_PROP_UINT32("usb_version", USBHIDState, usb_version, 2),
- DEFINE_PROP_END_OF_LIST(),
};
static void usb_mouse_class_initfn(ObjectClass *klass, void *data)
@@ -844,7 +842,6 @@
static const Property usb_keyboard_properties[] = {
DEFINE_PROP_UINT32("usb_version", USBHIDState, usb_version, 2),
DEFINE_PROP_STRING("display", USBHIDState, display),
- DEFINE_PROP_END_OF_LIST(),
};
static void usb_keyboard_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/usb/dev-hub.c b/hw/usb/dev-hub.c
index 317ca0b..3880e2a 100644
--- a/hw/usb/dev-hub.c
+++ b/hw/usb/dev-hub.c
@@ -668,7 +668,6 @@
static const Property usb_hub_properties[] = {
DEFINE_PROP_UINT32("ports", USBHubState, num_ports, 8),
DEFINE_PROP_BOOL("port-power", USBHubState, port_power, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void usb_hub_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/usb/dev-mtp.c b/hw/usb/dev-mtp.c
index 7994727..326c92a 100644
--- a/hw/usb/dev-mtp.c
+++ b/hw/usb/dev-mtp.c
@@ -2082,7 +2082,6 @@
DEFINE_PROP_STRING("rootdir", MTPState, root),
DEFINE_PROP_STRING("desc", MTPState, desc),
DEFINE_PROP_BOOL("readonly", MTPState, readonly, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void usb_mtp_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/usb/dev-network.c b/hw/usb/dev-network.c
index 6c4f577..8186310 100644
--- a/hw/usb/dev-network.c
+++ b/hw/usb/dev-network.c
@@ -1409,7 +1409,6 @@
static const Property net_properties[] = {
DEFINE_NIC_PROPERTIES(USBNetState, conf),
- DEFINE_PROP_END_OF_LIST(),
};
static void usb_net_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/usb/dev-serial.c b/hw/usb/dev-serial.c
index 0c3e916..a0821db 100644
--- a/hw/usb/dev-serial.c
+++ b/hw/usb/dev-serial.c
@@ -637,7 +637,6 @@
static const Property serial_properties[] = {
DEFINE_PROP_CHR("chardev", USBSerialState, cs),
DEFINE_PROP_BOOL("always-plugged", USBSerialState, always_plugged, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void usb_serial_dev_class_init(ObjectClass *klass, void *data)
@@ -679,7 +678,6 @@
static const Property braille_properties[] = {
DEFINE_PROP_CHR("chardev", USBSerialState, cs),
- DEFINE_PROP_END_OF_LIST(),
};
static void usb_braille_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/usb/dev-smartcard-reader.c b/hw/usb/dev-smartcard-reader.c
index c3c02f0..73deb3c 100644
--- a/hw/usb/dev-smartcard-reader.c
+++ b/hw/usb/dev-smartcard-reader.c
@@ -1173,7 +1173,6 @@
static const Property ccid_props[] = {
DEFINE_PROP_UINT32("slot", struct CCIDCardState, slot, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static const TypeInfo ccid_bus_info = {
@@ -1433,7 +1432,6 @@
static const Property ccid_properties[] = {
DEFINE_PROP_UINT8("debug", USBCCIDState, debug, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void ccid_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/usb/dev-storage-classic.c b/hw/usb/dev-storage-classic.c
index ca037ba..818f58d 100644
--- a/hw/usb/dev-storage-classic.c
+++ b/hw/usb/dev-storage-classic.c
@@ -72,7 +72,6 @@
DEFINE_BLOCK_ERROR_PROPERTIES(MSDState, conf),
DEFINE_PROP_BOOL("removable", MSDState, removable, false),
DEFINE_PROP_BOOL("commandlog", MSDState, commandlog, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void usb_msd_class_storage_initfn(ObjectClass *klass, void *data)
diff --git a/hw/usb/dev-uas.c b/hw/usb/dev-uas.c
index 57e8d20..44e3001 100644
--- a/hw/usb/dev-uas.c
+++ b/hw/usb/dev-uas.c
@@ -955,7 +955,6 @@
static const Property uas_properties[] = {
DEFINE_PROP_UINT32("log-scsi-req", UASDevice, requestlog, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void usb_uas_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/usb/hcd-dwc2.c b/hw/usb/hcd-dwc2.c
index 6a10f3e..e815271 100644
--- a/hw/usb/hcd-dwc2.c
+++ b/hw/usb/hcd-dwc2.c
@@ -1450,7 +1450,6 @@
static const Property dwc2_usb_properties[] = {
DEFINE_PROP_UINT32("usb_version", DWC2State, usb_version, 2),
- DEFINE_PROP_END_OF_LIST(),
};
static void dwc2_class_init(ObjectClass *klass, void *data)
diff --git a/hw/usb/hcd-dwc3.c b/hw/usb/hcd-dwc3.c
index ff970bd..9ce9ba0 100644
--- a/hw/usb/hcd-dwc3.c
+++ b/hw/usb/hcd-dwc3.c
@@ -659,7 +659,6 @@
static const Property usb_dwc3_properties[] = {
DEFINE_PROP_UINT32("DWC_USB3_USERID", USBDWC3, cfg.dwc_usb3_user,
0x12345678),
- DEFINE_PROP_END_OF_LIST(),
};
static void usb_dwc3_class_init(ObjectClass *klass, void *data)
diff --git a/hw/usb/hcd-ehci-pci.c b/hw/usb/hcd-ehci-pci.c
index 374f25c..d410c38 100644
--- a/hw/usb/hcd-ehci-pci.c
+++ b/hw/usb/hcd-ehci-pci.c
@@ -137,7 +137,6 @@
static const Property ehci_pci_properties[] = {
DEFINE_PROP_UINT32("maxframes", EHCIPCIState, ehci.maxframes, 128),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_ehci_pci = {
diff --git a/hw/usb/hcd-ehci-sysbus.c b/hw/usb/hcd-ehci-sysbus.c
index f4e08aa..768c3dd 100644
--- a/hw/usb/hcd-ehci-sysbus.c
+++ b/hw/usb/hcd-ehci-sysbus.c
@@ -34,7 +34,6 @@
DEFINE_PROP_UINT32("maxframes", EHCISysBusState, ehci.maxframes, 128),
DEFINE_PROP_BOOL("companion-enable", EHCISysBusState, ehci.companion_enable,
false),
- DEFINE_PROP_END_OF_LIST(),
};
static void usb_ehci_sysbus_realize(DeviceState *dev, Error **errp)
diff --git a/hw/usb/hcd-ohci-pci.c b/hw/usb/hcd-ohci-pci.c
index 459644c..b3684a2 100644
--- a/hw/usb/hcd-ohci-pci.c
+++ b/hw/usb/hcd-ohci-pci.c
@@ -113,7 +113,6 @@
DEFINE_PROP_STRING("masterbus", OHCIPCIState, masterbus),
DEFINE_PROP_UINT32("num-ports", OHCIPCIState, num_ports, 3),
DEFINE_PROP_UINT32("firstport", OHCIPCIState, firstport, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_ohci = {
diff --git a/hw/usb/hcd-ohci-sysbus.c b/hw/usb/hcd-ohci-sysbus.c
index 81cf2e5..1531194 100644
--- a/hw/usb/hcd-ohci-sysbus.c
+++ b/hw/usb/hcd-ohci-sysbus.c
@@ -62,7 +62,6 @@
DEFINE_PROP_UINT32("num-ports", OHCISysBusState, num_ports, 3),
DEFINE_PROP_UINT32("firstport", OHCISysBusState, firstport, 0),
DEFINE_PROP_DMAADDR("dma-offset", OHCISysBusState, dma_offset, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void ohci_sysbus_class_init(ObjectClass *klass, void *data)
diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c
index 245352c..142f24f 100644
--- a/hw/usb/hcd-uhci.c
+++ b/hw/usb/hcd-uhci.c
@@ -1232,12 +1232,10 @@
DEFINE_PROP_UINT32("firstport", UHCIState, firstport, 0),
DEFINE_PROP_UINT32("bandwidth", UHCIState, frame_bandwidth, 1280),
DEFINE_PROP_UINT32("maxframes", UHCIState, maxframes, 128),
- DEFINE_PROP_END_OF_LIST(),
};
static const Property uhci_properties_standalone[] = {
DEFINE_PROP_UINT32("bandwidth", UHCIState, frame_bandwidth, 1280),
DEFINE_PROP_UINT32("maxframes", UHCIState, maxframes, 128),
- DEFINE_PROP_END_OF_LIST(),
};
static void uhci_class_init(ObjectClass *klass, void *data)
diff --git a/hw/usb/hcd-xhci-nec.c b/hw/usb/hcd-xhci-nec.c
index f06e740..b1df95b 100644
--- a/hw/usb/hcd-xhci-nec.c
+++ b/hw/usb/hcd-xhci-nec.c
@@ -41,7 +41,6 @@
DEFINE_PROP_ON_OFF_AUTO("msix", XHCIPciState, msix, ON_OFF_AUTO_AUTO),
DEFINE_PROP_UINT32("intrs", XHCINecState, intrs, XHCI_MAXINTRS),
DEFINE_PROP_UINT32("slots", XHCINecState, slots, XHCI_MAXSLOTS),
- DEFINE_PROP_END_OF_LIST(),
};
static void nec_xhci_instance_init(Object *obj)
diff --git a/hw/usb/hcd-xhci-sysbus.c b/hw/usb/hcd-xhci-sysbus.c
index f4dbad7..ce43322 100644
--- a/hw/usb/hcd-xhci-sysbus.c
+++ b/hw/usb/hcd-xhci-sysbus.c
@@ -85,7 +85,6 @@
static const Property xhci_sysbus_props[] = {
DEFINE_PROP_UINT32("intrs", XHCISysbusState, xhci.numintrs, XHCI_MAXINTRS),
DEFINE_PROP_UINT32("slots", XHCISysbusState, xhci.numslots, XHCI_MAXSLOTS),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_xhci_sysbus = {
diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c
index 3c5006f..3719c0f 100644
--- a/hw/usb/hcd-xhci.c
+++ b/hw/usb/hcd-xhci.c
@@ -3612,7 +3612,6 @@
DEFINE_PROP_UINT32("p3", XHCIState, numports_3, 4),
DEFINE_PROP_LINK("host", XHCIState, hostOpaque, TYPE_DEVICE,
DeviceState *),
- DEFINE_PROP_END_OF_LIST(),
};
static void xhci_class_init(ObjectClass *klass, void *data)
diff --git a/hw/usb/host-libusb.c b/hw/usb/host-libusb.c
index 85d33b5..0c753f5 100644
--- a/hw/usb/host-libusb.c
+++ b/hw/usb/host-libusb.c
@@ -1779,7 +1779,6 @@
USB_HOST_OPT_PIPELINE, true),
DEFINE_PROP_BOOL("suppress-remote-wake", USBHostDevice,
suppress_remote_wake, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void usb_host_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/usb/redirect.c b/hw/usb/redirect.c
index f72a612..96fb963 100644
--- a/hw/usb/redirect.c
+++ b/hw/usb/redirect.c
@@ -2580,7 +2580,6 @@
DEFINE_PROP_BOOL("streams", USBRedirDevice, enable_streams, true),
DEFINE_PROP_BOOL("suppress-remote-wake", USBRedirDevice,
suppress_remote_wake, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void usbredir_class_initfn(ObjectClass *klass, void *data)
diff --git a/hw/usb/u2f-emulated.c b/hw/usb/u2f-emulated.c
index df86ce9..e1dd19e 100644
--- a/hw/usb/u2f-emulated.c
+++ b/hw/usb/u2f-emulated.c
@@ -375,7 +375,6 @@
DEFINE_PROP_STRING("privkey", U2FEmulatedState, privkey),
DEFINE_PROP_STRING("entropy", U2FEmulatedState, entropy),
DEFINE_PROP_STRING("counter", U2FEmulatedState, counter),
- DEFINE_PROP_END_OF_LIST(),
};
static void u2f_emulated_class_init(ObjectClass *klass, void *data)
diff --git a/hw/usb/u2f-passthru.c b/hw/usb/u2f-passthru.c
index ec4f616..8df5215 100644
--- a/hw/usb/u2f-passthru.c
+++ b/hw/usb/u2f-passthru.c
@@ -518,7 +518,6 @@
static const Property u2f_passthru_properties[] = {
DEFINE_PROP_STRING("hidraw", U2FPassthruState, hidraw),
- DEFINE_PROP_END_OF_LIST(),
};
static void u2f_passthru_class_init(ObjectClass *klass, void *data)
diff --git a/hw/vfio/ap.c b/hw/vfio/ap.c
index 2e6ea2d..529aad6 100644
--- a/hw/vfio/ap.c
+++ b/hw/vfio/ap.c
@@ -197,7 +197,6 @@
DEFINE_PROP_LINK("iommufd", VFIOAPDevice, vdev.iommufd,
TYPE_IOMMUFD_BACKEND, IOMMUFDBackend *),
#endif
- DEFINE_PROP_END_OF_LIST(),
};
static void vfio_ap_reset(DeviceState *dev)
diff --git a/hw/vfio/ccw.c b/hw/vfio/ccw.c
index b96ab27..bac56e8 100644
--- a/hw/vfio/ccw.c
+++ b/hw/vfio/ccw.c
@@ -663,7 +663,6 @@
TYPE_IOMMUFD_BACKEND, IOMMUFDBackend *),
#endif
DEFINE_PROP_CCW_LOADPARM("loadparm", CcwDevice, loadparm),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vfio_ccw_vmstate = {
diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-quirks.c
index d37f722..c8e6047 100644
--- a/hw/vfio/pci-quirks.c
+++ b/hw/vfio/pci-quirks.c
@@ -1499,7 +1499,7 @@
const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint8_t *ptr = object_field_prop_ptr(obj, prop);
visit_type_uint8(v, name, ptr, errp);
@@ -1509,7 +1509,7 @@
const char *name, void *opaque,
Error **errp)
{
- Property *prop = opaque;
+ const Property *prop = opaque;
uint8_t value, *ptr = object_field_prop_ptr(obj, prop);
if (!visit_type_uint8(v, name, &value, errp)) {
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index 93aca85..0c5621d 100644
--- a/hw/vfio/pci.c
+++ b/hw/vfio/pci.c
@@ -3409,7 +3409,6 @@
TYPE_IOMMUFD_BACKEND, IOMMUFDBackend *),
#endif
DEFINE_PROP_BOOL("skip-vsc-check", VFIOPCIDevice, skip_vsc_check, true),
- DEFINE_PROP_END_OF_LIST(),
};
#ifdef CONFIG_IOMMUFD
@@ -3455,7 +3454,6 @@
DEFINE_PROP_BOOL("ramfb", VFIOPCIDevice, enable_ramfb, false),
DEFINE_PROP_ON_OFF_AUTO("x-ramfb-migrate", VFIOPCIDevice, ramfb_migrate,
ON_OFF_AUTO_AUTO),
- DEFINE_PROP_END_OF_LIST(),
};
static void vfio_pci_nohotplug_dev_class_init(ObjectClass *klass, void *data)
diff --git a/hw/vfio/platform.c b/hw/vfio/platform.c
index 766e8a8..7bc52a6 100644
--- a/hw/vfio/platform.c
+++ b/hw/vfio/platform.c
@@ -640,7 +640,6 @@
DEFINE_PROP_LINK("iommufd", VFIOPlatformDevice, vbasedev.iommufd,
TYPE_IOMMUFD_BACKEND, IOMMUFDBackend *),
#endif
- DEFINE_PROP_END_OF_LIST(),
};
static void vfio_platform_instance_init(Object *obj)
diff --git a/hw/virtio/vdpa-dev-pci.c b/hw/virtio/vdpa-dev-pci.c
index 5446e6b..7879268 100644
--- a/hw/virtio/vdpa-dev-pci.c
+++ b/hw/virtio/vdpa-dev-pci.c
@@ -48,10 +48,6 @@
"bootindex");
}
-static Property vhost_vdpa_device_pci_properties[] = {
- DEFINE_PROP_END_OF_LIST(),
-};
-
static int vhost_vdpa_device_pci_post_init(VhostVdpaDevice *v, Error **errp)
{
VhostVdpaDevicePCI *dev = container_of(v, VhostVdpaDevicePCI, vdev);
@@ -80,7 +76,6 @@
VirtioPCIClass *k = VIRTIO_PCI_CLASS(klass);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
- device_class_set_props(dc, vhost_vdpa_device_pci_properties);
k->realize = vhost_vdpa_device_pci_realize;
}
diff --git a/hw/virtio/vdpa-dev.c b/hw/virtio/vdpa-dev.c
index 61849b3..d7b6af0 100644
--- a/hw/virtio/vdpa-dev.c
+++ b/hw/virtio/vdpa-dev.c
@@ -340,7 +340,6 @@
static const Property vhost_vdpa_device_properties[] = {
DEFINE_PROP_STRING("vhostdev", VhostVdpaDevice, vhostdev),
DEFINE_PROP_UINT16("queue-size", VhostVdpaDevice, queue_size, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static const VMStateDescription vmstate_vhost_vdpa_device = {
diff --git a/hw/virtio/vhost-scsi-pci.c b/hw/virtio/vhost-scsi-pci.c
index 7536b37..3778f61 100644
--- a/hw/virtio/vhost-scsi-pci.c
+++ b/hw/virtio/vhost-scsi-pci.c
@@ -41,7 +41,6 @@
static const Property vhost_scsi_pci_properties[] = {
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
DEV_NVECTORS_UNSPECIFIED),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/virtio/vhost-user-blk-pci.c b/hw/virtio/vhost-user-blk-pci.c
index 99f1472..1767ef2 100644
--- a/hw/virtio/vhost-user-blk-pci.c
+++ b/hw/virtio/vhost-user-blk-pci.c
@@ -47,7 +47,6 @@
DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
DEV_NVECTORS_UNSPECIFIED),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_user_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/virtio/vhost-user-device.c b/hw/virtio/vhost-user-device.c
index 3222b67..86eba13 100644
--- a/hw/virtio/vhost-user-device.c
+++ b/hw/virtio/vhost-user-device.c
@@ -35,7 +35,6 @@
DEFINE_PROP_UINT32("vq_size", VHostUserBase, vq_size, 64),
DEFINE_PROP_UINT32("num_vqs", VHostUserBase, num_vqs, 1),
DEFINE_PROP_UINT32("config_size", VHostUserBase, config_size, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void vud_class_init(ObjectClass *klass, void *data)
diff --git a/hw/virtio/vhost-user-fs-pci.c b/hw/virtio/vhost-user-fs-pci.c
index 9ba6c40..116eaab 100644
--- a/hw/virtio/vhost-user-fs-pci.c
+++ b/hw/virtio/vhost-user-fs-pci.c
@@ -32,7 +32,6 @@
static const Property vhost_user_fs_pci_properties[] = {
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
DEV_NVECTORS_UNSPECIFIED),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_user_fs_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/virtio/vhost-user-fs.c b/hw/virtio/vhost-user-fs.c
index c046232..f8714b5 100644
--- a/hw/virtio/vhost-user-fs.c
+++ b/hw/virtio/vhost-user-fs.c
@@ -409,7 +409,6 @@
DEFINE_PROP_UINT16("num-request-queues", VHostUserFS,
conf.num_request_queues, 1),
DEFINE_PROP_UINT16("queue-size", VHostUserFS, conf.queue_size, 128),
- DEFINE_PROP_END_OF_LIST(),
};
static void vuf_instance_init(Object *obj)
diff --git a/hw/virtio/vhost-user-gpio.c b/hw/virtio/vhost-user-gpio.c
index c997c66..4a08814 100644
--- a/hw/virtio/vhost-user-gpio.c
+++ b/hw/virtio/vhost-user-gpio.c
@@ -16,7 +16,6 @@
static const Property vgpio_properties[] = {
DEFINE_PROP_CHR("chardev", VHostUserBase, chardev),
- DEFINE_PROP_END_OF_LIST(),
};
static void vgpio_realize(DeviceState *dev, Error **errp)
diff --git a/hw/virtio/vhost-user-i2c.c b/hw/virtio/vhost-user-i2c.c
index b0a5cbf..1c7cde5 100644
--- a/hw/virtio/vhost-user-i2c.c
+++ b/hw/virtio/vhost-user-i2c.c
@@ -16,7 +16,6 @@
static const Property vi2c_properties[] = {
DEFINE_PROP_CHR("chardev", VHostUserBase, chardev),
- DEFINE_PROP_END_OF_LIST(),
};
static void vi2c_realize(DeviceState *dev, Error **errp)
diff --git a/hw/virtio/vhost-user-input.c b/hw/virtio/vhost-user-input.c
index c57cc46..9174053 100644
--- a/hw/virtio/vhost-user-input.c
+++ b/hw/virtio/vhost-user-input.c
@@ -9,7 +9,6 @@
static const Property vinput_properties[] = {
DEFINE_PROP_CHR("chardev", VHostUserBase, chardev),
- DEFINE_PROP_END_OF_LIST(),
};
static void vinput_realize(DeviceState *dev, Error **errp)
diff --git a/hw/virtio/vhost-user-rng-pci.c b/hw/virtio/vhost-user-rng-pci.c
index 0016ee7..a4e6901 100644
--- a/hw/virtio/vhost-user-rng-pci.c
+++ b/hw/virtio/vhost-user-rng-pci.c
@@ -26,7 +26,6 @@
static const Property vhost_user_rng_pci_properties[] = {
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
DEV_NVECTORS_UNSPECIFIED),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_user_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/virtio/vhost-user-rng.c b/hw/virtio/vhost-user-rng.c
index c9985b5..5aa432e 100644
--- a/hw/virtio/vhost-user-rng.c
+++ b/hw/virtio/vhost-user-rng.c
@@ -22,7 +22,6 @@
static const Property vrng_properties[] = {
DEFINE_PROP_CHR("chardev", VHostUserBase, chardev),
- DEFINE_PROP_END_OF_LIST(),
};
static void vu_rng_base_realize(DeviceState *dev, Error **errp)
diff --git a/hw/virtio/vhost-user-scmi.c b/hw/virtio/vhost-user-scmi.c
index a15e691..410a936 100644
--- a/hw/virtio/vhost-user-scmi.c
+++ b/hw/virtio/vhost-user-scmi.c
@@ -279,7 +279,6 @@
static const Property vu_scmi_properties[] = {
DEFINE_PROP_CHR("chardev", VHostUserSCMI, chardev),
- DEFINE_PROP_END_OF_LIST(),
};
static void vu_scmi_class_init(ObjectClass *klass, void *data)
diff --git a/hw/virtio/vhost-user-scsi-pci.c b/hw/virtio/vhost-user-scsi-pci.c
index b2f6451..34e1a70 100644
--- a/hw/virtio/vhost-user-scsi-pci.c
+++ b/hw/virtio/vhost-user-scsi-pci.c
@@ -47,7 +47,6 @@
static const Property vhost_user_scsi_pci_properties[] = {
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
DEV_NVECTORS_UNSPECIFIED),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_user_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/virtio/vhost-user-snd-pci.c b/hw/virtio/vhost-user-snd-pci.c
index d61cfda..0cb86b7 100644
--- a/hw/virtio/vhost-user-snd-pci.c
+++ b/hw/virtio/vhost-user-snd-pci.c
@@ -23,10 +23,6 @@
DECLARE_INSTANCE_CHECKER(VHostUserSoundPCI, VHOST_USER_SND_PCI,
TYPE_VHOST_USER_SND_PCI)
-static Property vhost_user_snd_pci_properties[] = {
- DEFINE_PROP_END_OF_LIST(),
-};
-
static void vhost_user_snd_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
{
VHostUserSoundPCI *dev = VHOST_USER_SND_PCI(vpci_dev);
@@ -44,7 +40,6 @@
PCIDeviceClass *pcidev_k = PCI_DEVICE_CLASS(klass);
k->realize = vhost_user_snd_pci_realize;
set_bit(DEVICE_CATEGORY_SOUND, dc->categories);
- device_class_set_props(dc, vhost_user_snd_pci_properties);
pcidev_k->vendor_id = PCI_VENDOR_ID_REDHAT_QUMRANET;
pcidev_k->device_id = 0; /* Set by virtio-pci based on virtio id */
pcidev_k->revision = 0x00;
diff --git a/hw/virtio/vhost-user-snd.c b/hw/virtio/vhost-user-snd.c
index 8810a9f..8610370 100644
--- a/hw/virtio/vhost-user-snd.c
+++ b/hw/virtio/vhost-user-snd.c
@@ -23,7 +23,6 @@
static const Property vsnd_properties[] = {
DEFINE_PROP_CHR("chardev", VHostUserBase, chardev),
- DEFINE_PROP_END_OF_LIST(),
};
static void vu_snd_base_realize(DeviceState *dev, Error **errp)
diff --git a/hw/virtio/vhost-user-vsock-pci.c b/hw/virtio/vhost-user-vsock-pci.c
index 529d967..f730a05 100644
--- a/hw/virtio/vhost-user-vsock-pci.c
+++ b/hw/virtio/vhost-user-vsock-pci.c
@@ -33,7 +33,6 @@
static const Property vhost_user_vsock_pci_properties[] = {
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_user_vsock_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/virtio/vhost-user-vsock.c b/hw/virtio/vhost-user-vsock.c
index 97885bf..2932730 100644
--- a/hw/virtio/vhost-user-vsock.c
+++ b/hw/virtio/vhost-user-vsock.c
@@ -150,7 +150,6 @@
static const Property vuv_properties[] = {
DEFINE_PROP_CHR("chardev", VHostUserVSock, conf.chardev),
- DEFINE_PROP_END_OF_LIST(),
};
static void vuv_class_init(ObjectClass *klass, void *data)
diff --git a/hw/virtio/vhost-vsock-common.c b/hw/virtio/vhost-vsock-common.c
index cb2253c..9ac587d 100644
--- a/hw/virtio/vhost-vsock-common.c
+++ b/hw/virtio/vhost-vsock-common.c
@@ -288,7 +288,6 @@
static const Property vhost_vsock_common_properties[] = {
DEFINE_PROP_ON_OFF_AUTO("seqpacket", VHostVSockCommon, seqpacket,
ON_OFF_AUTO_AUTO),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_vsock_common_class_init(ObjectClass *klass, void *data)
diff --git a/hw/virtio/vhost-vsock-pci.c b/hw/virtio/vhost-vsock-pci.c
index 1d9abd0..6c618ee 100644
--- a/hw/virtio/vhost-vsock-pci.c
+++ b/hw/virtio/vhost-vsock-pci.c
@@ -37,7 +37,6 @@
static const Property vhost_vsock_pci_properties[] = {
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_vsock_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/virtio/vhost-vsock.c b/hw/virtio/vhost-vsock.c
index ce80e84..940b30f 100644
--- a/hw/virtio/vhost-vsock.c
+++ b/hw/virtio/vhost-vsock.c
@@ -208,7 +208,6 @@
static const Property vhost_vsock_properties[] = {
DEFINE_PROP_UINT64("guest-cid", VHostVSock, conf.guest_cid, 0),
DEFINE_PROP_STRING("vhostfd", VHostVSock, conf.vhostfd),
- DEFINE_PROP_END_OF_LIST(),
};
static void vhost_vsock_class_init(ObjectClass *klass, void *data)
diff --git a/hw/virtio/virtio-9p-pci.c b/hw/virtio/virtio-9p-pci.c
index b33faf2..aa1dce8 100644
--- a/hw/virtio/virtio-9p-pci.c
+++ b/hw/virtio/virtio-9p-pci.c
@@ -47,7 +47,6 @@
DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_9p_pci_class_init(ObjectClass *klass, void *data)
diff --git a/hw/virtio/virtio-balloon.c b/hw/virtio/virtio-balloon.c
index ab2ee30..ec4aa94 100644
--- a/hw/virtio/virtio-balloon.c
+++ b/hw/virtio/virtio-balloon.c
@@ -1032,7 +1032,6 @@
qemu_4_0_config_size, false),
DEFINE_PROP_LINK("iothread", VirtIOBalloon, iothread, TYPE_IOTHREAD,
IOThread *),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_balloon_class_init(ObjectClass *klass, void *data)
diff --git a/hw/virtio/virtio-blk-pci.c b/hw/virtio/virtio-blk-pci.c
index abdcc11..fc06cec 100644
--- a/hw/virtio/virtio-blk-pci.c
+++ b/hw/virtio/virtio-blk-pci.c
@@ -44,7 +44,6 @@
VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
DEV_NVECTORS_UNSPECIFIED),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_blk_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/virtio/virtio-crypto-pci.c b/hw/virtio/virtio-crypto-pci.c
index 23c85fe..8699481 100644
--- a/hw/virtio/virtio-crypto-pci.c
+++ b/hw/virtio/virtio-crypto-pci.c
@@ -41,7 +41,6 @@
DEFINE_PROP_BIT("ioeventfd", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_crypto_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/virtio/virtio-crypto.c b/hw/virtio/virtio-crypto.c
index 9ae0b02..617163f 100644
--- a/hw/virtio/virtio-crypto.c
+++ b/hw/virtio/virtio-crypto.c
@@ -1131,7 +1131,6 @@
static const Property virtio_crypto_properties[] = {
DEFINE_PROP_LINK("cryptodev", VirtIOCrypto, conf.cryptodev,
TYPE_CRYPTODEV_BACKEND, CryptoDevBackend *),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_crypto_get_config(VirtIODevice *vdev, uint8_t *config)
diff --git a/hw/virtio/virtio-input-pci.c b/hw/virtio/virtio-input-pci.c
index 55c0b05..9e3c106 100644
--- a/hw/virtio/virtio-input-pci.c
+++ b/hw/virtio/virtio-input-pci.c
@@ -39,7 +39,6 @@
static const Property virtio_input_pci_properties[] = {
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_input_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/virtio/virtio-iommu-pci.c b/hw/virtio/virtio-iommu-pci.c
index 92adf63..97e03ce 100644
--- a/hw/virtio/virtio-iommu-pci.c
+++ b/hw/virtio/virtio-iommu-pci.c
@@ -39,7 +39,6 @@
DEFINE_PROP_ARRAY("reserved-regions", VirtIOIOMMUPCI,
vdev.nr_prop_resv_regions, vdev.prop_resv_regions,
qdev_prop_reserved_region, ReservedRegion),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_iommu_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c
index 576ad83..0988d21 100644
--- a/hw/virtio/virtio-iommu.c
+++ b/hw/virtio/virtio-iommu.c
@@ -1662,7 +1662,6 @@
DEFINE_PROP_GRANULE_MODE("granule", VirtIOIOMMU, granule_mode,
GRANULE_MODE_HOST),
DEFINE_PROP_UINT8("aw-bits", VirtIOIOMMU, aw_bits, 64),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_iommu_class_init(ObjectClass *klass, void *data)
diff --git a/hw/virtio/virtio-mem.c b/hw/virtio/virtio-mem.c
index 3f6f46f..317d056 100644
--- a/hw/virtio/virtio-mem.c
+++ b/hw/virtio/virtio-mem.c
@@ -1694,7 +1694,6 @@
early_migration, true),
DEFINE_PROP_BOOL(VIRTIO_MEM_DYNAMIC_MEMSLOTS_PROP, VirtIOMEM,
dynamic_memslots, false),
- DEFINE_PROP_END_OF_LIST(),
};
static uint64_t virtio_mem_rdm_get_min_granularity(const RamDiscardManager *rdm,
diff --git a/hw/virtio/virtio-mmio.c b/hw/virtio/virtio-mmio.c
index 49d9fe8..27d2f4b 100644
--- a/hw/virtio/virtio-mmio.c
+++ b/hw/virtio/virtio-mmio.c
@@ -757,7 +757,6 @@
DEFINE_PROP_BOOL("force-legacy", VirtIOMMIOProxy, legacy, true),
DEFINE_PROP_BIT("ioeventfd", VirtIOMMIOProxy, flags,
VIRTIO_IOMMIO_FLAG_USE_IOEVENTFD_BIT, true),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_mmio_realizefn(DeviceState *d, Error **errp)
diff --git a/hw/virtio/virtio-net-pci.c b/hw/virtio/virtio-net-pci.c
index e86094a..e18953a 100644
--- a/hw/virtio/virtio-net-pci.c
+++ b/hw/virtio/virtio-net-pci.c
@@ -43,7 +43,6 @@
VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
DEV_NVECTORS_UNSPECIFIED),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_net_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/virtio/virtio-nsm.c b/hw/virtio/virtio-nsm.c
index 685c548..098e1ae 100644
--- a/hw/virtio/virtio-nsm.c
+++ b/hw/virtio/virtio-nsm.c
@@ -1707,7 +1707,6 @@
static const Property virtio_nsm_properties[] = {
DEFINE_PROP_STRING("module-id", VirtIONSM, module_id),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_nsm_class_init(ObjectClass *klass, void *data)
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c
index de41cb5..cb61adc 100644
--- a/hw/virtio/virtio-pci.c
+++ b/hw/virtio/virtio-pci.c
@@ -2378,7 +2378,6 @@
VIRTIO_PCI_FLAG_INIT_FLR_BIT, true),
DEFINE_PROP_BIT("aer", VirtIOPCIProxy, flags,
VIRTIO_PCI_FLAG_AER_BIT, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_pci_dc_realize(DeviceState *qdev, Error **errp)
@@ -2435,7 +2434,6 @@
DEFINE_PROP_ON_OFF_AUTO("disable-legacy", VirtIOPCIProxy, disable_legacy,
ON_OFF_AUTO_AUTO),
DEFINE_PROP_BOOL("disable-modern", VirtIOPCIProxy, disable_modern, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_pci_base_class_init(ObjectClass *klass, void *data)
diff --git a/hw/virtio/virtio-pmem.c b/hw/virtio/virtio-pmem.c
index f6f3b5d..9759023 100644
--- a/hw/virtio/virtio-pmem.c
+++ b/hw/virtio/virtio-pmem.c
@@ -159,7 +159,6 @@
DEFINE_PROP_UINT64(VIRTIO_PMEM_ADDR_PROP, VirtIOPMEM, start, 0),
DEFINE_PROP_LINK(VIRTIO_PMEM_MEMDEV_PROP, VirtIOPMEM, memdev,
TYPE_MEMORY_BACKEND, HostMemoryBackend *),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_pmem_class_init(ObjectClass *klass, void *data)
diff --git a/hw/virtio/virtio-rng-pci.c b/hw/virtio/virtio-rng-pci.c
index 398f432..a94ff76 100644
--- a/hw/virtio/virtio-rng-pci.c
+++ b/hw/virtio/virtio-rng-pci.c
@@ -37,7 +37,6 @@
VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
DEV_NVECTORS_UNSPECIFIED),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_rng_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/virtio/virtio-rng.c b/hw/virtio/virtio-rng.c
index 13a1a0b..0660e87 100644
--- a/hw/virtio/virtio-rng.c
+++ b/hw/virtio/virtio-rng.c
@@ -258,7 +258,6 @@
DEFINE_PROP_UINT64("max-bytes", VirtIORNG, conf.max_bytes, INT64_MAX),
DEFINE_PROP_UINT32("period", VirtIORNG, conf.period_ms, 1 << 16),
DEFINE_PROP_LINK("rng", VirtIORNG, conf.rng, TYPE_RNG_BACKEND, RngBackend *),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_rng_class_init(ObjectClass *klass, void *data)
diff --git a/hw/virtio/virtio-scsi-pci.c b/hw/virtio/virtio-scsi-pci.c
index 733b575..d44fd2f 100644
--- a/hw/virtio/virtio-scsi-pci.c
+++ b/hw/virtio/virtio-scsi-pci.c
@@ -40,7 +40,6 @@
VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
DEV_NVECTORS_UNSPECIFIED),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_scsi_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp)
diff --git a/hw/virtio/virtio-serial-pci.c b/hw/virtio/virtio-serial-pci.c
index bda643ec..b5b77eb 100644
--- a/hw/virtio/virtio-serial-pci.c
+++ b/hw/virtio/virtio-serial-pci.c
@@ -74,7 +74,6 @@
VIRTIO_PCI_FLAG_USE_IOEVENTFD_BIT, true),
DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
DEFINE_PROP_UINT32("class", VirtIOPCIProxy, class_code, 0),
- DEFINE_PROP_END_OF_LIST(),
};
static void virtio_serial_pci_class_init(ObjectClass *klass, void *data)
diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c
index 7fcdb55..b871295 100644
--- a/hw/virtio/virtio.c
+++ b/hw/virtio/virtio.c
@@ -4018,7 +4018,6 @@
DEFINE_PROP_BOOL("use-disabled-flag", VirtIODevice, use_disabled_flag, true),
DEFINE_PROP_BOOL("x-disable-legacy-check", VirtIODevice,
disable_legacy_check, false),
- DEFINE_PROP_END_OF_LIST(),
};
static int virtio_device_start_ioeventfd_impl(VirtIODevice *vdev)
diff --git a/hw/watchdog/sbsa_gwdt.c b/hw/watchdog/sbsa_gwdt.c
index 2e25d4b..6b6fc31 100644
--- a/hw/watchdog/sbsa_gwdt.c
+++ b/hw/watchdog/sbsa_gwdt.c
@@ -270,7 +270,6 @@
*/
DEFINE_PROP_UINT64("clock-frequency", struct SBSA_GWDTState, freq,
62500000),
- DEFINE_PROP_END_OF_LIST(),
};
static void wdt_sbsa_gwdt_class_init(ObjectClass *klass, void *data)
diff --git a/hw/watchdog/wdt_aspeed.c b/hw/watchdog/wdt_aspeed.c
index c95877e..78dedb0 100644
--- a/hw/watchdog/wdt_aspeed.c
+++ b/hw/watchdog/wdt_aspeed.c
@@ -291,7 +291,6 @@
static const Property aspeed_wdt_properties[] = {
DEFINE_PROP_LINK("scu", AspeedWDTState, scu, TYPE_ASPEED_SCU,
AspeedSCUState *),
- DEFINE_PROP_END_OF_LIST(),
};
static void aspeed_wdt_class_init(ObjectClass *klass, void *data)
diff --git a/hw/watchdog/wdt_imx2.c b/hw/watchdog/wdt_imx2.c
index 61fbd91..878e509 100644
--- a/hw/watchdog/wdt_imx2.c
+++ b/hw/watchdog/wdt_imx2.c
@@ -284,7 +284,6 @@
static const Property imx2_wdt_properties[] = {
DEFINE_PROP_BOOL("pretimeout-support", IMX2WdtState, pretimeout_support,
false),
- DEFINE_PROP_END_OF_LIST()
};
static void imx2_wdt_class_init(ObjectClass *klass, void *data)
diff --git a/hw/xen/xen-bus.c b/hw/xen/xen-bus.c
index 0d7defb..2007ec0 100644
--- a/hw/xen/xen-bus.c
+++ b/hw/xen/xen-bus.c
@@ -1095,7 +1095,6 @@
static const Property xen_device_props[] = {
DEFINE_PROP_UINT16("frontend-id", XenDevice, frontend_id,
DOMID_INVALID),
- DEFINE_PROP_END_OF_LIST()
};
static void xen_device_class_init(ObjectClass *class, void *data)
diff --git a/hw/xen/xen-legacy-backend.c b/hw/xen/xen-legacy-backend.c
index e8e1ee4..118c571 100644
--- a/hw/xen/xen-legacy-backend.c
+++ b/hw/xen/xen-legacy-backend.c
@@ -635,15 +635,10 @@
}
-static Property xendev_properties[] = {
- DEFINE_PROP_END_OF_LIST(),
-};
-
static void xendev_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
- device_class_set_props(dc, xendev_properties);
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
/* xen-backend devices can be plugged/unplugged dynamically */
dc->user_creatable = true;
@@ -674,22 +669,10 @@
}
};
-static Property xen_sysdev_properties[] = {
- {/* end of property list */},
-};
-
-static void xen_sysdev_class_init(ObjectClass *klass, void *data)
-{
- DeviceClass *dc = DEVICE_CLASS(klass);
-
- device_class_set_props(dc, xen_sysdev_properties);
-}
-
static const TypeInfo xensysdev_info = {
.name = TYPE_XENSYSDEV,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(SysBusDevice),
- .class_init = xen_sysdev_class_init,
};
static void xenbe_register_types(void)
diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c
index 557aa98..e2bd4c7 100644
--- a/hw/xen/xen_pt.c
+++ b/hw/xen/xen_pt.c
@@ -934,7 +934,6 @@
static const Property xen_pci_passthrough_properties[] = {
DEFINE_PROP_PCI_HOST_DEVADDR("hostaddr", XenPCIPassthroughState, hostaddr),
DEFINE_PROP_BOOL("permissive", XenPCIPassthroughState, permissive, false),
- DEFINE_PROP_END_OF_LIST(),
};
static void xen_pci_passthrough_instance_init(Object *obj)
diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
index 626a37d..351f18a 100644
--- a/include/hw/intc/loongarch_extioi.h
+++ b/include/hw/intc/loongarch_extioi.h
@@ -5,85 +5,23 @@
* Copyright (C) 2021 Loongson Technology Corporation Limited
*/
-#include "hw/sysbus.h"
-#include "hw/loongarch/virt.h"
-
#ifndef LOONGARCH_EXTIOI_H
#define LOONGARCH_EXTIOI_H
-#define LS3A_INTC_IP 8
-#define EXTIOI_IRQS (256)
-#define EXTIOI_IRQS_BITMAP_SIZE (256 / 8)
-/* irq from EXTIOI is routed to no more than 4 cpus */
-#define EXTIOI_CPUS (4)
-/* map to ipnum per 32 irqs */
-#define EXTIOI_IRQS_IPMAP_SIZE (256 / 32)
-#define EXTIOI_IRQS_COREMAP_SIZE 256
-#define EXTIOI_IRQS_NODETYPE_COUNT 16
-#define EXTIOI_IRQS_GROUP_COUNT 8
-
-#define APIC_OFFSET 0x400
-#define APIC_BASE (0x1000ULL + APIC_OFFSET)
-
-#define EXTIOI_NODETYPE_START (0x4a0 - APIC_OFFSET)
-#define EXTIOI_NODETYPE_END (0x4c0 - APIC_OFFSET)
-#define EXTIOI_IPMAP_START (0x4c0 - APIC_OFFSET)
-#define EXTIOI_IPMAP_END (0x4c8 - APIC_OFFSET)
-#define EXTIOI_ENABLE_START (0x600 - APIC_OFFSET)
-#define EXTIOI_ENABLE_END (0x620 - APIC_OFFSET)
-#define EXTIOI_BOUNCE_START (0x680 - APIC_OFFSET)
-#define EXTIOI_BOUNCE_END (0x6a0 - APIC_OFFSET)
-#define EXTIOI_ISR_START (0x700 - APIC_OFFSET)
-#define EXTIOI_ISR_END (0x720 - APIC_OFFSET)
-#define EXTIOI_COREISR_START (0x800 - APIC_OFFSET)
-#define EXTIOI_COREISR_END (0xB20 - APIC_OFFSET)
-#define EXTIOI_COREMAP_START (0xC00 - APIC_OFFSET)
-#define EXTIOI_COREMAP_END (0xD00 - APIC_OFFSET)
-#define EXTIOI_SIZE 0x800
-
-#define EXTIOI_VIRT_BASE (0x40000000)
-#define EXTIOI_VIRT_SIZE (0x1000)
-#define EXTIOI_VIRT_FEATURES (0x0)
-#define EXTIOI_HAS_VIRT_EXTENSION (0)
-#define EXTIOI_HAS_ENABLE_OPTION (1)
-#define EXTIOI_HAS_INT_ENCODE (2)
-#define EXTIOI_HAS_CPU_ENCODE (3)
-#define EXTIOI_VIRT_HAS_FEATURES (BIT(EXTIOI_HAS_VIRT_EXTENSION) \
- | BIT(EXTIOI_HAS_ENABLE_OPTION) \
- | BIT(EXTIOI_HAS_CPU_ENCODE))
-#define EXTIOI_VIRT_CONFIG (0x4)
-#define EXTIOI_ENABLE (1)
-#define EXTIOI_ENABLE_INT_ENCODE (2)
-#define EXTIOI_ENABLE_CPU_ENCODE (3)
-#define EXTIOI_VIRT_COREMAP_START (0x40)
-#define EXTIOI_VIRT_COREMAP_END (0x240)
-
-typedef struct ExtIOICore {
- uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
- DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS);
- qemu_irq parent_irq[LS3A_INTC_IP];
-} ExtIOICore;
+#include "hw/intc/loongarch_extioi_common.h"
#define TYPE_LOONGARCH_EXTIOI "loongarch.extioi"
-OBJECT_DECLARE_SIMPLE_TYPE(LoongArchExtIOI, LOONGARCH_EXTIOI)
-struct LoongArchExtIOI {
- SysBusDevice parent_obj;
- uint32_t num_cpu;
- uint32_t features;
- uint32_t status;
- /* hardware state */
- uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2];
- uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT];
- uint32_t isr[EXTIOI_IRQS / 32];
- uint32_t enable[EXTIOI_IRQS / 32];
- uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4];
- uint32_t coremap[EXTIOI_IRQS / 4];
- uint32_t sw_pending[EXTIOI_IRQS / 32];
- uint8_t sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE];
- uint8_t sw_coremap[EXTIOI_IRQS];
- qemu_irq irq[EXTIOI_IRQS];
- ExtIOICore *cpu;
- MemoryRegion extioi_system_mem;
- MemoryRegion virt_extend;
+OBJECT_DECLARE_TYPE(LoongArchExtIOIState, LoongArchExtIOIClass, LOONGARCH_EXTIOI)
+
+struct LoongArchExtIOIState {
+ LoongArchExtIOICommonState parent_obj;
};
+
+struct LoongArchExtIOIClass {
+ LoongArchExtIOICommonClass parent_class;
+
+ DeviceRealize parent_realize;
+ DeviceUnrealize parent_unrealize;
+};
+
#endif /* LOONGARCH_EXTIOI_H */
diff --git a/include/hw/intc/loongarch_extioi_common.h b/include/hw/intc/loongarch_extioi_common.h
new file mode 100644
index 0000000..f6bc778
--- /dev/null
+++ b/include/hw/intc/loongarch_extioi_common.h
@@ -0,0 +1,98 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * LoongArch 3A5000 ext interrupt controller definitions
+ * Copyright (C) 2024 Loongson Technology Corporation Limited
+ */
+
+#ifndef LOONGARCH_EXTIOI_COMMON_H
+#define LOONGARCH_EXTIOI_COMMON_H
+
+#include "qom/object.h"
+#include "hw/sysbus.h"
+#include "hw/loongarch/virt.h"
+
+#define LS3A_INTC_IP 8
+#define EXTIOI_IRQS (256)
+#define EXTIOI_IRQS_BITMAP_SIZE (256 / 8)
+/* irq from EXTIOI is routed to no more than 4 cpus */
+#define EXTIOI_CPUS (4)
+/* map to ipnum per 32 irqs */
+#define EXTIOI_IRQS_IPMAP_SIZE (256 / 32)
+#define EXTIOI_IRQS_COREMAP_SIZE 256
+#define EXTIOI_IRQS_NODETYPE_COUNT 16
+#define EXTIOI_IRQS_GROUP_COUNT 8
+
+#define APIC_OFFSET 0x400
+#define APIC_BASE (0x1000ULL + APIC_OFFSET)
+#define EXTIOI_NODETYPE_START (0x4a0 - APIC_OFFSET)
+#define EXTIOI_NODETYPE_END (0x4c0 - APIC_OFFSET)
+#define EXTIOI_IPMAP_START (0x4c0 - APIC_OFFSET)
+#define EXTIOI_IPMAP_END (0x4c8 - APIC_OFFSET)
+#define EXTIOI_ENABLE_START (0x600 - APIC_OFFSET)
+#define EXTIOI_ENABLE_END (0x620 - APIC_OFFSET)
+#define EXTIOI_BOUNCE_START (0x680 - APIC_OFFSET)
+#define EXTIOI_BOUNCE_END (0x6a0 - APIC_OFFSET)
+#define EXTIOI_ISR_START (0x700 - APIC_OFFSET)
+#define EXTIOI_ISR_END (0x720 - APIC_OFFSET)
+#define EXTIOI_COREISR_START (0x800 - APIC_OFFSET)
+#define EXTIOI_COREISR_END (0xB20 - APIC_OFFSET)
+#define EXTIOI_COREMAP_START (0xC00 - APIC_OFFSET)
+#define EXTIOI_COREMAP_END (0xD00 - APIC_OFFSET)
+#define EXTIOI_SIZE 0x800
+
+#define EXTIOI_VIRT_BASE (0x40000000)
+#define EXTIOI_VIRT_SIZE (0x1000)
+#define EXTIOI_VIRT_FEATURES (0x0)
+#define EXTIOI_HAS_VIRT_EXTENSION (0)
+#define EXTIOI_HAS_ENABLE_OPTION (1)
+#define EXTIOI_HAS_INT_ENCODE (2)
+#define EXTIOI_HAS_CPU_ENCODE (3)
+#define EXTIOI_VIRT_HAS_FEATURES (BIT(EXTIOI_HAS_VIRT_EXTENSION) \
+ | BIT(EXTIOI_HAS_ENABLE_OPTION) \
+ | BIT(EXTIOI_HAS_CPU_ENCODE))
+#define EXTIOI_VIRT_CONFIG (0x4)
+#define EXTIOI_ENABLE (1)
+#define EXTIOI_ENABLE_INT_ENCODE (2)
+#define EXTIOI_ENABLE_CPU_ENCODE (3)
+#define EXTIOI_VIRT_COREMAP_START (0x40)
+#define EXTIOI_VIRT_COREMAP_END (0x240)
+
+#define TYPE_LOONGARCH_EXTIOI_COMMON "loongarch_extioi_common"
+OBJECT_DECLARE_TYPE(LoongArchExtIOICommonState,
+ LoongArchExtIOICommonClass, LOONGARCH_EXTIOI_COMMON)
+
+typedef struct ExtIOICore {
+ uint32_t coreisr[EXTIOI_IRQS_GROUP_COUNT];
+ DECLARE_BITMAP(sw_isr[LS3A_INTC_IP], EXTIOI_IRQS);
+ qemu_irq parent_irq[LS3A_INTC_IP];
+} ExtIOICore;
+
+struct LoongArchExtIOICommonState {
+ SysBusDevice parent_obj;
+ uint32_t num_cpu;
+ uint32_t features;
+ uint32_t status;
+ /* hardware state */
+ uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2];
+ uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT];
+ uint32_t isr[EXTIOI_IRQS / 32];
+ uint32_t enable[EXTIOI_IRQS / 32];
+ uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4];
+ uint32_t coremap[EXTIOI_IRQS / 4];
+ uint32_t sw_pending[EXTIOI_IRQS / 32];
+ uint8_t sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE];
+ uint8_t sw_coremap[EXTIOI_IRQS];
+ qemu_irq irq[EXTIOI_IRQS];
+ ExtIOICore *cpu;
+ MemoryRegion extioi_system_mem;
+ MemoryRegion virt_extend;
+};
+
+struct LoongArchExtIOICommonClass {
+ SysBusDeviceClass parent_class;
+
+ DeviceRealize parent_realize;
+ int (*pre_save)(void *s);
+ int (*post_load)(void *s, int version_id);
+};
+#endif /* LOONGARCH_EXTIOI_H */
diff --git a/include/hw/intc/loongarch_pch_pic.h b/include/hw/intc/loongarch_pch_pic.h
index d5437e8..481cc58 100644
--- a/include/hw/intc/loongarch_pch_pic.h
+++ b/include/hw/intc/loongarch_pch_pic.h
@@ -5,65 +5,23 @@
* Copyright (c) 2021 Loongson Technology Corporation Limited
*/
-#include "hw/sysbus.h"
+#ifndef HW_LOONGARCH_PCH_PIC_H
+#define HW_LOONGARCH_PCH_PIC_H
-#define TYPE_LOONGARCH_PCH_PIC "loongarch_pch_pic"
-#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PCH_PIC#name
-OBJECT_DECLARE_SIMPLE_TYPE(LoongArchPCHPIC, LOONGARCH_PCH_PIC)
+#include "hw/intc/loongarch_pic_common.h"
-#define PCH_PIC_INT_ID_VAL 0x7000000UL
-#define PCH_PIC_INT_ID_VER 0x1UL
+#define TYPE_LOONGARCH_PIC "loongarch_pic"
+#define PCH_PIC_NAME(name) TYPE_LOONGARCH_PIC#name
+OBJECT_DECLARE_TYPE(LoongarchPICState, LoongarchPICClass, LOONGARCH_PIC)
-#define PCH_PIC_INT_ID_LO 0x00
-#define PCH_PIC_INT_ID_HI 0x04
-#define PCH_PIC_INT_MASK_LO 0x20
-#define PCH_PIC_INT_MASK_HI 0x24
-#define PCH_PIC_HTMSI_EN_LO 0x40
-#define PCH_PIC_HTMSI_EN_HI 0x44
-#define PCH_PIC_INT_EDGE_LO 0x60
-#define PCH_PIC_INT_EDGE_HI 0x64
-#define PCH_PIC_INT_CLEAR_LO 0x80
-#define PCH_PIC_INT_CLEAR_HI 0x84
-#define PCH_PIC_AUTO_CTRL0_LO 0xc0
-#define PCH_PIC_AUTO_CTRL0_HI 0xc4
-#define PCH_PIC_AUTO_CTRL1_LO 0xe0
-#define PCH_PIC_AUTO_CTRL1_HI 0xe4
-#define PCH_PIC_ROUTE_ENTRY_OFFSET 0x100
-#define PCH_PIC_ROUTE_ENTRY_END 0x13f
-#define PCH_PIC_HTMSI_VEC_OFFSET 0x200
-#define PCH_PIC_HTMSI_VEC_END 0x23f
-#define PCH_PIC_INT_STATUS_LO 0x3a0
-#define PCH_PIC_INT_STATUS_HI 0x3a4
-#define PCH_PIC_INT_POL_LO 0x3e0
-#define PCH_PIC_INT_POL_HI 0x3e4
-
-#define STATUS_LO_START 0
-#define STATUS_HI_START 0x4
-#define POL_LO_START 0x40
-#define POL_HI_START 0x44
-struct LoongArchPCHPIC {
- SysBusDevice parent_obj;
- qemu_irq parent_irq[64];
- uint64_t int_mask; /*0x020 interrupt mask register*/
- uint64_t htmsi_en; /*0x040 1=msi*/
- uint64_t intedge; /*0x060 edge=1 level =0*/
- uint64_t intclr; /*0x080 for clean edge int,set 1 clean,set 0 is noused*/
- uint64_t auto_crtl0; /*0x0c0*/
- uint64_t auto_crtl1; /*0x0e0*/
- uint64_t last_intirr; /* edge detection */
- uint64_t intirr; /* 0x380 interrupt request register */
- uint64_t intisr; /* 0x3a0 interrupt service register */
- /*
- * 0x3e0 interrupt level polarity selection
- * register 0 for high level trigger
- */
- uint64_t int_polarity;
-
- uint8_t route_entry[64]; /*0x100 - 0x138*/
- uint8_t htmsi_vector[64]; /*0x200 - 0x238*/
-
- MemoryRegion iomem32_low;
- MemoryRegion iomem32_high;
- MemoryRegion iomem8;
- unsigned int irq_num;
+struct LoongarchPICState {
+ LoongArchPICCommonState parent_obj;
};
+
+struct LoongarchPICClass {
+ LoongArchPICCommonClass parent_class;
+
+ DeviceRealize parent_realize;
+};
+
+#endif /* HW_LOONGARCH_PCH_PIC_H */
diff --git a/include/hw/intc/loongarch_pic_common.h b/include/hw/intc/loongarch_pic_common.h
new file mode 100644
index 0000000..43cce48
--- /dev/null
+++ b/include/hw/intc/loongarch_pic_common.h
@@ -0,0 +1,82 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * LoongArch 7A1000 I/O interrupt controller definitions
+ * Copyright (c) 2024 Loongson Technology Corporation Limited
+ */
+
+#ifndef HW_LOONGARCH_PIC_COMMON_H
+#define HW_LOONGARCH_PIC_COMMON_H
+
+#include "hw/pci-host/ls7a.h"
+#include "hw/sysbus.h"
+
+#define PCH_PIC_INT_ID_VAL 0x7000000UL
+#define PCH_PIC_INT_ID_VER 0x1UL
+#define PCH_PIC_INT_ID_LO 0x00
+#define PCH_PIC_INT_ID_HI 0x04
+#define PCH_PIC_INT_MASK_LO 0x20
+#define PCH_PIC_INT_MASK_HI 0x24
+#define PCH_PIC_HTMSI_EN_LO 0x40
+#define PCH_PIC_HTMSI_EN_HI 0x44
+#define PCH_PIC_INT_EDGE_LO 0x60
+#define PCH_PIC_INT_EDGE_HI 0x64
+#define PCH_PIC_INT_CLEAR_LO 0x80
+#define PCH_PIC_INT_CLEAR_HI 0x84
+#define PCH_PIC_AUTO_CTRL0_LO 0xc0
+#define PCH_PIC_AUTO_CTRL0_HI 0xc4
+#define PCH_PIC_AUTO_CTRL1_LO 0xe0
+#define PCH_PIC_AUTO_CTRL1_HI 0xe4
+#define PCH_PIC_ROUTE_ENTRY_OFFSET 0x100
+#define PCH_PIC_ROUTE_ENTRY_END 0x13f
+#define PCH_PIC_HTMSI_VEC_OFFSET 0x200
+#define PCH_PIC_HTMSI_VEC_END 0x23f
+#define PCH_PIC_INT_STATUS_LO 0x3a0
+#define PCH_PIC_INT_STATUS_HI 0x3a4
+#define PCH_PIC_INT_POL_LO 0x3e0
+#define PCH_PIC_INT_POL_HI 0x3e4
+
+#define STATUS_LO_START 0
+#define STATUS_HI_START 0x4
+#define POL_LO_START 0x40
+#define POL_HI_START 0x44
+
+#define TYPE_LOONGARCH_PIC_COMMON "loongarch_pic_common"
+OBJECT_DECLARE_TYPE(LoongArchPICCommonState,
+ LoongArchPICCommonClass, LOONGARCH_PIC_COMMON)
+
+struct LoongArchPICCommonState {
+ SysBusDevice parent_obj;
+
+ qemu_irq parent_irq[64];
+ uint64_t int_mask; /* 0x020 interrupt mask register */
+ uint64_t htmsi_en; /* 0x040 1=msi */
+ uint64_t intedge; /* 0x060 edge=1 level=0 */
+ uint64_t intclr; /* 0x080 clean edge int, set 1 clean, 0 noused */
+ uint64_t auto_crtl0; /* 0x0c0 */
+ uint64_t auto_crtl1; /* 0x0e0 */
+ uint64_t last_intirr; /* edge detection */
+ uint64_t intirr; /* 0x380 interrupt request register */
+ uint64_t intisr; /* 0x3a0 interrupt service register */
+ /*
+ * 0x3e0 interrupt level polarity selection
+ * register 0 for high level trigger
+ */
+ uint64_t int_polarity;
+
+ uint8_t route_entry[64]; /* 0x100 - 0x138 */
+ uint8_t htmsi_vector[64]; /* 0x200 - 0x238 */
+
+ MemoryRegion iomem32_low;
+ MemoryRegion iomem32_high;
+ MemoryRegion iomem8;
+ unsigned int irq_num;
+};
+
+struct LoongArchPICCommonClass {
+ SysBusDeviceClass parent_class;
+
+ DeviceRealize parent_realize;
+ int (*pre_save)(LoongArchPICCommonState *s);
+ int (*post_load)(LoongArchPICCommonState *s, int version_id);
+};
+#endif /* HW_LOONGARCH_PIC_COMMON_H */
diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
index 5be9844..e6ef80b 100644
--- a/include/hw/qdev-core.h
+++ b/include/hw/qdev-core.h
@@ -139,6 +139,12 @@
const Property *props_;
/**
+ * @props_count_: number of elements in @props_; should only be
+ * assigned by using device_class_set_props().
+ */
+ uint16_t props_count_;
+
+ /**
* @user_creatable: Can user instantiate with -device / device_add?
*
* All devices should support instantiation with device_add, and
@@ -935,13 +941,38 @@
/**
* device_class_set_props(): add a set of properties to an device
* @dc: the parent DeviceClass all devices inherit
- * @props: an array of properties, terminate by DEFINE_PROP_END_OF_LIST()
+ * @props: an array of properties
+ *
+ * This will add a set of properties to the object. It will fault if
+ * you attempt to add an existing property defined by a parent class.
+ * To modify an inherited property you need to use????
+ *
+ * Validate that @props has at least one Property.
+ * Validate that @props is an array, not a pointer, via ARRAY_SIZE.
+ * Validate that the array does not have a legacy terminator at compile-time;
+ * requires -O2 and the array to be const.
+ */
+#define device_class_set_props(dc, props) \
+ do { \
+ QEMU_BUILD_BUG_ON(sizeof(props) == 0); \
+ size_t props_count_ = ARRAY_SIZE(props); \
+ if ((props)[props_count_ - 1].name == NULL) { \
+ qemu_build_not_reached(); \
+ } \
+ device_class_set_props_n((dc), (props), props_count_); \
+ } while (0)
+
+/**
+ * device_class_set_props_n(): add a set of properties to an device
+ * @dc: the parent DeviceClass all devices inherit
+ * @props: an array of properties
+ * @n: ARRAY_SIZE(@props)
*
* This will add a set of properties to the object. It will fault if
* you attempt to add an existing property defined by a parent class.
* To modify an inherited property you need to use????
*/
-void device_class_set_props(DeviceClass *dc, const Property *props);
+void device_class_set_props_n(DeviceClass *dc, const Property *props, size_t n);
/**
* device_class_set_parent_realize() - set up for chaining realize fns
diff --git a/include/hw/qdev-properties.h b/include/hw/qdev-properties.h
index 26ebd23..bf27375 100644
--- a/include/hw/qdev-properties.h
+++ b/include/hw/qdev-properties.h
@@ -16,17 +16,17 @@
const char *name;
const PropertyInfo *info;
ptrdiff_t offset;
- uint8_t bitnr;
+ const char *link_type;
uint64_t bitmask;
- bool set_default;
union {
int64_t i;
uint64_t u;
} defval;
- int arrayoffset;
const PropertyInfo *arrayinfo;
+ int arrayoffset;
int arrayfieldsize;
- const char *link_type;
+ uint8_t bitnr;
+ bool set_default;
};
struct PropertyInfo {
@@ -34,7 +34,7 @@
const char *description;
const QEnumLookup *enum_table;
bool realized_set_allowed; /* allow setting property on realized device */
- int (*print)(Object *obj, Property *prop, char *dest, size_t len);
+ int (*print)(Object *obj, const Property *prop, char *dest, size_t len);
void (*set_default_value)(ObjectProperty *op, const Property *prop);
ObjectProperty *(*create)(ObjectClass *oc, const char *name,
const Property *prop);
@@ -171,9 +171,6 @@
#define DEFINE_PROP_SIZE32(_n, _s, _f, _d) \
DEFINE_PROP_UNSIGNED(_n, _s, _f, _d, qdev_prop_size32, uint32_t)
-#define DEFINE_PROP_END_OF_LIST() \
- {}
-
/*
* Set properties between creation and realization.
*
@@ -204,7 +201,7 @@
/* Takes ownership of @values */
void qdev_prop_set_array(DeviceState *dev, const char *name, QList *values);
-void *object_field_prop_ptr(Object *obj, Property *prop);
+void *object_field_prop_ptr(Object *obj, const Property *prop);
void qdev_prop_register_global(GlobalProperty *prop);
const GlobalProperty *qdev_find_global_prop(Object *obj,
diff --git a/include/qemu/main-loop.h b/include/qemu/main-loop.h
index 646306c..3935a57 100644
--- a/include/qemu/main-loop.h
+++ b/include/qemu/main-loop.h
@@ -248,6 +248,14 @@
AioContext *iohandler_get_aio_context(void);
/**
+ * rust_bql_mock_lock:
+ *
+ * Called from Rust doctests to make bql_lock() return true.
+ * Do not touch.
+ */
+void rust_bql_mock_lock(void);
+
+/**
* bql_locked: Return lock status of the Big QEMU Lock (BQL)
*
* The Big QEMU Lock (BQL) is the coarsest lock in QEMU, and as such it
diff --git a/include/sysemu/kvm.h b/include/sysemu/kvm.h
index c3a60b2..ab17c09 100644
--- a/include/sysemu/kvm.h
+++ b/include/sysemu/kvm.h
@@ -377,6 +377,14 @@
int kvm_arch_init_vcpu(CPUState *cpu);
int kvm_arch_destroy_vcpu(CPUState *cpu);
+#ifdef TARGET_KVM_HAVE_RESET_PARKED_VCPU
+void kvm_arch_reset_parked_vcpu(unsigned long vcpu_id, int kvm_fd);
+#else
+static inline void kvm_arch_reset_parked_vcpu(unsigned long vcpu_id, int kvm_fd)
+{
+}
+#endif
+
bool kvm_vcpu_id_is_valid(int vcpu_id);
/* Returns VCPU ID to be used on KVM_CREATE_VCPU ioctl() */
diff --git a/migration/migration.c b/migration/migration.c
index 8c5bd0a..d23d392 100644
--- a/migration/migration.c
+++ b/migration/migration.c
@@ -3822,7 +3822,8 @@
DeviceClass *dc = DEVICE_CLASS(klass);
dc->user_creatable = false;
- device_class_set_props(dc, migration_properties);
+ device_class_set_props_n(dc, migration_properties,
+ migration_properties_count);
}
static void migration_instance_finalize(Object *obj)
diff --git a/migration/options.c b/migration/options.c
index ad8d698..70ff565 100644
--- a/migration/options.c
+++ b/migration/options.c
@@ -85,7 +85,7 @@
#define DEFAULT_MIGRATE_VCPU_DIRTY_LIMIT_PERIOD 1000 /* milliseconds */
#define DEFAULT_MIGRATE_VCPU_DIRTY_LIMIT 1 /* MB/s */
-Property migration_properties[] = {
+const Property migration_properties[] = {
DEFINE_PROP_BOOL("store-global-state", MigrationState,
store_global_state, true),
DEFINE_PROP_BOOL("send-configuration", MigrationState,
@@ -196,8 +196,8 @@
MIGRATION_CAPABILITY_SWITCHOVER_ACK),
DEFINE_PROP_MIG_CAP("x-dirty-limit", MIGRATION_CAPABILITY_DIRTY_LIMIT),
DEFINE_PROP_MIG_CAP("mapped-ram", MIGRATION_CAPABILITY_MAPPED_RAM),
- DEFINE_PROP_END_OF_LIST(),
};
+const size_t migration_properties_count = ARRAY_SIZE(migration_properties);
bool migrate_auto_converge(void)
{
diff --git a/migration/options.h b/migration/options.h
index 79084ee..762be4e 100644
--- a/migration/options.h
+++ b/migration/options.h
@@ -20,7 +20,8 @@
/* migration properties */
-extern Property migration_properties[];
+extern const Property migration_properties[];
+extern const size_t migration_properties_count;
/* capabilities */
diff --git a/rust/Cargo.toml b/rust/Cargo.toml
index 6ec19b67..5b6b6ca 100644
--- a/rust/Cargo.toml
+++ b/rust/Cargo.toml
@@ -38,6 +38,7 @@
unused_self = "allow"
# default-allow lints
+as_ptr_cast_mut = "deny"
as_underscore = "deny"
assertions_on_result_states = "deny"
bool_to_int_with_if = "deny"
diff --git a/rust/hw/char/pl011/src/device.rs b/rust/hw/char/pl011/src/device.rs
index 3e29442..18cc122 100644
--- a/rust/hw/char/pl011/src/device.rs
+++ b/rust/hw/char/pl011/src/device.rs
@@ -11,11 +11,10 @@
use qemu_api::{
bindings::{self, *},
c_str,
- definitions::ObjectImpl,
- device_class::DeviceImpl,
- impl_device_class,
irq::InterruptSource,
prelude::*,
+ qdev::DeviceImpl,
+ qom::ObjectImpl,
};
use crate::{
@@ -31,10 +30,8 @@
/// Fractional Baud Rate Divider, `UARTFBRD`
const FBRD_MASK: u32 = 0x3f;
-const DATA_BREAK: u32 = 1 << 10;
-
/// QEMU sourced constant.
-pub const PL011_FIFO_DEPTH: usize = 16_usize;
+pub const PL011_FIFO_DEPTH: u32 = 16;
#[derive(Clone, Copy, Debug)]
enum DeviceId {
@@ -59,6 +56,32 @@ impl DeviceId {
const PL011_ID_LUMINARY: [c_uchar; 8] = [0x11, 0x00, 0x18, 0x01, 0x0d, 0xf0, 0x05, 0xb1];
}
+// FIFOs use 32-bit indices instead of usize, for compatibility with
+// the migration stream produced by the C version of this device.
+#[repr(transparent)]
+#[derive(Debug, Default)]
+pub struct Fifo([registers::Data; PL011_FIFO_DEPTH as usize]);
+
+impl Fifo {
+ const fn len(&self) -> u32 {
+ self.0.len() as u32
+ }
+}
+
+impl std::ops::IndexMut<u32> for Fifo {
+ fn index_mut(&mut self, idx: u32) -> &mut Self::Output {
+ &mut self.0[idx as usize]
+ }
+}
+
+impl std::ops::Index<u32> for Fifo {
+ type Output = registers::Data;
+
+ fn index(&self, idx: u32) -> &Self::Output {
+ &self.0[idx as usize]
+ }
+}
+
#[repr(C)]
#[derive(Debug, qemu_api_macros::Object, qemu_api_macros::offsets)]
/// PL011 Device Model in QEMU
@@ -76,14 +99,14 @@ pub struct PL011State {
pub dmacr: u32,
pub int_enabled: u32,
pub int_level: u32,
- pub read_fifo: [u32; PL011_FIFO_DEPTH],
+ pub read_fifo: Fifo,
pub ilpr: u32,
pub ibrd: u32,
pub fbrd: u32,
pub ifl: u32,
- pub read_pos: usize,
- pub read_count: usize,
- pub read_trigger: usize,
+ pub read_pos: u32,
+ pub read_count: u32,
+ pub read_trigger: u32,
#[doc(alias = "chr")]
pub char_backend: CharBackend,
/// QEMU interrupts
@@ -107,8 +130,10 @@ pub struct PL011State {
device_id: DeviceId,
}
+qom_isa!(PL011State : SysBusDevice, DeviceState, Object);
+
unsafe impl ObjectType for PL011State {
- type Class = PL011Class;
+ type Class = <SysBusDevice as ObjectType>::Class;
const TYPE_NAME: &'static CStr = crate::TYPE_PL011;
}
@@ -118,11 +143,6 @@ impl ObjectImpl for PL011State {
const INSTANCE_INIT: Option<unsafe fn(&mut Self)> = Some(Self::init);
}
-#[repr(C)]
-pub struct PL011Class {
- _inner: [u8; 0],
-}
-
impl DeviceImpl for PL011State {
fn properties() -> &'static [Property] {
&device_class::PL011_PROPERTIES
@@ -134,8 +154,6 @@ fn vmsd() -> Option<&'static VMStateDescription> {
const RESET: Option<fn(&mut Self)> = Some(Self::reset);
}
-impl_device_class!(PL011State);
-
impl PL011State {
/// Initializes a pre-allocated, unitialized instance of `PL011State`.
///
@@ -148,8 +166,6 @@ impl PL011State {
unsafe fn init(&mut self) {
const CLK_NAME: &CStr = c_str!("clk");
- let sbd = unsafe { &mut *(addr_of_mut!(*self).cast::<SysBusDevice>()) };
-
// SAFETY:
//
// self and self.iomem are guaranteed to be valid at this point since callers
@@ -163,15 +179,16 @@ unsafe fn init(&mut self) {
Self::TYPE_NAME.as_ptr(),
0x1000,
);
+
+ let sbd: &mut SysBusDevice = self.upcast_mut();
sysbus_init_mmio(sbd, addr_of_mut!(self.iomem));
}
for irq in self.interrupts.iter() {
+ let sbd: &SysBusDevice = self.upcast();
sbd.init_irq(irq);
}
- let dev = addr_of_mut!(*self).cast::<DeviceState>();
-
// SAFETY:
//
// self.clock is not initialized at this point; but since `NonNull<_>` is Copy,
@@ -180,6 +197,7 @@ unsafe fn init(&mut self) {
// calls this function to initialize the fields; therefore no code is
// able to access an invalid self.clock value.
unsafe {
+ let dev: &mut DeviceState = self.upcast_mut();
self.clock = NonNull::new(qdev_init_clock_in(
dev,
CLK_NAME.as_ptr(),
@@ -194,9 +212,9 @@ unsafe fn init(&mut self) {
pub fn read(&mut self, offset: hwaddr, _size: c_uint) -> std::ops::ControlFlow<u64, u64> {
use RegisterOffset::*;
- std::ops::ControlFlow::Break(match RegisterOffset::try_from(offset) {
+ let value = match RegisterOffset::try_from(offset) {
Err(v) if (0x3f8..0x400).contains(&(v >> 2)) => {
- u64::from(self.device_id[(offset - 0xfe0) >> 2])
+ u32::from(self.device_id[(offset - 0xfe0) >> 2])
}
Err(_) => {
// qemu_log_mask(LOG_GUEST_ERROR, "pl011_read: Bad offset 0x%x\n", (int)offset);
@@ -216,32 +234,31 @@ pub fn read(&mut self, offset: hwaddr, _size: c_uint) -> std::ops::ControlFlow<u
self.int_level &= !registers::INT_RX;
}
// Update error bits.
- self.receive_status_error_clear = c.to_be_bytes()[3].into();
+ self.receive_status_error_clear.set_from_data(c);
self.update();
// Must call qemu_chr_fe_accept_input, so return Continue:
- return std::ops::ControlFlow::Continue(c.into());
+ let c = u32::from(c);
+ return std::ops::ControlFlow::Continue(u64::from(c));
}
- Ok(RSR) => u8::from(self.receive_status_error_clear).into(),
- Ok(FR) => u16::from(self.flags).into(),
- Ok(FBRD) => self.fbrd.into(),
- Ok(ILPR) => self.ilpr.into(),
- Ok(IBRD) => self.ibrd.into(),
- Ok(LCR_H) => u16::from(self.line_control).into(),
- Ok(CR) => {
- // We exercise our self-control.
- u16::from(self.control).into()
- }
- Ok(FLS) => self.ifl.into(),
- Ok(IMSC) => self.int_enabled.into(),
- Ok(RIS) => self.int_level.into(),
- Ok(MIS) => u64::from(self.int_level & self.int_enabled),
+ Ok(RSR) => u32::from(self.receive_status_error_clear),
+ Ok(FR) => u32::from(self.flags),
+ Ok(FBRD) => self.fbrd,
+ Ok(ILPR) => self.ilpr,
+ Ok(IBRD) => self.ibrd,
+ Ok(LCR_H) => u32::from(self.line_control),
+ Ok(CR) => u32::from(self.control),
+ Ok(FLS) => self.ifl,
+ Ok(IMSC) => self.int_enabled,
+ Ok(RIS) => self.int_level,
+ Ok(MIS) => self.int_level & self.int_enabled,
Ok(ICR) => {
// "The UARTICR Register is the interrupt clear register and is write-only"
// Source: ARM DDI 0183G 3.3.13 Interrupt Clear Register, UARTICR
0
}
- Ok(DMACR) => self.dmacr.into(),
- })
+ Ok(DMACR) => self.dmacr,
+ };
+ std::ops::ControlFlow::Break(value.into())
}
pub fn write(&mut self, offset: hwaddr, value: u64) {
@@ -268,7 +285,7 @@ pub fn write(&mut self, offset: hwaddr, value: u64) {
self.update();
}
Ok(RSR) => {
- self.receive_status_error_clear = 0.into();
+ self.receive_status_error_clear.reset();
}
Ok(FR) => {
// flag writes are ignored
@@ -283,13 +300,11 @@ pub fn write(&mut self, offset: hwaddr, value: u64) {
self.fbrd = value;
}
Ok(LCR_H) => {
- let value = value as u16;
let new_val: registers::LineControl = value.into();
// Reset the FIFO state on FIFO enable or disable
- if bool::from(self.line_control.fifos_enabled())
- ^ bool::from(new_val.fifos_enabled())
- {
- self.reset_fifo();
+ if self.line_control.fifos_enabled() != new_val.fifos_enabled() {
+ self.reset_rx_fifo();
+ self.reset_tx_fifo();
}
if self.line_control.send_break() ^ new_val.send_break() {
let mut break_enable: c_int = new_val.send_break().into();
@@ -309,7 +324,6 @@ pub fn write(&mut self, offset: hwaddr, value: u64) {
}
Ok(CR) => {
// ??? Need to implement the enable bit.
- let value = value as u16;
self.control = value.into();
self.loopback_mdmctrl();
}
@@ -411,7 +425,7 @@ fn loopback_mdmctrl(&mut self) {
fn loopback_break(&mut self, enable: bool) {
if enable {
- self.loopback_tx(DATA_BREAK);
+ self.loopback_tx(registers::Data::BREAK.into());
}
}
@@ -448,16 +462,24 @@ pub fn reset(&mut self) {
self.read_trigger = 1;
self.ifl = 0x12;
self.control.reset();
- self.flags = 0.into();
- self.reset_fifo();
+ self.flags.reset();
+ self.reset_rx_fifo();
+ self.reset_tx_fifo();
}
- pub fn reset_fifo(&mut self) {
+ pub fn reset_rx_fifo(&mut self) {
self.read_count = 0;
self.read_pos = 0;
- /* Reset FIFO flags */
- self.flags.reset();
+ // Reset FIFO flags
+ self.flags.set_receive_fifo_full(false);
+ self.flags.set_receive_fifo_empty(true);
+ }
+
+ pub fn reset_tx_fifo(&mut self) {
+ // Reset FIFO flags
+ self.flags.set_transmit_fifo_full(false);
+ self.flags.set_transmit_fifo_empty(true);
}
pub fn can_receive(&self) -> bool {
@@ -466,15 +488,14 @@ pub fn can_receive(&self) -> bool {
}
pub fn event(&mut self, event: QEMUChrEvent) {
- if event == bindings::QEMUChrEvent::CHR_EVENT_BREAK && !self.fifo_enabled() {
- self.put_fifo(DATA_BREAK);
- self.receive_status_error_clear.set_break_error(true);
+ if event == bindings::QEMUChrEvent::CHR_EVENT_BREAK && !self.loopback_enabled() {
+ self.put_fifo(registers::Data::BREAK.into());
}
}
#[inline]
pub fn fifo_enabled(&self) -> bool {
- matches!(self.line_control.fifos_enabled(), registers::Mode::FIFO)
+ self.line_control.fifos_enabled() == registers::Mode::FIFO
}
#[inline]
@@ -483,7 +504,7 @@ pub fn loopback_enabled(&self) -> bool {
}
#[inline]
- pub fn fifo_depth(&self) -> usize {
+ pub fn fifo_depth(&self) -> u32 {
// Note: FIFO depth is expected to be power-of-2
if self.fifo_enabled() {
return PL011_FIFO_DEPTH;
@@ -495,7 +516,7 @@ pub fn put_fifo(&mut self, value: c_uint) {
let depth = self.fifo_depth();
assert!(depth > 0);
let slot = (self.read_pos + self.read_count) & (depth - 1);
- self.read_fifo[slot] = value;
+ self.read_fifo[slot] = registers::Data::from(value);
self.read_count += 1;
self.flags.set_receive_fifo_empty(false);
if self.read_count == depth {
@@ -627,11 +648,6 @@ pub struct PL011Luminary {
parent_obj: PL011State,
}
-#[repr(C)]
-pub struct PL011LuminaryClass {
- _inner: [u8; 0],
-}
-
impl PL011Luminary {
/// Initializes a pre-allocated, unitialized instance of `PL011Luminary`.
///
@@ -645,8 +661,10 @@ unsafe fn init(&mut self) {
}
}
+qom_isa!(PL011Luminary : PL011State, SysBusDevice, DeviceState, Object);
+
unsafe impl ObjectType for PL011Luminary {
- type Class = PL011LuminaryClass;
+ type Class = <PL011State as ObjectType>::Class;
const TYPE_NAME: &'static CStr = crate::TYPE_PL011_LUMINARY;
}
@@ -657,5 +675,3 @@ impl ObjectImpl for PL011Luminary {
}
impl DeviceImpl for PL011Luminary {}
-
-impl_device_class!(PL011Luminary);
diff --git a/rust/hw/char/pl011/src/device_class.rs b/rust/hw/char/pl011/src/device_class.rs
index 975c3d4..7f3ca89 100644
--- a/rust/hw/char/pl011/src/device_class.rs
+++ b/rust/hw/char/pl011/src/device_class.rs
@@ -6,8 +6,8 @@
use std::os::raw::{c_int, c_void};
use qemu_api::{
- bindings::*, c_str, vmstate_clock, vmstate_fields, vmstate_int32, vmstate_subsections,
- vmstate_uint32, vmstate_uint32_array, vmstate_unused, zeroable::Zeroable,
+ bindings::*, c_str, vmstate_clock, vmstate_fields, vmstate_subsections, vmstate_uint32,
+ vmstate_uint32_array, vmstate_unused, zeroable::Zeroable,
};
use crate::device::{PL011State, PL011_FIFO_DEPTH};
@@ -64,9 +64,9 @@ extern "C" fn pl011_post_load(opaque: *mut c_void, version_id: c_int) -> c_int {
vmstate_uint32!(ibrd, PL011State),
vmstate_uint32!(fbrd, PL011State),
vmstate_uint32!(ifl, PL011State),
- vmstate_int32!(read_pos, PL011State),
- vmstate_int32!(read_count, PL011State),
- vmstate_int32!(read_trigger, PL011State),
+ vmstate_uint32!(read_pos, PL011State),
+ vmstate_uint32!(read_count, PL011State),
+ vmstate_uint32!(read_trigger, PL011State),
},
subsections: vmstate_subsections! {
VMSTATE_PL011_CLOCK
diff --git a/rust/hw/char/pl011/src/lib.rs b/rust/hw/char/pl011/src/lib.rs
index 4dc0e8f..69064d6 100644
--- a/rust/hw/char/pl011/src/lib.rs
+++ b/rust/hw/char/pl011/src/lib.rs
@@ -131,14 +131,23 @@ const fn _assert_exhaustive(val: RegisterOffset) {
pub mod registers {
//! Device registers exposed as typed structs which are backed by arbitrary
//! integer bitmaps. [`Data`], [`Control`], [`LineControl`], etc.
- //!
- //! All PL011 registers are essentially 32-bit wide, but are typed here as
- //! bitmaps with only the necessary width. That is, if a struct bitmap
- //! in this module is for example 16 bits long, it should be conceived
- //! as a 32-bit register where the unmentioned higher bits are always
- //! unused thus treated as zero when read or written.
use bilge::prelude::*;
+ /// Receive Status Register / Data Register common error bits
+ ///
+ /// The `UARTRSR` register is updated only when a read occurs
+ /// from the `UARTDR` register with the same status information
+ /// that can also be obtained by reading the `UARTDR` register
+ #[bitsize(8)]
+ #[derive(Clone, Copy, Default, DebugBits, FromBits)]
+ pub struct Errors {
+ pub framing_error: bool,
+ pub parity_error: bool,
+ pub break_error: bool,
+ pub overrun_error: bool,
+ _reserved_unpredictable: u4,
+ }
+
// TODO: FIFO Mode has different semantics
/// Data Register, `UARTDR`
///
@@ -181,16 +190,18 @@ pub mod registers {
///
/// # Source
/// ARM DDI 0183G 3.3.1 Data Register, UARTDR
- #[bitsize(16)]
- #[derive(Clone, Copy, DebugBits, FromBits)]
+ #[bitsize(32)]
+ #[derive(Clone, Copy, Default, DebugBits, FromBits)]
#[doc(alias = "UARTDR")]
pub struct Data {
- _reserved: u4,
pub data: u8,
- pub framing_error: bool,
- pub parity_error: bool,
- pub break_error: bool,
- pub overrun_error: bool,
+ pub errors: Errors,
+ _reserved: u16,
+ }
+
+ impl Data {
+ // bilge is not very const-friendly, unfortunately
+ pub const BREAK: Self = Self { value: 1 << 10 };
}
// TODO: FIFO Mode has different semantics
@@ -217,20 +228,21 @@ pub struct Data {
/// # Source
/// ARM DDI 0183G 3.3.2 Receive Status Register/Error Clear Register,
/// UARTRSR/UARTECR
- #[bitsize(8)]
+ #[bitsize(32)]
#[derive(Clone, Copy, DebugBits, FromBits)]
pub struct ReceiveStatusErrorClear {
- pub framing_error: bool,
- pub parity_error: bool,
- pub break_error: bool,
- pub overrun_error: bool,
- _reserved_unpredictable: u4,
+ pub errors: Errors,
+ _reserved_unpredictable: u24,
}
impl ReceiveStatusErrorClear {
+ pub fn set_from_data(&mut self, data: Data) {
+ self.set_errors(data.errors());
+ }
+
pub fn reset(&mut self) {
// All the bits are cleared to 0 on reset.
- *self = 0.into();
+ *self = Self::default();
}
}
@@ -240,7 +252,7 @@ fn default() -> Self {
}
}
- #[bitsize(16)]
+ #[bitsize(32)]
#[derive(Clone, Copy, DebugBits, FromBits)]
/// Flag Register, `UARTFR`
#[doc(alias = "UARTFR")]
@@ -292,59 +304,45 @@ pub struct Flags {
pub transmit_fifo_empty: bool,
/// `RI`, is `true` when `nUARTRI` is `LOW`.
pub ring_indicator: bool,
- _reserved_zero_no_modify: u7,
+ _reserved_zero_no_modify: u23,
}
impl Flags {
pub fn reset(&mut self) {
- // After reset TXFF, RXFF, and BUSY are 0, and TXFE and RXFE are 1
- self.set_receive_fifo_full(false);
- self.set_transmit_fifo_full(false);
- self.set_busy(false);
- self.set_receive_fifo_empty(true);
- self.set_transmit_fifo_empty(true);
+ *self = Self::default();
}
}
impl Default for Flags {
fn default() -> Self {
let mut ret: Self = 0.into();
- ret.reset();
+ // After reset TXFF, RXFF, and BUSY are 0, and TXFE and RXFE are 1
+ ret.set_receive_fifo_empty(true);
+ ret.set_transmit_fifo_empty(true);
ret
}
}
- #[bitsize(16)]
+ #[bitsize(32)]
#[derive(Clone, Copy, DebugBits, FromBits)]
/// Line Control Register, `UARTLCR_H`
#[doc(alias = "UARTLCR_H")]
pub struct LineControl {
- /// 15:8 - Reserved, do not modify, read as zero.
- _reserved_zero_no_modify: u8,
- /// 7 SPS Stick parity select.
- /// 0 = stick parity is disabled
- /// 1 = either:
- /// • if the EPS bit is 0 then the parity bit is transmitted and checked
- /// as a 1 • if the EPS bit is 1 then the parity bit is
- /// transmitted and checked as a 0. This bit has no effect when
- /// the PEN bit disables parity checking and generation. See Table 3-11
- /// on page 3-14 for the parity truth table.
- pub sticky_parity: bool,
- /// WLEN Word length. These bits indicate the number of data bits
- /// transmitted or received in a frame as follows: b11 = 8 bits
- /// b10 = 7 bits
- /// b01 = 6 bits
- /// b00 = 5 bits.
- pub word_length: WordLength,
- /// FEN Enable FIFOs:
- /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become
- /// 1-byte-deep holding registers 1 = transmit and receive FIFO
- /// buffers are enabled (FIFO mode).
- pub fifos_enabled: Mode,
- /// 3 STP2 Two stop bits select. If this bit is set to 1, two stop bits
- /// are transmitted at the end of the frame. The receive
- /// logic does not check for two stop bits being received.
- pub two_stops_bits: bool,
+ /// BRK Send break.
+ ///
+ /// If this bit is set to `1`, a low-level is continually output on the
+ /// `UARTTXD` output, after completing transmission of the
+ /// current character. For the proper execution of the break command,
+ /// the software must set this bit for at least two complete
+ /// frames. For normal use, this bit must be cleared to `0`.
+ pub send_break: bool,
+ /// 1 PEN Parity enable:
+ ///
+ /// - 0 = parity is disabled and no parity bit added to the data frame
+ /// - 1 = parity checking and generation is enabled.
+ ///
+ /// See Table 3-11 on page 3-14 for the parity truth table.
+ pub parity_enabled: bool,
/// EPS Even parity select. Controls the type of parity the UART uses
/// during transmission and reception:
/// - 0 = odd parity. The UART generates or checks for an odd number of
@@ -355,21 +353,32 @@ pub struct LineControl {
/// and generation. See Table 3-11 on page 3-14 for the parity
/// truth table.
pub parity: Parity,
- /// 1 PEN Parity enable:
- ///
- /// - 0 = parity is disabled and no parity bit added to the data frame
- /// - 1 = parity checking and generation is enabled.
- ///
- /// See Table 3-11 on page 3-14 for the parity truth table.
- pub parity_enabled: bool,
- /// BRK Send break.
- ///
- /// If this bit is set to `1`, a low-level is continually output on the
- /// `UARTTXD` output, after completing transmission of the
- /// current character. For the proper execution of the break command,
- /// the software must set this bit for at least two complete
- /// frames. For normal use, this bit must be cleared to `0`.
- pub send_break: bool,
+ /// 3 STP2 Two stop bits select. If this bit is set to 1, two stop bits
+ /// are transmitted at the end of the frame. The receive
+ /// logic does not check for two stop bits being received.
+ pub two_stops_bits: bool,
+ /// FEN Enable FIFOs:
+ /// 0 = FIFOs are disabled (character mode) that is, the FIFOs become
+ /// 1-byte-deep holding registers 1 = transmit and receive FIFO
+ /// buffers are enabled (FIFO mode).
+ pub fifos_enabled: Mode,
+ /// WLEN Word length. These bits indicate the number of data bits
+ /// transmitted or received in a frame as follows: b11 = 8 bits
+ /// b10 = 7 bits
+ /// b01 = 6 bits
+ /// b00 = 5 bits.
+ pub word_length: WordLength,
+ /// 7 SPS Stick parity select.
+ /// 0 = stick parity is disabled
+ /// 1 = either:
+ /// • if the EPS bit is 0 then the parity bit is transmitted and checked
+ /// as a 1 • if the EPS bit is 1 then the parity bit is
+ /// transmitted and checked as a 0. This bit has no effect when
+ /// the PEN bit disables parity checking and generation. See Table 3-11
+ /// on page 3-14 for the parity truth table.
+ pub sticky_parity: bool,
+ /// 31:8 - Reserved, do not modify, read as zero.
+ _reserved_zero_no_modify: u24,
}
impl LineControl {
@@ -410,12 +419,6 @@ pub enum Mode {
FIFO = 1,
}
- impl From<Mode> for bool {
- fn from(val: Mode) -> Self {
- matches!(val, Mode::FIFO)
- }
- }
-
#[bitsize(2)]
#[derive(Clone, Copy, Debug, Eq, FromBits, PartialEq)]
/// `WLEN` Word length, field of [Line Control register](LineControl).
@@ -440,7 +443,7 @@ pub enum WordLength {
///
/// # Source
/// ARM DDI 0183G, 3.3.8 Control Register, `UARTCR`, Table 3-12
- #[bitsize(16)]
+ #[bitsize(32)]
#[doc(alias = "UARTCR")]
#[derive(Clone, Copy, DebugBits, FromBits)]
pub struct Control {
@@ -518,6 +521,8 @@ pub struct Control {
/// CTS hardware flow control is enabled. Data is only transmitted when
/// the `nUARTCTS` signal is asserted.
pub cts_hardware_flow_control_enable: bool,
+ /// 31:16 - Reserved, do not modify, read as zero.
+ _reserved_zero_no_modify2: u16,
}
impl Control {
diff --git a/rust/qemu-api-macros/src/lib.rs b/rust/qemu-api-macros/src/lib.rs
index cf99ac0..74a8bc7 100644
--- a/rust/qemu-api-macros/src/lib.rs
+++ b/rust/qemu-api-macros/src/lib.rs
@@ -40,7 +40,7 @@ pub fn derive_object(input: TokenStream) -> TokenStream {
let expanded = quote! {
::qemu_api::module_init! {
MODULE_INIT_QOM => unsafe {
- ::qemu_api::bindings::type_register_static(&<#name as ::qemu_api::definitions::ObjectImpl>::TYPE_INFO);
+ ::qemu_api::bindings::type_register_static(&<#name as ::qemu_api::qom::ObjectImpl>::TYPE_INFO);
}
}
};
diff --git a/rust/qemu-api/meson.build b/rust/qemu-api/meson.build
index adcee66..ccb20f3 100644
--- a/rust/qemu-api/meson.build
+++ b/rust/qemu-api/meson.build
@@ -17,13 +17,15 @@
'src/lib.rs',
'src/bindings.rs',
'src/bitops.rs',
+ 'src/callbacks.rs',
'src/cell.rs',
'src/c_str.rs',
- 'src/definitions.rs',
- 'src/device_class.rs',
'src/irq.rs',
+ 'src/module.rs',
'src/offset_of.rs',
'src/prelude.rs',
+ 'src/qdev.rs',
+ 'src/qom.rs',
'src/sysbus.rs',
'src/vmstate.rs',
'src/zeroable.rs',
@@ -59,7 +61,7 @@
dependencies: [qemu_api, qemu_api_macros],
link_whole: [rust_qemu_api_objs, libqemuutil]),
args: [
- '--test',
+ '--test', '--test-threads', '1',
'--format', 'pretty',
],
protocol: 'rust',
diff --git a/rust/qemu-api/src/callbacks.rs b/rust/qemu-api/src/callbacks.rs
new file mode 100644
index 0000000..314f9dc
--- /dev/null
+++ b/rust/qemu-api/src/callbacks.rs
@@ -0,0 +1,144 @@
+// SPDX-License-Identifier: MIT
+
+//! Utility functions to deal with callbacks from C to Rust.
+
+use std::{mem, ptr::NonNull};
+
+/// Trait for functions (types implementing [`Fn`]) that can be used as
+/// callbacks. These include both zero-capture closures and function pointers.
+///
+/// In Rust, calling a function through the `Fn` trait normally requires a
+/// `self` parameter, even though for zero-sized functions (including function
+/// pointers) the type itself contains all necessary information to call the
+/// function. This trait provides a `call` function that doesn't require `self`,
+/// allowing zero-sized functions to be called using only their type.
+///
+/// This enables zero-sized functions to be passed entirely through generic
+/// parameters and resolved at compile-time. A typical use is a function
+/// receiving an unused parameter of generic type `F` and calling it via
+/// `F::call` or passing it to another function via `func::<F>`.
+///
+/// QEMU uses this trick to create wrappers to C callbacks. The wrappers
+/// are needed to convert an opaque `*mut c_void` into a Rust reference,
+/// but they only have a single opaque that they can use. The `FnCall`
+/// trait makes it possible to use that opaque for `self` or any other
+/// reference:
+///
+/// ```ignore
+/// // The compiler creates a new `rust_bh_cb` wrapper for each function
+/// // passed to `qemu_bh_schedule_oneshot` below.
+/// unsafe extern "C" fn rust_bh_cb<T, F: for<'a> FnCall<(&'a T,)>>(
+/// opaque: *mut c_void,
+/// ) {
+/// // SAFETY: the opaque was passed as a reference to `T`.
+/// F::call((unsafe { &*(opaque.cast::<T>()) }, ))
+/// }
+///
+/// // The `_f` parameter is unused but it helps the compiler build the appropriate `F`.
+/// // Using a reference allows usage in const context.
+/// fn qemu_bh_schedule_oneshot<T, F: for<'a> FnCall<(&'a T,)>>(_f: &F, opaque: &T) {
+/// let cb: unsafe extern "C" fn(*mut c_void) = rust_bh_cb::<T, F>;
+/// unsafe {
+/// bindings::qemu_bh_schedule_oneshot(cb, opaque as *const T as *const c_void as *mut c_void)
+/// }
+/// }
+/// ```
+///
+/// Each wrapper is a separate instance of `rust_bh_cb` and is therefore
+/// compiled to a separate function ("monomorphization"). If you wanted
+/// to pass `self` as the opaque value, the generic parameters would be
+/// `rust_bh_cb::<Self, F>`.
+///
+/// `Args` is a tuple type whose types are the arguments of the function,
+/// while `R` is the returned type.
+///
+/// # Examples
+///
+/// ```
+/// # use qemu_api::callbacks::FnCall;
+/// fn call_it<F: for<'a> FnCall<(&'a str,), String>>(_f: &F, s: &str) -> String {
+/// F::call((s,))
+/// }
+///
+/// let s: String = call_it(&str::to_owned, "hello world");
+/// assert_eq!(s, "hello world");
+/// ```
+///
+/// Note that the compiler will produce a different version of `call_it` for
+/// each function that is passed to it. Therefore the argument is not really
+/// used, except to decide what is `F` and what `F::call` does.
+///
+/// Attempting to pass a non-zero-sized closure causes a compile-time failure:
+///
+/// ```compile_fail
+/// # use qemu_api::callbacks::FnCall;
+/// # fn call_it<'a, F: FnCall<(&'a str,), String>>(_f: &F, s: &'a str) -> String {
+/// # F::call((s,))
+/// # }
+/// let x: &'static str = "goodbye world";
+/// call_it(&move |_| String::from(x), "hello workd");
+/// ```
+///
+/// # Safety
+///
+/// Because `Self` is a zero-sized type, all instances of the type are
+/// equivalent. However, in addition to this, `Self` must have no invariants
+/// that could be violated by creating a reference to it.
+///
+/// This is always true for zero-capture closures and function pointers, as long
+/// as the code is able to name the function in the first place.
+pub unsafe trait FnCall<Args, R = ()>: 'static + Sync + Sized {
+ /// Referring to this internal constant asserts that the `Self` type is
+ /// zero-sized. Can be replaced by an inline const expression in
+ /// Rust 1.79.0+.
+ const ASSERT_ZERO_SIZED: () = { assert!(mem::size_of::<Self>() == 0) };
+
+ /// Call the function with the arguments in args.
+ fn call(a: Args) -> R;
+}
+
+macro_rules! impl_call {
+ ($($args:ident,)* ) => (
+ // SAFETY: because each function is treated as a separate type,
+ // accessing `FnCall` is only possible in code that would be
+ // allowed to call the function.
+ unsafe impl<F, $($args,)* R> FnCall<($($args,)*), R> for F
+ where
+ F: 'static + Sync + Sized + Fn($($args, )*) -> R,
+ {
+ #[inline(always)]
+ fn call(a: ($($args,)*)) -> R {
+ let _: () = Self::ASSERT_ZERO_SIZED;
+
+ // SAFETY: the safety of this method is the condition for implementing
+ // `FnCall`. As to the `NonNull` idiom to create a zero-sized type,
+ // see https://github.com/rust-lang/libs-team/issues/292.
+ let f: &'static F = unsafe { &*NonNull::<Self>::dangling().as_ptr() };
+ let ($($args,)*) = a;
+ f($($args,)*)
+ }
+ }
+ )
+}
+
+impl_call!(_1, _2, _3, _4, _5,);
+impl_call!(_1, _2, _3, _4,);
+impl_call!(_1, _2, _3,);
+impl_call!(_1, _2,);
+impl_call!(_1,);
+impl_call!();
+
+#[cfg(test)]
+mod tests {
+ use super::*;
+
+ // The `_f` parameter is unused but it helps the compiler infer `F`.
+ fn do_test_call<'a, F: FnCall<(&'a str,), String>>(_f: &F) -> String {
+ F::call(("hello world",))
+ }
+
+ #[test]
+ fn test_call() {
+ assert_eq!(do_test_call(&str::to_owned), "hello world")
+ }
+}
diff --git a/rust/qemu-api/src/cell.rs b/rust/qemu-api/src/cell.rs
index 28349de..eae4e2c 100644
--- a/rust/qemu-api/src/cell.rs
+++ b/rust/qemu-api/src/cell.rs
@@ -124,9 +124,18 @@
use crate::bindings;
-// TODO: When building doctests do not include the actual BQL, because cargo
-// does not know how to link them to libqemuutil. This can be fixed by
-// running rustdoc from "meson test" instead of relying on cargo.
+/// An internal function that is used by doctests.
+pub fn bql_start_test() {
+ if cfg!(MESON) {
+ // SAFETY: integration tests are run with --test-threads=1, while
+ // unit tests and doctests are not multithreaded and do not have
+ // any BQL-protected data. Just set bql_locked to true.
+ unsafe {
+ bindings::rust_bql_mock_lock();
+ }
+ }
+}
+
pub fn bql_locked() -> bool {
// SAFETY: the function does nothing but return a thread-local bool
!cfg!(MESON) || unsafe { bindings::bql_locked() }
@@ -220,6 +229,7 @@ impl<T> BqlCell<T> {
///
/// ```
/// use qemu_api::cell::BqlCell;
+ /// # qemu_api::cell::bql_start_test();
///
/// let c = BqlCell::new(5);
/// ```
@@ -236,6 +246,7 @@ pub const fn new(value: T) -> BqlCell<T> {
///
/// ```
/// use qemu_api::cell::BqlCell;
+ /// # qemu_api::cell::bql_start_test();
///
/// let c = BqlCell::new(5);
///
@@ -253,6 +264,7 @@ pub fn set(&self, val: T) {
///
/// ```
/// use qemu_api::cell::BqlCell;
+ /// # qemu_api::cell::bql_start_test();
///
/// let cell = BqlCell::new(5);
/// assert_eq!(cell.get(), 5);
@@ -274,6 +286,7 @@ pub fn replace(&self, val: T) -> T {
///
/// ```
/// use qemu_api::cell::BqlCell;
+ /// # qemu_api::cell::bql_start_test();
///
/// let c = BqlCell::new(5);
/// let five = c.into_inner();
@@ -293,6 +306,7 @@ impl<T: Copy> BqlCell<T> {
///
/// ```
/// use qemu_api::cell::BqlCell;
+ /// # qemu_api::cell::bql_start_test();
///
/// let c = BqlCell::new(5);
///
@@ -315,6 +329,7 @@ impl<T> BqlCell<T> {
///
/// ```
/// use qemu_api::cell::BqlCell;
+ /// # qemu_api::cell::bql_start_test();
///
/// let c = BqlCell::new(5);
///
@@ -333,6 +348,7 @@ impl<T: Default> BqlCell<T> {
///
/// ```
/// use qemu_api::cell::BqlCell;
+ /// # qemu_api::cell::bql_start_test();
///
/// let c = BqlCell::new(5);
/// let five = c.take();
@@ -461,6 +477,7 @@ fn panic_already_borrowed(&self) -> ! {
///
/// ```
/// use qemu_api::cell::BqlRefCell;
+ /// # qemu_api::cell::bql_start_test();
///
/// let c = BqlRefCell::new(5);
///
@@ -472,6 +489,7 @@ fn panic_already_borrowed(&self) -> ! {
///
/// ```should_panic
/// use qemu_api::cell::BqlRefCell;
+ /// # qemu_api::cell::bql_start_test();
///
/// let c = BqlRefCell::new(5);
///
@@ -513,6 +531,7 @@ pub fn borrow(&self) -> BqlRef<'_, T> {
///
/// ```
/// use qemu_api::cell::BqlRefCell;
+ /// # qemu_api::cell::bql_start_test();
///
/// let c = BqlRefCell::new("hello".to_owned());
///
@@ -525,6 +544,7 @@ pub fn borrow(&self) -> BqlRef<'_, T> {
///
/// ```should_panic
/// use qemu_api::cell::BqlRefCell;
+ /// # qemu_api::cell::bql_start_test();
///
/// let c = BqlRefCell::new(5);
/// let m = c.borrow();
diff --git a/rust/qemu-api/src/definitions.rs b/rust/qemu-api/src/definitions.rs
deleted file mode 100644
index df91a2e..0000000
--- a/rust/qemu-api/src/definitions.rs
+++ /dev/null
@@ -1,168 +0,0 @@
-// Copyright 2024, Linaro Limited
-// Author(s): Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-//! Definitions required by QEMU when registering a device.
-
-use std::{ffi::CStr, os::raw::c_void};
-
-use crate::bindings::{Object, ObjectClass, TypeInfo};
-
-unsafe extern "C" fn rust_instance_init<T: ObjectImpl>(obj: *mut Object) {
- // SAFETY: obj is an instance of T, since rust_instance_init<T>
- // is called from QOM core as the instance_init function
- // for class T
- unsafe { T::INSTANCE_INIT.unwrap()(&mut *obj.cast::<T>()) }
-}
-
-unsafe extern "C" fn rust_instance_post_init<T: ObjectImpl>(obj: *mut Object) {
- // SAFETY: obj is an instance of T, since rust_instance_post_init<T>
- // is called from QOM core as the instance_post_init function
- // for class T
- //
- // FIXME: it's not really guaranteed that there are no backpointers to
- // obj; it's quite possible that they have been created by instance_init().
- // The receiver should be &self, not &mut self.
- T::INSTANCE_POST_INIT.unwrap()(unsafe { &mut *obj.cast::<T>() })
-}
-
-/// Trait exposed by all structs corresponding to QOM objects.
-///
-/// # Safety
-///
-/// For classes declared in C:
-///
-/// - `Class` and `TYPE` must match the data in the `TypeInfo`;
-///
-/// - the first field of the struct must be of the instance type corresponding
-/// to the superclass, as declared in the `TypeInfo`
-///
-/// - likewise, the first field of the `Class` struct must be of the class type
-/// corresponding to the superclass
-///
-/// For classes declared in Rust and implementing [`ObjectImpl`]:
-///
-/// - the struct must be `#[repr(C)]`;
-///
-/// - the first field of the struct must be of the instance struct corresponding
-/// to the superclass, which is `ObjectImpl::ParentType`
-///
-/// - likewise, the first field of the `Class` must be of the class struct
-/// corresponding to the superclass, which is `ObjectImpl::ParentType::Class`.
-pub unsafe trait ObjectType: Sized {
- /// The QOM class object corresponding to this struct. Not used yet.
- type Class;
-
- /// The name of the type, which can be passed to `object_new()` to
- /// generate an instance of this type.
- const TYPE_NAME: &'static CStr;
-}
-
-/// Trait a type must implement to be registered with QEMU.
-pub trait ObjectImpl: ObjectType + ClassInitImpl {
- /// The parent of the type. This should match the first field of
- /// the struct that implements `ObjectImpl`:
- type ParentType: ObjectType;
-
- /// Whether the object can be instantiated
- const ABSTRACT: bool = false;
- const INSTANCE_FINALIZE: Option<unsafe extern "C" fn(obj: *mut Object)> = None;
-
- /// Function that is called to initialize an object. The parent class will
- /// have already been initialized so the type is only responsible for
- /// initializing its own members.
- ///
- /// FIXME: The argument is not really a valid reference. `&mut
- /// MaybeUninit<Self>` would be a better description.
- const INSTANCE_INIT: Option<unsafe fn(&mut Self)> = None;
-
- /// Function that is called to finish initialization of an object, once
- /// `INSTANCE_INIT` functions have been called.
- const INSTANCE_POST_INIT: Option<fn(&mut Self)> = None;
-
- const TYPE_INFO: TypeInfo = TypeInfo {
- name: Self::TYPE_NAME.as_ptr(),
- parent: Self::ParentType::TYPE_NAME.as_ptr(),
- instance_size: core::mem::size_of::<Self>(),
- instance_align: core::mem::align_of::<Self>(),
- instance_init: match Self::INSTANCE_INIT {
- None => None,
- Some(_) => Some(rust_instance_init::<Self>),
- },
- instance_post_init: match Self::INSTANCE_POST_INIT {
- None => None,
- Some(_) => Some(rust_instance_post_init::<Self>),
- },
- instance_finalize: Self::INSTANCE_FINALIZE,
- abstract_: Self::ABSTRACT,
- class_size: core::mem::size_of::<Self::Class>(),
- class_init: <Self as ClassInitImpl>::CLASS_INIT,
- class_base_init: <Self as ClassInitImpl>::CLASS_BASE_INIT,
- class_data: core::ptr::null_mut(),
- interfaces: core::ptr::null_mut(),
- };
-}
-
-/// Trait used to fill in a class struct.
-///
-/// Each QOM class that has virtual methods describes them in a
-/// _class struct_. Class structs include a parent field corresponding
-/// to the vtable of the parent class, all the way up to [`ObjectClass`].
-/// Each QOM type has one such class struct.
-///
-/// The Rust implementation of methods will usually come from a trait
-/// like [`ObjectImpl`] or [`DeviceImpl`](crate::device_class::DeviceImpl).
-pub trait ClassInitImpl {
- /// Function that is called after all parent class initialization
- /// has occurred. On entry, the virtual method pointers are set to
- /// the default values coming from the parent classes; the function
- /// can change them to override virtual methods of a parent class.
- const CLASS_INIT: Option<unsafe extern "C" fn(klass: *mut ObjectClass, data: *mut c_void)>;
-
- /// Called on descendent classes after all parent class initialization
- /// has occurred, but before the class itself is initialized. This
- /// is only useful if a class is not a leaf, and can be used to undo
- /// the effects of copying the contents of the parent's class struct
- /// to the descendants.
- const CLASS_BASE_INIT: Option<
- unsafe extern "C" fn(klass: *mut ObjectClass, data: *mut c_void),
- >;
-}
-
-#[macro_export]
-macro_rules! module_init {
- ($type:ident => $body:block) => {
- const _: () = {
- #[used]
- #[cfg_attr(
- not(any(target_vendor = "apple", target_os = "windows")),
- link_section = ".init_array"
- )]
- #[cfg_attr(target_vendor = "apple", link_section = "__DATA,__mod_init_func")]
- #[cfg_attr(target_os = "windows", link_section = ".CRT$XCU")]
- pub static LOAD_MODULE: extern "C" fn() = {
- extern "C" fn init_fn() {
- $body
- }
-
- extern "C" fn ctor_fn() {
- unsafe {
- $crate::bindings::register_module_init(
- Some(init_fn),
- $crate::bindings::module_init_type::$type,
- );
- }
- }
-
- ctor_fn
- };
- };
- };
-
- // shortcut because it's quite common that $body needs unsafe {}
- ($type:ident => unsafe $body:block) => {
- $crate::module_init! {
- $type => { unsafe { $body } }
- }
- };
-}
diff --git a/rust/qemu-api/src/lib.rs b/rust/qemu-api/src/lib.rs
index 9e007e1..4b43e02 100644
--- a/rust/qemu-api/src/lib.rs
+++ b/rust/qemu-api/src/lib.rs
@@ -14,11 +14,13 @@
pub mod bitops;
pub mod c_str;
+pub mod callbacks;
pub mod cell;
-pub mod definitions;
-pub mod device_class;
pub mod irq;
+pub mod module;
pub mod offset_of;
+pub mod qdev;
+pub mod qom;
pub mod sysbus;
pub mod vmstate;
pub mod zeroable;
diff --git a/rust/qemu-api/src/module.rs b/rust/qemu-api/src/module.rs
new file mode 100644
index 0000000..fa5cea3
--- /dev/null
+++ b/rust/qemu-api/src/module.rs
@@ -0,0 +1,43 @@
+// Copyright 2024, Linaro Limited
+// Author(s): Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+//! Macro to register blocks of code that run as QEMU starts up.
+
+#[macro_export]
+macro_rules! module_init {
+ ($type:ident => $body:block) => {
+ const _: () = {
+ #[used]
+ #[cfg_attr(
+ not(any(target_vendor = "apple", target_os = "windows")),
+ link_section = ".init_array"
+ )]
+ #[cfg_attr(target_vendor = "apple", link_section = "__DATA,__mod_init_func")]
+ #[cfg_attr(target_os = "windows", link_section = ".CRT$XCU")]
+ pub static LOAD_MODULE: extern "C" fn() = {
+ extern "C" fn init_fn() {
+ $body
+ }
+
+ extern "C" fn ctor_fn() {
+ unsafe {
+ $crate::bindings::register_module_init(
+ Some(init_fn),
+ $crate::bindings::module_init_type::$type,
+ );
+ }
+ }
+
+ ctor_fn
+ };
+ };
+ };
+
+ // shortcut because it's quite common that $body needs unsafe {}
+ ($type:ident => unsafe $body:block) => {
+ $crate::module_init! {
+ $type => { unsafe { $body } }
+ }
+ };
+}
diff --git a/rust/qemu-api/src/prelude.rs b/rust/qemu-api/src/prelude.rs
index 1b8677b..6f32dee 100644
--- a/rust/qemu-api/src/prelude.rs
+++ b/rust/qemu-api/src/prelude.rs
@@ -7,4 +7,12 @@
pub use crate::cell::BqlCell;
pub use crate::cell::BqlRefCell;
-pub use crate::definitions::ObjectType;
+pub use crate::qom::IsA;
+pub use crate::qom::Object;
+pub use crate::qom::ObjectCast;
+pub use crate::qom::ObjectCastMut;
+pub use crate::qom::ObjectDeref;
+pub use crate::qom::ObjectMethods;
+pub use crate::qom::ObjectType;
+
+pub use crate::qom_isa;
diff --git a/rust/qemu-api/src/device_class.rs b/rust/qemu-api/src/qdev.rs
similarity index 72%
rename from rust/qemu-api/src/device_class.rs
rename to rust/qemu-api/src/qdev.rs
index 03d03fe..686054e 100644
--- a/rust/qemu-api/src/device_class.rs
+++ b/rust/qemu-api/src/qdev.rs
@@ -2,12 +2,17 @@
// Author(s): Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
// SPDX-License-Identifier: GPL-2.0-or-later
-use std::{ffi::CStr, os::raw::c_void};
+//! Bindings to create devices and access device functionality from Rust.
+
+use std::ffi::CStr;
+
+pub use bindings::{DeviceClass, DeviceState, Property};
use crate::{
- bindings::{self, DeviceClass, DeviceState, Error, ObjectClass, Property, VMStateDescription},
+ bindings::{self, Error},
prelude::*,
- zeroable::Zeroable,
+ qom::{ClassInitImpl, ObjectClass},
+ vmstate::VMStateDescription,
};
/// Trait providing the contents of [`DeviceClass`].
@@ -31,7 +36,7 @@ pub trait DeviceImpl {
/// device. Not a `const` because referencing statics in constants
/// is unstable until Rust 1.83.0.
fn properties() -> &'static [Property] {
- &[Zeroable::ZERO; 1]
+ &[]
}
/// A `VMStateDescription` providing the migration format for the device
@@ -45,7 +50,7 @@ fn vmsd() -> Option<&'static VMStateDescription> {
/// # Safety
///
/// This function is only called through the QOM machinery and
-/// the `impl_device_class!` macro.
+/// used by the `ClassInitImpl<DeviceClass>` trait.
/// We expect the FFI user of this function to pass a valid pointer that
/// can be downcasted to type `T`. We also expect the device is
/// readable/writeable from one thread at any time.
@@ -66,43 +71,31 @@ fn vmsd() -> Option<&'static VMStateDescription> {
T::RESET.unwrap()(unsafe { &mut *state });
}
-/// # Safety
-///
-/// We expect the FFI user of this function to pass a valid pointer that
-/// can be downcasted to type `DeviceClass`, because `T` implements
-/// `DeviceImpl`.
-pub unsafe extern "C" fn rust_device_class_init<T: DeviceImpl>(
- klass: *mut ObjectClass,
- _: *mut c_void,
-) {
- let mut dc = ::core::ptr::NonNull::new(klass.cast::<DeviceClass>()).unwrap();
- unsafe {
- let dc = dc.as_mut();
+impl<T> ClassInitImpl<DeviceClass> for T
+where
+ T: ClassInitImpl<ObjectClass> + DeviceImpl,
+{
+ fn class_init(dc: &mut DeviceClass) {
if <T as DeviceImpl>::REALIZE.is_some() {
dc.realize = Some(rust_realize_fn::<T>);
}
if <T as DeviceImpl>::RESET.is_some() {
- bindings::device_class_set_legacy_reset(dc, Some(rust_reset_fn::<T>));
+ unsafe {
+ bindings::device_class_set_legacy_reset(dc, Some(rust_reset_fn::<T>));
+ }
}
if let Some(vmsd) = <T as DeviceImpl>::vmsd() {
dc.vmsd = vmsd;
}
- bindings::device_class_set_props(dc, <T as DeviceImpl>::properties().as_ptr());
- }
-}
-
-#[macro_export]
-macro_rules! impl_device_class {
- ($type:ty) => {
- impl $crate::definitions::ClassInitImpl for $type {
- const CLASS_INIT: Option<
- unsafe extern "C" fn(klass: *mut ObjectClass, data: *mut ::std::os::raw::c_void),
- > = Some($crate::device_class::rust_device_class_init::<$type>);
- const CLASS_BASE_INIT: Option<
- unsafe extern "C" fn(klass: *mut ObjectClass, data: *mut ::std::os::raw::c_void),
- > = None;
+ let prop = <T as DeviceImpl>::properties();
+ if !prop.is_empty() {
+ unsafe {
+ bindings::device_class_set_props_n(dc, prop.as_ptr(), prop.len());
+ }
}
- };
+
+ <T as ClassInitImpl<ObjectClass>>::class_init(&mut dc.parent_class);
+ }
}
#[macro_export]
@@ -134,7 +127,7 @@ macro_rules! define_property {
macro_rules! declare_properties {
($ident:ident, $($prop:expr),*$(,)*) => {
pub static $ident: [$crate::bindings::Property; {
- let mut len = 1;
+ let mut len = 0;
$({
_ = stringify!($prop);
len += 1;
@@ -142,13 +135,13 @@ macro_rules! declare_properties {
len
}] = [
$($prop),*,
- $crate::zeroable::Zeroable::ZERO,
];
};
}
-unsafe impl ObjectType for bindings::DeviceState {
- type Class = bindings::DeviceClass;
+unsafe impl ObjectType for DeviceState {
+ type Class = DeviceClass;
const TYPE_NAME: &'static CStr =
unsafe { CStr::from_bytes_with_nul_unchecked(bindings::TYPE_DEVICE) };
}
+qom_isa!(DeviceState: Object);
diff --git a/rust/qemu-api/src/qom.rs b/rust/qemu-api/src/qom.rs
new file mode 100644
index 0000000..7d5fbef
--- /dev/null
+++ b/rust/qemu-api/src/qom.rs
@@ -0,0 +1,584 @@
+// Copyright 2024, Linaro Limited
+// Author(s): Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
+// SPDX-License-Identifier: GPL-2.0-or-later
+
+//! Bindings to access QOM functionality from Rust.
+//!
+//! The QEMU Object Model (QOM) provides inheritance and dynamic typing for QEMU
+//! devices. This module makes QOM's features available in Rust through three
+//! main mechanisms:
+//!
+//! * Automatic creation and registration of `TypeInfo` for classes that are
+//! written in Rust, as well as mapping between Rust traits and QOM vtables.
+//!
+//! * Type-safe casting between parent and child classes, through the [`IsA`]
+//! trait and methods such as [`upcast`](ObjectCast::upcast) and
+//! [`downcast`](ObjectCast::downcast).
+//!
+//! * Automatic delegation of parent class methods to child classes. When a
+//! trait uses [`IsA`] as a bound, its contents become available to all child
+//! classes through blanket implementations. This works both for class methods
+//! and for instance methods accessed through references or smart pointers.
+//!
+//! # Structure of a class
+//!
+//! A leaf class only needs a struct holding instance state. The struct must
+//! implement the [`ObjectType`] and [`IsA`] traits, as well as any `*Impl`
+//! traits that exist for its superclasses.
+//!
+//! If a class has subclasses, it will also provide a struct for instance data,
+//! with the same characteristics as for concrete classes, but it also needs
+//! additional components to support virtual methods:
+//!
+//! * a struct for class data, for example `DeviceClass`. This corresponds to
+//! the C "class struct" and holds the vtable that is used by instances of the
+//! class and its subclasses. It must start with its parent's class struct.
+//!
+//! * a trait for virtual method implementations, for example `DeviceImpl`.
+//! Child classes implement this trait to provide their own behavior for
+//! virtual methods. The trait's methods take `&self` to access instance data.
+//!
+//! * an implementation of [`ClassInitImpl`], for example
+//! `ClassInitImpl<DeviceClass>`. This fills the vtable in the class struct;
+//! the source for this is the `*Impl` trait; the associated consts and
+//! functions if needed are wrapped to map C types into Rust types.
+//!
+//! * a trait for instance methods, for example `DeviceMethods`. This trait is
+//! automatically implemented for any reference or smart pointer to a device
+//! instance. It calls into the vtable provides access across all subclasses
+//! to methods defined for the class.
+//!
+//! * optionally, a trait for class methods, for example `DeviceClassMethods`.
+//! This provides access to class-wide functionality that doesn't depend on
+//! instance data. Like instance methods, these are automatically inherited by
+//! child classes.
+
+use std::{
+ ffi::CStr,
+ ops::{Deref, DerefMut},
+ os::raw::c_void,
+};
+
+pub use bindings::{Object, ObjectClass};
+
+use crate::bindings::{self, object_dynamic_cast, object_get_class, object_get_typename, TypeInfo};
+
+/// Marker trait: `Self` can be statically upcasted to `P` (i.e. `P` is a direct
+/// or indirect parent of `Self`).
+///
+/// # Safety
+///
+/// The struct `Self` must be `#[repr(C)]` and must begin, directly or
+/// indirectly, with a field of type `P`. This ensures that invalid casts,
+/// which rely on `IsA<>` for static checking, are rejected at compile time.
+pub unsafe trait IsA<P: ObjectType>: ObjectType {}
+
+// SAFETY: it is always safe to cast to your own type
+unsafe impl<T: ObjectType> IsA<T> for T {}
+
+/// Macro to mark superclasses of QOM classes. This enables type-safe
+/// up- and downcasting.
+///
+/// # Safety
+///
+/// This macro is a thin wrapper around the [`IsA`] trait and performs
+/// no checking whatsoever of what is declared. It is the caller's
+/// responsibility to have $struct begin, directly or indirectly, with
+/// a field of type `$parent`.
+#[macro_export]
+macro_rules! qom_isa {
+ ($struct:ty : $($parent:ty),* ) => {
+ $(
+ // SAFETY: it is the caller responsibility to have $parent as the
+ // first field
+ unsafe impl $crate::qom::IsA<$parent> for $struct {}
+
+ impl AsRef<$parent> for $struct {
+ fn as_ref(&self) -> &$parent {
+ // SAFETY: follows the same rules as for IsA<U>, which is
+ // declared above.
+ let ptr: *const Self = self;
+ unsafe { &*ptr.cast::<$parent>() }
+ }
+ }
+ )*
+ };
+}
+
+unsafe extern "C" fn rust_instance_init<T: ObjectImpl>(obj: *mut Object) {
+ // SAFETY: obj is an instance of T, since rust_instance_init<T>
+ // is called from QOM core as the instance_init function
+ // for class T
+ unsafe { T::INSTANCE_INIT.unwrap()(&mut *obj.cast::<T>()) }
+}
+
+unsafe extern "C" fn rust_instance_post_init<T: ObjectImpl>(obj: *mut Object) {
+ // SAFETY: obj is an instance of T, since rust_instance_post_init<T>
+ // is called from QOM core as the instance_post_init function
+ // for class T
+ //
+ // FIXME: it's not really guaranteed that there are no backpointers to
+ // obj; it's quite possible that they have been created by instance_init().
+ // The receiver should be &self, not &mut self.
+ T::INSTANCE_POST_INIT.unwrap()(unsafe { &mut *obj.cast::<T>() })
+}
+
+unsafe extern "C" fn rust_class_init<T: ObjectType + ClassInitImpl<T::Class>>(
+ klass: *mut ObjectClass,
+ _data: *mut c_void,
+) {
+ // SAFETY: klass is a T::Class, since rust_class_init<T>
+ // is called from QOM core as the class_init function
+ // for class T
+ T::class_init(unsafe { &mut *klass.cast::<T::Class>() })
+}
+
+/// Trait exposed by all structs corresponding to QOM objects.
+///
+/// # Safety
+///
+/// For classes declared in C:
+///
+/// - `Class` and `TYPE` must match the data in the `TypeInfo`;
+///
+/// - the first field of the struct must be of the instance type corresponding
+/// to the superclass, as declared in the `TypeInfo`
+///
+/// - likewise, the first field of the `Class` struct must be of the class type
+/// corresponding to the superclass
+///
+/// For classes declared in Rust and implementing [`ObjectImpl`]:
+///
+/// - the struct must be `#[repr(C)]`;
+///
+/// - the first field of the struct must be of the instance struct corresponding
+/// to the superclass, which is `ObjectImpl::ParentType`
+///
+/// - likewise, the first field of the `Class` must be of the class struct
+/// corresponding to the superclass, which is `ObjectImpl::ParentType::Class`.
+pub unsafe trait ObjectType: Sized {
+ /// The QOM class object corresponding to this struct. This is used
+ /// to automatically generate a `class_init` method.
+ type Class;
+
+ /// The name of the type, which can be passed to `object_new()` to
+ /// generate an instance of this type.
+ const TYPE_NAME: &'static CStr;
+
+ /// Return the receiver as an Object. This is always safe, even
+ /// if this type represents an interface.
+ fn as_object(&self) -> &Object {
+ unsafe { &*self.as_object_ptr() }
+ }
+
+ /// Return the receiver as a const raw pointer to Object.
+ /// This is preferrable to `as_object_mut_ptr()` if a C
+ /// function only needs a `const Object *`.
+ fn as_object_ptr(&self) -> *const Object {
+ self.as_ptr().cast()
+ }
+
+ /// Return the receiver as a mutable raw pointer to Object.
+ ///
+ /// # Safety
+ ///
+ /// This cast is always safe, but because the result is mutable
+ /// and the incoming reference is not, this should only be used
+ /// for calls to C functions, and only if needed.
+ unsafe fn as_object_mut_ptr(&self) -> *mut Object {
+ self.as_object_ptr() as *mut _
+ }
+}
+
+/// This trait provides safe casting operations for QOM objects to raw pointers,
+/// to be used for example for FFI. The trait can be applied to any kind of
+/// reference or smart pointers, and enforces correctness through the [`IsA`]
+/// trait.
+pub trait ObjectDeref: Deref
+where
+ Self::Target: ObjectType,
+{
+ /// Convert to a const Rust pointer, to be used for example for FFI.
+ /// The target pointer type must be the type of `self` or a superclass
+ fn as_ptr<U: ObjectType>(&self) -> *const U
+ where
+ Self::Target: IsA<U>,
+ {
+ let ptr: *const Self::Target = self.deref();
+ ptr.cast::<U>()
+ }
+
+ /// Convert to a mutable Rust pointer, to be used for example for FFI.
+ /// The target pointer type must be the type of `self` or a superclass.
+ /// Used to implement interior mutability for objects.
+ ///
+ /// # Safety
+ ///
+ /// This method is unsafe because it overrides const-ness of `&self`.
+ /// Bindings to C APIs will use it a lot, but otherwise it should not
+ /// be necessary.
+ unsafe fn as_mut_ptr<U: ObjectType>(&self) -> *mut U
+ where
+ Self::Target: IsA<U>,
+ {
+ #[allow(clippy::as_ptr_cast_mut)]
+ {
+ self.as_ptr::<U>() as *mut _
+ }
+ }
+}
+
+/// Trait that adds extra functionality for `&T` where `T` is a QOM
+/// object type. Allows conversion to/from C objects in generic code.
+pub trait ObjectCast: ObjectDeref + Copy
+where
+ Self::Target: ObjectType,
+{
+ /// Safely convert from a derived type to one of its parent types.
+ ///
+ /// This is always safe; the [`IsA`] trait provides static verification
+ /// trait that `Self` dereferences to `U` or a child of `U`.
+ fn upcast<'a, U: ObjectType>(self) -> &'a U
+ where
+ Self::Target: IsA<U>,
+ Self: 'a,
+ {
+ // SAFETY: soundness is declared via IsA<U>, which is an unsafe trait
+ unsafe { self.unsafe_cast::<U>() }
+ }
+
+ /// Attempt to convert to a derived type.
+ ///
+ /// Returns `None` if the object is not actually of type `U`. This is
+ /// verified at runtime by checking the object's type information.
+ fn downcast<'a, U: IsA<Self::Target>>(self) -> Option<&'a U>
+ where
+ Self: 'a,
+ {
+ self.dynamic_cast::<U>()
+ }
+
+ /// Attempt to convert between any two types in the QOM hierarchy.
+ ///
+ /// Returns `None` if the object is not actually of type `U`. This is
+ /// verified at runtime by checking the object's type information.
+ fn dynamic_cast<'a, U: ObjectType>(self) -> Option<&'a U>
+ where
+ Self: 'a,
+ {
+ unsafe {
+ // SAFETY: upcasting to Object is always valid, and the
+ // return type is either NULL or the argument itself
+ let result: *const U =
+ object_dynamic_cast(self.as_object_mut_ptr(), U::TYPE_NAME.as_ptr()).cast();
+
+ result.as_ref()
+ }
+ }
+
+ /// Convert to any QOM type without verification.
+ ///
+ /// # Safety
+ ///
+ /// What safety? You need to know yourself that the cast is correct; only
+ /// use when performance is paramount. It is still better than a raw
+ /// pointer `cast()`, which does not even check that you remain in the
+ /// realm of QOM `ObjectType`s.
+ ///
+ /// `unsafe_cast::<Object>()` is always safe.
+ unsafe fn unsafe_cast<'a, U: ObjectType>(self) -> &'a U
+ where
+ Self: 'a,
+ {
+ unsafe { &*(self.as_ptr::<Self::Target>().cast::<U>()) }
+ }
+}
+
+impl<T: ObjectType> ObjectDeref for &T {}
+impl<T: ObjectType> ObjectCast for &T {}
+
+/// Trait for mutable type casting operations in the QOM hierarchy.
+///
+/// This trait provides the mutable counterparts to [`ObjectCast`]'s conversion
+/// functions. Unlike `ObjectCast`, this trait returns `Result` for fallible
+/// conversions to preserve the original smart pointer if the cast fails. This
+/// is necessary because mutable references cannot be copied, so a failed cast
+/// must return ownership of the original reference. For example:
+///
+/// ```ignore
+/// let mut dev = get_device();
+/// // If this fails, we need the original `dev` back to try something else
+/// match dev.dynamic_cast_mut::<FooDevice>() {
+/// Ok(foodev) => /* use foodev */,
+/// Err(dev) => /* still have ownership of dev */
+/// }
+/// ```
+pub trait ObjectCastMut: Sized + ObjectDeref + DerefMut
+where
+ Self::Target: ObjectType,
+{
+ /// Safely convert from a derived type to one of its parent types.
+ ///
+ /// This is always safe; the [`IsA`] trait provides static verification
+ /// that `Self` dereferences to `U` or a child of `U`.
+ fn upcast_mut<'a, U: ObjectType>(self) -> &'a mut U
+ where
+ Self::Target: IsA<U>,
+ Self: 'a,
+ {
+ // SAFETY: soundness is declared via IsA<U>, which is an unsafe trait
+ unsafe { self.unsafe_cast_mut::<U>() }
+ }
+
+ /// Attempt to convert to a derived type.
+ ///
+ /// Returns `Ok(..)` if the object is of type `U`, or `Err(self)` if the
+ /// object if the conversion failed. This is verified at runtime by
+ /// checking the object's type information.
+ fn downcast_mut<'a, U: IsA<Self::Target>>(self) -> Result<&'a mut U, Self>
+ where
+ Self: 'a,
+ {
+ self.dynamic_cast_mut::<U>()
+ }
+
+ /// Attempt to convert between any two types in the QOM hierarchy.
+ ///
+ /// Returns `Ok(..)` if the object is of type `U`, or `Err(self)` if the
+ /// object if the conversion failed. This is verified at runtime by
+ /// checking the object's type information.
+ fn dynamic_cast_mut<'a, U: ObjectType>(self) -> Result<&'a mut U, Self>
+ where
+ Self: 'a,
+ {
+ unsafe {
+ // SAFETY: upcasting to Object is always valid, and the
+ // return type is either NULL or the argument itself
+ let result: *mut U =
+ object_dynamic_cast(self.as_object_mut_ptr(), U::TYPE_NAME.as_ptr()).cast();
+
+ result.as_mut().ok_or(self)
+ }
+ }
+
+ /// Convert to any QOM type without verification.
+ ///
+ /// # Safety
+ ///
+ /// What safety? You need to know yourself that the cast is correct; only
+ /// use when performance is paramount. It is still better than a raw
+ /// pointer `cast()`, which does not even check that you remain in the
+ /// realm of QOM `ObjectType`s.
+ ///
+ /// `unsafe_cast::<Object>()` is always safe.
+ unsafe fn unsafe_cast_mut<'a, U: ObjectType>(self) -> &'a mut U
+ where
+ Self: 'a,
+ {
+ unsafe { &mut *self.as_mut_ptr::<Self::Target>().cast::<U>() }
+ }
+}
+
+impl<T: ObjectType> ObjectDeref for &mut T {}
+impl<T: ObjectType> ObjectCastMut for &mut T {}
+
+/// Trait a type must implement to be registered with QEMU.
+pub trait ObjectImpl: ObjectType + ClassInitImpl<Self::Class> {
+ /// The parent of the type. This should match the first field of
+ /// the struct that implements `ObjectImpl`:
+ type ParentType: ObjectType;
+
+ /// Whether the object can be instantiated
+ const ABSTRACT: bool = false;
+ const INSTANCE_FINALIZE: Option<unsafe extern "C" fn(obj: *mut Object)> = None;
+
+ /// Function that is called to initialize an object. The parent class will
+ /// have already been initialized so the type is only responsible for
+ /// initializing its own members.
+ ///
+ /// FIXME: The argument is not really a valid reference. `&mut
+ /// MaybeUninit<Self>` would be a better description.
+ const INSTANCE_INIT: Option<unsafe fn(&mut Self)> = None;
+
+ /// Function that is called to finish initialization of an object, once
+ /// `INSTANCE_INIT` functions have been called.
+ const INSTANCE_POST_INIT: Option<fn(&mut Self)> = None;
+
+ /// Called on descendent classes after all parent class initialization
+ /// has occurred, but before the class itself is initialized. This
+ /// is only useful if a class is not a leaf, and can be used to undo
+ /// the effects of copying the contents of the parent's class struct
+ /// to the descendants.
+ const CLASS_BASE_INIT: Option<
+ unsafe extern "C" fn(klass: *mut ObjectClass, data: *mut c_void),
+ > = None;
+
+ const TYPE_INFO: TypeInfo = TypeInfo {
+ name: Self::TYPE_NAME.as_ptr(),
+ parent: Self::ParentType::TYPE_NAME.as_ptr(),
+ instance_size: core::mem::size_of::<Self>(),
+ instance_align: core::mem::align_of::<Self>(),
+ instance_init: match Self::INSTANCE_INIT {
+ None => None,
+ Some(_) => Some(rust_instance_init::<Self>),
+ },
+ instance_post_init: match Self::INSTANCE_POST_INIT {
+ None => None,
+ Some(_) => Some(rust_instance_post_init::<Self>),
+ },
+ instance_finalize: Self::INSTANCE_FINALIZE,
+ abstract_: Self::ABSTRACT,
+ class_size: core::mem::size_of::<Self::Class>(),
+ class_init: Some(rust_class_init::<Self>),
+ class_base_init: Self::CLASS_BASE_INIT,
+ class_data: core::ptr::null_mut(),
+ interfaces: core::ptr::null_mut(),
+ };
+
+ // methods on ObjectClass
+ const UNPARENT: Option<fn(&Self)> = None;
+}
+
+/// Internal trait used to automatically fill in a class struct.
+///
+/// Each QOM class that has virtual methods describes them in a
+/// _class struct_. Class structs include a parent field corresponding
+/// to the vtable of the parent class, all the way up to [`ObjectClass`].
+/// Each QOM type has one such class struct; this trait takes care of
+/// initializing the `T` part of the class struct, for the type that
+/// implements the trait.
+///
+/// Each struct will implement this trait with `T` equal to each
+/// superclass. For example, a device should implement at least
+/// `ClassInitImpl<`[`DeviceClass`](crate::qdev::DeviceClass)`>` and
+/// `ClassInitImpl<`[`ObjectClass`]`>`. Such implementations are made
+/// in one of two ways.
+///
+/// For most superclasses, `ClassInitImpl` is provided by the `qemu-api`
+/// crate itself. The Rust implementation of methods will come from a
+/// trait like [`ObjectImpl`] or [`DeviceImpl`](crate::qdev::DeviceImpl),
+/// and `ClassInitImpl` is provided by blanket implementations that
+/// operate on all implementors of the `*Impl`* trait. For example:
+///
+/// ```ignore
+/// impl<T> ClassInitImpl<DeviceClass> for T
+/// where
+/// T: ClassInitImpl<ObjectClass> + DeviceImpl,
+/// ```
+///
+/// The bound on `ClassInitImpl<ObjectClass>` is needed so that,
+/// after initializing the `DeviceClass` part of the class struct,
+/// the parent [`ObjectClass`] is initialized as well.
+///
+/// The other case is when manual implementation of the trait is needed.
+/// This covers the following cases:
+///
+/// * if a class implements a QOM interface, the Rust code _has_ to define its
+/// own class struct `FooClass` and implement `ClassInitImpl<FooClass>`.
+/// `ClassInitImpl<FooClass>`'s `class_init` method will then forward to
+/// multiple other `class_init`s, for the interfaces as well as the
+/// superclass. (Note that there is no Rust example yet for using interfaces).
+///
+/// * for classes implemented outside the ``qemu-api`` crate, it's not possible
+/// to add blanket implementations like the above one, due to orphan rules. In
+/// that case, the easiest solution is to implement
+/// `ClassInitImpl<YourSuperclass>` for each subclass and not have a
+/// `YourSuperclassImpl` trait at all.
+///
+/// ```ignore
+/// impl ClassInitImpl<YourSuperclass> for YourSubclass {
+/// fn class_init(klass: &mut YourSuperclass) {
+/// klass.some_method = Some(Self::some_method);
+/// <Self as ClassInitImpl<SysBusDeviceClass>>::class_init(&mut klass.parent_class);
+/// }
+/// }
+/// ```
+///
+/// While this method incurs a small amount of code duplication,
+/// it is generally limited to the recursive call on the last line.
+/// This is because classes defined in Rust do not need the same
+/// glue code that is needed when the classes are defined in C code.
+/// You may consider using a macro if you have many subclasses.
+pub trait ClassInitImpl<T> {
+ /// Initialize `klass` to point to the virtual method implementations
+ /// for `Self`. On entry, the virtual method pointers are set to
+ /// the default values coming from the parent classes; the function
+ /// can change them to override virtual methods of a parent class.
+ ///
+ /// The virtual method implementations usually come from another
+ /// trait, for example [`DeviceImpl`](crate::qdev::DeviceImpl)
+ /// when `T` is [`DeviceClass`](crate::qdev::DeviceClass).
+ ///
+ /// On entry, `klass`'s parent class is initialized, while the other fields
+ /// are all zero; it is therefore assumed that all fields in `T` can be
+ /// zeroed, otherwise it would not be possible to provide the class as a
+ /// `&mut T`. TODO: add a bound of [`Zeroable`](crate::zeroable::Zeroable)
+ /// to T; this is more easily done once Zeroable does not require a manual
+ /// implementation (Rust 1.75.0).
+ fn class_init(klass: &mut T);
+}
+
+/// # Safety
+///
+/// We expect the FFI user of this function to pass a valid pointer that
+/// can be downcasted to type `T`. We also expect the device is
+/// readable/writeable from one thread at any time.
+unsafe extern "C" fn rust_unparent_fn<T: ObjectImpl>(dev: *mut Object) {
+ unsafe {
+ assert!(!dev.is_null());
+ let state = core::ptr::NonNull::new_unchecked(dev.cast::<T>());
+ T::UNPARENT.unwrap()(state.as_ref());
+ }
+}
+
+impl<T> ClassInitImpl<ObjectClass> for T
+where
+ T: ObjectImpl,
+{
+ fn class_init(oc: &mut ObjectClass) {
+ if <T as ObjectImpl>::UNPARENT.is_some() {
+ oc.unparent = Some(rust_unparent_fn::<T>);
+ }
+ }
+}
+
+unsafe impl ObjectType for Object {
+ type Class = ObjectClass;
+ const TYPE_NAME: &'static CStr =
+ unsafe { CStr::from_bytes_with_nul_unchecked(bindings::TYPE_OBJECT) };
+}
+
+/// Trait for methods exposed by the Object class. The methods can be
+/// called on all objects that have the trait `IsA<Object>`.
+///
+/// The trait should only be used through the blanket implementation,
+/// which guarantees safety via `IsA`
+pub trait ObjectMethods: ObjectDeref
+where
+ Self::Target: IsA<Object>,
+{
+ /// Return the name of the type of `self`
+ fn typename(&self) -> std::borrow::Cow<'_, str> {
+ let obj = self.upcast::<Object>();
+ // SAFETY: safety of this is the requirement for implementing IsA
+ // The result of the C API has static lifetime
+ unsafe {
+ let p = object_get_typename(obj.as_mut_ptr());
+ CStr::from_ptr(p).to_string_lossy()
+ }
+ }
+
+ fn get_class(&self) -> &'static <Self::Target as ObjectType>::Class {
+ let obj = self.upcast::<Object>();
+
+ // SAFETY: all objects can call object_get_class; the actual class
+ // type is guaranteed by the implementation of `ObjectType` and
+ // `ObjectImpl`.
+ let klass: &'static <Self::Target as ObjectType>::Class =
+ unsafe { &*object_get_class(obj.as_mut_ptr()).cast() };
+
+ klass
+ }
+}
+
+impl<R: ObjectDeref> ObjectMethods for R where R::Target: IsA<Object> {}
diff --git a/rust/qemu-api/src/sysbus.rs b/rust/qemu-api/src/sysbus.rs
index 5ee0685..8193734 100644
--- a/rust/qemu-api/src/sysbus.rs
+++ b/rust/qemu-api/src/sysbus.rs
@@ -6,13 +6,31 @@
pub use bindings::{SysBusDevice, SysBusDeviceClass};
-use crate::{bindings, cell::bql_locked, irq::InterruptSource, prelude::*};
+use crate::{
+ bindings,
+ cell::bql_locked,
+ irq::InterruptSource,
+ prelude::*,
+ qdev::{DeviceClass, DeviceState},
+ qom::ClassInitImpl,
+};
unsafe impl ObjectType for SysBusDevice {
type Class = SysBusDeviceClass;
const TYPE_NAME: &'static CStr =
unsafe { CStr::from_bytes_with_nul_unchecked(bindings::TYPE_SYS_BUS_DEVICE) };
}
+qom_isa!(SysBusDevice: DeviceState, Object);
+
+// TODO: add SysBusDeviceImpl
+impl<T> ClassInitImpl<SysBusDeviceClass> for T
+where
+ T: ClassInitImpl<DeviceClass>,
+{
+ fn class_init(sdc: &mut SysBusDeviceClass) {
+ <T as ClassInitImpl<DeviceClass>>::class_init(&mut sdc.parent_class);
+ }
+}
impl SysBusDevice {
/// Return `self` cast to a mutable pointer, for use in calls to C code.
diff --git a/rust/qemu-api/src/vmstate.rs b/rust/qemu-api/src/vmstate.rs
index bedcf1e..63c897a 100644
--- a/rust/qemu-api/src/vmstate.rs
+++ b/rust/qemu-api/src/vmstate.rs
@@ -10,6 +10,8 @@
//! [`vmstate_fields`](crate::vmstate_fields) are meant to be used when
//! declaring a device model state struct.
+pub use crate::bindings::VMStateDescription;
+
#[doc(alias = "VMSTATE_UNUSED_BUFFER")]
#[macro_export]
macro_rules! vmstate_unused_buffer {
@@ -104,28 +106,6 @@ macro_rules! vmstate_uint32 {
}};
}
-#[doc(alias = "VMSTATE_INT32_V")]
-#[macro_export]
-macro_rules! vmstate_int32_v {
- ($field_name:ident, $struct_name:ty, $version_id:expr) => {{
- $crate::vmstate_single!(
- $field_name,
- $struct_name,
- $version_id,
- ::core::ptr::addr_of!($crate::bindings::vmstate_info_int32),
- ::core::mem::size_of::<i32>()
- )
- }};
-}
-
-#[doc(alias = "VMSTATE_INT32")]
-#[macro_export]
-macro_rules! vmstate_int32 {
- ($field_name:ident, $struct_name:ty) => {{
- $crate::vmstate_int32_v!($field_name, $struct_name, 0)
- }};
-}
-
#[doc(alias = "VMSTATE_ARRAY")]
#[macro_export]
macro_rules! vmstate_array {
@@ -328,7 +308,7 @@ macro_rules! vmstate_fields {
}
/// A transparent wrapper type for the `subsections` field of
-/// [`VMStateDescription`](crate::bindings::VMStateDescription).
+/// [`VMStateDescription`].
///
/// This is necessary to be able to declare subsection descriptions as statics,
/// because the only way to implement `Sync` for a foreign type (and `*const`
@@ -342,9 +322,8 @@ macro_rules! vmstate_fields {
unsafe impl Sync for VMStateSubsectionsWrapper {}
-/// Helper macro to declare a list of subsections
-/// ([`VMStateDescription`](`crate::bindings::VMStateDescription`)) into a
-/// static and return a pointer to the array of pointers it created.
+/// Helper macro to declare a list of subsections ([`VMStateDescription`])
+/// into a static and return a pointer to the array of pointers it created.
#[macro_export]
macro_rules! vmstate_subsections {
($($subsection:expr),*$(,)*) => {{
diff --git a/rust/qemu-api/tests/tests.rs b/rust/qemu-api/tests/tests.rs
index 278efe9..1d2825b 100644
--- a/rust/qemu-api/tests/tests.rs
+++ b/rust/qemu-api/tests/tests.rs
@@ -2,69 +2,160 @@
// Author(s): Manos Pitsidianakis <manos.pitsidianakis@linaro.org>
// SPDX-License-Identifier: GPL-2.0-or-later
-use std::ffi::CStr;
-
-use qemu_api::{
- bindings::*, c_str, declare_properties, define_property, definitions::ObjectImpl,
- device_class::DeviceImpl, impl_device_class, prelude::*, zeroable::Zeroable,
+use std::{
+ ffi::CStr,
+ os::raw::c_void,
+ ptr::{addr_of, addr_of_mut},
};
+use qemu_api::{
+ bindings::*,
+ c_str,
+ cell::{self, BqlCell},
+ declare_properties, define_property,
+ prelude::*,
+ qdev::{DeviceImpl, DeviceState, Property},
+ qom::ObjectImpl,
+ vmstate::VMStateDescription,
+ zeroable::Zeroable,
+};
+
+// Test that macros can compile.
+pub static VMSTATE: VMStateDescription = VMStateDescription {
+ name: c_str!("name").as_ptr(),
+ unmigratable: true,
+ ..Zeroable::ZERO
+};
+
+#[derive(qemu_api_macros::offsets)]
+#[repr(C)]
+#[derive(qemu_api_macros::Object)]
+pub struct DummyState {
+ parent: DeviceState,
+ migrate_clock: bool,
+}
+
+qom_isa!(DummyState: Object, DeviceState);
+
+declare_properties! {
+ DUMMY_PROPERTIES,
+ define_property!(
+ c_str!("migrate-clk"),
+ DummyState,
+ migrate_clock,
+ unsafe { &qdev_prop_bool },
+ bool
+ ),
+}
+
+unsafe impl ObjectType for DummyState {
+ type Class = <DeviceState as ObjectType>::Class;
+ const TYPE_NAME: &'static CStr = c_str!("dummy");
+}
+
+impl ObjectImpl for DummyState {
+ type ParentType = DeviceState;
+ const ABSTRACT: bool = false;
+}
+
+impl DeviceImpl for DummyState {
+ fn properties() -> &'static [Property] {
+ &DUMMY_PROPERTIES
+ }
+ fn vmsd() -> Option<&'static VMStateDescription> {
+ Some(&VMSTATE)
+ }
+}
+
+fn init_qom() {
+ static ONCE: BqlCell<bool> = BqlCell::new(false);
+
+ cell::bql_start_test();
+ if !ONCE.get() {
+ unsafe {
+ module_call_init(module_init_type::MODULE_INIT_QOM);
+ }
+ ONCE.set(true);
+ }
+}
+
#[test]
-fn test_device_decl_macros() {
- // Test that macros can compile.
- pub static VMSTATE: VMStateDescription = VMStateDescription {
- name: c_str!("name").as_ptr(),
- unmigratable: true,
- ..Zeroable::ZERO
- };
-
- #[derive(qemu_api_macros::offsets)]
- #[repr(C)]
- #[derive(qemu_api_macros::Object)]
- pub struct DummyState {
- pub _parent: DeviceState,
- pub migrate_clock: bool,
- }
-
- #[repr(C)]
- pub struct DummyClass {
- pub _parent: DeviceClass,
- }
-
- declare_properties! {
- DUMMY_PROPERTIES,
- define_property!(
- c_str!("migrate-clk"),
- DummyState,
- migrate_clock,
- unsafe { &qdev_prop_bool },
- bool
- ),
- }
-
- unsafe impl ObjectType for DummyState {
- type Class = DummyClass;
- const TYPE_NAME: &'static CStr = c_str!("dummy");
- }
-
- impl ObjectImpl for DummyState {
- type ParentType = DeviceState;
- const ABSTRACT: bool = false;
- }
-
- impl DeviceImpl for DummyState {
- fn properties() -> &'static [Property] {
- &DUMMY_PROPERTIES
- }
- fn vmsd() -> Option<&'static VMStateDescription> {
- Some(&VMSTATE)
- }
- }
-
- impl_device_class!(DummyState);
-
+/// Create and immediately drop an instance.
+fn test_object_new() {
+ init_qom();
unsafe {
- module_call_init(module_init_type::MODULE_INIT_QOM);
object_unref(object_new(DummyState::TYPE_NAME.as_ptr()).cast());
}
}
+
+#[test]
+/// Try invoking a method on an object.
+fn test_typename() {
+ init_qom();
+ let p: *mut DummyState = unsafe { object_new(DummyState::TYPE_NAME.as_ptr()).cast() };
+ let p_ref: &DummyState = unsafe { &*p };
+ assert_eq!(p_ref.typename(), "dummy");
+ unsafe {
+ object_unref(p_ref.as_object_mut_ptr().cast::<c_void>());
+ }
+}
+
+// a note on all "cast" tests: usually, especially for downcasts the desired
+// class would be placed on the right, for example:
+//
+// let sbd_ref = p.dynamic_cast::<SysBusDevice>();
+//
+// Here I am doing the opposite to check that the resulting type is correct.
+
+#[test]
+#[allow(clippy::shadow_unrelated)]
+/// Test casts on shared references.
+fn test_cast() {
+ init_qom();
+ let p: *mut DummyState = unsafe { object_new(DummyState::TYPE_NAME.as_ptr()).cast() };
+
+ let p_ref: &DummyState = unsafe { &*p };
+ let obj_ref: &Object = p_ref.upcast();
+ assert_eq!(addr_of!(*obj_ref), p.cast());
+
+ let sbd_ref: Option<&SysBusDevice> = obj_ref.dynamic_cast();
+ assert!(sbd_ref.is_none());
+
+ let dev_ref: Option<&DeviceState> = obj_ref.downcast();
+ assert_eq!(addr_of!(*dev_ref.unwrap()), p.cast());
+
+ // SAFETY: the cast is wrong, but the value is only used for comparison
+ unsafe {
+ let sbd_ref: &SysBusDevice = obj_ref.unsafe_cast();
+ assert_eq!(addr_of!(*sbd_ref), p.cast());
+
+ object_unref(p_ref.as_object_mut_ptr().cast::<c_void>());
+ }
+}
+
+#[test]
+#[allow(clippy::shadow_unrelated)]
+/// Test casts on mutable references.
+fn test_cast_mut() {
+ init_qom();
+ let p: *mut DummyState = unsafe { object_new(DummyState::TYPE_NAME.as_ptr()).cast() };
+
+ let p_ref: &mut DummyState = unsafe { &mut *p };
+ let obj_ref: &mut Object = p_ref.upcast_mut();
+ assert_eq!(addr_of_mut!(*obj_ref), p.cast());
+
+ let sbd_ref: Result<&mut SysBusDevice, &mut Object> = obj_ref.dynamic_cast_mut();
+ let obj_ref = sbd_ref.unwrap_err();
+
+ let dev_ref: Result<&mut DeviceState, &mut Object> = obj_ref.downcast_mut();
+ let dev_ref = dev_ref.unwrap();
+ assert_eq!(addr_of_mut!(*dev_ref), p.cast());
+
+ // SAFETY: the cast is wrong, but the value is only used for comparison
+ unsafe {
+ let sbd_ref: &mut SysBusDevice = obj_ref.unsafe_cast_mut();
+ assert_eq!(addr_of_mut!(*sbd_ref), p.cast());
+
+ object_unref(p_ref.as_object_mut_ptr().cast::<c_void>());
+ }
+}
diff --git a/stubs/iothread-lock.c b/stubs/iothread-lock.c
index 5467659..6050c08 100644
--- a/stubs/iothread-lock.c
+++ b/stubs/iothread-lock.c
@@ -1,11 +1,17 @@
#include "qemu/osdep.h"
#include "qemu/main-loop.h"
+static bool bql_is_locked = false;
static uint32_t bql_unlock_blocked;
bool bql_locked(void)
{
- return false;
+ return bql_is_locked;
+}
+
+void rust_bql_mock_lock(void)
+{
+ bql_is_locked = true;
}
void bql_lock_impl(const char *file, int line)
diff --git a/system/cpus.c b/system/cpus.c
index ba633c7..4b43ceb 100644
--- a/system/cpus.c
+++ b/system/cpus.c
@@ -538,6 +538,12 @@
return bql_locked();
}
+void rust_bql_mock_lock(void)
+{
+ error_report("This function should be used only from tests");
+ abort();
+}
+
/*
* The BQL is taken from so many places that it is worth profiling the
* callers directly, instead of funneling them all through a single function.
diff --git a/system/qdev-monitor.c b/system/qdev-monitor.c
index 03ae610..6831fff 100644
--- a/system/qdev-monitor.c
+++ b/system/qdev-monitor.c
@@ -752,19 +752,18 @@
#define qdev_printf(fmt, ...) monitor_printf(mon, "%*s" fmt, indent, "", ## __VA_ARGS__)
-static void qdev_print_props(Monitor *mon, DeviceState *dev, const Property *props,
+static void qdev_print_props(Monitor *mon, DeviceState *dev, DeviceClass *dc,
int indent)
{
- if (!props)
- return;
- for (; props->name; props++) {
+ for (int i = 0, n = dc->props_count_; i < n; ++i) {
+ const Property *prop = &dc->props_[i];
char *value;
- char *legacy_name = g_strdup_printf("legacy-%s", props->name);
+ char *legacy_name = g_strdup_printf("legacy-%s", prop->name);
if (object_property_get_type(OBJECT(dev), legacy_name, NULL)) {
value = object_property_get_str(OBJECT(dev), legacy_name, NULL);
} else {
- value = object_property_print(OBJECT(dev), props->name, true,
+ value = object_property_print(OBJECT(dev), prop->name, true,
NULL);
}
g_free(legacy_name);
@@ -772,7 +771,7 @@
if (!value) {
continue;
}
- qdev_printf("%s = %s\n", props->name,
+ qdev_printf("%s = %s\n", prop->name,
*value ? value : "<null>");
g_free(value);
}
@@ -812,7 +811,7 @@
}
class = object_get_class(OBJECT(dev));
do {
- qdev_print_props(mon, dev, DEVICE_CLASS(class)->props_, indent);
+ qdev_print_props(mon, dev, DEVICE_CLASS(class), indent);
class = object_class_get_parent(class);
} while (class != object_class_by_name(TYPE_DEVICE));
bus_print_dev(dev->parent_bus, mon, dev, indent);
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 1afa075..0e882c4 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2652,7 +2652,6 @@
DEFINE_PROP_INT32("core-count", ARMCPU, core_count, -1),
/* True to default to the backward-compat old CNTFRQ rather than 1Ghz */
DEFINE_PROP_BOOL("backcompat-cntfrq", ARMCPU, backcompat_cntfrq, false),
- DEFINE_PROP_END_OF_LIST()
};
static const gchar *arm_gdb_arch_name(CPUState *cs)
diff --git a/target/avr/cpu.c b/target/avr/cpu.c
index a7529a1..64dc156 100644
--- a/target/avr/cpu.c
+++ b/target/avr/cpu.c
@@ -151,7 +151,6 @@
static const Property avr_cpu_properties[] = {
DEFINE_PROP_UINT32("init-sp", AVRCPU, init_sp, 0),
- DEFINE_PROP_END_OF_LIST()
};
static ObjectClass *avr_cpu_class_by_name(const char *cpu_model)
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index a700072..8c89a8c 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@@ -53,7 +53,6 @@
DEFINE_PROP_UNSIGNED("lldb-stack-adjust", HexagonCPU, lldb_stack_adjust, 0,
qdev_prop_uint32, target_ulong),
DEFINE_PROP_BOOL("short-circuit", HexagonCPU, short_circuit, true),
- DEFINE_PROP_END_OF_LIST()
};
const char * const hexagon_regnames[TOTAL_PER_THREAD_REGS] = {
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 5253399..c28adee 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5387,7 +5387,6 @@
static const Property max_x86_cpu_properties[] = {
DEFINE_PROP_BOOL("migratable", X86CPU, migratable, true),
DEFINE_PROP_BOOL("host-cache-info", X86CPU, cache_info_passthrough, false),
- DEFINE_PROP_END_OF_LIST()
};
static void max_x86_cpu_realize(DeviceState *dev, Error **errp)
@@ -8548,7 +8547,6 @@
DEFINE_PROP_BOOL("x-intel-pt-auto-level", X86CPU, intel_pt_auto_level,
true),
DEFINE_PROP_BOOL("x-l1-cache-per-thread", X86CPU, l1_cache_per_core, true),
- DEFINE_PROP_END_OF_LIST()
};
#ifndef CONFIG_USER_ONLY
diff --git a/target/i386/kvm/kvm.c b/target/i386/kvm/kvm.c
index 8e17942..2ff618f 100644
--- a/target/i386/kvm/kvm.c
+++ b/target/i386/kvm/kvm.c
@@ -2415,6 +2415,21 @@
}
}
+void kvm_arch_reset_parked_vcpu(unsigned long vcpu_id, int kvm_fd)
+{
+ g_autofree struct kvm_msrs *msrs = NULL;
+
+ msrs = g_malloc0(sizeof(*msrs) + sizeof(msrs->entries[0]));
+ msrs->entries[0].index = MSR_IA32_TSC;
+ msrs->entries[0].data = 1; /* match the value in x86_cpu_reset() */
+ msrs->nmsrs++;
+
+ if (ioctl(kvm_fd, KVM_SET_MSRS, msrs) != 1) {
+ warn_report("parked vCPU %lu TSC reset failed: %d",
+ vcpu_id, errno);
+ }
+}
+
void kvm_arch_do_init_vcpu(X86CPU *cpu)
{
CPUX86State *env = &cpu->env;
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 0e41e39..83554f6 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -403,7 +403,6 @@
/*
* End of properties reserved by Xilinx DTS conversion tool.
*/
- DEFINE_PROP_END_OF_LIST(),
};
static ObjectClass *mb_cpu_class_by_name(const char *cpu_model)
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index 02c0e1b..aa3d905 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -541,7 +541,6 @@
static const Property mips_cpu_properties[] = {
DEFINE_PROP_BOOL("big-endian", MIPSCPU, is_big_endian, TARGET_BIG_ENDIAN),
- DEFINE_PROP_END_OF_LIST(),
};
#ifdef CONFIG_TCG
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 1253dbf..5e95790 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -7414,11 +7414,6 @@
#endif
}
-static Property ppc_cpu_properties[] = {
- /* add default property here */
- DEFINE_PROP_END_OF_LIST(),
-};
-
#ifndef CONFIG_USER_ONLY
#include "hw/core/sysemu-cpu-ops.h"
@@ -7468,7 +7463,6 @@
device_class_set_parent_unrealize(dc, ppc_cpu_unrealize,
&pcc->parent_unrealize);
pcc->pvr_match = ppc_pvr_match_default;
- device_class_set_props(dc, ppc_cpu_properties);
resettable_class_set_parent_phases(rc, NULL, ppc_cpu_reset_hold, NULL,
&pcc->parent_phases);
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 58bb519..f7d1da1 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -215,7 +215,7 @@
ISA_EXT_DATA_ENTRY(xtheadsync, PRIV_VERSION_1_11_0, ext_xtheadsync),
ISA_EXT_DATA_ENTRY(xventanacondops, PRIV_VERSION_1_12_0, ext_XVentanaCondOps),
- DEFINE_PROP_END_OF_LIST(),
+ { },
};
bool isa_ext_is_enabled(RISCVCPU *cpu, uint32_t ext_offset)
@@ -1671,7 +1671,7 @@
MULTI_EXT_CFG_BOOL("zvksc", ext_zvksc, false),
MULTI_EXT_CFG_BOOL("zvksg", ext_zvksg, false),
- DEFINE_PROP_END_OF_LIST(),
+ { },
};
const RISCVCPUMultiExtConfig riscv_cpu_vendor_exts[] = {
@@ -1688,13 +1688,14 @@
MULTI_EXT_CFG_BOOL("xtheadsync", ext_xtheadsync, false),
MULTI_EXT_CFG_BOOL("xventanacondops", ext_XVentanaCondOps, false),
- DEFINE_PROP_END_OF_LIST(),
+ { },
};
/* These are experimental so mark with 'x-' */
const RISCVCPUMultiExtConfig riscv_cpu_experimental_exts[] = {
MULTI_EXT_CFG_BOOL("x-svukte", ext_svukte, false),
- DEFINE_PROP_END_OF_LIST(),
+
+ { },
};
/*
@@ -1708,7 +1709,7 @@
MULTI_EXT_CFG_BOOL("zic64b", ext_zic64b, true),
MULTI_EXT_CFG_BOOL("ssstateen", ext_ssstateen, true),
- DEFINE_PROP_END_OF_LIST(),
+ { },
};
/* Deprecated entries marked for future removal */
@@ -1725,7 +1726,7 @@
MULTI_EXT_CFG_BOOL("Zve64f", ext_zve64f, false),
MULTI_EXT_CFG_BOOL("Zve64d", ext_zve64d, false),
- DEFINE_PROP_END_OF_LIST(),
+ { },
};
static void cpu_set_prop_err(RISCVCPU *cpu, const char *propname,
@@ -2797,7 +2798,6 @@
* it with -x and default to 'false'.
*/
DEFINE_PROP_BOOL("x-misa-w", RISCVCPU, cfg.misa_w, false),
- DEFINE_PROP_END_OF_LIST(),
};
#if defined(TARGET_RISCV64)
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 4702761..9b367ed 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -309,8 +309,8 @@
return "s390:64-bit";
}
+#ifndef CONFIG_USER_ONLY
static const Property s390x_cpu_properties[] = {
-#if !defined(CONFIG_USER_ONLY)
DEFINE_PROP_UINT32("core-id", S390CPU, env.core_id, 0),
DEFINE_PROP_INT32("socket-id", S390CPU, env.socket_id, -1),
DEFINE_PROP_INT32("book-id", S390CPU, env.book_id, -1),
@@ -318,9 +318,8 @@
DEFINE_PROP_BOOL("dedicated", S390CPU, env.dedicated, false),
DEFINE_PROP_CPUS390ENTITLEMENT("entitlement", S390CPU, env.entitlement,
S390_CPU_ENTITLEMENT_AUTO),
-#endif
- DEFINE_PROP_END_OF_LIST()
};
+#endif
#ifdef CONFIG_TCG
#include "hw/core/tcg-cpu-ops.h"
@@ -388,7 +387,6 @@
device_class_set_parent_realize(dc, s390_cpu_realizefn,
&scc->parent_realize);
- device_class_set_props(dc, s390x_cpu_properties);
dc->user_creatable = true;
resettable_class_set_parent_phases(rc, NULL, s390_cpu_reset_hold, NULL,
@@ -404,6 +402,7 @@
cc->gdb_read_register = s390_cpu_gdb_read_register;
cc->gdb_write_register = s390_cpu_gdb_write_register;
#ifndef CONFIG_USER_ONLY
+ device_class_set_props(dc, s390x_cpu_properties);
s390_cpu_class_init_sysemu(cc);
#endif
cc->disas_set_info = s390_cpu_disas_set_info;
diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c
index 8f494c2..a65a646 100644
--- a/target/sparc/cpu.c
+++ b/target/sparc/cpu.c
@@ -917,7 +917,6 @@
DEFINE_PROP_UINT32("mmu-version", SPARCCPU, env.def.mmu_version, 0),
DEFINE_PROP("nwindows", SPARCCPU, env.def.nwindows,
qdev_prop_nwindows, uint32_t),
- DEFINE_PROP_END_OF_LIST()
};
#ifndef CONFIG_USER_ONLY
diff --git a/tests/unit/test-qdev-global-props.c b/tests/unit/test-qdev-global-props.c
index 1eb95d2..de7a572 100644
--- a/tests/unit/test-qdev-global-props.c
+++ b/tests/unit/test-qdev-global-props.c
@@ -49,7 +49,6 @@
static const Property static_props[] = {
DEFINE_PROP_UINT32("prop1", MyType, prop1, PROP_DEFAULT),
DEFINE_PROP_UINT32("prop2", MyType, prop2, PROP_DEFAULT),
- DEFINE_PROP_END_OF_LIST()
};
static void static_prop_class_init(ObjectClass *oc, void *data)
