commit | 34d94b7af9f1dc4cae550ecc7b825c9567741a12 | [log] [tgz] |
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author | Jinjie Ruan <ruanjinjie@huawei.com> | Fri Apr 19 14:33:00 2024 +0100 |
committer | Peter Maydell <peter.maydell@linaro.org> | Thu Apr 25 10:21:05 2024 +0100 |
tree | a8bd90f20c96e361383cf40d7e6b85e858a85bb2 | |
parent | 83f320753827da6bd381b46b8f3e6736046c86cd [diff] |
hw/arm/virt: Wire NMI and VINMI irq lines from GIC to CPU Wire the new NMI and VINMI interrupt line from the GIC to each CPU if it is not GICv2. Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240407081733.3231820-12-ruanjinjie@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>