tree a8bd90f20c96e361383cf40d7e6b85e858a85bb2
parent 83f320753827da6bd381b46b8f3e6736046c86cd
author Jinjie Ruan <ruanjinjie@huawei.com> 1713533580 +0100
committer Peter Maydell <peter.maydell@linaro.org> 1714036865 +0100

hw/arm/virt: Wire NMI and VINMI irq lines from GIC to CPU

Wire the new NMI and VINMI interrupt line from the GIC to each CPU if it
is not GICv2.

Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20240407081733.3231820-12-ruanjinjie@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>